Display device and method of manufacturing same

Abstract

The invention relates to a display device and a method of manufacturing the same. A method of manufacturing a display device includes forming a substrate, a pixel circuit layer, and a light emitting element layer; forming a first bank on the light emitting element layer; forming a reflective layer on the first bank; forming a second bank and a scattering layer on the reflective layer; forming a first color conversion layer and a second color conversion layer on the substrate in a region surrounded by the second bank; and forming a first capping layer on the scattering layer, the first color conversion layer, and the second color conversion layer. The reflective layer is formed by an etching process using a positive photosensitive material.

Description

[0001] Cross - reference to related applications

[0002] This application claims the priority and benefit of Korean Patent Application No. 10 - 2024 - 0013447, filed on January 29, 2024, with the Korean Intellectual Property Office (KIPO), the content of which is incorporated herein by reference in its entirety. Technical field

[0003] The present disclosure relates to a display device and a method of manufacturing the same. Background art

[0004] Recently, the interest in information display has increased. Accordingly, research and development of display devices are continuously underway.

[0005] The above is only intended to help understand the background art of the technical idea of the present disclosure, and thus it cannot be understood as the content of the prior art known to those skilled in the art corresponding to the present disclosure. Summary of the invention

[0006] An object of the present disclosure is to provide a display device and a method of manufacturing the same that can stably form a bank while improving the light output efficiency of the display device.

[0007] According to an embodiment of the present disclosure, a method of manufacturing a display device includes: forming a substrate, a pixel circuit layer, and a light - emitting element layer; forming a first bank on the light - emitting element layer; forming a reflective layer on the first bank; forming a second bank and a scattering layer on the reflective layer; forming a first color - conversion layer and a second color - conversion layer in a region surrounded by the second bank on the substrate; and forming a first capping layer on the scattering layer, the first color - conversion layer, and the second color - conversion layer. The reflective layer is formed through an etching process using a positive - type photosensitive material.

[0008] The method may further include forming an insulating layer disposed on the reflective layer and surrounding the reflective layer.

[0009] The reflective layer may surround the side surface and the upper surface of the first bank.

[0010] Each of the first color - conversion layer and the second color - conversion layer may include color - conversion particles capable of converting colors, and one surface of the second bank may face the first bank and the reflective layer.

[0011] The second bank and the scattering layer may include a scatterer, and the scatterer may include at least one of barium sulfate, calcium carbonate, and titanium oxide.

[0012] The second bank and the scattering layer may include a liquid - repellent material.

[0013] Each of the first dam and the second dam may have one of a square shape, a rectangular shape, and a trapezoidal shape.

[0014] The second dam and the scattering layer may be formed at the same time point.

[0015] Forming the reflective layer on the first dam may include: forming a metal layer on the first dam; forming a photoresist layer on the metal layer using a positive photosensitive material; removing the exposed portion of the photoresist layer through a developing process; and forming the reflective layer by etching the metal layer using the remaining photoresist layer and removing the remaining photoresist layer.

[0016] According to an embodiment of the present disclosure, a display device includes: a substrate including regions where a first sub-pixel, a second sub-pixel, and a third sub-pixel are formed; a first dam formed on the substrate and protruding in a first direction; a reflective layer formed on the first dam; a second dam disposed on the reflective layer and overlapping with the first dam; a first color conversion layer formed in the first sub-pixel and formed on the substrate in a region surrounded by the first dam; a second color conversion layer formed in the second sub-pixel and formed on the substrate in a region surrounded by the first dam; and a scattering layer formed in the third sub-pixel, and the scattering layer and the second dam include the same material.

[0017] The display device may further include an insulating layer disposed on the reflective layer and surrounding the reflective layer.

[0018] The reflective layer may surround the side surface and the upper surface of the first dam.

[0019] Each of the first color conversion layer and the second color conversion layer may include color conversion particles capable of converting colors, and the surface of the second dam may face the first dam and the reflective layer.

[0020] The second dam and the scattering layer may include a scatterer, and the scatterer may include at least one of barium sulfate, calcium carbonate, and titanium oxide.

[0021] The second dam and the scattering layer may include a liquid repellent material.

[0022] Each of the first dam and the second dam may have one of a square shape, a rectangular shape, and a trapezoidal shape.

[0023] The display device may further include a first capping layer on the first color conversion layer and the second color conversion layer.

[0024] The display device may further include an insulating layer disposed on the reflective layer and surrounding the reflective layer. The reflective layer may surround the side surface and the upper surface of the first dam, each of the first color conversion layer and the second color conversion layer may include color conversion particles capable of converting colors, and the surface of the second dam may face the first dam and the reflective layer.

[0025] The display device may further include a first capping layer on the first color conversion layer and the second color conversion layer. The second bank and the scattering layer may include a scatterer, the scatterer may include at least one of barium sulfate, calcium carbonate, and titanium oxide, and each of the first bank and the second bank has one of a square shape, a rectangular shape, and a trapezoidal shape.

[0026] According to the above-described embodiments, a display device capable of stably forming a bank while improving the light output efficiency of the display device and a method of manufacturing the display device can be provided.

[0027] The effects according to the embodiments are not limited to the above, and various effects are also included in this specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other features of the present disclosure will become more apparent by describing the embodiments of the present disclosure in more detail with reference to the accompanying drawings, in which:

[0029] Figure 1 is a schematic block diagram showing a display device according to an embodiment of the present disclosure;

[0030] Figure 2 is Figure 1 a schematic plan view of a display panel of

[0031] Figure 3 is Figure 1 a schematic cross-sectional view of a display panel of

[0032] Figure 4 is a schematic diagram showing an equivalent circuit of an embodiment of a pixel included in a display device of Figure 1

[0033] Figure 5 is Figure 2 a schematic cross-sectional view taken along line I-I' of an embodiment of a display panel of

[0034] Figure 6 is Figure 2 a schematic cross-sectional view taken along line I-I' of another embodiment of a display panel of

[0035] Figure 7 is a schematic enlarged view showing Figure 5 part A of

[0036] Figure 8 is a schematic flowchart showing a method of manufacturing a display device according to an embodiment of the present disclosure; and

[0037] Figures 9 to 18 is a schematic diagram showing an example of a method of manufacturing a display device.​ Detailed Implementation Modes

[0038] In the following, embodiments according to the present disclosure will be described in detail with reference to the accompanying drawings. It should be noted that in the following description, only parts necessary for understanding the operation according to the present disclosure are described, and descriptions of other parts may be omitted so as not to obscure the subject matter of the present disclosure. In addition, the present disclosure may be implemented in other forms and is not limited to the embodiments described herein. However, the embodiments described herein are provided to describe in sufficient detail to enable those skilled in the art to which the present disclosure pertains to easily implement the technical spirit of the present disclosure.

[0039] When an element (such as a layer) is referred to as being “on”, “connected to”, or “coupled to” another element or layer, it can be directly on, directly connected to, or directly coupled to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being “directly on”, “directly connected to”, or “directly coupled to” another element or layer, there are no intervening elements or layers. For this reason, the term “connection” can refer to physical connection, electrical connection, and / or fluid connection with or without intervening elements. Throughout the specification, unless otherwise specified, in the case of a certain part “including”, this means that this part may also include another component, rather than excluding another component. “At least any one of X, Y, and Z” and “at least any one selected from the group consisting of X, Y, and Z” can be interpreted as one X, one Y, one Z, or any combination of two or more of X, Y, and Z (for example, XYZ, XY, YZ, and XZ). Here, “and / or” includes all combinations of one or more of the corresponding configurations.

[0040] Here, terms such as “first” and “second” can be used to describe various components, but these components are not limited to these terms. These terms are used to distinguish one component from another. Therefore, within the scope not departing from what is disclosed herein, the first component may refer to the second component.

[0041] For purposes of description, spatial relative terms such as "below", "above", etc. may be used to describe the relationship between one element or feature and another element or feature as shown in the accompanying drawings. In addition to the directions depicted in the drawings, spatial relative terms are intended to include other directions in use, in operation, and / or in manufacturing. For example, when the device shown in the drawings is inverted, an element depicted as being "below" other elements or features is positioned in the direction "above" the other elements or features. Thus, in an embodiment, the term "below" can include both upward and downward directions. Additionally, the device may face other directions (e.g., rotated 90 degrees or in other directions), and thus, the spatial relative terms used herein are to be interpreted accordingly.

[0042] Various embodiments are described with reference to the accompanying drawings that schematically illustrate idealized embodiments. Accordingly, it will be appreciated that the shapes may vary, for example, according to tolerances and / or manufacturing techniques. Thus, the embodiments disclosed herein are not to be construed as limited to the specific shapes shown, and should be construed to include, for example, shape changes that occur due to manufacturing. As described above, the shapes shown in the drawings may not show the actual shape of the regions of the device, and the present embodiment is not limited thereto.

[0043] In view of the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), the term "about" or "approximate" as used herein includes the recited value and means within an acceptable deviation range of the particular value as determined by a person of ordinary skill in the art. For example, "about" may mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the recited value.

[0044] Unless otherwise defined or implied herein, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the relevant art and the context of this disclosure, and should not be interpreted as idealized or overly formal meanings, unless expressly so defined herein.

[0045] Figure 1 is a schematic block diagram showing a display device according to an embodiment of the present disclosure.

[0046] Reference Figure 1 , the display device DD may include a display panel DP, a controller 110, a data driver 120, and / or a scan driver 130.

[0047] The display panel DP may include pixels PXL. The display panel DP may be connected to data lines DL1 to DLm and scan lines SL1 to SLn. The data lines DL1 to DLm and the scan lines SL1 to SLn may be arranged to cross (or intersect) each other on the display panel DP. The pixels PXL may be electrically connected to the data lines DL1 to DLm and the scan lines SL1 to SLn in the display panel DP.

[0048] The display panel DP may be various types of panels, such as an organic light emitting diode (OLED) panel. The types of lines provided in the display panel DP may vary according to the pixel structure, panel type, etc.

[0049] The controller 110 may control the operations of the data driver 120 and the scan driver 130. The controller 110 may receive signals RGB and CTRL, and may provide a first control signal SCS to the scan driver 130 to apply scan signals to the scan lines SL1 to SLn according to the timing implemented in each frame. The controller 110 may provide an image data signal DATA converted from the data format of the image signal to suit the interface specification of the data driver 120. When the scan signals are applied to the scan lines SL1 to SLn, the controller 110 may provide a second control signal DCS to the data driver 120 to apply data voltages to the data lines DL1 to DLm.

[0050] The controller 110 may be a timing controller used in typical display technologies, or may be a control device that can perform another control function by including a timing controller.

[0051] The data driver 120 may output data signals to the data lines DL1 to DLm. For example, the data driver 120 may receive the second control signal DCS and the image data signal DATA from the controller 110. The data driver 120 may convert the image data signal DATA into data signals and output the data signals to the data lines DL1 to DLm. The data signals may be analog voltages corresponding to the gray level values of the image data signal DATA. For example, when a specific scan line is selected by the scan driver 130, the data driver 120 may provide analog data voltages to the data lines DL1 to DLm.

[0052] The scan driver 130 may receive a first control signal SCS from the controller 110. The scan driver 130 may output scan signals to the scan lines SL1 to SLn. The scan driver 130 may sequentially provide scan signals to the scan lines SL1 to SLn according to the first control signal SCS from the controller 110. The pixel PXL receiving each scan signal may receive an analog voltage corresponding to the gray level value of the image data signal DATA, and output light with a brightness corresponding to the received analog voltage in response to the emission control signal. Accordingly, an image may be displayed on the display panel DP.

[0053] In Figure 1 , for ease of description, the data driver 120 and the scan driver 130 are shown as separate configurations, but the present disclosure is not limited thereto. For example, at least a part of the data driver 120 and the scan driver 130 may be integrated into one driving circuit, one module, etc.

[0054] Figure 2 is Figure 1 a schematic plan view of the display panel.

[0055] Referring to Figure 2 , the display panel DP and the substrate SUB for forming the display panel DP may include a display area DA for displaying an image and a non-display area NDA other than the display area DA. The display area DA may configure a screen on which an image is displayed, and the non-display area NDA may be the remaining area other than the display area DA.

[0056] For ease of description, in Figure 2 , the structure of the display panel DP is briefly shown based on the display area DA. However, although not shown in Figure 2 , at least one driving circuit (e.g., at least one of the scan driver 130 and the data driver 120), lines, and / or pads may be further provided on the display panel DP.

[0057] The pixel portion may be provided in the display area DA. Each pixel portion may include a first sub-pixel SPXL1, a second sub-pixel SPXL2, and / or a third sub-pixel SPXL3. In Figure 2 , for clear and concise description, the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 included in the pixel portion (or pixel unit; hereinafter referred to as "pixel portion") are shown. Other pixel portions may also be understood to include the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3.

[0058] Hereinafter, when at least one pixel among the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 is arbitrarily referred to, or when two or more types of pixels are co-referred to, the at least one pixel or the two or more types of pixels are referred to as "pixel(s) PXL".

[0059] Pixels PXL can be regularly arranged according to rules such as stripes or arrangement structures. However, the arrangement structure of pixels PXL is not limited thereto, and pixels PXL can be arranged in the display area DA in various structures and / or methods.

[0060] According to an embodiment, two or more types of pixels PXL that emit light of different colors can be provided in the display area DA. For example, in the display area DA, a first sub-pixel SPXL1 that emits light of a first color, a second sub-pixel SPXL2 that emits light of a second color, and a third sub-pixel SPXL3 that emits light of a third color can be arranged. At least one of the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 that are set adjacent to each other can constitute one pixel portion capable of emitting light of various colors. For example, the first sub-pixel SPXL1 can be a red pixel that emits red light, the second sub-pixel SPXL2 can be a green pixel that emits green light, and the third sub-pixel SPXL3 can be a blue pixel that emits blue light, but the present disclosure is not limited thereto.

[0061] However, in Figure 2 one first sub-pixel SPXL1, one second sub-pixel SPXL2, and one third sub-pixel SPXL3 that constitute a pixel portion are shown, but the present disclosure is not limited thereto. For example, the pixel portion can include one first sub-pixel SPXL1, two second sub-pixel SPXL2, and one third sub-pixel SPXL3.

[0062] The first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 can respectively include a first light-emitting element LD1 (see Figure 5 ), a second light-emitting element LD2 (see Figure 5 ), and a third light-emitting element LD3 (see Figure 5 ) as light sources. However, the color of the light emitted from each of the pixels PXL can be variously changed.

[0063] Figure 3 is Figure 1 a schematic cross-sectional view of a display panel of

[0064] Referring to Figure 3, the display panel DP may include a substrate SUB, a pixel circuit layer PCL, a light-emitting element layer LDL, a light conversion layer LCPL, a first capping layer CPL1, an optical layer OPL, a second capping layer CPL2, a planarization layer PLL, a color filter layer CFL, an overcoat OC, and / or an overfilm layer OFL.

[0065] The substrate SUB may include a semiconductor substrate. As an example, the substrate SUB may include a bulk silicon wafer or an epitaxial wafer. The epitaxial wafer may include a layer of crystalline material (e.g., an epitaxial layer) grown on a bulk substrate by an epitaxial process. The substrate SUB is not limited to a bulk silicon wafer or an epitaxial wafer, and various wafers such as polished wafers, annealed wafers, and silicon-on-insulator (SOI) wafers may be used to form it.

[0066] The pixel circuit layer PCL may be disposed on the substrate SUB and may include circuit elements of a pixel circuit PXC (see Figure 4 ) and at least one insulating layer positioned between the circuit elements. The circuit elements may include transistors and signal lines connected to the transistors. For example, the transistors may be metal-oxide-semiconductor field-effect transistors (MOSFETs), but are not limited thereto. The circuit elements may include gate electrodes, source regions / drain regions, and channel regions.

[0067] The substrate SUB and the pixel circuit layer PCL described above may be formed by applying semiconductor processes and equipment, but are not limited thereto.

[0068] The light-emitting element layer LDL may include light-emitting elements LD (see Figure 4 ) that emit light. The light-emitting elements LD may be positioned in each of the first sub-pixel SPXL1 to the third sub-pixel SPXL3. The light-emitting elements LD may include a first electrode, a light-emitting layer, and a second electrode. The first electrode may be the anode electrode of the light-emitting element LD, and the second electrode may be the cathode electrode of the light-emitting element LD.

[0069] The light conversion layer LCPL may be disposed on the light-emitting element layer LDL. The light conversion layer LCPL may change the wavelength (or color) of the light emitted from the light-emitting element layer LDL using quantum dots. The light conversion layer LCPL may be formed on the base surface provided by the light-emitting element layer LDL through a continuous process.

[0070] However, although it has been described that the light conversion layer LCPL may be separately disposed from the light-emitting element layer LDL, the light conversion layer LCPL is not limited thereto. For example, the light-emitting elements disposed in the light-emitting element layer LDL may be implemented as light-emitting elements (quantum dot display elements) that emit light by changing the wavelength of the emitted light using quantum dots.

[0071] The first capping layer CPL1 may be disposed on the light conversion layer LCPL. The first capping layer CPL1 may cover the light conversion layer LCPL (or overlap with the light conversion layer LCPL). The first capping layer CPL1 may prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the light conversion layer LCPL.

[0072] The optical layer OPL may be disposed on the first capping layer CPL1. The optical layer OPL may be used to improve the light extraction efficiency by recycling the light provided from the light conversion layer LCPL through total internal reflection.

[0073] The second capping layer CPL2 may be disposed on the optical layer OPL. The second capping layer CPL2 may cover the optical layer OPL. The second capping layer CPL2 may prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the optical layer OPL.

[0074] The planarization layer PLL may be disposed on the second capping layer CPL2. The planarization layer PLL may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, embodiments of the present disclosure are not limited thereto, and the planarization layer PLL may include various types of inorganic materials such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0075] The color filter layer CFL may be disposed on the planarization layer PLL. The color filter layer CFL may selectively transmit the light emitted from each light-emitting element LD in the image display direction (or the third direction DR3) of the display device DD, but is not limited thereto.

[0076] The outer coating OC may be disposed on the color filter layer CFL. The outer coating OC may be a protective layer that covers the underlying members (including the color filter layer CFL) to protect them from external influences. The outer coating OC may be a planarization layer and may include an organic material. However, embodiments of the present disclosure are not limited thereto.

[0077] The outer film layer OFL may be disposed on the outer coating OC. The outer film layer OFL may include one or more of a polyethylene terephthalate (PET) film, a low-reflection film, a polarizing film, and a transmittance controllable film.

[0078] Figure 4 is a schematic diagram showing an equivalent circuit of an embodiment of a pixel included in a Figure 1 display device.

[0079] In Figure 4 , for ease of description, a pixel PXLij provided in the i-th row and the j-th column is shown as an example.

[0080] Referring to Figure 4 , the pixel PXLij may include a pixel circuit PXC connected to the i-th scan line SLi and the j-th data line DLj and a light-emitting element LD connected to the pixel circuit PXC.

[0081] According to an embodiment, the light-emitting element LD may be selected as an organic light-emitting diode. The light-emitting element LD may be selected as an inorganic light-emitting diode, such as a micro light-emitting diode (LED) or a quantum dot LED. The light-emitting element LD may be an element formed by combining an organic material and an inorganic material.

[0082] The pixel circuit PXC may include a first transistor M1, a second transistor M2, and a storage capacitor Cst.

[0083] According to an embodiment, the first transistor M1 may include a drain electrode connected to a first power supply VDD, a source electrode connected to a pixel electrode (e.g., an anode electrode of the light-emitting element LD), and a gate electrode connected to a first node N1. According to an embodiment, the drain electrode and the source electrode of the first transistor M1 may be changed according to the polarity of the voltage applied to the first transistor M1 and / or the type of the first transistor M1.

[0084] The first transistor M1 may control a driving current flowing from the first power supply VDD through the light-emitting element LD to the second power supply VSS in response to the voltage of the first node N1. For example, the first transistor M1 may be a driving transistor that controls the driving current of the pixel PXLij. According to an embodiment, the first power supply VDD and the second power supply VSS may be a high-potential pixel power supply and a low-potential pixel power supply, respectively.

[0085] According to an embodiment, the second transistor M2 may include a drain electrode connected to the j-th data line DLj, a source electrode connected to the first node N1, and a gate electrode connected to the i-th scan line SLi. According to an embodiment, the drain electrode and the source electrode of the second transistor M2 may change according to the polarity of the voltage applied to the second transistor M2 and / or the type of the second transistor M2. When a scan signal having a gate-on voltage (e.g., a high voltage) is provided from the i-th scan line SLi, the second transistor M2 may be turned on. In the case where the second transistor M2 is turned on, the j-th data line DLj and the first node N1 may be electrically connected. For example, the second transistor M2 may be a switching transistor that controls the connection between the pixel PXLij and the j-th data line DLj.

[0086] According to an embodiment, the storage capacitor Cst may be connected between one electrode (e.g., the source electrode) of the first transistor M1 and the first node N1. The storage capacitor Cst may store a voltage corresponding to the data signal provided to the first node N1 and hold the stored voltage during a period (e.g., a predetermined or selectable period). For example, the storage capacitor Cst may hold the stored voltage until a data signal of the next frame is provided. According to an embodiment, the connection position of the storage capacitor Cst may be changed. For example, the storage capacitor Cst may be connected between the first power supply VDD and the first node N1.

[0087] According to an embodiment, the light-emitting element LD may be connected between the first transistor M1 and the second power supply VSS. For example, the light-emitting element LD may include an anode electrode connected to the source electrode of the first transistor M1 and a cathode electrode connected to the second power supply VSS. The light-emitting element LD may emit light having a brightness corresponding to the drive current controlled by the first transistor M1.

[0088] Figure 5 is a schematic cross-sectional view taken along line I-I' of an embodiment of a display panel according to Figure 2

[0089] Referring to Figure 5 , the display panel DP may include a substrate SUB, a pixel circuit layer PCL, a light-emitting element layer LDL, a light conversion layer LCPL, a first capping layer CPL1, an optical layer OPL, a second capping layer CPL2, a planarization layer PLL, a color filter layer CFL, an overcoat OC, and / or an outer film layer OFL. Contents overlapping with the description of the pixel circuit layer PCL with reference to Figure 3 may be omitted below.

[0090] The substrate SUB can constitute a basic component of the display panel DP. The substrate SUB can be a rigid or flexible substrate or film. For example, the substrate SUB can be a rigid substrate formed of glass or tempered glass, a flexible substrate (or film) formed of a plastic or metal material, or at least one insulating layer. The material and / or physical properties of the substrate SUB are not particularly limited. In an embodiment, the substrate SUB can be substantially transparent. Here, "substantially transparent" can mean that light can transmit with a certain transmittance (e.g., a predetermined or selectable transmittance) or a greater transmittance. In another embodiment, the substrate SUB can be translucent or opaque. According to an embodiment, the substrate SUB can include a reflective material.

[0091] The light-emitting element layer LDL can include a first light-emitting element LD1 positioned in the first sub-pixel SPXL1, a second light-emitting element LD2 positioned in the second sub-pixel SPXL2, and / or a third light-emitting element LD3 positioned in the third sub-pixel SPXL3. The light-emitting element layer LDL can include a pixel defining layer PDL and a first insulating layer INS1.

[0092] The first light-emitting element LD1 to the third light-emitting element LD3 can include a first electrode ELT1, a light-emitting layer EML, and a second electrode ELT2.

[0093] The first light-emitting element LD1 can include a (1_1) electrode ELT1_1, a first light-emitting layer EML1, and a second electrode ELT2. The second light-emitting element LD2 can include a (1_2) electrode ELT1_2, a second light-emitting layer EML2, and a second electrode ELT2. The third light-emitting element LD3 can include a (1_3) electrode ELT1_3, a third light-emitting layer EML3, and a second electrode ELT2.

[0094] Each of the (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can be disposed and / or formed on the pixel circuit layer PCL of the corresponding pixel. For example, the (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can be formed by the same process, can include the same material, and can be positioned in the same layer. For example, the (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can be disposed and / or formed on the insulating layer of the pixel circuit layer PCL having a flat surface by a photolithography process using a mask.

[0095] The (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can be arranged to be spaced apart from each other. The (1_1) electrode ELT1_1 can be the anode electrode of the first light-emitting element LD1, the (1_2) electrode ELT1_2 can be the anode electrode of the second light-emitting element LD2, and the (1_3) electrode ELT1_3 can be the anode electrode of the third light-emitting element LD3.

[0096] The (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can be formed of a material having reflectivity such that the light emitted from the light-emitting layer EML can travel in the image display direction. As an example, the (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can be formed of a conductive material (or substance). For example, the (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can include metals such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys thereof. However, this is only an example, and the (1_1) electrode ELT1_1, the (1_2) electrode ELT1_2, and the (1_3) electrode ELT1_3 can be arranged and / or formed as a multilayer in which at least two or more materials among metals, alloys, conductive oxides, and conductive polymers are stacked on one another.

[0097] The pixel defining layer PDL can be positioned in the non-emission region NEA and can be a structure that defines the first emission region EMA1 to the third emission region EMA3. As an example, the pixel defining layer PDL can be a structure that is positioned on the pixel circuit layer PCL in the non-emission region NEA, defines the first emission region EMA1 of the first sub-pixel SPXL1, defines the second emission region EMA2 of the second sub-pixel SPXL2, and defines the third emission region EMA3 of the third sub-pixel SPXL3.

[0098] The pixel defining layer PDL can be constituted by an organic insulating layer including an organic material. The organic material can include acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc. According to an embodiment, the pixel defining layer PDL can include a light-absorbing material or can be coated with a light absorber to absorb light input from the outside. For example, the pixel defining layer PDL can include a carbon-based black pigment, but is not limited thereto.

[0099] The pixel defining layer PDL can protrude from the surface (or upper surface) of the pixel circuit layer PCL in the third direction DR3.

[0100] The first light-emitting layer EML1 may be disposed on the (1_1)th electrode ELT1_1 exposed by the pixel defining layer PDL. The second light-emitting layer EML2 may be disposed on the (1_2)th electrode ELT1_2 exposed by the pixel defining layer PDL. The third light-emitting layer EML3 may be disposed on the (1_3)th electrode ELT1_3 exposed by the pixel defining layer PDL.

[0101] The first light-emitting layer EML1 to the third light-emitting layer EML3 may constitute the light-emitting layer EML of the first sub-pixel SPXL1 to the third sub-pixel SPXL3. The light-emitting layer EML may include a light generation layer that emits light, an electron transport layer that transports electrons, a hole transport layer that transports holes, etc., but is not limited thereto.

[0102] The second electrode ELT2 may be disposed on the light-emitting layer EML and may cover the light-emitting layer EML. The second electrode ELT2 may be disposed on the first light-emitting layer EML1 of the first sub-pixel SPXL1, the second light-emitting layer EML2 of the second sub-pixel SPXL2, and the third light-emitting layer EML3 of the third sub-pixel SPXL3. The second electrode ELT2 may be commonly provided to the first sub-pixel SPXL1 to the third sub-pixel SPXL3. The second electrode ELT2 may be disposed in a plate shape throughout the display area DA, but is not limited thereto. The second electrode ELT2 may be a second conductive layer disposed on the pixel circuit layer PCL, but is not limited thereto.

[0103] The second electrode ELT2 may be a thin metal layer having a thickness sufficient to transmit light emitted from each of the first light-emitting layer EML1 to the third light-emitting layer EML3. The second electrode ELT2 may be formed of a metal material or a transparent conductive material to have a relatively thin thickness. For example, the second electrode ELT2 may be formed of various transparent conductive materials. For example, the second electrode ELT2 may include at least one of various transparent conductive materials including indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), aluminum zinc oxide (AZO), gallium zinc oxide (GZO), zinc tin oxide (ZTO), and gallium tin oxide (ZTO). The second electrode ELT2 may be implemented to be substantially transparent or semi-transparent to satisfy the transmittance (e.g., a predetermined or selectable transmittance). Therefore, the light emitted from each of the first light-emitting layer EML1 to the third light-emitting layer EML3 positioned under the second electrode ELT2 may pass through the second electrode ELT2 and may be emitted upward.

[0104] In an embodiment, in each of the first sub-pixel SPXL1 to the third sub-pixel SPXL3, holes injected from the first electrode ELT1 and electrons injected from the second electrode ELT2 can be transferred to the light-emitting layer EML. In this way, excitons can be formed, and when the excitons transition from the excited state to the ground state, light can be generated and emitted in the form of visible light.

[0105] The first insulating layer INS1 can be disposed on the second electrode ELT2. The first insulating layer INS1 can be provided as one or more insulating layers and / or protective layers covering the first light-emitting layer EML1 to the third light-emitting layer EML3 and / or the second electrode ELT2.

[0106] The first insulating layer INS1 can be provided as a thin film encapsulation layer for sealing the light-emitting element layer LDL. The thin film encapsulation layer can protect the first light-emitting element LD1 to the third light-emitting element LD3 from moisture / oxygen, and can protect the first light-emitting element LD1 to the third light-emitting element LD3 from foreign substances such as dust. For example, the first insulating layer INS1 can be provided in the form of a structure in which at least one inorganic layer and at least one organic layer are alternately stacked with each other.

[0107] According to an embodiment, the inorganic layer can include at least one of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), and aluminum oxide (Al x O y ). For example, the organic layer can include at least one of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and a polyimide resin. However, the examples of the inorganic layer and the organic layer are not limited thereto.

[0108] The light conversion layer LCPL can include a first bank BNK1, a second bank BNK2, a reflective layer REL, a first color conversion layer CCL1, a second color conversion layer CCL2, and / or a scattering layer LSL.

[0109] The emission area EMA can overlap an opening defined by the first bank BNK1 in a plan view. The first light-emitting element LD1 to the third light-emitting element LD3 can be disposed in the emission area EMA.

[0110] The first light-emitting element LD1 to the third light-emitting element LD3 can not be disposed in the non-emission area NEA. A part of the non-emission area NEA can overlap the bank BNK in a plan view.

[0111] The first bank BNK1 can form (or provide) an opening. For example, the first bank BNK1 can have a shape that protrudes in the thickness direction of the substrate SUB (e.g., the third direction DR3), and can have a shape surrounding an area (e.g., a predetermined or selectable area). Thus, an opening in which the first bank BNK1 is not provided can be formed.

[0112] The opening formed by the first bank BNK1 can mean an area in which a fluid can be accommodated.

[0113] According to an embodiment, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer LSL can be disposed in the opening defined by the first bank BNK1.

[0114] The first bank BNK1 can be formed to have an inclined surface that is inclined at an angle (e.g., a predetermined or selectable angle) with respect to the substrate SUB. However, embodiments of the present disclosure are not limited thereto, and the first bank BNK1 can have sidewalls with a curved surface, a stepped shape, etc. For example, the first bank BNK1 can have a cross-section such as a semicircle or a semi-ellipse.

[0115] The first bank BNK1 can form a surface on which the reflective layer REL is disposed. Since the first bank BNK1 has a shape that protrudes in the thickness direction of the substrate SUB (e.g., the third direction DR3), the function of the reflective layer REL as a reflective member can be more effectively performed.

[0116] The first bank BNK1 can include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, embodiments of the present disclosure are not limited thereto, and the first bank BNK1 can include various types of inorganic materials such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0117] The second bank BNK2 may be disposed on the reflective layer REL. The second bank BNK2 may protrude in the thickness direction of the substrate SUB (e.g., the third direction DR3). The second bank BNK2 may form an opening. The opening formed by the second bank BNK2 may form a space for disposing the first color conversion layer CCL1 and the second color conversion layer CCL2. For example, a color conversion layer CCL of a desired type and / or amount may be disposed (or provided) in the space separated by the second bank BNK2. According to an embodiment, the second bank BNK2 may include a liquid-repellent material suitable for effectively forming the first color conversion layer CCL1 and the second color conversion layer CCL2. The liquid-repellent material may include an organic polymer material having liquid repellency. For example, the liquid-repellent material may include a polymer material in which a fluorine group (F) is mixed with an organic material such as polyimide (e.g., an ethylene-based polymer having a perfluoroalkyl group (Rf group) in a side chain or a silicone containing a perfluoroalkyl group).

[0118] The second bank BNK2 may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, embodiments of the present disclosure are not limited thereto, and the second bank BNK2 may include various types of inorganic materials such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0119] The surface of the second bank BNK2 may face the reflective layer REL. The second bank BNK2 may be exposed toward the first color conversion layer CCL1 and the second color conversion layer CCL2. The second bank BNK2 having liquid repellency suitable for processing may contact the first color conversion layer CCL1 and the second color conversion layer CCL2. Accordingly, overflow of the first color conversion layer CCL1 and the second color conversion layer CCL2 may be prevented, and ultimately, the color conversion layer CCL may be effectively disposed.

[0120] According to an embodiment, each of the first bank BNK1 and the second bank BNK2 may include a material (e.g., a predetermined or selectable material). According to an embodiment, the first bank BNK1 and the second bank BNK2 may include the same material.

[0121] The first bank BNK1 and the second bank BNK2 may overlap each other in a plan view. Accordingly, the region where the light-emitting element LD is disposed and the region where the color conversion layer CCL is disposed may be set substantially the same. Each of the first bank BNK1 and the second bank BNK2 may have one of a square shape, a rectangular shape, and a trapezoidal shape.

[0122] The first bank BNK1 may have a first height H1. The second bank BNK2 may have a second height H2. Each of the first height H1 and the second height H2 may mean the maximum height of the first bank BNK1 and the second bank BNK2 in the thickness direction (e.g., the third direction DR3) of the substrate SUB. According to an embodiment, the first height H1 may be greater than the second height H2. According to an embodiment, the second height H2 may be about 0.3 times or less of the first height H1. As another example, according to another embodiment, the second height H2 may be about 0.2 times or less of the first height H1. In this case, the reflective layer REL may form a wide reflective wall on the first bank BNK1, and thus the light output efficiency of the display device DD may be further improved. The second bank BNK2 may have liquid repellency (e.g., a predetermined or selectable liquid repellency) to define the regions where the first color conversion layer CCL1 and the second color conversion layer CCL2 are disposed. To this end, the second bank BNK2 may not be covered by the reflective layer REL. By appropriately controlling the height of the second bank BNK2 that does not form a reflective surface, the process for forming the first color conversion layer CCL1 and the second color conversion layer CCL2 may proceed smoothly, and the light output efficiency of the display panel DP may be further increased due to the formation of a wide reflective wall.

[0123] The reflective layer REL may serve as a reflective member. For example, the reflective layer REL may at least partially cover the side surface and / or the upper surface of the first bank BNK1. For example, the reflective layer REL may include an inclined surface or a curved surface having a shape corresponding to the shape of the first bank BNK1. Accordingly, the reflective layer REL as a reflective member may reflect the light emitted from the light-emitting element layer LDL and guide the light in the display direction (e.g., the third direction DR3) of the display panel DP. Thus, the light output efficiency of the display panel DP may be improved.

[0124] According to an embodiment, the reflective layer REL may have a reflectivity (e.g., a predetermined or selectable reflectivity). For example, the reflective layer REL may have a reflectivity of about 50% or higher. As another example, according to an embodiment, the reflective layer REL may have a reflectivity of about 70% or higher. However, the present disclosure is not limited to the above examples.

[0125] The first color conversion layer CCL1 may be positioned in the first sub-pixel SPXL1, the second color conversion layer CCL2 may be positioned in the second sub-pixel SPXL2, and the scattering layer LSL may be positioned in the third sub-pixel SPXL3.

[0126] In an embodiment, the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 may include first to third light-emitting elements LD1 to LD3 that emit light of the same color. For example, the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 may include light-emitting elements LD that emit light of a third color (or blue). Since the first color conversion layer CCL1 and the second color conversion layer CCL2 including color conversion particles and the scattering layer LSL including a scatterer SCT are respectively provided on the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3, a full-color image may be displayed.

[0127] The first color conversion layer CCL1 may include first color conversion particles that convert the light of the third color emitted from the first light-emitting element LD1 into light of a first color (or red). Quantum dots QD may be used for color conversion. For example, the first color conversion layer CCL1 may include first quantum dots QD1 dispersed in a matrix material such as a base resin (e.g., a predetermined or selectable matrix material). The first quantum dots QD1 may absorb blue light and shift the wavelength of the blue light according to an energy transition to emit red light.

[0128] The second color conversion layer CCL2 may include second color conversion particles that convert the light of the third color emitted from the second light-emitting element LD2 into light of a second color (or green). For example, the second color conversion layer CCL2 may include second quantum dots QD2 dispersed in a matrix material such as a base resin (e.g., a predetermined or selectable matrix material). The second quantum dots QD2 may absorb blue light and shift the wavelength of the blue light according to an energy transition to emit green light.

[0129] In an embodiment, since blue light having a relatively short wavelength in the visible light region is incident on each of the first quantum dots QD1 and the second quantum dots QD2, the absorption coefficients of the first quantum dots QD1 and the second quantum dots QD2 may be increased. Therefore, ultimately, the efficiency of the light emitted from the first sub-pixel SPXL1 and the second sub-pixel SPXL2 may be improved, and excellent color reproducibility may be ensured. Since the light-emitting portions of the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 are configured using the first to third light-emitting elements LD1 to LD3 of the same color (e.g., blue light-emitting elements), the manufacturing efficiency of the display panel DP may be improved.

[0130] The scattering layer LSL can be configured to effectively utilize the light of the third color (or blue) emitted from the third light-emitting element LD3. The scattering layer LSL and the second bank BNK2 can be patterned in the same process. The scattering layer LSL and the second bank BNK2 can be formed at the same time point. The scattering layer LSL and the second bank BNK2 can include the same material. In this case, the number of masks can be reduced, and the manufacturing process can be simplified, thereby reducing the process cost. The scattering layer LSL can include at least one type of scatterer SCT in order to effectively utilize the light emitted from the light-emitting element LD. For example, the scatterer SCT of the scattering layer LSL can include at least one of barium sulfate (BaSO4), calcium carbonate (CaCO3), titanium oxide (TiO2), silicon oxide (SiO2), aluminum oxide (Al2O3), zirconium oxide (ZrO2), and zinc oxide (ZnO). Except for the third sub-pixel SPXL3, the scatterer SCT can be selectively included in the first color conversion layer CCL1 or the second color conversion layer CCL2. The scatterer SCT can also be included in the second bank BNK2.

[0131] The first capping layer CPL1 can be disposed on the light conversion layer LCPL. The first capping layer CPL1 can be disposed across the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3. The first capping layer CPL1 can cover the color conversion layer CCL. The first capping layer CPL1 can prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the color conversion layer CCL.

[0132] The first capping layer CPL1 can be an inorganic layer and can be formed by including silicon nitride (SiN x ), aluminum nitride (AlN x ), titanium nitride (TiN x ), silicon oxide (SiO x ), aluminum oxide (AlO x ), titanium oxide (TiO x ), silicon carbon oxide (SiO x C y ), silicon oxynitride (SiO x N y ), etc.

[0133] The optical layer OPL can be disposed on the first capping layer CPL1. The optical layer OPL can be used to improve the light extraction efficiency by recycling the light provided by the color conversion layer CCL through total reflection. To this end, the optical layer OPL can have a refractive index relatively lower than that of the color conversion layer CCL. For example, the refractive index of the color conversion layer CCL can be about 1.6 to about 2.0, and the refractive index of the optical layer OPL can be about 1.1 to about 1.3.

[0134] A second capping layer CPL2 may be disposed on the optical layer OPL. The second capping layer CPL2 may be disposed across the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3. The second capping layer CPL2 may cover the optical layer OPL. The second capping layer CPL2 may prevent impurities such as moisture or air from penetrating from the outside and damaging or contaminating the optical layer OPL.

[0135] The second capping layer CPL2 may be an inorganic layer and may be formed by including silicon nitride (SiN x ), aluminum nitride (AlN x ), titanium nitride (TiN x ), silicon oxide (SiO x ), aluminum oxide (AlO x ), titanium oxide (TiO x ), silicon carbon oxide (SiO x C y ), silicon oxynitride (SiO x N y ), etc.

[0136] A planarization layer PLL may be disposed on the second capping layer CPL2. The planarization layer PLL may be disposed across the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3.

[0137] The planarization layer PLL may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, embodiments of the present disclosure are not limited thereto, and the planarization layer PLL may include various types of inorganic materials such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0138] The color filter layer CFL may be disposed on the planarization layer PLL. The color filter layer CFL may include color filters CF (CF1, CF2, and CF3) that match the colors of each pixel PXL. Since color filters CF (CF1, CF2, and CF3) that match the colors of each of the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3 are provided, a full-color image can be displayed.

[0139] The first color filter CF1 may be disposed in the first sub-pixel SPXL1 and may selectively transmit light emitted from the first sub-pixel SPXL1. The second color filter CF2 may be disposed in the second sub-pixel SPXL2 and may selectively transmit light emitted from the second sub-pixel SPXL2. The third color filter CF3 may be disposed in the third sub-pixel SPXL3 and may selectively transmit light emitted from the third sub-pixel SPXL3.

[0140] In an embodiment, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may be a red color filter, a green color filter, and a blue color filter, respectively, but embodiments of the present disclosure are not limited thereto. For example, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may be a green color filter, a red color filter, and a blue color filter, respectively.

[0141] The first color filter CF1 may overlap with the first color conversion layer CCL1 in the thickness direction of the substrate SUB (e.g., the third direction DR3). The first color filter CF1 may include a filter material that selectively transmits light of the first color (or red). For example, when the first sub-pixel SPXL1 is a red pixel, the first color filter CF1 may include a red filter material.

[0142] The second color filter CF2 may overlap with the second color conversion layer CCL2 in the thickness direction of the substrate SUB (e.g., the third direction DR3). The second color filter CF2 may include a filter material that selectively transmits light of the second color (or green). For example, when the second sub-pixel SPXL2 is a green pixel, the second color filter CF2 may include a green filter material.

[0143] The third color filter CF3 may overlap with the scattering layer LSL in the thickness direction of the substrate SUB (e.g., the third direction DR3). The third color filter CF3 may include a filter material that selectively transmits light of the third color (or blue). For example, when the third sub-pixel SPXL3 is a blue pixel, the third color filter CF3 may include a blue filter material.

[0144] According to an embodiment, a light blocking layer BM may be further disposed between the first color filter CF1, the second color filter CF2, and the third color filter CF3. As described above, when the light blocking layer BM is formed between the first color filter CF1, the second color filter CF2, and the third color filter CF3, color mixing defects visible from the front surface or side surface of the display device DD can be prevented. The material of the light blocking layer BM is not particularly limited and may be composed of various light blocking materials. As an example, the light blocking layer BM may include a black matrix or may be implemented by stacking the first color filter CF1, the second color filter CF2, and the third color filter CF3 on one another.

[0145] An outer coating OC may be further disposed on the color filter layer CFL. The outer coating OC may be disposed across the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3. The outer coating OC may cover the lower member (including the color filter layer CFL). The outer coating OC may prevent moisture or air from penetrating into the lower member described above. The outer coating OC may protect the lower member described above from foreign substances such as dust.

[0146] The outer coating OC may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, embodiments of the present disclosure are not limited thereto, and the outer coating OC may include various types of inorganic materials such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0147] An outer film layer OFL may be disposed on the outer coating OC. The outer film layer OFL may be disposed on the outer side of the display panel DP to reduce external influence. The outer film layer OFL may be disposed across the first sub-pixel SPXL1, the second sub-pixel SPXL2, and the third sub-pixel SPXL3. According to an embodiment, the outer film layer OFL may include one or more of a polyethylene terephthalate (PET) film, a low reflection film, a polarizing film, and a transmittance controllable film, but embodiments of the present disclosure are not limited thereto.

[0148] According to an embodiment, the pixel PXL may include an upper substrate instead of the outer film layer OFL.

[0149] Figure 6is a schematic cross-sectional view taken along line I-I' of another embodiment of the display panel according to Figure 2 .

[0150] Contents that may overlap with the reference Figure 5 description may be omitted or simplified. Compared with the display panel DP according to the first embodiment, the display panel DP according to the second embodiment may further include a second insulating layer INS2.

[0151] The second insulating layer INS2 may be disposed on the reflective layer REL. For example, the second insulating layer INS2 may protect the reflective layer REL from external impacts by covering the reflective layer REL.

[0152] The second insulating layer INS2 may include at least one of silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (AlO x ), and titanium oxide (TiO x ).

[0153] Figure 7 is a schematic enlarged view showing part A of Figure 5 .

[0154] Light L may be incident from the light-emitting element layer LDL in the third direction DR3. The incident light L may be reflected by the reflective layer REL. Therefore, the light L incident from the light-emitting element layer LDL may be recycled, and the emission efficiency of the light-emitting element layer LDL may be improved.

[0155] Figure 8 is a schematic flowchart showing a method of manufacturing a display device according to an embodiment of the present disclosure.

[0156] Referring to Figure 8 , the method of manufacturing a display device may include forming a substrate, a pixel circuit layer, and a light-emitting element layer (S810); forming a first bank on the light-emitting element layer (S820); forming a reflective layer on the first bank (S830); forming a second bank and a scattering layer on the reflective layer (S840); forming a first color conversion layer and a second color conversion layer (S850); and / or forming a first capping layer (S860). As described above with reference to Figure 5 , an optical layer OPL, a second capping layer CPL2, a planarization layer PLL, a color filter layer CFL, an outer coating OC, and an outer film layer OFL may be sequentially formed on the first capping layer CPL1, but detailed description may be omitted below.

[0157] Hereinafter, referring to Figures 9 to 18A method of manufacturing a display device is described in detail.

[0158] Figures 9 to 18 FIG. is a schematic diagram showing an example of a method of manufacturing a display device.

[0159] Referring to Figure 9 , a substrate SUB can be formed, a pixel circuit layer PCL can be formed on the substrate SUB, and a light-emitting element layer LDL can be formed on the pixel circuit layer PCL.

[0160] Referring to Figure 10 , a first bank BNK1 can be formed on the light-emitting element layer LDL through an etching process. The first bank BNK1 can protrude in the thickness direction (e.g., the third direction DR3) of the substrate SUB. The first bank BNK1 can be formed to have an inclined surface that is inclined at an angle (e.g., a predetermined or selectable angle) with respect to the substrate SUB.

[0161] The first bank BNK1 can include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, embodiments of the present disclosure are not limited thereto, and the first bank BNK1 can include various types of inorganic materials such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0162] Referring to Figures 11 to 15 , a reflective layer REL can be formed on the first bank BNK1. The reflective layer REL can at least partially cover the side surface and / or the upper surface of the first bank BNK1. For example, the reflective layer REL can include an inclined surface or a curved surface having a shape corresponding to the shape of the first bank BNK1.

[0163] The reflective layer REL can be formed through an etching process using a positive-type photosensitive material (photoresist). The specific formation process is as follows.

[0164] First, referring to Figure 11, in the first step S830a of step S830, a metal layer ML can be formed on the first bank BNK1. The metal layer ML can include at least one of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and their alloys. However, the present disclosure is not limited to the above examples, and the metal layer ML can include one of various materials having reflective properties.

[0165] Reference Figure 12 , in the second step S830b of step S830, a photoresist layer PR can be formed on the metal layer ML using a positive photoresist. The photoresist layer PR can be formed by coating a liquid positive photoresist.

[0166] Reference Figure 13 , in the third step S830c of step S830, the exposed portion of the photoresist layer PR can be removed by a developing process.

[0167] In addition, reference Figure 14 , in the fourth step S830d of step S830, the exposed portion of the metal layer ML can be removed by an etching process using the remaining photoresist layer PR as a mask.

[0168] Reference Figure 15 , in the fifth step S830e of step S830, a reflective layer REL can be formed by removing the remaining photoresist layer PR.

[0169] In an embodiment of the present disclosure, by using a positive photoresist when forming the reflective layer REL, the phenomenon that the photoresist layer PR is wetted by the developer and swells during the continued developing process can be avoided. Therefore, fine patterning of the reflective layer REL can be possible.

[0170] Reference Figure 16 , a second bank BNK2 and a scattering layer LSL can be formed on the reflective layer REL. The second bank BNK2 and the scattering layer LSL can be patterned in the same process. The second bank BNK2 and the scattering layer LSL can be formed at the same time point. The second bank BNK2 and the scattering layer LSL can include the same material.

[0171] The second bank BNK2 and the scattering layer LSL can be formed to protrude in the thickness direction (e.g., the third direction DR3) of the substrate SUB. The second bank BNK2 can include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, a polyester resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB). However, the embodiments of the present disclosure are not limited thereto, and the second bank BNK2 can include various types of inorganic materials such as silicon oxide (SiOx ) Silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum nitride (AlN x ), aluminum oxide (AlO x ), zirconium oxide (ZrO x ), hafnium oxide (HfO x ), or titanium oxide (TiO x ).

[0172] The second bank BNK2 and the scattering layer LSL may include a suitable liquid-repellent material. The liquid-repellent material may include an organic polymer material having liquid repellency. For example, the liquid-repellent material may include a polymer material in which a fluorine group (F) is mixed with an organic material such as polyimide (e.g., an ethylene-based polymer having a perfluoroalkyl group (Rf group) in a side chain or a silicone containing a perfluoroalkyl group).

[0173] The second bank BNK2 and the scattering layer LSL may include a scatterer SCT. As an example, the scatterer SCT may include at least one of barium sulfate (BaSO4), calcium carbonate (CaCO3), titanium oxide (TiO2), silicon oxide (SiO2), aluminum oxide (Al2O3), zirconium oxide (ZrO2), and zinc oxide (ZnO).

[0174] Reference Figure 17 , a first color conversion layer CCL1 and a second color conversion layer CCL2 may be formed. For example, a first color conversion layer CCL1 disposed in the first sub-pixel SPXL1 (see Figure 5 ) and a second color conversion layer CCL2 disposed in the second sub-pixel SPXL2 (see Figure 5 ) may be formed. The first color conversion layer CCL1 and the second color conversion layer CCL2 may be formed to protrude in the thickness direction of the substrate SUB (e.g., the third direction DR3).

[0175] Reference Figure 18 , a first capping layer CPL1 may be formed on the second bank BNK2, the first color conversion layer CCL1, the second color conversion layer CCL2, and the scattering layer LSL. The first capping layer CPL1 may be an inorganic layer and may be formed by including silicon nitride (SiN x ), aluminum nitride (AlN x ), titanium nitride (TiN x ), silicon oxide (SiO x ), aluminum oxide (AlO x ), titanium oxide (TiO x ), silicon carbon oxide (SiO x Cy ) and silicon oxynitride (SiO x N y ) and the like.

[0176] Although not shown in Figure 18 , after forming the first capping layer CPL1, an optical layer OPL, a second capping layer CPL2, a planarization layer PLL, a color filter layer CFL, an overcoat OC, and an outermost film layer OFL may be sequentially formed.

[0177] According to an embodiment of the present disclosure, since the scattering layer LSL of the second bank BNK2 and the third sub-pixel SPXL3 is formed at the same time point, the number of masks can be reduced, and the manufacturing process can be simplified, thereby reducing the process cost. In addition, by using a positive photoresist during the manufacturing process of the reflective layer REL, fine patterning of the reflective layer REL may be possible.

[0178] The above description is an example of the technical features of the present disclosure, and those skilled in the art to which the present disclosure pertains will be able to make various modifications and variations. Therefore, the above embodiments of the present disclosure may be implemented alone or in combination with each other.

[0179] Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but to describe the technical spirit of the present disclosure, and the scope of the technical spirit of the present disclosure is not limited by these embodiments. The protection scope of the present disclosure should be interpreted by the appended claims, and it should be understood that all technical spirits within the equivalent scope are included in the scope of the present disclosure.

Claims

1. A method of manufacturing a display device, the method comprising: Forming a substrate, a pixel circuit layer, and a light-emitting element layer; Forming a first bank on the light-emitting element layer; Forming a reflective layer on the first bank; Forming a second bank and a scattering layer on the reflective layer; Forming a first color conversion layer and a second color conversion layer on the substrate in a region surrounded by the second bank; And Forming a first capping layer on the scattering layer, the first color conversion layer, and the second color conversion layer, wherein the reflective layer is formed by an etching process using a positive photosensitive material.

2. The method according to claim 1, further comprising: Forming an insulating layer disposed on the reflective layer and surrounding the reflective layer.

3. The method according to claim 1, wherein The reflective layer surrounds a side surface and an upper surface of the first bank.

4. The method according to claim 1, wherein each of the first color conversion layer and the second color conversion layer includes color conversion particles capable of converting colors, and a surface of the second bank faces the first bank and the reflective layer.

5. The method according to claim 1, wherein the second bank and the scattering layer include a scatterer, and the scatterer includes at least one of barium sulfate, calcium carbonate, and titanium oxide.

6. The method according to claim 1, wherein The second bank and the scattering layer include a liquid repellent material.

7. The method according to claim 1, wherein Each of the first bank and the second bank has one of a square shape, a rectangular shape, and a trapezoidal shape.

8. The method according to claim 1, wherein The second bank and the scattering layer are formed at the same time point.

9. The method according to claim 1, wherein Forming the reflective layer on the first bank includes: Forming a metal layer on the first bank; Forming a photoresist layer on the metal layer using the positive photosensitive material; Removing an exposed portion of the photoresist layer through a developing process; and Forming the reflective layer by etching the metal layer using the remaining photoresist layer and removing the remaining photoresist layer.

10. A display device, comprising: A substrate including regions where a first sub-pixel, a second sub-pixel, and a third sub-pixel are formed; A first bank formed on the substrate and protruding in a first direction; A reflective layer formed on the first bank; A second bank disposed on the reflective layer and overlapping the first bank; A first color conversion layer formed in the first sub-pixel and formed on the substrate in a region surrounded by the first bank; A second color conversion layer formed in the second sub-pixel and formed on the substrate in a region surrounded by the first bank; And A scattering layer formed in the third sub-pixel, wherein the scattering layer and the second bank include the same material.

11. The display device according to claim 10, further comprising: An insulating layer disposed on the reflective layer and surrounding the reflective layer.

12. The display device according to claim 10, wherein, The reflective layer surrounds a side surface and an upper surface of the first bank.

13. The display device according to claim 10, wherein each of the first color conversion layer and the second color conversion layer includes color conversion particles capable of converting colors, and a surface of the second bank faces the first bank and the reflective layer.

14. The display device according to claim 10, wherein The second dam and the scattering layer include scatterers, and the scatterers include at least one of barium sulfate, calcium carbonate, and titanium oxide.

15. The display device according to claim 10, wherein, The second dam and the scattering layer include a liquid-repellent material.

16. The display device according to claim 10, wherein, Each of the first dam and the second dam has one of a square shape, a rectangular shape, and a trapezoidal shape.

17. The display device according to claim 10, further comprising: A first capping layer on the first color conversion layer and the second color conversion layer.

18. The display device according to claim 10, further comprising: An insulating layer disposed on and surrounding the reflective layer, wherein the reflective layer surrounds a side surface and an upper surface of the first dam, each of the first color conversion layer and the second color conversion layer includes color conversion particles capable of converting colors, and a surface of the second dam faces the first dam and the reflective layer.

19. The display device according to claim 10, further comprising: A first capping layer on the first color conversion layer and the second color conversion layer, wherein the second dam and the scattering layer include scatterers, the scatterers include at least one of barium sulfate, calcium carbonate, and titanium oxide, and each of the first dam and the second dam has one of a square shape, a rectangular shape, and a trapezoidal shape.

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