Satellite load interface analog voltage automatic measurement platform and measurement method

Abstract

The invention discloses an automatic measurement platform for analog voltage of a satellite load interface. The automatic measurement platform comprises a PXIe voltage acquisition board card, an automatic measurement interaction layer and an upper computer test system interface, wherein the PXIe voltage acquisition board card is used for automatically acquiring analog voltage and realizing automatic gain adjustment through a digital filter and a voltage grading scheme; the automatic measurement interaction layer stores information required by automatic measurement through partition planning, and regulates and controls voltage acquisition parameters in real time; the upper computer test system interface displays, analyzes, debugs and stores the final result of the whole voltage acquisition data, completes the calculation of the automatic calibration parameters of the voltage acquisition, and achieves the automatic interaction measurement with the lower computer through the automatic measurement interaction layer. According to the satellite load interface analog voltage automatic measurement platform and measurement method provided by the invention, an automatic process during satellite power supply voltage measurement is realized, and the test efficiency and speed are improved.

Description

Technical Field

[0001] The present invention relates to the field of communication testing, and in particular to an automated measurement platform and method for analog voltage of a satellite payload interface. Background Art

[0002] With the continuous development of China's space industry, the domestic demand for launching small and medium-sized satellites is increasing. Various onboard payloads will be launched into space with the satellites for related experimental testing. Consequently, the demand for ground testing of these onboard payloads is expected to explode. However, the analog voltage interfaces of these payloads are complex and diverse. Enabling ground testers to quickly and effectively verify the correct analog voltages of various onboard payload interfaces has become a major challenge.

[0003] Traditionally, satellite payload interface analog voltage testing involves testers using a multimeter to measure the analog voltages of various interfaces on the satellite power adapter box. The tester then determines the analog voltage of the corresponding payload interface based on each interface. This method is cumbersome, labor-intensive, and increases the complexity and time of ground testing. Wu Haichao et al. proposed an automated test and measurement method for inspecting small satellite power interfaces. This method uses a customized dedicated adapter cable to effectively connect the power supply device test board to the power interface under test, significantly reducing test time and improving efficiency. However, this method only simplifies the test process through hardware, without implementing automated testing procedures on the software side. Test data storage and analysis remain manually performed on a host computer. Wu Kewen's proposed DC voltage signal acquisition microsystem design implements multi-channel transient voltage acquisition, but the voltage display and recording platform is limited to digital tubes, making it difficult to operate with automated human-computer interaction. The FPGA-based DDR controller automated test platform research proposed by Yang Shuhua et al. only uses DDR as a data acquisition memory and does not implement the interactive function with the host computer interface. In addition, the communication rate delay between the web interface used and the slave computer is 15ms, and the communication rate is not ideal. Summary of the Invention

[0004] In view of the above-mentioned shortcomings of the prior art, the technical problem to be solved by the present invention is that the existing satellite payload interface analog voltage testing method still requires testers to manually collect and record the satellite payload interface analog voltage data. This overall testing process suffers from problems such as wasted manpower, cumbersome test steps, insufficient measurement accuracy, and low automation. Therefore, the present invention provides a satellite payload interface analog voltage automated measurement platform and method, which realizes an automated process for satellite power supply voltage measurement, greatly improving test efficiency and speed, freeing up human resources, and enabling rapid response to collected results, automatic calibration, and storage analysis.

[0005] To achieve the above objectives, the present invention provides a satellite payload interface analog voltage automated measurement platform, comprising a PXIe voltage acquisition board, an automated measurement interaction layer, and a host computer test system interface. The PXIe voltage acquisition board sends collected data and its own status information to the automated measurement interaction layer, which then extracts the corresponding data from the automated measurement interaction layer. The PXIe voltage acquisition board is used for automated acquisition of 20 analog voltages ranging from 0 to 100V, and automatically adjusts gain to improve measurement accuracy through an internal digital filter and voltage grading scheme. The automated measurement interaction layer stores the information required for automated measurement through partitioning, allowing the host computer test system interface to directly establish a channel with the AD sampling chip on the PXIe voltage acquisition board to control voltage acquisition parameters in real time. The host computer test system interface displays, analyzes, debugs, and stores the final results of the entire voltage acquisition data, calculates automated calibration parameters for voltage acquisition, and implements automated interactive measurement with the lower computer through the automated measurement interaction layer.

[0006] Furthermore, the PXIe voltage acquisition board includes a 20-channel precision step-down circuit, a multiplexer, an AD sampling chip, and a digital filter. The external analog voltage first passes through the 20-channel precision step-down circuit, and the voltage is transmitted to the multiplexer after being attenuated 10 times. The AD sampling chip collects the voltage data of the corresponding channel by switching the multiplexer channel. Finally, the collected digital voltage data is output to the automated measurement interaction layer after passing through the digital filter.

[0007] To measure voltages within the 0-100V range, the voltage after precision step-down has already been attenuated by a factor of 10. To improve voltage acquisition accuracy, the PXIe voltage acquisition board uses a voltage grading solution for automated voltage acquisition, enabling adaptive voltage gain adjustment. This function updates the AD sampling chip's gain settings based on the stepped-down voltage range, achieving the most accurate voltage measurement.

[0008] Furthermore, the voltage grading scheme is specifically achieved by taking the average value of the collected digital signal, and then restoring the real analog voltage and comparing it with the analog voltage range. The restored voltage after the analog step-down circuit uses a gain of 1 in the range of 0-2.5V, a gain of 0.5 in the range of 2.5-5.0V, and a gain of 0.25 in the range of 5.0-10V.

[0009] Furthermore, the automated measurement interaction layer updates the automated test process information in real time through the DDR memory, and sets up a spatial channel so that the host computer can directly access and control the AD sampling chip AD sampling chip AD sampling chip; communicates with the lower computer acquisition process through the AXI_HP interface, and realizes data communication directly with the host computer through PCIe in DMA mode.

[0010] Furthermore, the automated test process information includes the automated measurement status of the lower computer and the instruction information of the upper computer; wherein, the automated measurement status is in the DDR address space 0X1000051, 0X1000052 and 0X1000053, and the information in the above three addresses is updated according to the measurement status. When the data bit in the address is 0x02, it means that it is still being collected. When the data becomes 0x09, the collection is completed and stored in the voltage data collection address bit in the automated measurement interaction layer; the instruction information of the upper computer is that the lower computer determines whether to send the voltage data to the upper computer through the information address bit in the automated measurement interaction layer, and how many channel data to send to the upper computer, thereby realizing intelligent automated voltage collection, and by changing it, determining whether the calibration parameters in the automated measurement interaction layer are sent and changed, if changed, the new calibration parameters will be extracted to calculate the voltage collection data and store it in its corresponding address space.

[0011] Furthermore, the host computer can directly access and control the AD sampling chip. Specifically, the host computer controls the AD sampling chip on the PXIe voltage acquisition board by opening up the information in the corresponding register of the AD sampling chip in the DDR memory and directly modifying the corresponding register on the host computer interface.

[0012] Furthermore, the host computer test system interface includes real-time display of voltage data, calculation of voltage linear relationship calibration parameters, and analysis and storage of the finally collected voltage data.

[0013] Furthermore, the host computer test system interface directly accesses the memory through the PCIe bus and uses the XDMA architecture to communicate with the automated measurement interaction layer.

[0014] In a preferred embodiment of the present invention, the present invention provides a measurement method based on a satellite payload interface analog voltage automatic measurement platform, comprising the following steps:

[0015] Confirm the analog voltage cable of the satellite stand-alone interface to be tested. After the cable is connected, import the interface parameter table into the host computer test system interface and start the test;

[0016] The external analog voltage input is stepped down by the PXIe voltage acquisition board and the internal program collects the voltage digital signal data;

[0017] The data collected by the board is sent to the host computer through the automated measurement interaction layer;

[0018] The upper computer calibrates and analyzes the data, sets the calibration gain and offset to the parameter calibration space of the automated measurement interaction layer, and writes the voltage measured by the lower computer into the voltage acquisition data space address of the interaction layer according to the calibration parameters according to the instructions of the upper computer in the interaction layer;

[0019] The final data is displayed on the interface for testers to review and imported into the interface test table for analysis.

[0020] Furthermore, the corresponding interface simulation voltage test table is imported into the host computer middleware written in C# according to the interface model to facilitate the automatic storage of measurement data.

[0021] Furthermore, the PXIe voltage acquisition board acquisition program completes the automated acquisition of three AD sampling chips through the FreeRTOS system, and uses mutexes to prevent conflict and deadlock problems when the FPGA uses the SPI interface.

[0022] Furthermore, the gains and offsets of the linear relationships of the 20-channel calibration fits calculated by the host computer are stored in the interactive layer address space to form a calibration parameter table for the 20 channels. The PXIe voltage acquisition board automatically extracts the gains and offsets of each channel in this table to calculate the final calibrated voltage value.

[0023] Technical Effects

[0024] The present invention provides an automated measurement platform and method for satellite payload interface analog voltage, capable of automated measurement of satellite payload interface analog voltage, meeting complex and continuous testing environments. A digital filter and a graded voltage scheme in the lower computer program implement precise automated voltage acquisition from 0 to 100V. Through an automated measurement interaction layer, automated interactive operations between the upper and lower computers are completed, primarily enabling real-time refreshing of information required for automated measurement and voltage acquisition data. The upper computer sends instructions and calibration parameters to the interaction layer via DMA, and the lower computer responds with voltage data and its own status via AXI_HP. The upper computer automatically calibrates and stores the calculated linear gain and offset in the interaction layer, ensuring an intelligent and automated test process. The platform can handle complex and diverse satellite payload analog voltage interfaces under test. The platform addresses numerous issues in traditional test platforms and methods, significantly improving the efficiency of the analog voltage test process. The entire test platform can provide enhanced assurance for satellite ground inspection analog voltage testing.

[0025] The concept, specific structure and technical effects of the present invention will be further described below in conjunction with the accompanying drawings to fully understand the purpose, characteristics and effects of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a schematic diagram of the overall framework of a satellite payload interface analog voltage automatic measurement platform according to a preferred embodiment of the present invention;

[0027] Figure 2This is a flow chart of adaptive voltage gain regulation of a lower computer of a satellite payload interface analog voltage automatic measurement platform according to a preferred embodiment of the present invention;

[0028] Figure 3 The present invention is a schematic diagram of an automated measurement interaction layer of a satellite payload interface analog voltage automated measurement platform according to a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0029] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0030] In the following description, specific details, such as certain internal procedures and techniques, are provided for purposes of illustration and not limitation to facilitate a thorough understanding of the embodiments of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0031] like Figure 1 As shown, the present invention provides a satellite payload interface analog voltage automated measurement platform, including a PXIe voltage acquisition board, an automated measurement interaction layer, and a host computer test system interface; the PXIe voltage acquisition board sends the collected data and its own status information to the automated measurement interaction layer, and the host computer test system interface then extracts the corresponding data from the automated measurement interaction layer. The PXIe voltage acquisition board is used for 20-channel 0-100V analog voltage automated acquisition, and automatically adjusts the gain to improve measurement accuracy through an internal digital filter and voltage grading scheme. The automated measurement interaction layer stores the information required for automated measurement through partition planning, and enables the host computer test system interface to directly establish a channel with the AD sampling chip on the PXIe voltage acquisition board to adjust the voltage acquisition parameters in real time; the host computer test system interface realizes the display, analysis, debugging, and storage of the final results of the entire voltage acquisition data, completes the calculation of the automated calibration parameters for the voltage acquisition, and realizes automated interactive measurement with the lower computer through the automated measurement interaction layer. The host computer test system interface realizes the automated control of the entire test process. By sending instructions to the specified address of the board cache space, it completes the automated voltage measurement process and starts the automated calibration function to further improve the accuracy of the measured voltage signal. Finally, the collected satellite stand-alone interface analog voltage signal is stored in the corresponding interface signal telemetry table for test personnel to view the results.

[0032] The PXIe voltage acquisition board includes a 20-channel precision step-down circuit, a multiplexer, an AD sampling chip, and a digital filter. The external analog voltage first passes through the 20-channel precision step-down circuit, where it is then transmitted to the multiplexer after a 10-fold attenuation. The AD sampling chip then switches multiplexer channels to collect voltage data for the corresponding channels. Finally, the collected digital voltage data is filtered and output to the automated measurement interface layer. This architecture of 20-channel precision step-down circuits, a multiplexer, and an AD sampling chip, along with an internal digital filter, enables multi-channel analog voltage acquisition, improving measurement accuracy and meeting the complex and diverse requirements of satellite power supply voltage interfaces. The 20-channel precision step-down circuit achieves a 10-fold voltage reduction through a voltage divider circuit, and a low-pass filter eliminates interference from high-frequency signals, accelerating testing progress.

[0033] The PXIe voltage acquisition board uses a voltage grading scheme for automated voltage acquisition, enabling the board to adaptively adjust voltage gain. This allows for high-volume testing scenarios and further improves measurement accuracy.

[0034] The voltage grading scheme specifically averages the collected digital signals, then restores the true analog voltage and compares it to the analog voltage range. After passing through the analog step-down circuit, the restored voltage uses a gain of 1 for the 0-2.5V range, a gain of 0.5 for the 2.5-5.0V range, and a gain of 0.25 for the 5.0-10V range. By refining the measurement voltage range and performing comparisons within the board's program, the voltage gain is automatically adjusted, improving voltage measurement accuracy and achieving automated measurement results.

[0035] The automated measurement interaction layer updates the automated test process information in real time through the DDR memory and sets up spatial channels so that the host computer can directly access and control the AD sampling chip. It communicates with the lower computer acquisition process through the AXI_HP interface and directly communicates data with the host computer in DMA mode through PCIe, improving the overall automated test acquisition rate and efficiency.

[0036] Among them, the automated test process information includes the automated measurement status of the lower computer and the command information of the upper computer; among them, the automated measurement status is in the DDR address space 0X1000051, 0X1000052 and 0X1000053, and the information in the above three addresses is updated according to the measurement status. When the data bit in the address is 0x02, it means that it is still being collected. When the data becomes 0x09, the collection is completed and stored in the voltage data collection address bit in the automated measurement interaction layer; the command information of the upper computer is that the lower computer determines whether to send the voltage data to the upper computer through the information address bit in the automated measurement interaction layer, and how many channel data to send to the upper computer, thereby realizing intelligent automated voltage collection, and by changing it, it is determined whether the calibration parameters in the automated measurement interaction layer are sent and changed. If changed, the new calibration parameters will be extracted to calculate the voltage collection data and store it in its corresponding address space.

[0037] The host computer can directly access and control the AD sampling chip. Specifically, the host computer controls the AD sampling chip channel of the lower computer. By opening up the information in the corresponding register of the AD sampling chip in the DDR memory and directly modifying the corresponding registers such as gain, selection and other registers on the host computer interface, the entire acquisition process can be debugged more flexibly, realizing the flexibility of automated acquisition.

[0038] The upper computer test system interface includes real-time display of voltage data, calculation of voltage linear relationship calibration parameters, and analysis and storage of the final collected voltage data; the upper computer test system interface uses the XDMA architecture through the PCIe bus to directly access the memory and communicate with the automated measurement interaction layer, realizing automated interactive operations with the lower computer during the voltage acquisition process.

[0039] The entire acquisition process is divided into analog and digital components. The analog component uses a high-load voltage divider circuit to step down the external analog voltage input and acquires the analog voltage digital signal via a delta-sigma ADC. This digital signal is filtered and averaged through an FPGA to reduce sampling error. The acquisition board utilizes three ADC sampling chips. The lower computer utilizes FreeRTOS, with data acquisition divided into three tasks. Mutexes isolate and mutually exclude the acquisition tasks, preventing internal program deadlocks and ensuring the stability of the lower computer program. The lower computer stores the acquired analog voltage data and its own acquisition status in the automated measurement interaction layer, which facilitates interaction between the upper and lower computers, achieving an automated acquisition process. The interactive communication is carried out on the lower computer through the AXI_HP interface to communicate with the interactive layer, and on the upper computer through the PCIe bus, using XDMA to directly access the memory space. The upper computer read and write driver directly calls Windows encapsulation functions, such as Readfile() and Writefile(), to implement the PCIe read and write functions of the upper computer to the lower computer. The high-speed serial link communication ensures the response speed of the entire sampling platform and the smoothness of the automation process, ensuring the stability of the platform under large-volume data sampling.

[0040] In a preferred embodiment of the present invention, the present invention provides a measurement method based on a satellite payload interface analog voltage automatic measurement platform, comprising the following steps:

[0041] Confirm the analog voltage cable of the satellite stand-alone interface to be tested. After the cable is connected, import the interface parameter table into the host computer test system interface and start the test; import the corresponding interface analog voltage test table into the host computer middleware written in C# according to the interface model to facilitate automatic storage of measurement data;

[0042] The external analog voltage first passes through the precision buck circuit of the PXIe voltage acquisition board to complete a 10-fold voltage attenuation. The voltage attenuation formula of the precision buck circuit is as follows:

[0043]

[0044] The resistance values of R1, R2, and R3 are all 3MΩ, the resistance of R4 is 1.1MΩ, R5 is a precision sliding rheostat with a resistance of 10KΩ, R6 is 10MΩ, and R7 is 10KΩ, all with an error of 0.1%. Therefore, the resistance values of the molecule connected in parallel range from 0.991 to 1.001MΩ, and the resistance values of R1, R2, and R3 connected in parallel range from 0.999 to 1.001MΩ. By adjusting the sliding rheostat, the parallel value of the molecule's resistances can be adjusted to achieve a precise 10x voltage attenuation.

[0045] The attenuated voltage is transmitted to the multiplexer. The acquisition program of the PXIe voltage acquisition board completes the channel selection of the multiplexer by controlling the GPIO pin of the AD sampling chip, realizing cyclic sampling of the 20-channel channel voltage.

[0046] When the collected voltage is input to the input port of the AD sampling chip, the AD sampling chip is responsible for converting the voltage into analog-to-digital and passing the converted digital signal into the digital filter to reduce noise interference.

[0047] Then take the average value of ten sampled data and smooth the sampled data. The formula is as follows:

[0048]

[0049] Because the on-resistance of each multiplexer channel varies, slight measurement errors may occur. Therefore, software calibration is required. This involves calculating the gain and offset of the linear relationship to create a calibration table for each of the 20 channels. For the initial measurement, 0V and 10V voltages are measured, and the average of these values is entered into the initial calibration table. The results are then stored in the automated measurement interaction layer using a voltage grading scheme.

[0050] The host computer performs calibration analysis on the voltage data measured for the first time, and sets the calibration gain and offset to form a 20-channel calibration table within the parameter calibration space of the automated measurement interaction layer. The calibration formula is as follows:

[0051] y = gain × x + offset

[0052] Calculate the calibration gain and calibration offset based on the actual measured voltages of 0V and 10V

[0053] Then, according to the instructions of the upper computer in the interactive layer, the voltage measured by the lower computer is written into the voltage acquisition data space address of the interactive layer according to the calibration parameters to form the latest calibration table.

[0054] The subsequent voltage measurement process will be calibrated according to the latest calibration table, and finally the measured accurate voltage value will be sent to the interaction layer for extraction by the host computer.

[0055] The host computer displays the final data on the interface for testers to view and import into the interface test table for analysis.

[0056] like Figure 2 As shown, an embodiment of the present invention provides a process for adaptively adjusting voltage gain of a PXIe voltage acquisition board of a satellite payload interface analog voltage automated measurement platform (i.e., a voltage grading solution), including the following steps:

[0057] Step 1: After the PXIe voltage acquisition card is powered on, the AD sampling chip automatically resets the AD sampling module and PGA module inside the chip, and simultaneously starts the SPI interface to communicate with the FPGA.

[0058] Step 2: Use the writeSingleRegister() function in the program to configure the internal registers of the AD sampling chip and set the register values that affect the sampling performance, such as the sampling rate, gain, and reference voltage; the gain is 1 times.

[0059] Step 3: Control the external multiplexer by controlling the GPIO port of the AD sampling chip, startConversions() function to start chip sampling, and finally use readData() function to retrieve the sampled data from the register;

[0060] Step 4: Use a digital filter to filter out high-frequency interference from the sampling signal and retain the low-frequency DC analog voltage signal.

[0061] Step 5: Take out ten sampled data and average them to suppress noise through linear superposition.

[0062] Step 6: Extract the gain and offset values from the calibration linear relationship based on the calibration table calculated by the upper computer in the automated measurement interaction layer, and substitute the averaged data into the formula y = gain × x + offset, where x is the averaged sampled data and y is the sampled voltage value transmitted from the lower computer to the upper computer for final display.

[0063] In step 7, the calibrated voltage is then partitioned and compared. Currently, there are three voltage ranges. If the voltage after stepping down is greater than 0V and less than or equal to 2.5V, there is no need to change the gain size in step 2. If the voltage after stepping down is greater than 2.5V and less than or equal to 5V, return to step 2 and change the gain size to 0.5. If the voltage after stepping down is greater than 5V and less than or equal to 10V, return to step 2 and change the gain size to 0.25. Then, when the host computer restores the true voltage value, the measured voltage is multiplied by 10, 20, and 40 respectively. By refining the gain of the AD sampling chip, the voltage measurement accuracy can be increased.

[0064] Step 8: Store the final result in the automated measurement interaction layer for the host computer to retrieve, display, store and analyze.

[0065] like Figure 3As shown, a block diagram of the automated measurement interaction layer of a satellite payload interface analog voltage automated measurement platform of a preferred embodiment of the present invention includes the automated measurement status information of the lower computer, calibration parameter information, voltage acquisition data information and upper computer instruction information, and also includes a channel for the upper computer to control the AD sampling chip of the lower computer.

[0066] The above information and channels are stored by allocating DDR addresses. The automated measurement status of the lower computer is stored in addresses 0x1000051, 0x1000052, and 0x1000053. These address bits are updated based on the measurement status. When the data bit in the address is 0x02, acquisition is still in progress. When the data changes to 0x09, acquisition is complete and stored in the voltage data acquisition address in the automated measurement interaction layer. Calibration parameter information is stored in addresses 0x200000-0x2001B8, enabling 20-channel linear calibration and addressing the lack of register space for the three ADC sampling chips. The upper computer commands are stored in addresses 0x100010-0x100015 and are responsible for starting the automated acquisition process and writing calibration parameters. When the lower computer detects a change in the command bit, calibration is completed before sending voltage data to the interaction layer. The upper computer controls the AD sampling chip channel of the lower computer through a separate task of the lower computer. When the channel is started, the upper computer modifies the corresponding register of the AD sampling chip of the lower computer in the interaction layer, and the lower computer directly writes the modified value into the AD sampling chip to complete the control of the AD sampling chip. The sampling rate and gain of the AD sampling chip can be changed, which facilitates independent debugging during automated measurement, improves the automated test process, enriches the test function, and improves test efficiency.

[0067] The above describes in detail the preferred embodiments of the present invention. It should be understood that those skilled in the art can make numerous modifications and variations based on the concepts of the present invention without inventive effort. Therefore, any technical solutions that can be derived by those skilled in the art through logical analysis, reasoning, or limited experimentation based on the concepts of the present invention and the prior art should be within the scope of protection defined by the claims.

Claims

1. A satellite payload interface analog voltage automatic measurement platform, characterized in that: Includes PXIe voltage acquisition board, automated measurement interaction layer, and host computer test system interface; The PXIe voltage acquisition board sends the collected data and its own status information to the automated measurement interaction layer, and the host computer test system interface then extracts the corresponding data from the automated measurement interaction layer; wherein, the PXIe voltage acquisition board is used for 20-channel 0-100V analog voltage automated acquisition, and realizes automated gain adjustment to improve measurement accuracy through internal digital filters and voltage grading schemes; the automated measurement interaction layer stores the information required for automated measurement through partition planning, and enables the host computer test system interface to directly establish a channel with the AD sampling chip on the PXIe voltage acquisition board to adjust the voltage acquisition parameters in real time; the host computer test system interface realizes the display, analysis, debugging and storage of the final results of the entire voltage acquisition data, and completes the calculation of the automated calibration parameters for voltage acquisition, and realizes automated interactive measurement with the lower computer through the automated measurement interaction layer.

2. The satellite payload interface analog voltage automatic measurement platform according to claim 1, characterized in that: The PXIe voltage acquisition board includes a 20-channel precision step-down circuit, a multiplexer, an AD sampling chip, and a digital filter. The external analog voltage first passes through the 20-channel precision step-down circuit, and the voltage is transmitted to the multiplexer after being attenuated 10 times. The AD sampling chip collects voltage data of the corresponding channel by switching the multiplexer channel. Finally, the collected digital voltage data is output to the automated measurement interaction layer after passing through the digital filter. The PXIe voltage acquisition board adopts a voltage grading scheme to automatically acquire voltage, thereby realizing the PXIe voltage acquisition board's function of adaptively adjusting voltage gain.

3. The satellite payload interface analog voltage automatic measurement platform according to claim 2, characterized in that: The voltage grading scheme is specifically implemented by taking the average value of the collected digital signal, and then restoring the real analog voltage and comparing it with the analog voltage range. The restored voltage after the analog step-down circuit adopts a gain of 1 in the range of 0-2.5V, a gain of 0.5 in the range of 2.5-5.0V, and a gain of 0.25 in the range of 5.0-10V.

4. The satellite payload interface analog voltage automatic measurement platform according to claim 1, characterized in that: The automated measurement interaction layer updates the automated test process information in real time through the DDR memory and sets a spatial channel so that the host computer can directly access and control the AD sampling chip; it communicates with the lower computer acquisition process through the AXI_HP interface and directly communicates data with the host computer in DMA mode through PCIe.

5. The satellite payload interface analog voltage automatic measurement platform according to claim 4, characterized in that: The automated test process information includes the automated measurement status of the lower computer and the host computer instruction information; wherein, the automated measurement status is in the DDR address space 0X1000051, 0X1000052 and 0X1000053, and the information in the above three addresses is updated according to the measurement status. When the data bit in the address is 0x02, it means that it is still being collected. When the data becomes 0x09, the collection is completed and stored in the voltage data collection address bit in the automated measurement interaction layer; the host computer instruction information is that the lower computer determines whether to send the voltage data to the host computer and how many channel data to send to the host computer through the information address bit in the automated measurement interaction layer, thereby realizing intelligent automated voltage collection, and by changing it to determine whether the calibration parameters in the automated measurement interaction layer are sent and changed, if changed, the new calibration parameters will be extracted to calculate the voltage collection data and store it in its corresponding address space.

6. The satellite payload interface analog voltage automatic measurement platform according to claim 4, characterized in that: The host computer can directly access and control the AD sampling chip. Specifically, the host computer controls the AD sampling chip channel of the lower computer by opening up the information in the corresponding register of the AD sampling chip in the DDR memory and directly modifying the corresponding register on the host computer interface.

7. The satellite payload interface analog voltage automatic measurement platform according to claim 1, characterized in that: The host computer test system interface includes real-time display of voltage data, calculation of voltage linear relationship calibration parameters, and analysis and storage of the finally collected voltage data.

8. The satellite payload interface analog voltage automatic measurement platform according to claim 7, characterized in that: The host computer test system interface directly accesses the memory through the PCIe bus and utilizes the XDMA architecture to communicate with the automated measurement interaction layer.

9. A measurement method based on a satellite payload interface analog voltage automatic measurement platform according to any one of claims 1 to 8, characterized in that: The following steps are involved: Confirm the analog voltage cable of the satellite stand-alone interface to be tested. After the cable is connected, import the interface parameter table into the host computer test system interface and start the test; The external analog voltage input is stepped down by the PXIe voltage acquisition board and the internal program collects the voltage digital signal data; The data collected by the board is sent to the host computer through the automated measurement interaction layer; The host computer calibrates and analyzes the data, sets the calibration gain and offset to the parameter calibration space of the automated measurement interaction layer, and writes the voltage measured by the lower computer into the voltage acquisition data space address of the interaction layer according to the calibration parameters according to the host computer instructions in the interaction layer; The final data is displayed on the interface for testers to review and imported into the interface test table for analysis.

10. The method for automatically measuring the analog voltage of a satellite payload interface according to claim 9, wherein: Import the corresponding interface simulation voltage test table into the host computer middleware written in C# according to the interface model to facilitate automatic storage of measurement data.

11. The method for automatically measuring the analog voltage of a satellite payload interface according to claim 10, wherein: The PXIe voltage acquisition board acquisition program uses the FreeRTOS system to complete the automated acquisition of three AD sampling chips, and uses mutexes to prevent conflicts and deadlocks when the FPGA uses the SPI interface.

12. The method for automatically measuring the analog voltage of a satellite payload interface according to claim 9, wherein: The final data is displayed on the interface for testers to review and imported into the interface test table for analysis. Specifically, the gains and offsets of the 20-channel calibration fitting linear relationship calculated by the host computer are stored in the interactive layer address space to form a 20-channel calibration parameter table. The PXIe voltage acquisition board automatically extracts the gain and offset of each channel in this table to calculate the final calibrated voltage value.

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