A method and apparatus for processing an FPGA test result file
By constructing a preset rule base and parsing rules to automatically extract information from FPGA test result files, the problem of different file formats of different development tools is solved, and efficient and accurate information extraction and unified data management are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- AEROSPACE SOFTWARE TECH (BEIJING) CO LTD
- Filing Date
- 2025-04-28
- Publication Date
- 2026-05-12
AI Technical Summary
In the existing technology, the information extraction efficiency of FPGA test result files is low, and manual operation makes it difficult to ensure the accuracy of information, especially since different FPGA development tools generate different file formats and data organization methods.
A pre-defined rule base is built, containing parsing rules corresponding to various FPGA development tools. Information is automatically extracted from FPGA test result files through parsing rules and stored in a pre-defined database. RESTful API transmission and standardized test report generation are supported.
It enables efficient and accurate extraction of information from test result files generated by different FPGA development tools, unifies the data structure, and facilitates management and generation of consistent test reports.
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Figure CN120448353B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of computers, and in particular to a method and apparatus for processing FPGA test result files. Background Technology
[0002] Field-Programmable Gate Array (FPGA) is a commonly used programmable logic device.
[0003] Currently, FPGA development involves extensive testing and the generation of numerous FPGA measurement result files. Furthermore, different FPGA development tools often produce FPGA test result files with unique file formats and data organization methods. In existing technologies, extracting information from different FPGA measurement result files requires testers to manually browse and extract the information from each file. This not only necessitates that testers be familiar with the file formats and data organization methods of various FPGA test result files, but the manual process also makes it difficult to guarantee the accuracy of the information. This severely impacts FPGA testing efficiency.
[0004] Therefore, how to extract information recorded in different FPGA measurement result files more efficiently is a problem that needs to be solved. Summary of the Invention
[0005] To address the aforementioned technical problems, this application provides a method and apparatus for processing FPGA test result files.
[0006] In a first aspect, this application provides a method for processing FPGA test result files. The method is applied to an FPGA test management device. The method includes: acquiring a target file; determining the target parsing rule corresponding to the target FPGA development tool from a preset rule base; wherein the target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule base includes: multiple parsing rules; the multiple parsing rules are used to parse the FPGA test result files output by different FPGA development tools; parsing the target file according to the target parsing rule to obtain m test results included in the target file; m is a positive integer.
[0007] In some implementations, the target file is parsed according to the target parsing rules to obtain m test results included in the target file, including: using m regular expressions included in the target parsing rules to extract m test results from the target file that conform to the m regular expressions.
[0008] In some implementations, the method further includes: storing the m test results included in the target file into a preset database according to a preset data structure; the preset database is used to store the test results in FPGA test result files output by various FPGA development tools according to the preset data structure.
[0009] In some implementations, the method further includes: obtaining the test rounds corresponding to the target file in the project under test; storing the m test results included in the target file into a preset database according to a preset data structure, including: storing the m test results included in the target file into a preset database according to the preset data structure based on the test rounds corresponding to the target file.
[0010] In some implementations, the target file is obtained, including by using a RESTful API between the FPGA test management device and the target FPGA development tool to obtain the target file from the target FPGA development tool.
[0011] In some implementations, the method further includes: displaying a preset interface; the preset interface includes a first interactive area for inputting FPGA test result files; obtaining a target file, including: obtaining the target file based on a first user operation on the first interactive area.
[0012] In some implementations, the preset interface also includes a second interactive area for determining the test type and the test cases used; the method further includes: obtaining the test type and the test cases used corresponding to the target file based on the second user operation on the second interactive area; and storing the m test results included in the target file into a preset database according to a preset data structure based on the test type and the test cases used corresponding to the target file.
[0013] In some implementations, the method also includes generating a test report that conforms to a preset document template based on the m test results included in the target file.
[0014] Secondly, this application provides an FPGA test management device, comprising: an acquisition unit for acquiring a target file; a processing unit for determining the target parsing rule corresponding to the target FPGA development tool from a preset rule base; wherein the target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule base includes: multiple parsing rules; the multiple parsing rules are respectively used to parse FPGA test result files output by different FPGA development tools; the processing unit is further configured to parse the target file according to the target parsing rule to obtain m test results included in the target file; m is a positive integer.
[0015] In some implementations, the processing unit is further configured to parse the target file according to the target parsing rules to obtain m test results included in the target file, including: the processing unit is further configured to extract m test results that conform to the m regular expressions from the target file using the m regular expressions included in the target parsing rules.
[0016] In some implementations, the processing unit is also used to store the m test results included in the target file into a preset database according to a preset data structure; the preset database is used to store the test results in FPGA test result files output by various FPGA development tools according to a preset data structure.
[0017] In some implementations, the processing unit is further used to obtain the test round corresponding to the target file in the project under test; the processing unit is further used to store the m test results included in the target file into a preset database according to a preset data structure, including: the processing unit is further used to store the m test results included in the target file into a preset database according to the test round corresponding to the target file.
[0018] In some implementations, the acquisition unit, used to acquire the target file, includes: an acquisition unit used to acquire the target file from the target FPGA development tool via a RESTful API between the FPGA test management device and the target FPGA development tool.
[0019] In some implementations, the processing unit is also used to display a preset interface; the preset interface includes a first interactive area for inputting FPGA test result files; the acquisition unit is used to acquire a target file, including: the acquisition unit is used to acquire the target file based on a first user operation on the first interactive area.
[0020] In some implementations, the preset interface further includes: a second interactive area for determining the test type and the test cases used; the processing unit is further used to obtain the test type and the test cases used corresponding to the target file based on the second user operation on the second interactive area; the processing unit is further used to store the m test results included in the target file into a preset database according to a preset data structure based on the test type and the test cases used corresponding to the target file.
[0021] In some implementations, the processing unit is also used to generate a test report that conforms to a preset document template based on the m test results included in the target file.
[0022] Thirdly, an FPGA test management device is provided, comprising: a memory and a processor, wherein the memory is used to store a computer program, and the processor is used to cause the FPGA test management device to implement the method as described in the first aspect or any implementation thereof when executing the computer program.
[0023] Fourthly, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a computing device, causes the computing device to implement the method as described in the first aspect or any implementation thereof.
[0024] Fifthly, a computer program product is provided that, when the computer program product is run on a computer, causes the computer to implement the method as described in the first aspect or any of the implementations in the first aspect.
[0025] The technical solution provided in this application has the following advantages compared with the prior art:
[0026] In this application, it is considered that a pre-built rule base can be constructed, which can include parsing rules corresponding to various FPGA development tools. Each parsing rule is used to parse FPGA test result files output by different FPGA development tools. Thus, when it is necessary to extract information from a specific FPGA test result file (hereinafter referred to as the target file), after obtaining the target file, the parsing rules (hereinafter referred to as the target parsing rules) corresponding to the FPGA development tool (hereinafter referred to as the target FPGA development tool) can be determined from the pre-built rule base. Then, the target file is parsed according to the target parsing rules to obtain the test results included in the target file. This achieves a more efficient extraction of information recorded in different FPGA measurement result files. Attached Figure Description
[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0028] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0029] Figure 1 This application provides one method for processing FPGA test result files.
[0030] Figure 2This application provides a second method for processing FPGA test result files.
[0031] Figure 3 This application provides a third method for processing FPGA test result files.
[0032] Figure 4 This application provides a fourth method for processing FPGA test result files.
[0033] Figure 5 This application provides a fifth method for processing FPGA test result files.
[0034] Figure 6 This application provides a sixth method for processing FPGA test result files.
[0035] Figure 7 A schematic diagram of an interface provided for an embodiment of this application;
[0036] Figure 8 This application provides a seventh method for processing FPGA test result files.
[0037] Figure 9 This application provides an eighth method for processing FPGA test result files.
[0038] Figure 10 This is one of the structural schematic diagrams of an FPGA test management device provided in an embodiment of this application;
[0039] Figure 11 This is a second schematic diagram of the structure of an FPGA test management device provided in an embodiment of this application. Detailed Implementation
[0040] To better understand the above-mentioned objectives, features, and advantages of this application, the solution of this application will be further described below. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be combined with each other.
[0041] Many specific details are set forth in the following description in order to provide a full understanding of this application, but this application may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only some embodiments of this application, and not all embodiments.
[0042] The technical solutions provided in the embodiments of this application are described below with reference to examples:
[0043] Currently, the FPGA development process involves numerous tests and generates a large number of FPGA measurement result files. For example, different test types, such as power consumption testing, static timing testing, and margin testing, will generate different FPGA measurement result files.
[0044] Furthermore, different FPGA development tools often generate FPGA test result files with unique file formats and data organization methods. For example, common FPGA development tools include Libero, ISE, Vivado, and Quastus II, etc., and the FPGA test result files generated by these tools have different file formats and data organization methods.
[0045] Therefore, if testers manually browse and extract information from each FPGA measurement result file, they not only need to be familiar with the file formats and data organization methods of various FPGA test result files, but the accuracy of the information is also difficult to guarantee during manual operation. This seriously affects the testing efficiency of FPGAs.
[0046] To address the aforementioned technical problems, this application embodiment considers the following: A pre-built rule base can be constructed, which may include parsing rules corresponding to various FPGA development tools. Each parsing rule is used to parse FPGA test result files output by different FPGA development tools. Thus, when it is necessary to extract information from a specific FPGA test result file (hereinafter referred to as the target file), after obtaining the target file, the parsing rules (hereinafter referred to as the target parsing rules) corresponding to the FPGA development tool (hereinafter referred to as the target FPGA development tool) can be determined from the pre-built rule base. Then, the target file is parsed according to the target parsing rules to obtain the test results included in the target file. This achieves a more efficient extraction of information recorded in different FPGA measurement result files.
[0047] The technical solutions provided in this application embodiment are described in detail below with reference to examples. Specifically, this application embodiment provides a method for processing FPGA test result files. The executing entity of this FPGA test result file processing method can be an FPGA test management device. When the FPGA test management device is running, it can execute all or part of the steps in the FPGA test result file processing method provided in this application embodiment. In practical applications, the function of the FPGA test management device can be implemented by a personal computer (including desktop computers, laptop computers, handheld computers, and notebook computers, etc.), or electronic devices such as smartphones and servers; or, the function of the FPGA test management device can also be implemented by some hardware / software devices in the aforementioned electronic devices. This application embodiment does not impose any special limitations on the specific form of the FPGA test management device.
[0048] like Figure 1 As shown in the embodiments of this application, the method for processing FPGA test result files may include:
[0049] S101, FPGA test management device obtains target file.
[0050] For example, the target file can be an FPGA test result file output by FPGA development tools such as Libero, ISE, Vivado, or Quastus II. As another example, the target file can be FPGA test result files for different test types, such as power consumption tests, static timing tests, or margin tests.
[0051] S102, The FPGA test management device determines the target parsing rule corresponding to the target FPGA development tool from the preset rule base.
[0052] The target FPGA development tool is the FPGA development tool corresponding to the target file.
[0053] In addition, the preset rule base includes multiple parsing rules. These rules are used to parse FPGA test result files output by different FPGA development tools.
[0054] For example, the preset rule base may include parsing rules corresponding to Libero, which can be used to parse the FPGA test result files output by Libero; in addition, the preset rule base may also include parsing rules corresponding to ISE, which can be used to parse the FPGA test result files output by ISE. Similarly, the preset rule base may also include parsing rules corresponding to other FPGA development tools.
[0055] S103. The FPGA test management device parses the target file according to the target parsing rules to obtain m test results included in the target file. Where m is a positive integer.
[0056] For example, taking the FPGA development tool Libero as an example, the FPGA test result files output by Libero are typically in .rpt format, and these files include multiple test results sorted according to Libero's corresponding data organization method. Therefore, when the target file is an FPGA test result file output by the FPGA development tool Libero, on the one hand, the FPGA test management device can open the .rpt format target file according to the file opening method indicated in the target parsing rules; on the other hand, the FPGA test management device can read the contents of the target file according to the data organization method indicated in the target parsing rules, thereby obtaining the m test results included in the target file.
[0057] In some implementations, such as Figure 2 As shown, S103 may specifically include:
[0058] S1031, The FPGA test management device uses the m regular expressions included in the target parsing rules to extract m test results that conform to the m regular expressions from the target file.
[0059] For example, taking an FPGA test result file output by Libero as the target file, if a specific string is used to represent the test result corresponding to static power in the FPGA test result file output by Libero, then the target parsing rules can include a specific regular expression corresponding to the specific string. Then, by extracting information that conforms to this specific regular expression from the target file, the test result corresponding to static power in the target file can be obtained. Here, the specific regular expression can be understood as one of m regular expressions, and the test result corresponding to static power obtained from the target file can be understood as one of m test results.
[0060] In some implementations, such as Figure 3 As shown, the method may further include:
[0061] S104. The FPGA test management device stores the m test results included in the target file into a preset database according to a preset data structure.
[0062] The preset database is specifically used to store the test results from FPGA test result files output by various FPGA development tools according to a preset data structure.
[0063] For example, after obtaining FPGA test result files output by different FPGA development tools, the FPGA test management device can, on the one hand, follow the processes described in S101-S103 to obtain the test results included in each FPGA test result file; on the other hand, it can store all the test results included in these FPGA test result files into a preset database according to the preset data structure described above. This unifies the data structure of the FPGA test results output by the FPGA development tools, facilitating data management.
[0064] Furthermore, in some designs, such as Figure 4 As shown, the method may further include:
[0065] S105, The FPGA test management device obtains the test round corresponding to the target file in the project under test.
[0066] For example, if the target file is the test result file obtained from the xth round of testing of a certain FPGA software (i.e. the project under test), then the test round corresponding to the target file can be x.
[0067] Therefore, the aforementioned S104 may specifically include:
[0068] S104a The FPGA test management device stores the m test results included in the target file into a preset database according to the test round corresponding to the target file, in accordance with the preset data structure.
[0069] For example, the FPGA test management device can, on the one hand, pre-divide different storage areas for test results corresponding to different test rounds in a preset database; on the other hand, it can store the m test results included in the target file in the storage area corresponding to the test round of the target file. This facilitates data management.
[0070] For example, the FPGA test management device can set corresponding indexes for the m test results included in the target file according to the test round corresponding to the target file, so that the m test results included in the target file can be found from the preset database according to the test round corresponding to the target file in the future.
[0071] In some implementations, embodiments of this application consider that a Representational State Transfer Application Programming Interface (RESTful API) can be designed between the FPGA test management device and various FPGA development tools. This allows the FPGA test management device to transmit information with various FPGA development tools via the RESTful API. Furthermore, as... Figure 5 As shown, S101 may specifically include:
[0072] S101a The FPGA test management device obtains the target file from the target FPGA development tool through the RESTful API between the FPGA test management device and the target FPGA development tool.
[0073] For example, in practical applications, on the one hand, the target FPGA development tool can be used to test the FPGA software and generate the corresponding FPGA test result file; on the other hand, after the target FPGA development tool generates the FPGA test result file, the FPGA test management device can directly obtain the corresponding FPGA test result file through the RESTful API.
[0074] In addition, in some implementations, such as Figure 6 As shown, the method may further include:
[0075] S106, FPGA test management device displays the preset interface.
[0076] The preset interface includes a first interactive area for inputting FPGA test result files.
[0077] Additionally, the preset interface may include prompts. These prompts guide the user to input the FPGA test result file into the FPGA test management device by performing user operations on the first interactive area.
[0078] For example, such as Figure 7 As shown, the preset interface 20 includes a first interactive area 201. Users can click the "File Upload" control in the first interactive area 201 to input FPGA test result files into the FPGA test management device.
[0079] Furthermore, S101 may specifically include:
[0080] S101b, the FPGA test management device obtains the target file based on the first user operation on the first interaction area.
[0081] For example, in Figure 7 In the preset interface 20 shown, the first user operation may include: clicking the "file upload" control in the first interactive area 201, thereby inputting the target file into the FPGA test management device.
[0082] The above implementation allows for the input of target files into the FPGA test management device simply by performing the first user operation on the first interactive area when information needs to be extracted from the target file. This simplifies the process, as testers only need to follow the steps outlined above to input the target file, reducing the complexity of use.
[0083] Furthermore, in some designs, on the one hand, the preset interface in S106 above may also include a second interactive area for determining the test type and the test cases used. On the other hand, as... Figure 8 As shown, the method may further include:
[0084] S107. The FPGA test management device obtains the test type and test cases used corresponding to the target file based on the second user operation in the second interaction area.
[0085] For example, such as Figure 7 As shown in the preset interface 20, the preset interface 20 includes area 202, which includes various test types (i.e., code review, file review, logic testing, etc.). Each test type can further include subtypes (for example, "margin testing" includes subtypes "clock margin testing" and "resource margin testing"). Each test type also corresponds to different test cases (for example, "clock margin testing" corresponds to "test case A", "test case B", and "test case C"; "resource margin testing" corresponds to "test case D", "test case E", and "test case F"). Users can determine the test type and the test cases to be used by clicking. Area 202 in the preset interface 20 can be understood as the second interactive area mentioned above. The user's clicking on the corresponding test type and subtype can be understood as part of the second user operation (i.e., the operation used to determine the test type corresponding to the target file), and the user's clicking on the corresponding test case can be understood as part of the second user operation (i.e., the operation used to determine the test case).
[0086] Furthermore, after parsing the target file according to the target parsing rules to obtain the m test results (i.e., S103) included in the target file, the method may also include:
[0087] S108: The FPGA test management device stores the m test results included in the target file into a preset database according to the test type corresponding to the target file and the test cases used, in accordance with the preset data structure.
[0088] For example, the FPGA test management device can pre-allocate different storage areas for different test types and test cases in a preset database, and can also store the m test results included in the target file in the storage area corresponding to the test round of the target file. This facilitates data management.
[0089] For example, the FPGA test management device can set corresponding indexes for the m test results included in the target file according to the test type and test cases used in the target file, so that the m test results included in the target file can be found from the preset database according to the test type and test cases used in the target file in the future.
[0090] In some implementations, such as Figure 9 As shown, the method may further include:
[0091] S109. The FPGA test management device generates a test report that conforms to a preset document template based on the m test results included in the target file.
[0092] Specifically, standardized preset document templates can be pre-set in the FPGA test management device. This allows the FPGA test management device to generate test reports that conform to the preset document templates. Furthermore, this ensures that the FPGA test management device can generate test reports conforming to the preset document templates in different FPGA software tests, thereby guaranteeing that all generated test reports have a consistent structure and style, facilitating reading and management.
[0093] It should be noted that, for ease of description in this embodiment, the document used to describe the test results of FPGA software testing is referred to as a "test report". Specifically, the test report may include: the test results of each test step during the testing process and the test results of the entire FPGA software test, etc.
[0094] In practical applications, a "test report" can be referred to as a "test conclusion," "test minutes," or similar terms. In other words, the name of the test report is not limited in this embodiment. In practice, any document describing the test results of FPGA software testing can be understood as a "test report" in this embodiment.
[0095] Based on the same inventive concept, as an implementation of the above method, this application also provides an FPGA test management device. This embodiment corresponds to the aforementioned method embodiment. For ease of reading, this embodiment will not repeat the details of the aforementioned method embodiment one by one, but it should be clear that the FPGA test management device in this embodiment can implement all the contents of the aforementioned method embodiment.
[0096] This application provides an FPGA test management device. Figure 9 This is a schematic diagram of one structure of the FPGA test management device, such as... Figure 10 As shown, the FPGA test management device 30 includes:
[0097] Acquisition unit 301 is used to acquire the target file;
[0098] Processing unit 302 is used to determine the target parsing rule corresponding to the target FPGA development tool from a preset rule base;
[0099] The target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule base includes: multiple parsing rules; these multiple parsing rules are used to parse the FPGA test result files output by different FPGA development tools;
[0100] The processing unit 302 is also used to parse the target file according to the target parsing rules to obtain m test results included in the target file; m is a positive integer.
[0101] In some implementations, processing unit 302 is further configured to parse the target file according to the target parsing rules to obtain m test results included in the target file, including:
[0102] The processing unit 302 is also used to extract m test results that conform to the m regular expressions from the target file using the m regular expressions included in the target parsing rules.
[0103] In some implementations, the processing unit 302 is also used to store the m test results included in the target file into a preset database according to a preset data structure; the preset database is used to store the test results in FPGA test result files output by various FPGA development tools according to a preset data structure.
[0104] In some implementations, the processing unit 302 is also used to obtain the test round corresponding to the target file in the project under test;
[0105] Processing unit 302 is further configured to store the m test results included in the target file into a preset database according to a preset data structure, including:
[0106] The processing unit 302 is also used to store the m test results included in the target file into a preset database according to a preset data structure, based on the test round corresponding to the target file.
[0107] In some implementations, the acquisition unit 301 is used to acquire the target file from the target FPGA development tool via a RESTful API between the FPGA test management device and the target FPGA development tool.
[0108] In some implementations, the processing unit 302 is also used to display a preset interface; the preset interface includes a first interactive area for inputting FPGA test result files;
[0109] The acquisition unit 301 is used to acquire the target file based on the first user operation on the first interactive area.
[0110] In some implementations, the default interface also includes a second interactive area for determining the test type and the test cases used;
[0111] The processing unit 302 is also used to obtain the test type and test cases used for the target file based on the second user operation on the second interaction area;
[0112] The processing unit 302 is also used to store the m test results included in the target file into a preset database according to a preset data structure, based on the test type corresponding to the target file and the test cases used.
[0113] In some implementations, the processing unit 302 is also used to generate a test report that conforms to a preset document template based on the m test results included in the target file.
[0114] The FPGA test management device 30 provided in this application embodiment can execute the method provided in any of the above embodiments. Its implementation principle and technical effect are similar, and will not be described again here.
[0115] Based on the same inventive concept, this application also provides an FPGA test management device. Figure 11 This is a schematic diagram of the FPGA test management device provided in the embodiments of this application, as shown below. Figure 11 As shown, the FPGA test management device provided in this embodiment includes a memory 401 and a processor 402. The memory 401 is used to store computer programs, and the processor 402 is used to execute the methods provided in the above embodiment when executing the computer programs.
[0116] Based on the same inventive concept, embodiments of this application also provide a computer-readable storage medium storing a computer program, which, when executed by a processor, causes a computing device to implement the method provided in the above embodiments.
[0117] Based on the same inventive concept, this application also provides a computer program product that, when run on a computer, enables a computing device to implement the method provided in the above embodiments.
[0118] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program code.
[0119] The processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.
[0120] Memory may include non-persistent memory in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, like read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.
[0121] Computer-readable media include both permanent and non-permanent, removable and non-removable storage media. Storage media can store information using any method or technology; the information can be computer-readable instructions, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.
[0122] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some or all of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A method for processing FPGA test result files, characterized in that, The method is applied to an FPGA test management device, and the method includes: Obtain the target file; Determine the target parsing rules corresponding to the target FPGA development tool from the preset rule base; The target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule base includes multiple parsing rules; the multiple parsing rules are used to parse FPGA test result files output by different FPGA development tools; The target file is parsed according to the target parsing rules to obtain m test results included in the target file; m is a positive integer; The step of parsing the target file according to the target parsing rules to obtain m test results included in the target file includes: Using the m regular expressions included in the target parsing rules, m test results that conform to the m regular expressions are extracted from the target file; wherein, the regular expressions correspond to the strings used to characterize the test results.
2. The method according to claim 1, characterized in that, The method further includes: The m test results included in the target file are stored in a preset database according to a preset data structure; the preset database is used to store the test results in FPGA test result files output by various FPGA development tools according to the preset data structure.
3. The method according to claim 2, characterized in that, The method further includes: Obtain the test rounds corresponding to the target files in the project under test; The step of storing the m test results included in the target file into a preset database according to a preset data structure includes: Based on the test round corresponding to the target file, the m test results included in the target file are stored in a preset database according to a preset data structure.
4. The method according to any one of claims 1-3, characterized in that, The acquisition of the target file includes: The target file is obtained from the target FPGA development tool through the RESTful API between the FPGA test management device and the target FPGA development tool.
5. The method according to any one of claims 1-4, characterized in that, The method further includes: The preset interface is displayed; the preset interface includes a first interactive area for inputting FPGA test result files; The step of obtaining the target file includes: obtaining the target file based on a first user operation on the first interactive area.
6. The method according to claim 5, characterized in that, The preset interface further includes: a second interactive area for determining the test type and the test cases used; the method further includes: Based on the second user operation on the second interaction area, obtain the test type and test cases corresponding to the target file; Based on the test type corresponding to the target file and the test cases used, the m test results included in the target file are stored in a preset database according to a preset data structure.
7. The method according to any one of claims 1-3, characterized in that, The method further includes: Based on the m test results included in the target file, a test report conforming to a preset document template is generated.
8. An FPGA test management device, characterized in that, include: The acquisition unit is used to acquire the target file; The processing unit is used to determine the target parsing rules corresponding to the target FPGA development tool from the preset rule base; The target FPGA development tool is the FPGA development tool corresponding to the target file; the preset rule base includes multiple parsing rules; the multiple parsing rules are used to parse FPGA test result files output by different FPGA development tools; The processing unit is further configured to parse the target file according to the target parsing rules to obtain m test results included in the target file; m is a positive integer; The processing unit is specifically used for: Using the m regular expressions included in the target parsing rules, m test results that conform to the m regular expressions are extracted from the target file; wherein, the regular expressions correspond to the strings used to characterize the test results.
9. An FPGA test management device, characterized in that, include: A memory and a processor, the memory being used to store a computer program, and the processor being used to cause the FPGA test management device to implement the method of any one of claims 1-7 when executing the computer program.