HPLC (High Performance Liquid Chromatography) station area cooperative communication method based on clock synchronization

Abstract

The invention provides an HPLC (High Performance Liquid Chromatography) station area cooperative communication method based on clock synchronization, which comprises the following steps: step 1, multi-dimensional data acquisition and broadcasting: each concentrator periodically acquires clock precision, stability and reliability data, and sends a beacon frame containing a timestamp and a health degree score through a power line carrier broadcasting channel; step 2, dynamically calculating the index distinction degree by using an entropy weight method, adaptively allocating weights, and electing an optimal main CCO in real time; step 3, dual-mode PID cooperative control: the main CCO adopts a dual-mode switching strategy of a dynamic PID algorithm and a chaotic fractional order PID algorithm; 4, monitoring a synchronization state in real time by constructing a clock check network, and optimizing a fault isolation strategy in combination with weighted scoring to realize that the state switching time of the master node and the slave node is less than or equal to 50ms; cooperative communication is realized on the basis of completing synchronization of the concentrators CCO in the whole network. Redundant message transmission is reduced through a dynamic parameter resynchronization mechanism, and the utilization rate of network resources is optimized.

Description

Technical Field

[0001] The present invention relates to the field of power communication, and in particular to a HPLC area collaborative communication method based on clock synchronization. Background Art

[0002] With the deep integration of power and communications technologies and the rapid development of smart grids, an increasing number of power terminals, such as smart meters and sensors, need to be connected to the power network. This places higher demands on the reliability, cost-effectiveness, and anti-interference capabilities of communication technologies. In the field of power communications, high-speed power line communication (HPLC) offers advantages over other communication methods, such as low construction costs, strong anti-interference capabilities, and high reliability. It is widely used in various power communications scenarios.

[0003] However, current research on high-speed power line carrier communication networks often focuses on small numbers of terminals, lacking in-depth research on the integration of massive numbers of terminals into power networks. The addition of massive terminals means an expansion of the scale of substations, and a corresponding increase in the number of Type I concentrators (CCOs). This can easily lead to clock desynchronization between CCOs, further disrupting coordinated communication across the entire system.

[0004] In traditional single-master clock architectures, the increasing number of CCOs leads to a dispersion of clock references, and synchronization errors at the substation level spread from milliseconds to hundreds of milliseconds, causing data conflicts and communication interruptions. The lack of a multi-CCO coordination mechanism leads to a decrease in sampling synchronization rates at edge nodes due to accumulated clock deviations. The computational complexity of centralized synchronization algorithms surges in scenarios with massive terminal volumes, requiring the deployment of dedicated hardware accelerator cards and increasing the power consumption of individual concentrators. Complex electromagnetic environments increase the loss rate of synchronization messages, extending synchronization convergence time to seconds. These issues make existing solutions difficult to meet the scalability, cost-effectiveness, and interference resistance requirements of massive terminal collaborative communications. Summary of the Invention

[0005] Purpose of the invention: The technical problem to be solved by the present invention is to provide a HPLC station collaborative communication method based on clock synchronization in response to the deficiencies of the existing technology. The existing HPLC station collaborative communication method is limited by the single-index clock evaluation system and the inefficient master-slave election mechanism. In the scenario of massive terminal access, there are problems such as master node election distortion, insufficient anti-noise interference capability, and parameter tuning relying on manual labor, resulting in low synchronization accuracy and poor network reliability. In addition, the existing technology is insufficient in research on the collaborative mechanism of massive terminals, and it is difficult to meet the high-precision synchronization requirements of large-scale equipment in the complex electromagnetic environment of smart grids. The present invention adopts a dual-mode PID anti-interference control strategy combined with a three-level conflict resolution model to improve the synchronization accuracy and collaborative communication efficiency of massive terminals in complex electromagnetic environments.

[0006] The method of the present invention comprises the steps of:

[0007] Step 1: Multi-dimensional data collection and broadcast: Each concentrator (CCO) periodically collects three types of data: clock accuracy, stability, and reliability. It then sends a beacon frame containing a timestamp and health score via a power line carrier broadcast channel. The clock accuracy is measured as the 10-minute average offset, the stability is measured as the Allan variance slope, and the reliability is measured as the percentage of 24-hour trouble-free operation time.

[0008] Step 2: Use the entropy weight method to dynamically calculate the indicator discrimination and adaptively assign weights to select the optimal primary CCO in real time;

[0009] Step 3: Dual-mode PID (Proportional Integral Differentiation) collaborative control: The main CCO uses a dual-mode switching strategy between a dynamic PID algorithm and a chaotic fractional-order PID algorithm. When the signal-to-noise ratio (SNR) is less than 18dB, noise interference increases significantly, causing a surge in synchronization errors. When the packet loss rate is greater than 2%, the link is unreliable, and synchronization message loss may cause cumulative clock deviation. In this case, the anti-interference mode is activated.

[0010] Step 4: Build a clock calibration network to monitor the synchronization status in real time, optimize the fault isolation strategy based on weighted scoring, and achieve a master-slave node state switching time of less than or equal to 50ms; achieve collaborative communication based on the completion of CCO synchronization of the entire network concentrator.

[0011] Step 1 includes the following steps:

[0012] In step 1.1, each CCO node collects the offset between its local clock and the reference clock at 1-second intervals, acquiring 600 data points in 10 minutes. The 10-minute window can cover both short-term interference (such as impulse noise) and long-term trends (such as crystal oscillator frequency drift), and the 600-point window can effectively identify periodic interference. After dynamic cleaning to remove outliers, the clock accuracy index ΔT is calculated using the sliding window average:

[0013]

[0014] where x k Indicates the offset between the local clock collected at the kth second and the reference clock;

[0015] Step 1.2: Decompose the short-term, medium-frequency, and long-term noise of the 10-minute time series data, calculate the variance of each window, and fit the Allan variance curve. The slope α is used to determine the stability level.

[0016]

[0017] where σ 2 (ψ) represents the Allan variance corresponding to the time interval ψ, which characterizes the noise intensity, and A represents the number of measurements and acquisitions within the time interval ψ;

[0018] Stability level judgment parameters: When α<0.5: the crystal frequency is stable; 0.5≤α<1.0: there is frequency drift; α≥1.0: significant noise interference;

[0019] Step 1.3: Combine the downtime duration, packet loss rate, and abnormal restart times in the past 24 hours to generate a reliability index.

[0020] Step 1.4: encapsulate the clock accuracy, stability, and reliability indicators into a standardized beacon frame and broadcast it to the substation nodes via the power line carrier. The beacon frame includes a timestamp, multi-dimensional data, and node ID in the format of {t stamp ,ΔT,α,S,ID p}, where t stamp represents the timestamp, S represents the reliability index, ID p Indicates the ID of the p-th CCO, p = 1, 2, ..., P, and P represents the number of CCO nodes.

[0021] Step 2 includes the following steps:

[0022] In step 2.1, each CCO node periodically collects clock accuracy, stability, and reliability data. After sliding window mean filtering, a standardized evaluation matrix is constructed and converted into a performance vector. Specifically, the following are included:

[0023] Sliding window mean filtering:

[0024]

[0025] in represents the sliding window mean at time t (filtered data), reflecting the smoothing trend of recent data, a k Indicates the original indicator value collected at the kth second;

[0026] The standardized evaluation matrix X is as follows, where each letter in the matrix represents the standardized value of each indicator:

[0027]

[0028] where ΔT p ′、α p ′、S p ′ are the standardized clock accuracy, stability and reliability indicators of the p-th node respectively; the performance vector conversion formula is:

[0029] v p =[ΔT' p ,α' p ,S' p ],

[0030] where v p It represents the performance vector of the p-th CCO node and is a three-dimensional vector;

[0031] Step 2.2: Adaptive weight adjustment is achieved through dynamic scene perception and indicator characteristic analysis: key indicators of clock accuracy, stability, and reliability are identified based on environmental parameters; information entropy is calculated using the entropy weight method, using the formula:

[0032]

[0033] Among them E j represents the information entropy of the jth indicator, N represents the number of collected data points, and the value of this invention is 600, L pj,k It represents the normalized value ratio of the jth indicator of the pth node at the kth moment, expressed as:

[0034]

[0035] where x' pj,k represents the normalized value of the jth indicator of the pth node at the kth moment;

[0036] A reverse weighting strategy is adopted for clock accuracy indicators, and finally the weights of clock accuracy, stability, and reliability indicators are normalized to form a dynamic allocation plan;

[0037]

[0038] in Indicates the final weight of the j-th indicator, E j represents the information entropy of the j-th indicator, where j takes values of 1, 2, and 3;

[0039] Step 2.3: Calculate the comprehensive score and elect the CCO with the highest comprehensive score as the lead CCO:

[0040]

[0041] where Q p represents the comprehensive score of the p-th node, x' pj Represents the normalized value of the j-th indicator of the p-th node.

[0042] Step 3 includes the following steps:

[0043] In step 3.1, the master CCO periodically broadcasts synchronization parameters, including the clock reference and dynamic weight. After receiving the time reference from the CCO, the master parses the time reference, calculates the instantaneous deviation between the local clock and the clock reference, and adjusts the clock frequency using the dynamic PID algorithm:

[0044]

[0045] where k p represents the proportional gain, k i represents the integral gain, k d represents the differential gain, u(t) represents the clock frequency adjustment, e(t) represents the clock instantaneous deviation, dt represents the integration time interval (discrete scenario) or the integration variable (continuous scenario); where k p , k i , k d Dynamic adjustment based on error statistics every 5 minutes ensures synchronization accuracy of ±20ms in power data collection scenarios;

[0046] Step 3.2: When the signal-to-noise ratio is detected to be less than 18dB, the noise interference increases significantly, resulting in a surge in synchronization error. When the synchronization message packet loss rate is greater than 2%, the anti-interference mechanism is immediately triggered. When the packet loss rate is greater than 2%, the link is unreliable. The loss of synchronization messages may cause clock cumulative deviation. The chaotic fractional-order PID algorithm is enabled and the differential order γ is adjusted; the proportional coefficient k is dynamically increased. p , shortening response delay.

[0047] In step 3.2, the chaotic fractional-order PID algorithm includes:

[0048] Step 3.2.1, Multi-dimensional Dynamic Anomaly Detection: Intelligent anomaly detection is achieved through cross-domain collaboration between the physical layer and the MAC layer. At the physical layer, the signal-to-noise ratio (SNR) is calculated in real time based on the OFDM (Orthogonal Frequency Division Multiplexing) subcarrier pilot signal. When the SNR is less than 18dB, the anti-interference mode is activated. At the same time, the link layer packet loss rate (PLR) is combined to activate the anti-interference mode when the packet loss rate exceeds 2%.

[0049] The clock deviation mutation acceleration ΔT” is calculated by extended Kalman filtering when ΔT”>5ms / s 2 Determine the risk of out-of-step when

[0050] Step 3.2.2, intelligent activation of anti-interference mode and HPLC resource pre-allocation: After detecting the risk of loss of synchronization, the master node broadcasts a channel fingerprint containing a dynamically generated subcarrier time slot heat map and a list of interfering subcarriers through a synchronization signaling frame. The slave node dynamically selects a parameter set based on the fingerprint matching degree and adopts a non-uniform resource block allocation strategy: high-interference subcarriers (SNR <10dB) are preferentially allocated FPGA computing resources to enhance channel estimation accuracy. Low-interference subcarriers (SNR > 20dB) are optimized for transmission efficiency by dynamically shortening the CRC (Cyclic Redundancy Check) check bit length. At the same time, the OFDM modulation order is switched based on the physical layer bit error rate and network layer routing load status.

[0051] Step 3.2.3, dynamic adjustment of chaotic PID parameters: extract the noise fractal dimension D based on wavelet packet transform, and dynamically calculate the fractional differential order γ:

[0052] γ=0.5+0.4·tanh(D)-0.1·e -SNR / 12 ,

[0053] Where e represents a natural constant; when the fractal dimension D>1.5, it is determined to be a continuous high-frequency interference, and γ is automatically increased to 1.2 (in real-time systems such as HPLC, it can take into account both response speed and stability requirements), and the proportional coefficient k p Dynamic enhancement through burst interference compensation formula:

[0054]

[0055] where k p boost represents the enhanced proportional coefficient, erf represents the error function, the error function erf constrains the over-compensation risk and prevents integral saturation, T ref represents the reference time interval, and the integral term is quantized using Gray code:

[0056]

[0057] Where Gray(q) represents the Gray code value, e(t) represents the instantaneous error signal, e(q) represents the error signal sampling value at discrete time step q, and → indicates that the integral operation is replaced by Gray code quantization processing to improve the anti-interference ability;

[0058] Step 3.2.4, holographic health monitoring and dynamic exit: Evaluate the anti-interference effect through the fusion of multi-dimensional indicators. The health level G is calculated as follows:

[0059] G=0.5·σ+0.3·JLI+0.2·λ,

[0060] Where λ is the delay jitter, σ represents the output standard value;

[0061] Combined with the quantum annealing algorithm, the exit threshold is dynamically adjusted, and Q represents the exit probability:

[0062]

[0063] Where θ represents the steepness control parameter of the exit probability; G represents health, and G0 represents the safety threshold (G0 = 0.7, which ensures that the system exits after high stability);

[0064] When G≥G0, the anti-interference mode is gradually exited in a probabilistic form, and the exit delay is shortened.

[0065] Step 4 includes the following steps:

[0066] Step 4.1: Nodes periodically self-check their clock synchronization status and sensor data consistency. The master node regularly scans the entire network, comprehensively assessing node health using latency jitter and packet loss rate indicators. This triggers graded warnings. A health level of G ≥ 0.8 indicates normal, 0.5 ≤ G < 0.8 indicates a warning, and G < 0.5 indicates danger, triggering node isolation.

[0067] Step 4.2: Use weighted scoring to optimize detection, diagnosis, isolation, and recovery strategies to quickly isolate faulty nodes. The weighted scoring formula is:

[0068]

[0069] Where U represents the policy score, λ is the delay jitter, and PLR is the packet loss rate. The lower U is, the higher the priority is. For example, if U < 0.4, isolation is triggered.

[0070] Step 4.3: Estimate the time required for the node to return to normal based on historical fault data (such as the last restart time and resource utilization). For example, if the average node restart time is 30 seconds and the current load is high, the predicted recovery time is 40 seconds. Within the predicted time, load the data and configuration of the backup node in advance. Adjust the time to switch to the backup node based on the real-time network status. For example, when the network is stable, allow the node to be temporarily abnormal (such as delay <10ms) without switching. When the network is congested, switch immediately if there is a minor abnormality (such as delay >20ms).

[0071] In step 4.4, the master node dynamically reconstructs the network topology based on the health G obtained in step 3.2.4. Nodes with low health (G < 0.2) are permanently isolated from abnormal nodes and tasks are reallocated to enhance the network's anti-interference capability. Collaborative communication is achieved based on the completion of network-wide CCO clock synchronization.

[0072] Step 4.4 includes:

[0073] Step 4.4.1: Implement clock synchronization and communication functions through layered technology. A hybrid time-division multiplexing architecture is used for physical layer clock alignment, allocating 15% of the bandwidth as independent time slots. In dynamic subcarrier allocation, the clock deviation threshold is set to 5ms. Three levels of queues are set up at the link layer: emergency, important, and normal. The emergency queue uses a hard preemption protocol with a backoff window compressed to 16 to 32 seconds to ensure that coordinated commands are transmitted within 50ms.

[0074] In step 4.4.2, resource coordination and load balancing are achieved through the following process: When a node's bandwidth utilization exceeds 70%, a collaboration request is triggered. The receiving node selects paths based on hop count ≤ 3 and historical packet loss rate ≤ 2%, reserving 20% of bandwidth to ensure collaborative instructions. The load balancing adjustment period is set to 15 minutes, and tasks are redistributed using a consistent hashing algorithm. When a node's bandwidth exceeds the limit, only local tasks (such as neighboring nodes) are migrated to avoid system-wide reallocation. The task path is locked using a hash ring to ensure that high-priority instructions (such as collaborative instructions) are transmitted within 50ms.

[0075] Step 4.4.3: Use the Cross-Layer Dynamic Arbitration Protocol (CDAP) to improve conflict resolution efficiency and spectrum utilization through a collaborative mechanism of physical layer noise perception, network layer status assessment, and dynamic resource isolation.

[0076] The cross-layer dynamic arbitration protocol CDAP includes a prevention level, an arbitration level, and a mandatory level;

[0077] The prevention level refers to conflict avoidance based on OFDM time slot pre-allocation, including: embedding the time slot reservation identifier SyncTag in the physical layer based on the OFDM multi-carrier characteristics of HPLC, and dynamically dividing low-interference and high-interference subcarrier groups through multi-fractal dimension calculation; D < 1.2 is a low-interference subcarrier group, and D ≥ 1.5 is a high-interference subcarrier group, where D represents the fractal dimension;

[0078] The fractal dimension is calculated using the R / S analysis method modified by the Hurst index:

[0079]

[0080] Where n represents the sample size, R / S represents the rescaled range;

[0081] When it is detected that the adjacent node channel occupancy rate ρ>70%, the dynamic time slot reallocation algorithm is triggered, and the formula is:

[0082]

[0083] where t alloc represents the dynamically allocated time slot, τ represents the delay factor, α p is the subcarrier interference weight of the p-th node, CSI p is the subcarrier channel state index of the p-th node, β is the multipath fading coefficient, T slot is the time slot period;

[0084] The arbitration level refers to the dynamic reconstruction of cross-layer state perception priorities, including: constructing the node comprehensive state index NSI, integrating the physical layer, MAC layer and network layer parameters:

[0085]

[0086] Among them, ER is effective throughput, BOR is buffer occupancy, RTT is round trip delay, JV is jitter variance, E k is the remaining energy, E max is the maximum residual energy of the node, exp is the natural exponential function;

[0087] When NSI ≥ 85, the nonlinear modulation switching strategy is dynamically triggered:

[0088]

[0089] Where M represents the modulation order, 16-QAM represents 16-order quadrature amplitude modulation, 64-QAM represents 64-order quadrature amplitude modulation, and LDPC represents low-density parity-check code.

[0090] The spectrum efficiency improvement function ΔSE is:

[0091]

[0092] Where Eb / No is the signal-to-noise energy ratio;

[0093] During the conflict, the chaos backoff window is adjusted to balance the fairness of channel competition. The formula is:

[0094]

[0095] Where W old Indicates the current backoff window size, W new represents the new backoff window size after dynamic adjustment, and C represents the conflict intensity coefficient;

[0096] The mandatory level refers to dynamic spectrum cutting and hard isolation, including: when the conflict lasts for more than 300ms, the tensor decomposition spectrum cutting algorithm is triggered, including the following steps:

[0097] Spectrum fragmentation: Split the conflicting frequency band into two SF orthogonal sub-bands, spreading code SF = 128, sub-band bandwidth B = B total / 2SF, isolate low health nodes, determine NSI < 50 as low health nodes, where B total Represents the initial total bandwidth of the conflicting frequency band; the cutting criterion is:

[0098]

[0099] Where H represents the channel matrix, H sub represents the sub-band channel matrix, H n represents the nth subchannel matrix, represents the Kronecker product;

[0100] Virtual channel reconstruction: Physical layer spectrum fragments are mapped to MAC layer virtual channels, and the network layer dynamically updates the routing table. The formula is:

[0101] Q(s,a)←Q(s,a)+ω[R(s,a)+εmaxQ(s',a')-Q(s,a)],

[0102] Where Q(s,a) represents the Q-value function, R(s,a) represents the immediate reward, s represents the current state, a represents the current action, Q(s',a') represents the Q-value function in the next state, ← represents the update operator, ω represents the learning rate, and ε represents the discount factor;

[0103] Step 4.4.4: Build a multi-path redundancy architecture: The primary path uses the dual-mode PID collaborative control described in step 3. The backup path uses spread spectrum technology to enhance anti-interference capabilities. (Spread spectrum technology is a mature technology in the field of power line communication (PLC). Specifically, it uses spread spectrum codes to expand the signal bandwidth in the backup path to reduce the impact of narrowband interference.) The control center monitors the path health status in real time and triggers a rapid switching mechanism when the primary path is abnormal. A service quality assurance strategy is deployed across the entire link, with collaborative control traffic receiving the highest transmission priority. The backup node preload process is initiated in advance based on the latency jitter health index G and the prediction of potential failures.

[0104] In step 4.4.4, the triggering condition for the fast switching mechanism is: the delay jitter λ of the primary path is greater than 10ms. The switching strategy of the fast switching mechanism includes: prioritizing the allocation of idle sub-bands through a dynamic time slot reallocation algorithm, and establishing a redundant connection on the backup path through spread spectrum technology;

[0105] The service quality assurance strategy includes: assigning high priority queues to high health nodes (NSI ≥ 85) (step 4.4.3), and ensuring minimum throughput through LDPC encoding on the backup path (step 4.4.1);

[0106] The present invention also provides an electronic device, comprising a processor and a memory, wherein the memory stores program code, and when the program code is executed by the processor, the processor executes the steps of the method.

[0107] The present invention also provides a storage medium storing a computer program or instruction, which executes the steps of the method when the computer program or instruction is run on a computer.

[0108] By constructing a distributed clock synchronization mechanism, the present invention innovatively proposes a multi-dimensional node evaluation model and a hierarchical control strategy, achieving high-precision synchronization while reducing the computational load. On this basis, it further integrates the three-dimensional collaborative design of physical layer phase alignment, link layer priority scheduling, and network layer dynamic routing, and combines dynamic weight election, dual-mode PID anti-interference control, and a three-level conflict resolution model to form a complete HPLC substation collaborative communication system, providing an efficient and reliable solution for the massive terminal access scenarios of smart grids.

[0109] Beneficial effects: 1. Through the dynamic coordination mechanism of multiple CCOs, it breaks through the scale limitations of the traditional single CCO architecture, supports massive terminal access, and adapts to the complex scenario requirements of smart grids.

[0110] 2. Significantly enhanced anti-interference performance: Innovatively integrate dual-mode PID control and fractional-order differential equation anti-interference model. In normal mode, the standard PID algorithm is used to quickly correct frequency deviation through proportional-integral-differential coordinated adjustment; in anti-interference mode, it switches to fractional-order PID and uses differential order adjustment to enhance high-frequency noise suppression capabilities, greatly improving synchronous convergence efficiency.

[0111] 3. Real-time compensation for clock deviation mutations is introduced, and the response time for dynamic adjustment of synchronization parameters is shortened to 20ms (traditional solutions require 100ms), ensuring continuous collaboration in complex electromagnetic environments.

[0112] 4. Reduced deployment costs: Based on the existing CCO equipment and power line carrier communication architecture, clock synchronization is achieved through software algorithm optimization:

[0113] Master node election does not require additional hardware investment, and the health scoring model improves the efficiency of faulty node identification; the dynamic parameter resynchronization mechanism reduces redundant message transmission and optimizes network resource utilization. BRIEF DESCRIPTION OF THE DRAWINGS

[0114] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, and the above and / or other advantages of the present invention will become more apparent.

[0115] Figure 1 This is a multi-concentrator high-speed power line carrier communication topology diagram.

[0116] Figure 2 It is a flow chart of the method of the present invention.

[0117] Figure 3 It is a multi-dimensional parameter collection and broadcasting flowchart.

[0118] Figure 4 This is a schematic diagram of dynamic weight evaluation and master-slave CCO election.

[0119] Figure 5 It is the triggering and execution flow chart of the chaotic PID anti-disturbance mechanism.

[0120] Figure 6 It is a schematic diagram of distributed fault-tolerant architecture and adaptive adjustment in dynamic environments.

[0121] Figure 7 It is a schematic diagram of the collaborative communication process. DETAILED DESCRIPTION

[0122] The embodiment of the present invention provides a HPLC area collaborative communication method based on clock synchronization, and the multi-CCO high-speed power line carrier communication topology diagram is as follows: Figure 1 As shown, it includes a server, a concentrator, and a collector, and information is transmitted between the various devices mainly through power lines.

[0123] The process of the present invention is as follows Figure 2 As shown, the following steps are included:

[0124] Step 1: Multi-dimensional data collection and broadcast: Each concentrator (CCO) periodically collects three types of data: clock accuracy, stability, and reliability. It then sends a beacon frame containing a timestamp and health score via a power line carrier broadcast channel. The clock accuracy is measured as the 10-minute average offset, the stability is measured as the Allan variance slope, and the reliability is measured as the percentage of 24-hour trouble-free operation time.

[0125] Step 2: Use the entropy weight method to dynamically calculate the indicator discrimination and adaptively assign weights to select the optimal primary CCO in real time;

[0126] Step 3: Dual-mode PID (Proportional Integral Differentiation) collaborative control: The main CCO uses a dual-mode switching strategy between a dynamic PID algorithm and a chaotic fractional-order PID algorithm. When the signal-to-noise ratio (SNR) is less than 18dB, noise interference increases significantly, causing a surge in synchronization errors. When the packet loss rate is greater than 2%, the link is unreliable, and synchronization message loss may cause cumulative clock deviation. In this case, the anti-interference mode is activated.

[0127] Step 4: Build a clock calibration network to monitor the synchronization status in real time, optimize the fault isolation strategy based on weighted scoring, and achieve a master-slave node state switching time of less than or equal to 50ms; achieve collaborative communication based on the completion of CCO synchronization of the entire network concentrator.

[0128] In step 1, the multi-dimensional parameter collection and broadcast process is as follows Figure 3 As shown, the specific steps include:

[0129] In step 1.1, each CCO node collects the offset between its local clock and the reference clock at 1-second intervals, acquiring 600 data points over 10 minutes. This 10-minute window can cover both short-term interference (such as impulse noise) and long-term trends (such as crystal oscillator frequency drift), and the 600-point window can effectively identify periodic interference. After dynamic cleaning to remove outliers, the clock accuracy indicator ΔT is calculated using the sliding window average.

[0130]

[0131] where x k Indicates the offset between the local clock collected at the kth second and the reference clock.

[0132] Step 1.2: Decompose the short-term, medium-frequency, and long-term noise of the 10-minute time series data, calculate the variance of each window, and fit the Allan variance curve. The slope α is used to determine the stability level.

[0133]

[0134] where σ 2 (ψ) represents the Allan variance corresponding to the time interval ψ, which characterizes the noise intensity, and A represents the number of times the frequency is measured within the time interval ψ;

[0135] Stability level judgment parameters: When α<0.5: the crystal oscillator frequency is stable; 0.5≤α<1.0: there is frequency drift; α≥1.0: significant noise interference.

[0136] Step 1.3: Combine the downtime duration, packet loss rate, and abnormal restart times in the past 24 hours to generate a reliability index.

[0137] In step 1.4, the clock accuracy, stability, and reliability indicators are encapsulated into a standardized beacon frame, including a timestamp, multi-dimensional data, and node ID. The format is as follows and broadcast to the substation nodes via the power line carrier.

[0138] Beacon frame = {t stamp ,ΔT,α,S,ID p},

[0139] where t stamp represents the timestamp, ΔT represents the clock accuracy index, α represents the slope, S represents the reliability index, ID p Indicates the ID of the p-th CCO, where p is a natural number, p = 1, 2, ..., P, and P represents the number of CCO nodes.

[0140] In step 2, dynamic weight evaluation and master-slave CCO election are as follows Figure 4 As shown, the specific steps include:

[0141] In step 2.1, each CCO node periodically collects clock accuracy, stability, and reliability data. After sliding window mean filtering, a standardized evaluation matrix is constructed and converted into a performance vector.

[0142] Sliding window mean filter:

[0143]

[0144] The obtained value represents the sliding window mean (filtered data) at time t, reflecting the smoothing trend of recent data. P represents the number of data points, and a k Indicates the original indicator value collected at the kth second.

[0145] The standardized matrix is as follows. The letters in the matrix represent the standardized values of each indicator.

[0146]

[0147] The performance vector is transformed as follows, where v p Represents the performance vector of the pth node, which is a three-dimensional vector, ΔT p ′、α p ′、S p ′ are the standardized clock accuracy, stability and reliability indicators of the node.

[0148] v p =[ΔT' p ,α' p ,S' p ];

[0149] Step 2.2: Implement weight adaptive adjustment through dynamic scene perception and indicator characteristic analysis: Identify key indicators of clock accuracy, stability, and reliability based on environmental parameters; Calculate information entropy using the entropy weight method, as shown in the following formula:

[0150]

[0151] Among them L pj It represents the proportion of the normalized value of the p-th node under the j-th indicator, which is expressed as follows, where x pj ′ represents the normalized value of the j-th index of the p-th node:

[0152]

[0153] A reverse weighting strategy is used for the clock accuracy indicator. Finally, the weights of the clock accuracy, stability, and reliability indicators are normalized as shown below to form a dynamic allocation scheme.

[0154]

[0155] in Indicates the final weight of the j-th indicator, E j It represents the information entropy of the j-th indicator, and the values of j are 1, 2, and 3.

[0156] Step 2.3, by calculating the comprehensive score, elect the CCO with the highest comprehensive score as the main CCO, where Q p represents the comprehensive score of node p, x pj ′ represents the normalized value of the jth indicator of the pth node.

[0157]

[0158] In step 3, the dual-mode PID anti-disturbance control proposed in this example includes the following steps:

[0159] Step 3.1: The master CCO periodically broadcasts synchronization parameters (including clock reference and dynamic weight). After receiving the time reference from the CCO, the master CCO parses the time reference and calculates the instantaneous deviation between the local clock and the reference (once per second). The clock frequency is adjusted using the dynamic PID algorithm:

[0160] where k p represents the proportional gain, k i represents the integral gain, k d represents the differential gain, u(t) represents the clock frequency adjustment, e(t) represents the clock instantaneous deviation, and dt represents the integration time interval (discrete scenario) or integration variable (continuous scenario). p , k i , k d Dynamic adjustment based on error statistics every 5 minutes ensures synchronization accuracy of ±20ms in power data collection scenarios;

[0161] where k p , k i , k d Dynamic adjustments are made every 5 minutes based on error statistics to ensure synchronization accuracy of ±20ms in normal scenarios.

[0162]

[0163] Step 3.2: When the signal-to-noise ratio is detected to be less than 18dB, the noise interference increases significantly, resulting in a surge in synchronization error, or when the synchronization message packet loss rate is greater than 2%. When the packet loss rate is >2%, the link is unreliable and the loss of synchronization messages may cause clock cumulative deviation. At this time, the anti-interference mechanism is immediately triggered: the chaotic fractional-order PID algorithm is enabled, the differential order γ is adjusted, and the proportional coefficient k is dynamically increased. p , shortening response delay.

[0164] In step 3.2, this embodiment proposes a triggering and execution process of the fractional order chaos PID anti-disturbance mechanism applicable to the HPLC station as shown in the attached figure. Figure 5 As shown, the specific steps include:

[0165] Step 3.2.1, multi-dimensional dynamic anomaly detection: Unlike traditional solutions that rely on fixed signal-to-noise ratio thresholds and single packet loss rate determination, this invention implements intelligent anomaly detection through cross-domain collaboration between the physical layer and the link layer. Based on the OFDM (Orthogonal Frequency Division Multiplexing) subcarrier pilot signal, the SNR (Signal-to-Noise Ratio) is calculated in real time. When the SNR is less than 18dB, the anti-interference mode is activated. At the same time, the link layer packet loss rate (PLR) is combined to activate the anti-interference mode when the packet loss rate is greater than 2%.

[0166] Further calculate the clock deviation mutation acceleration ΔT” by extended Kalman filtering, when ΔT”>5ms / s 2 Determine the risk of out-of-step when (the threshold is set to 5ms / s 2 Because HPLC requires strict clock synchronization, exceeding this acceleration will cause consecutive symbols to lose synchronization. This improves response speed by 50% compared to traditional solutions. This process deeply adapts to the time-varying nature of HPLC, and through dynamic thresholds and cross-layer linkage, it addresses the lag problem of traditional solutions in scenarios with sudden channel changes.

[0167] Step 3.2.2, intelligent activation of anti-interference mode and HPLC resource pre-allocation: After detecting an anomaly, the master node broadcasts a channel fingerprint containing a dynamically generated OFDM subcarrier time slot heat map and an interference subcarrier list through a synchronization signaling frame. The slave node dynamically selects a parameter set based on the fingerprint matching degree and adopts a non-uniform resource block allocation strategy: high-interference subcarriers are preferentially allocated FPGA computing resources to enhance channel estimation accuracy. Low-interference subcarriers optimize transmission efficiency by dynamically shortening the CRC (Cyclic Redundancy Check) check bit length. At the same time, the OFDM modulation order is adaptively switched based on the physical layer bit error rate and the network layer routing load status. For example, when the bit error rate is <2% and the routing load is <60%, it is upgraded to 16-QAM to improve spectrum efficiency; otherwise, it is downgraded to QPSK to enhance noise immunity.

[0168] Step 3.2.3, Dynamic Adjustment of Chaotic PID Parameters: The control algorithm uses an improved chaotic PID parameter adjustment mechanism to break through the noise suppression bottleneck of traditional PID in the HPLC spread spectrum environment. The noise fractal dimension D is extracted based on wavelet packet transform, and the fractional differential order γ is dynamically calculated:

[0169] γ=0.5+0.4·tanh(D)-0.1·e -SNR / 12 ,

[0170] Where e represents a natural constant; when the fractal dimension D>1.5, it is determined to be a persistent high-frequency interference, and γ is automatically increased to 1.2 (in real-time systems such as HPLC, it can take into account both response speed and stability requirements);

[0171] Proportional coefficient k p Dynamic enhancement through burst interference compensation formula:

[0172]

[0173] where k p boost represents the enhanced proportional coefficient, erf represents the error function, the error function erf constrains the over-compensation risk and prevents integral saturation, T ref represents the reference time interval, and the integral term is quantized using Gray code:

[0174]

[0175] Where Gray(q) represents the Gray code encoding value, e(t) represents the instantaneous error signal, e(q) represents the error signal sampling value at discrete time step q, and → indicates that the integral operation is replaced by Gray code quantization processing to improve the anti-interference ability.

[0176] This design can suppress quantization noise and reduce steady-state errors. By combining chaotic mapping with quantized integration, it adapts to the frequency characteristics of HPLC spread spectrum codes and addresses the shortcomings of traditional PID in spread spectrum communication, which lacks noise immunity.

[0177] Step 3.2.4, Holographic Health Monitoring and Dynamic Exit (Adapting to HPLC Real-time Requirements): The system evaluates the anti-interference effect through the fusion of multi-dimensional indicators. The health calculation formula is as follows, where λ is the delay jitter and σ represents the output standard quantity;

[0178] G=0.5·σ+0.3·JLI+0.2·λ,

[0179] Delay jitter is introduced as a real-time evaluation indicator, and the exit threshold is dynamically adjusted in combination with the quantum annealing algorithm, where θ represents the steepness control parameter of the exit probability; G represents health, and G0 represents the safety threshold (G0 = 0.7, which can ensure the system exits after high stability);

[0180]

[0181] When G ≥ the safety threshold G0, the system gradually exits the anti-interference mode in a probabilistic manner, shortening the exit delay. This design, through the integration of multi-dimensional indicators and a probabilistic exit strategy, minimizes resource usage while ensuring stability, adapting to the low-latency, high-reliability communication requirements of HPLC.

[0182] In step 4, the distributed fault-tolerant architecture and dynamic environment adaptive adjustment are as follows Figure 6 As shown, the specific steps include:

[0183] Step 4.1: Nodes periodically self-check clock synchronization status and sensor data consistency. The master node regularly scans the entire network and evaluates node health based on latency jitter and packet loss rate indicators. This triggers graded warnings. When the health level G ≥ 0.8, it indicates normal; 0.5 ≤ G < 0.8 indicates a warning; and G < 0.5 indicates danger.

[0184] Step 4.2: Use weighted scoring to optimize detection, diagnosis, isolation, and recovery strategies to quickly isolate faulty nodes.

[0185] The weighted scoring formula is as follows: U represents the policy score, G represents health, λ represents latency jitter, and PLR represents packet loss rate. The lower the score, the higher the priority. For example, a score < 0.4 triggers isolation.

[0186]

[0187] Step 4.3: Estimate the time required for the node to return to normal based on historical fault data (such as the time taken to restart the last time and resource utilization). For example, if the average restart time of the node is 30 seconds and the current load is high, the predicted recovery time is 40 seconds. Within the predicted time, load the data and configuration of the backup node in advance. And adjust the time to switch to the backup node based on the real-time network status. For example, when the network is stable, allow the node to be temporarily abnormal (such as delay <10ms) without switching. When the network is congested, switch immediately if there is a slight abnormality (such as delay >20ms).

[0188] In step 4.4, the master node dynamically reconstructs the network topology based on the health assessment results of step 3.2.4. Nodes with low strategy scores (U < 0.2) permanently isolate abnormal nodes and reallocate tasks to enhance the network's anti-interference capability. Collaborative communication is achieved based on the completion of network-wide CCO clock synchronization.

[0189] In step 4.4, after completing the CCO clock synchronization of the entire network, collaborative communication is achieved as follows Figure 7 As shown, the specific steps include:

[0190] Step 4.4.1. This embodiment implements clock synchronization and communication functions through layered technology, adopts hybrid time division multiplexing (HTDM) architecture to achieve physical layer clock alignment, and allocates 15% of the bandwidth as independent time slots. This ratio is determined by balancing the synchronization signal transmission requirements and data channel interference suppression (too small will lead to insufficient synchronization accuracy, and too large will squeeze the service bandwidth). In dynamic subcarrier allocation, the clock deviation threshold is set to 5ms, because experiments have shown that when the deviation exceeds this value, the OFDM inter-symbol interference (ISI) will increase significantly. The MAC layer sets three levels of queues (urgent / important / normal). The emergency queue adopts a hard preemption protocol, and the backoff window is compressed to 16 to 32 to ensure that the coordinated instructions are transmitted within 50ms (meeting the real-time requirements of industrial control).

[0191] Step 4.4.2: Resource coordination and load balancing are achieved through the following process: A collaboration request is triggered when a node's bandwidth utilization exceeds 70%. This threshold is based on latency-throughput inflection point analysis (experiments show that latency increases by more than 30% after exceeding 70%). Receiving nodes select paths based on hop count ≤ 3 and historical packet loss rate ≤ 2%. Hop count limits reduce end-to-end latency (adding approximately 1ms per hop), while a packet loss rate threshold ensures the reliability of critical services (a packet loss rate > 2% impacts the integrity of control instructions). 20% of bandwidth is reserved for collaborative instructions, prioritizing critical services (at least 20% bandwidth is required to handle bursts of instructions). The load balancing adjustment cycle is set to 15 minutes, and tasks are redistributed using a consistent hashing algorithm. The key steps are: when a node's bandwidth exceeds the limit, only local tasks (such as neighboring nodes) are migrated to avoid system-wide reallocation. Task paths are locked using a hash ring to ensure that high-priority instructions (such as collaborative instructions) are transmitted within 50ms. This cycle balances load convergence (a short cycle can cause oscillation) with resource fragmentation (a long cycle can reduce efficiency).

[0192] Step 4.4.3. The present invention innovatively proposes a cross-layer dynamic arbitration protocol (CDAP), which achieves a breakthrough improvement in conflict resolution efficiency and spectrum utilization through the collaborative mechanism of physical layer noise perception, network layer status assessment and dynamic resource isolation.

[0193] Prevention level: collision avoidance based on OFDM time slot pre-allocation;

[0194] Based on the multi-carrier OFDM characteristics of HPLC, a time slot reservation identifier (SyncTag) is embedded in the physical layer. Multi-fractal dimension calculation is used to dynamically divide subcarrier groups into low-interference (D < 1.2) and high-interference (D ≥ 1.5) groups. Fractal dimension calculation uses the Hurst exponent-modified R / S analysis method, where D represents the fractal dimension, R / S represents the rescaled range, and n represents the sample size.

[0195]

[0196] When the adjacent node channel occupancy rate ρ>70% is detected, the dynamic time slot reallocation algorithm is triggered. 70% is selected as the channel occupancy rate trigger threshold because when this value is exceeded, the marginal benefit of resources drops sharply and the packet loss rate increases exponentially. Dynamic time slot reallocation is needed to balance resource efficiency and service quality to avoid system overload. alloc represents the dynamically allocated time slot, P represents the number of CCO nodes participating in the time slot allocation, τ represents the delay factor, α p is the subcarrier interference weight of node p, CSI p is the subcarrier channel state index of node p, β is the multipath fading coefficient, T slot is the time slot period;

[0197]

[0198] This mechanism reduces the probability of collision by dynamically adjusting the clock offset while maintaining the bit error rate of OFDM inter-symbol interference (ISI) at a low level.

[0199] Arbitration level: Dynamic reconstruction of priorities based on cross-layer state awareness;

[0200] The node status index (NSI) is constructed by integrating the physical layer, MAC layer and network layer parameters, where SNR represents the signal-to-noise ratio, ER is the effective throughput, BOR is the buffer occupancy, RTT is the round-trip delay, JV is the jitter variance, and E k is the remaining energy, E max is the maximum remaining energy of the node.

[0201]

[0202] When NSI ≥ 85, the nonlinear modulation switching strategy is dynamically triggered:

[0203]

[0204] Where M represents the modulation order, 16-QAM represents 16-order quadrature amplitude modulation, 64-QAM represents 64-order quadrature amplitude modulation, and LDPC represents low-density parity-check code.

[0205] The spectrum efficiency improvement function is as follows, where Eb / No is the signal-to-noise energy ratio:

[0206]

[0207] During the conflict, the chaos backoff window is adjusted to balance channel competition fairness and improve throughput, where W old Indicates the current backoff window size, W new represents the new backoff window size after dynamic adjustment, and C represents the conflict intensity coefficient

[0208]

[0209] Mandatory level: dynamic spectrum cutting hard isolation;

[0210] When the conflict lasts for more than 300ms, the tensor decomposition spectrum cutting algorithm is triggered:

[0211] Spectrum fragmentation: Split the conflicting frequency band into two SF orthogonal sub-bands (SF = 128 spreading codes), sub-band bandwidth B = B total / 2SF, isolate low health nodes (NSI<50), where B total represents the initial total bandwidth of the conflicting frequency band. The cutting criterion is as follows, where H represents the channel matrix, H sub represents the sub-band channel matrix, H n represents the nth subchannel matrix, Denotes the Kronecker product:

[0212]

[0213] Virtual channel reconstruction: Physical layer spectrum fragments are mapped to MAC layer virtual channels, and the network layer dynamically updates the routing table, where Q(s,a) represents the state and action value function, Q(s,a) is the Q-value function, R(s,a) represents the immediate reward, s represents the current state, a represents the current action, Q(s',a') represents the Q-value function in the next state, ← represents the update operator, ω represents the learning rate, and ε represents the discount factor:

[0214] Q(s,a)←Q(s,a)+ω[R(s,a)+εmaxQ(s',a')-Q(s,a)],

[0215] This mechanism enhances error correction capabilities through concatenated Turbo codes and LDPC codes, while using elliptic curve cryptography (ECC) to prevent co-channel interference caused by spectrum cutting, ensuring data integrity during isolation.

[0216] In step 4.4.4, the system builds a multi-path redundant architecture. The primary path uses high-precision synchronization, providing deterministic low latency (typically 50μs) to meet the stringent synchronization requirements of motion control commands. The backup path uses spread spectrum technology to enhance interference resistance. The spreading factor is 128, the spreading gain is 21dB, and the modulation scheme is direct sequence spread spectrum. At an electromagnetic interference power of -30dBm, the bit error rate (BER) is reduced from 10⁻³ to 10⁻¹², meeting industrial control reliability requirements. The control center monitors the path health in real time and triggers a rapid failover mechanism when the primary path fails, ensuring service continuity. For example, if the output standard deviation σ = 0.6, the delay jitter JLI = 0.7, and the delay jitter slope λ = 0.3, the calculated health level G = 0.57 and the safety threshold G0 = 0.7 are classified as a warning state, requiring attention but not temporary isolation. By combining the quantum annealing algorithm to optimize the threshold G0, the system improves its ability to dynamically adapt to network fluctuations compared to a fixed threshold strategy. The service quality assurance strategy is deployed throughout the entire link, and collaborative control traffic has the highest transmission priority. Potential faults are predicted through the delay jitter health G. For example, if the optical fiber of the main path is detected to be broken (the delay suddenly increases to 200ms), the backup path will be started immediately: the backup node preloading process will be started in advance, and the switching delay will be ≤5ms. The redundant design supports rapid reconstruction in the event of a control center failure, ensuring the system's self-healing ability under extreme working conditions, and can complete the election of a new master node within 200ms to maintain system availability. Through the "health-driven dynamic switching" strategy, the backup path is only activated when the main path fails, avoiding the continuous bandwidth occupation of the redundant path in the traditional active-active architecture. This design significantly reduces network resource consumption while ensuring reliability, and is particularly suitable for bandwidth-sensitive industrial control scenarios.

[0217] The present invention provides a method for coordinated communication between HPLC stations based on clock synchronization. There are many methods and approaches for implementing this technical solution. The above is merely a preferred embodiment of the present invention. It should be noted that those skilled in the art may make various improvements and modifications without departing from the principles of the present invention, and such improvements and modifications are also within the scope of protection of the present invention. Any components not specified in this embodiment may be implemented using existing technologies.

Claims

1. A method for collaborative communication between HPLC stations based on clock synchronization, characterized in that: The following steps are involved: Step 1: Multi-dimensional data collection and broadcast: Each concentrator (CCO) periodically collects three types of data: clock accuracy, stability, and reliability. It then sends a beacon frame containing a timestamp and health score via a power line carrier broadcast channel. The clock accuracy is measured as the 10-minute average offset, the stability is measured as the Allan variance slope, and the reliability is measured as the percentage of 24-hour trouble-free operation time. Step 2: Use the entropy weight method to dynamically calculate the indicator discrimination and adaptively assign weights to select the optimal primary CCO in real time; Step 3: Dual-mode PID collaborative control: The main CCO adopts a dual-mode switching strategy of dynamic PID algorithm and chaotic fractional-order PID algorithm. When the signal-to-noise ratio (SNR) is less than 18dB or when the packet loss rate is greater than 2%, the anti-disturbance mode is activated. Step 4: Build a clock calibration network to monitor the synchronization status in real time, optimize the fault isolation strategy based on weighted scoring, and achieve a master-slave node state switching time of less than or equal to 50ms; achieve collaborative communication based on the completion of CCO synchronization of the entire network concentrator.

2. The method according to claim 1, characterized in that Step 1 includes the following steps: In step 1.1, each CCO node collects the offset between its local clock and the reference clock at 1-second intervals, acquiring 600 data points in 10 minutes. After dynamic cleaning to remove outliers, the clock accuracy index ΔT is calculated using the sliding window average: where x k Indicates the offset between the local clock collected at the kth second and the reference clock; Step 1.2: Decompose the short-term, medium-frequency, and long-term noise of the 10-minute time series data, calculate the variance of each window, and fit the Allan variance curve. The slope α is used to determine the stability level. where σ 2 (ψ) represents the Allan variance corresponding to the time interval ψ, and A represents the number of measurements collected within the time interval ψ; Stability level judgment parameters: When α<0.5: the crystal oscillator frequency is stable; 0.5≤α<1.0: frequency drift exists; α≥1.0: significant noise interference; Step 1.3: Combine the downtime duration, packet loss rate, and abnormal restart times in the past 24 hours to generate a reliability index. Step 1.4: Encapsulate the clock accuracy, stability, and reliability indicators into a standardized beacon frame and broadcast it to the substation nodes via the power line carrier; The beacon frame includes timestamp, multi-dimensional data and node ID, and the format is {t stamp ,ΔT,α,S,ID p }, where t stamp represents the timestamp, S represents the reliability index, ID p Indicates the ID of the p-th CCO, p = 1, 2, ..., P, and P represents the number of CCO nodes.

3. The method according to claim 2, characterized in that Step 2 includes the following steps: In step 2.1, each CCO node periodically collects clock accuracy, stability, and reliability data. After sliding window mean filtering, a standardized evaluation matrix is constructed and converted into a performance vector. Specifically, the following are included: Sliding window mean filtering: in represents the sliding window mean at time t, a k Indicates the original indicator value collected at the kth second; The standardized evaluation matrix X is as follows, where each letter in the matrix represents the standardized value of each indicator: where ΔT p ′、α p ′、S p ′ are the standardized clock accuracy, stability and reliability indicators of the p-th node respectively; the performance vector conversion formula is: where v p represents the performance vector of the p-th CCO node; Step 2.2: Adaptive weight adjustment is achieved through dynamic scene perception and indicator characteristic analysis: key indicators of clock accuracy, stability, and reliability are identified based on environmental parameters; information entropy is calculated using the entropy weight method, using the formula: Among them E j represents the information entropy of the jth indicator, N represents the number of collected data points, L pj,k It represents the normalized value ratio of the jth indicator of the pth node at the kth moment, expressed as: where x' pj,k represents the normalized value of the jth indicator of the pth node at the kth moment; A reverse weighting strategy is adopted for clock accuracy indicators, and finally the weights of clock accuracy, stability, and reliability indicators are normalized to form a dynamic allocation plan; in Indicates the final weight of the j-th indicator, E j represents the information entropy of the j-th indicator, where j takes values of 1, 2, and 3; Step 2.3: Calculate the comprehensive score and elect the CCO with the highest comprehensive score as the lead CCO: where Q p represents the comprehensive score of the p-th node, x' pj Represents the normalized value of the j-th indicator of the p-th node.

4. The method according to claim 3, characterized in that Step 3 includes the following steps: In step 3.1, the master CCO periodically broadcasts synchronization parameters, including the clock reference and dynamic weight. After receiving the time reference from the CCO, the master parses the time reference, calculates the instantaneous deviation between the local clock and the clock reference, and adjusts the clock frequency using the dynamic PID algorithm: where k p represents the proportional gain, k i represents the integral gain, k d represents the differential gain, u(t) represents the clock frequency adjustment amount, e(t) represents the clock instantaneous deviation, and dt represents the integration time interval or integration variable; Step 3.2: When the signal-to-noise ratio is less than 18dB and the synchronization message packet loss rate is greater than 2%, the anti-interference mechanism is immediately triggered. When the packet loss rate is greater than 2%, the chaotic fractional-order PID algorithm is enabled and the differential order γ is adjusted; the proportional coefficient k is dynamically increased. p , shortening response delay.

5. The method according to claim 4, characterized in that In step 3.2, the chaotic fractional-order PID algorithm includes: Step 3.2.1, Multi-dimensional Dynamic Anomaly Detection: Intelligent anomaly detection is achieved through cross-domain collaboration between the physical layer and the MAC layer. At the physical layer, the signal-to-noise ratio (SNR) is calculated in real time based on the OFDM subcarrier pilot signal. When the SNR is less than 18dB, the anti-interference mode is activated. At the same time, the link layer packet loss rate (PLR) is combined and the anti-interference mode is activated when the packet loss rate exceeds 2%. The clock deviation mutation acceleration ΔT” is calculated by extended Kalman filtering when ΔT”>5ms / s 2 Determine the risk of out-of-step when Step 3.2.2, intelligent activation of anti-interference mode and HPLC resource pre-allocation: After detecting the risk of loss of synchronization, the master node broadcasts a channel fingerprint containing a dynamically generated subcarrier time slot heat map and a list of interfering subcarriers through a synchronization signaling frame. The slave node dynamically selects a parameter set based on the fingerprint matching degree and adopts a non-uniform resource block allocation strategy: high-interference subcarriers are preferentially allocated FPGA computing resources to enhance channel estimation accuracy. Low-interference subcarriers are optimized for transmission efficiency by dynamically shortening the CRC check bit length. At the same time, the OFDM modulation order is switched based on the physical layer bit error rate and the network layer routing load status. Step 3.2.3, dynamic adjustment of chaotic PID parameters: extract the noise fractal dimension D based on wavelet packet transform, and dynamically calculate the fractional differential order γ: γ=0.5+0.4 tanh(D)-0.1 e -SNR / 12 , Where e represents a natural constant; when the fractal dimension D>1.5, it is determined to be a continuous high-frequency interference, γ is automatically increased to 1.2, and the proportional coefficient k p Dynamic enhancement through burst interference compensation formula: where k p boost represents the enhanced proportional coefficient, erf represents the error function, T ref represents the reference time interval, and the integral term is quantized using Gray code: Where Gray(q) represents the Gray code value, e(t) represents the instantaneous error signal, e(q) represents the error signal sample value at discrete time step q, and → indicates that the integral operation is replaced by Gray code quantization processing; Step 3.2.4, holographic health monitoring and dynamic exit: Evaluate the anti-interference effect through the fusion of multi-dimensional indicators. The health level G is calculated as follows: G=0.5·σ+0.3·JLI+0.2·λ, Where λ is the delay jitter, σ represents the output standard value; Combined with the quantum annealing algorithm, the exit threshold is dynamically adjusted, and Q represents the exit probability: Where θ represents the steepness control parameter of the exit probability; G represents the health level, and G0 represents the safety threshold; When G≥G0, the anti-disturbance mode is gradually exited in a probabilistic form.

6. The method according to claim 5, characterized in that Step 4 includes the following steps: Step 4.1: Nodes periodically self-check their clock synchronization status and sensor data consistency. The master node regularly scans the entire network, comprehensively assessing node health using latency jitter and packet loss rate indicators. This triggers graded warnings. A health level of G ≥ 0.8 indicates normal, 0.5 ≤ G < 0.8 indicates a warning, and G < 0.5 indicates danger, triggering node isolation. Step 4.2: Use weighted scoring to optimize detection, diagnosis, isolation, and recovery strategies to quickly isolate faulty nodes. The weighted scoring formula is: Where U represents the policy score, λ is the delay jitter, and PLR is the packet loss rate; Step 4.3: Based on historical failure data, estimate the time required for the node to recover. Load the backup node's data and configuration in advance within the predicted time. Adjust the switchover time to the backup node based on the real-time network status. In step 4.4, the master node dynamically reconstructs the network topology based on the health G obtained in step 3.2.

4. Nodes with low health levels are permanently isolated from abnormal nodes and tasks are reallocated. Collaborative communication is achieved based on the completion of CCO clock synchronization across the entire network.

7. The method according to claim 6, characterized in that Step 4.4 includes: Step 4.4.1: Implement clock synchronization and communication functions through layered technology. A hybrid time-division multiplexing architecture is used for physical layer clock alignment, allocating 15% of the bandwidth as independent time slots. In dynamic subcarrier allocation, the clock deviation threshold is set to 5ms. Three levels of queues are set up at the link layer: emergency, important, and normal. The emergency queue uses a hard preemption protocol with a backoff window compressed to 16 to 32 seconds to ensure that coordinated commands are transmitted within 50ms. In step 4.4.2, resource coordination and load balancing are achieved through the following process: When a node's bandwidth utilization exceeds 70%, a collaboration request is triggered. The receiving node selects paths based on hop count ≤ 3 and historical packet loss rate ≤ 2%, reserving 20% of bandwidth to ensure collaborative instructions. The load balancing adjustment period is set to 15 minutes, and tasks are redistributed using the consistent hashing algorithm. When a node's bandwidth exceeds the limit, only local tasks are migrated, and the task path is locked using a hash ring to ensure that high-priority instructions are transmitted within 50ms. Step 4.4.3: Use the Cross-Layer Dynamic Arbitration Protocol (CDAP) to improve conflict resolution efficiency and spectrum utilization through a collaborative mechanism of physical layer noise perception, network layer status assessment, and dynamic resource isolation. The cross-layer dynamic arbitration protocol CDAP includes a prevention level, an arbitration level, and a mandatory level; The prevention level refers to conflict avoidance based on OFDM time slot pre-allocation, including: embedding the time slot reservation identifier SyncTag in the physical layer based on the OFDM multi-carrier characteristics of HPLC, and dynamically dividing low-interference and high-interference subcarrier groups through multi-fractal dimension calculation; D < 1.2 is a low-interference subcarrier group, and D ≥ 1.5 is a high-interference subcarrier group, where D represents the fractal dimension; The fractal dimension is calculated using the R / S analysis method modified by the Hurst index: Where n represents the sample size, R / S represents the rescaled range; When it is detected that the adjacent node channel occupancy rate ρ>70%, the dynamic time slot reallocation algorithm is triggered, and the formula is: where t alloc represents the dynamically allocated time slot, τ represents the delay factor, α p is the subcarrier interference weight of the p-th node, CSI p is the subcarrier channel state index of the pth node, β is the multipath fading coefficient, T slot is the time slot period; The arbitration level refers to the dynamic reconstruction of cross-layer state perception priorities, including: constructing the node comprehensive state index NSI, integrating the physical layer, MAC layer and network layer parameters: Among them, ER is effective throughput, BOR is buffer occupancy, RTT is round trip delay, JV is jitter variance, E k is the remaining energy, E max is the maximum residual energy of the node, exp is the natural exponential function; When NSI ≥ 85, the nonlinear modulation switching strategy is dynamically triggered: Where M represents the modulation order, 16-QAM represents 16-order quadrature amplitude modulation, 64-QAM represents 64-order quadrature amplitude modulation, and LDPC represents low-density parity-check code. The spectrum efficiency improvement function ΔSE is: Where Eb / No is the signal-to-noise energy ratio; During the conflict, the chaos backoff window is adjusted to balance the fairness of channel competition. The formula is: Where W old Indicates the current backoff window size, W new represents the new backoff window size after dynamic adjustment, and C represents the conflict intensity coefficient; The mandatory level refers to dynamic spectrum cutting and hard isolation, including: when the conflict lasts for more than 300ms, the tensor decomposition spectrum cutting algorithm is triggered, including the following steps: Spectrum fragmentation: Split the conflicting frequency band into two SF orthogonal sub-bands, spreading code SF = 128, sub-band bandwidth B = B total / 2SF, isolate low health nodes, determine NSI < 50 as low health nodes, where B total Represents the initial total bandwidth of the conflicting frequency band; the cutting criterion is: Where H represents the channel matrix, H sub represents the sub-band channel matrix, H n represents the nth subchannel matrix, represents the Kronecker product; Virtual channel reconstruction: Physical layer spectrum fragments are mapped to MAC layer virtual channels, and the network layer dynamically updates the routing table. The formula is: Q(s,a)←Q(s,a)+ω[R(s,a)+εmaxQ(s',a')-Q(s,a)], Where Q(s,a) represents the Q-value function, R(s,a) represents the immediate reward, s represents the current state, a represents the current action, Q(s',a') represents the Q-value function in the next state, ← represents the update operator, ω represents the learning rate, and ε represents the discount factor; Step 4.4.4: Build a multi-path redundant architecture: The main path uses the dual-mode PID collaborative control of step 3, and the backup path uses spread spectrum technology to enhance anti-interference capabilities. The control center monitors the path health status in real time and triggers a rapid switching mechanism when the main path is abnormal. A service quality assurance strategy is deployed across the entire link, and collaborative control traffic has the highest transmission priority. Potential failures are predicted through the delay jitter health level G, and the backup node preloading process is started in advance.

8. The method according to claim 7, characterized in that In step 4.4.4, the triggering condition for the fast switching mechanism is: the delay jitter λ of the primary path is greater than 10ms. The switching strategy of the fast switching mechanism includes: prioritizing the allocation of idle sub-bands through a dynamic time slot reallocation algorithm, and establishing a redundant connection on the backup path through spread spectrum technology; The service quality assurance strategy includes: allocating high-priority queues to high-health nodes, and ensuring the minimum throughput through LDPC coding on the backup path.

9. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory stores program codes, and when the program codes are executed by the processor, the processor is caused to perform the steps of the method according to any one of claims 1 to 8.

10. A storage medium, characterized in that: A computer program or instruction is stored, and when the computer program or instruction is run on a computer, the steps of the method according to any one of claims 1 to 8 are executed.

Images