Frequency domain signal detection method, CPU, FPGA, device and system

Abstract

The invention provides a frequency domain signal detection method, a CPU, an FPGA, a device and a system, and the method comprises the steps: in the CPU, receiving original signal spectrum data corresponding to a to-be-detected signal sent by the FPGA; determining a signal bottom noise threshold value according to the spectrum power of the original signal spectrum data; the signal bottom noise threshold value is sent to an FPGA, so that the FPGA carries out validity detection on the to-be-detected signal according to the signal bottom noise threshold value, and effective frequency spectrum data is obtained; receiving effective frequency spectrum data sent by the FPGA, and constructing a time-frequency graph corresponding to the effective frequency spectrum data; identifying a non-zero connected domain in the time-frequency graph, and extracting features of the non-zero connected domain; and detecting the to-be-detected signal according to the characteristics to obtain a signal detection result. According to the invention, the accuracy and real-time performance of signal detection can be improved.

Description

Technical Field

[0001] The present invention belongs to the field of communication technology, and specifically relates to a frequency domain signal detection method, CPU, FPGA, device and system. Background Art

[0002] Threshold-based signal detection is typically performed within the FPGA, ensuring a high-speed signal detection and delivering the results to back-end processing modules. Because the threshold determines the signal detection range, the threshold value significantly impacts signal detection sensitivity and parameter accuracy, making it generally unsuitable for applications with large dynamic ranges and complex electromagnetic environments. Threshold-based signal detection technology is typically used in systems with high feasibility and low performance requirements.

[0003] Signal detection based on graph processing technology involves splicing signal spectrograms together over time and then detecting signals from these time-frequency plots using a graph recognition algorithm. This method is currently a leading monitoring algorithm, but it requires significant computing resources, typically implemented using a CPU+GPU architecture. Furthermore, signal detection latency is significant, making it unsuitable for real-time signal detection applications. Consequently, it can only be used in post-analysis scenarios involving large-scale systems and data. Summary of the Invention

[0004] The technical problem to be solved by the present invention is to provide a frequency domain signal detection method, CPU, FPGA, device and system to improve the accuracy and real-time performance of signal detection.

[0005] In a first aspect, the present invention provides a frequency domain signal detection method, which is applied to a central processing unit (CPU), comprising the following steps: Receive the original signal spectrum data corresponding to the signal to be tested sent by FPGA; Determine the signal noise floor threshold value according to the spectrum power of the original signal spectrum data; The signal noise floor threshold value is sent to the FPGA, so that the FPGA performs validity detection on the signal to be tested according to the signal noise floor threshold value to obtain valid spectrum data; the frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value are set to zero; Receive the valid spectrum data sent by FPGA and construct the time-frequency graph corresponding to the valid spectrum data; Identify non-zero connected domains in the time-frequency graph and extract features of the non-zero connected domains; features include circumscribed rectangle coordinates and shape features; According to the characteristics, the signal to be tested is detected to obtain a signal detection result.

[0006] Optionally, determining a signal noise floor threshold value based on the spectrum power of the original signal spectrum data includes: Sort the frequency points in the original signal spectrum data in descending order of spectrum power to obtain a frequency point sequence; the frequency point sequence includes multiple tuples, each of which is composed of a frequency point and its power value; The power values of the frequency points in the first K tuples in the frequency point sequence are determined as the signal noise floor threshold value; the value of K changes dynamically according to actual needs.

[0007] Optionally, identifying non-zero connected domains in the time-frequency graph and extracting features of the non-zero connected domains may include: The time-frequency graph is binarized to obtain a binarized time-frequency graph; the pixel values of the non-zero areas in the binarized time-frequency graph are set to 1; The labeled connected domain algorithm is used to identify the non-zero connected domains in the binarized time-frequency graph, and features are obtained based on the pixel coordinates and pixel number of the non-zero connected domains.

[0008] Optionally, the signal to be tested is detected according to the characteristics to obtain a signal detection result, including: The shape features are input into a pre-trained image classification model, and the image classification model outputs the signal type corresponding to the non-zero connected domain; According to the coordinates of the circumscribed rectangle, the time-frequency ridge parameters of the non-zero connected domain are obtained; the time-frequency ridge parameters include signal frequency, signal power, signal bandwidth, signal duration, and signal coordinates; The spectrum data corresponding to the signal coordinates is intercepted from the original signal spectrum data to obtain the signal region spectrum data corresponding to the non-zero connected domain; Perform spectrum analysis on the signal area spectrum data to obtain spectrum characteristics; spectrum characteristics include signal TOA time, center frequency, modulation mode, modulation parameters, and signal phase difference; Determine the type and location of the signal transmitter based on the spectrum characteristics.

[0009] In a second aspect, the present invention provides a frequency domain signal detection method, which is applied to a field programmable gate array (FPGA), comprising the following steps: Performing Fourier transform on the signal to be measured to obtain the original signal spectrum data of the signal to be measured, and sending the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value based on the original signal spectrum data; Receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The effective spectrum data is sent to the CPU so that the CPU can detect the signal to be tested and obtain a signal detection result.

[0010] Optionally, validity detection is performed on the original signal spectrum data according to the signal noise floor threshold to obtain valid spectrum data, including: Get the spectrum intensity corresponding to each frequency point respectively; If the spectrum intensity is lower than the signal noise floor threshold, the frequency point corresponding to the spectrum intensity is set to zero.

[0011] In a third aspect, the present invention provides a CPU, comprising: The first data receiving module is used to receive the original signal spectrum data corresponding to the signal to be tested sent by the FPGA; The noise floor threshold calculation module is used to determine the signal noise floor threshold value according to the spectrum power of the original signal spectrum data; The first data sending module sends the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be measured based on the signal noise floor threshold value to obtain valid spectrum data; the frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value are set to zero; The second data receiving module is used to receive the valid spectrum data sent by the FPGA and construct a time-frequency graph corresponding to the valid spectrum data; A feature extraction module is used to identify non-zero connected domains in the time-frequency graph and extract features of the non-zero connected domains; the features include the coordinates of the circumscribed rectangle and the shape features; The signal detection module is used to detect the signal to be tested according to the characteristics and obtain the signal detection result.

[0012] In a fourth aspect, the present invention provides an FPGA, comprising: The second data sending module is used to perform Fourier transform on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and send the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value based on the original signal spectrum data; The third data receiving module is used to receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The third data sending module is used to send the effective spectrum data to the CPU so that the CPU can detect the signal to be tested and obtain a signal detection result.

[0013] In a fifth aspect, the present invention provides a frequency domain signal detection device, the frequency domain signal detection device comprising an FPGA and a CPU; wherein, The CPU includes: The first data receiving module is used to receive the original signal spectrum data corresponding to the signal to be tested sent by the FPGA; The noise floor threshold calculation module is used to determine the signal noise floor threshold value according to the spectrum power of the original signal spectrum data; The first data sending module sends the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be measured based on the signal noise floor threshold value to obtain valid spectrum data; the frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value are set to zero; The second data receiving module is used to receive the valid spectrum data sent by the FPGA and construct a time-frequency graph corresponding to the valid spectrum data; A feature extraction module is used to identify non-zero connected domains in the time-frequency graph and extract features of the non-zero connected domains; the features include the coordinates of the circumscribed rectangle and the shape features; The signal detection module is used to detect the signal to be tested according to the characteristics and obtain the signal detection result; FPGAs include: The second data sending module is used to perform Fourier transform on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and send the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value based on the original signal spectrum data; The third data receiving module is used to receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The third data sending module is used to send the effective spectrum data to the CPU so that the CPU can detect the signal to be tested and obtain a signal detection result.

[0014] In a sixth aspect, the present invention provides a frequency domain signal detection system, which includes the frequency domain signal detection device as described above.

[0015] The beneficial effects of the present invention are: The frequency domain signal detection method provided by the present invention is applied to a central processing unit (CPU). The signal noise floor threshold value is determined based on the spectrum power of the original signal spectrum data. After the signal noise floor threshold value is sent to the FPGA, the FPGA can perform validity detection on the signal to be measured and set the frequency points whose spectrum intensity is lower than the signal noise floor threshold value to zero, effectively reducing the CPU data processing workload, reducing noise interference, and improving the accuracy and real-time performance of signal detection. The method also identifies non-zero connected domains in a time-frequency graph and extracts features of the non-zero connected domains. Based on the features, the signal to be measured is detected to obtain a signal detection result, which can further reduce noise interference, ensure the accuracy of the extracted features, and thus improve the accuracy of feature-based signal detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is one of the flow charts of the frequency domain signal detection method in one embodiment of the present application; Figure 2 This is the second flow chart of the frequency domain signal detection method in one embodiment of the present application; Figure 3 A structural diagram of a CPU provided in an embodiment of the present application; Figure 4 A structural diagram of an FPGA provided in an embodiment of the present application. DETAILED DESCRIPTION

[0017] To address the problems of poor accuracy and real-time performance of traditional signal detection methods, the present invention provides a frequency domain signal detection method, CPU, FPGA, device and system, which are applied to a central processing unit (CPU). The method determines a signal noise floor threshold value based on the spectral power of the original signal spectrum data. After the signal noise floor threshold value is sent to the FPGA, the FPGA can perform validity detection on the signal to be measured and set the frequency points with spectral intensity lower than the signal noise floor threshold value to zero, effectively reducing the CPU data processing workload, reducing noise interference, and improving the accuracy and real-time performance of signal detection. The method also identifies non-zero connected domains in a time-frequency graph and extracts features of the non-zero connected domains. Based on the features, the signal to be measured is detected to obtain a signal detection result, which can further reduce noise interference, ensure the accuracy of the extracted features, and thus improve the accuracy of feature-based signal detection.

[0018] The frequency domain signal detection method provided by the present invention is described below.

[0019] Figure 1 This is a flow chart of a frequency domain signal detection method provided by an embodiment of the present invention. The method is applied to a central processing unit (CPU) and includes steps 11 to 16.

[0020] Step 11: Receive the original signal spectrum data corresponding to the signal to be tested sent by the FPGA.

[0021] In an embodiment of the present invention, data is transferred between the FPGA and the CPU using direct memory access (DMA). Specifically, the FPGA is directly connected to the CPU via a high-speed interface such as PCIe, AXI, or RapidIO. The CPU pre-allocates a physically contiguous memory buffer (DMA buffer) and maps its address to the FPGA's address space. The FPGA directly reads and writes to this buffer via a DMA controller (such as the Xilinx AXI DMA IP core). During a write operation, the FPGA writes the processed result to the DMA buffer, and the CPU is notified of the data availability through polling or interrupts. During a read operation, the FPGA reads the input data preset by the CPU from the DMA buffer.

[0022] In another feasible implementation, a network protocol stack is used for data communication between the FPGA and the CPU, and a remote FPGA device (such as a distributed sensor array) communicates with the CPU via Ethernet.

[0023] Step 12: Determine the signal noise floor threshold value according to the spectrum power of the original signal spectrum data.

[0024] Specifically, step 12 includes step 12.1 to step 12.2.

[0025] Step 12.1, sort the frequency points in the original signal spectrum data in descending order of spectrum power to obtain a frequency point sequence.

[0026] The frequency point sequence includes multiple tuples, and the tuples are composed of frequency points and their power values.

[0027] Specifically, assume that the original signal spectrum data is a complex sequence obtained by Fourier transform (such as FFT) , where each complex number Corresponding to The frequency of the frequency point . , Indicates the total number of frequency points in the original signal spectrum data.

[0028] By calculating the formula

[0029] Get the first The power value of each frequency point In some other embodiments, if the spectrum data has provided a power value, there is no need to perform power calculation and the provided power value can be directly used.

[0030] After obtaining the power value of each frequency point, the power value and the frequency of the frequency point are combined to obtain a tuple of the frequency point.

[0031] Step 12.2: Determine the power values of the frequency points in the first K tuples in the frequency point sequence as the signal noise floor threshold value.

[0032] In the embodiment of the present invention, the value of K changes dynamically according to actual needs.

[0033] In another feasible embodiment, the power values of the first K tuple mid-frequency points may be selected as the noise floor judgment value, and then a fixed constant value (eg, 10 dB) may be added as a threshold for distinguishing the noise floor from the signal.

[0034] Step 13: Send the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be measured according to the signal noise floor threshold value to obtain valid spectrum data.

[0035] In a feasible implementation, after the CPU determines the signal noise floor threshold value, it is directly updated to the threshold data field of the FPGA, so that the FPGA validity detection can adopt the new threshold value, ensuring that the signal detection can be updated in real time as the environmental noise floor changes.

[0036] In the embodiment of the present invention, frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold are set to zero.

[0037] Step 14: Receive the valid spectrum data sent by the FPGA and construct a time-frequency graph corresponding to the valid spectrum data.

[0038] In this embodiment of the present invention, the CPU independently caches the original signal spectrum data and the valid spectrum data. When the cached spectrum data volume reaches the analysis length requirement, the spectrum data and the original spectrum data are combined into a time-frequency graph in chronological order. The number of spectrum data frames in the time-frequency graph is determined based on demand and signal characteristics. If the time-frequency graph data volume is large, a graph compression algorithm can be used to reduce the graph data volume, or an inverted pyramid transform can be used to convert the time-frequency graph into a multi-layered time-frequency graph to improve spectral signal detection capabilities.

[0039] The time-frequency diagram includes a time axis and a frequency axis, where the time axis is the spectrum frame sequence and the frequency axis is the frequency point.

[0040] Step 15: Identify the non-zero connected domain in the time-frequency graph and extract the features of the non-zero connected domain.

[0041] In the embodiment of the present invention, the features include circumscribed rectangle coordinates and shape features.

[0042] Step 15 specifically includes step 15.1 to step 15.2.

[0043] Step 15.1: Binarize the time-frequency graph to obtain a binarized time-frequency graph.

[0044] The pixel values of the non-zero areas in the binarized time-frequency graph are set to 1. The pixel values of other areas are set to 0, which are background areas and can eliminate noise interference.

[0045] In step 15.2, a labeled connected component algorithm is used to identify non-zero connected components in the binarized time-frequency graph, and features are obtained based on the pixel coordinates and number of pixels of the non-zero connected components.

[0046] The FPGA zeroing operation makes the signal appear as an isolated connected domain (non-zero connected domain) in the time-frequency diagram. The non-zero connected domain can be identified by the connected domain marking algorithm. For example, an image algorithm (such as OpenCV) is used to identify independent non-zero areas. The obtained circumscribed rectangle coordinates are expressed as ( ), the shape feature is the area, represented by the number of pixels.

[0047] Step 16: Detect the signal to be tested according to the characteristics to obtain a signal detection result.

[0048] In this embodiment of the present invention, step 16 includes steps 16.1 to 16.5.

[0049] Step 16.1: Input the shape features into a pre-trained image classification model, and the image classification model outputs the signal type corresponding to the non-zero connected domain.

[0050] Specifically, multiple time-frequency graph samples are collected to construct a training data set.

[0051] It should be understood that different signals have different shape characteristics (for example, the highlighted shape of a frequency-hopping signal is a rectangle that connects or overlaps end to end in the time dimension; a radar pulse signal is a separate, independent rectangle in the time dimension; a narrowband fixed-frequency signal is a thin line in the time dimension; and a broadband fixed-frequency signal is a long rectangle of a certain width in the time dimension). The training set includes frequency-hopping signals (time-continuous rectangles), pulse radar (discrete rectangles), narrowband fixed-frequency signals (thin lines), broadband fixed-frequency signals (wide rectangles), and LFM signals (slanted rectangles).

[0052] The YOLOv5s model is used as the image classification model. The model is trained using the training dataset until the loss value of the image classification model falls below a set loss threshold, resulting in a pre-trained image classification model. The loss function is cross-entropy loss. Another feasible implementation method is to add Gaussian noise and spectral jitter to the time-frequency graph samples for data augmentation to improve the accuracy of the image classification model.

[0053] Step 16.2: Obtain the time-frequency ridge parameters of the non-zero connected domain according to the coordinates of the circumscribed rectangle.

[0054] The time-frequency ridge parameters include signal frequency, signal power, signal bandwidth, signal duration, and signal coordinates.

[0055] The calculation formula for signal bandwidth is: , Indicates the width of the external matrix, represents the frequency resolution; the calculation formula for the signal duration is , Indicates the height of the external matrix, Represents the time resolution; the calculation formula for signal frequency is , Indicates the center coordinates.

[0056] Step 16.3: extract the spectrum data corresponding to the signal coordinates from the original signal spectrum data to obtain the signal region spectrum data corresponding to the non-zero connected domain.

[0057] Step 16.4: Perform spectrum analysis on the signal region spectrum data to obtain spectrum features.

[0058] Spectral characteristics include signal TOA time, center frequency, modulation mode, modulation parameters, and signal phase difference.

[0059] Step 16.5: Determine the type and direction of the signal transmitter based on the spectrum characteristics.

[0060] The spectrum features are combined into a fixed-format data frame. This data frame is the time-frequency ridge parameter array of the signal. By sorting and performing direction-finding calculations on the time-frequency ridge data frame, the radiation source parameter information (frequency hopping signal parameters, fixed frequency signal parameters, angle information, etc.) can be obtained.

[0061] Figure 2 This is a second flow chart of a frequency domain signal detection method provided by an embodiment of the present invention. The method is applied to a field programmable gate array (FPGA) and includes steps 21 to 23.

[0062] In step 21 , Fourier transform is performed on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and the original signal spectrum data is sent to the CPU so that the CPU can calculate the signal noise floor threshold value according to the original signal spectrum data.

[0063] In an embodiment of the present invention, the FPGA performs FFT transformation processing on the signal waveform data of the signal to be measured to obtain the signal spectrum data; to ensure the time resolution and frequency resolution characteristics of the signal, the original data can be subjected to FFT transformation according to a fixed number of points to obtain real-time spectrum data, thereby improving the time resolution of signal detection (for example, 4096 points of data are taken for FFT processing every 1024 points of original data, so that the time resolution is 1024 points of sampling time).

[0064] Step 22: Receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data.

[0065] Specifically, the FPGA performs validity checks on the raw signal spectrum data based on a noise floor threshold. This validation process directly treats frequency amplitudes below the threshold as "0." This sets the signal power to zero, excluding it from subsequent signal processing and resulting in valid spectrum data. This reduces the amount of data required for back-end signal processing and improves real-time signal processing capabilities.

[0066] In one feasible implementation, after completing the signal validity detection, the FPGA also normalizes the valid spectrum data, converting the amplitude value of the spectrum data into data suitable for CPU algorithm processing. Through normalization processing, the amount of CPU processing data and computing resource consumption can be reduced.

[0067] Step 23: Send the valid spectrum data to the CPU so that the CPU can detect the signal to be tested and obtain a signal detection result.

[0068] In summary, the frequency domain signal detection method provided by the present invention is applied to a central processing unit (CPU). The signal noise floor threshold value is determined based on the spectrum power of the original signal spectrum data. After the signal noise floor threshold value is sent to the FPGA, the FPGA can perform validity detection on the signal to be measured and set the frequency points whose spectrum intensity is lower than the signal noise floor threshold value to zero, thereby effectively reducing the CPU data processing workload, reducing noise interference, and improving the accuracy and real-time performance of signal detection. The method also identifies non-zero connected domains in the time-frequency graph and extracts features of the non-zero connected domains. Based on the features, the signal to be measured is detected to obtain a signal detection result, which can further reduce noise interference and ensure the accuracy of the extracted features, thereby improving the accuracy of feature-based signal detection.

[0069] The CPU provided by the present invention is described below. Figure 3 As shown, the CPU 300 includes: The first data receiving module 301 is used to receive the original signal spectrum data corresponding to the signal to be tested sent by the FPGA; The noise floor threshold calculation module 302 is used to determine the signal noise floor threshold value according to the spectrum power of the original signal spectrum data; The first data sending module 303 sends the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be tested according to the signal noise floor threshold value to obtain valid spectrum data; the frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value are set to zero; The second data receiving module 304 is used to receive the valid spectrum data sent by the FPGA and construct a time-frequency graph corresponding to the valid spectrum data; The feature extraction module 305 is used to identify the non-zero connected domain in the time-frequency graph and extract the features of the non-zero connected domain; the features include the coordinates of the circumscribed rectangle and the shape features; The signal detection module 306 is used to detect the signal to be detected according to the characteristics and obtain a signal detection result.

[0070] In an embodiment of the present invention, the feature extraction module 305 identifies a non-zero connected domain in the time-frequency graph and extracts features of the non-zero connected domain, including: The time-frequency graph is binarized to obtain a binarized time-frequency graph; the pixel values of the non-zero areas in the binarized time-frequency graph are set to 1; The labeled connected domain algorithm is used to identify the non-zero connected domains in the binarized time-frequency graph, and features are obtained based on the pixel coordinates and pixel number of the non-zero connected domains.

[0071] In an embodiment of the present invention, the signal detection module 306 detects the signal to be detected based on the characteristics and obtains a signal detection result, including: The shape features are input into a pre-trained image classification model, and the image classification model outputs the signal type corresponding to the non-zero connected domain; According to the coordinates of the circumscribed rectangle, the time-frequency ridge parameters of the non-zero connected domain are obtained; the time-frequency ridge parameters include signal frequency, signal power, signal bandwidth, signal duration, and signal coordinates; The spectrum data corresponding to the signal coordinates is intercepted from the original signal spectrum data to obtain the signal region spectrum data corresponding to the non-zero connected domain; Perform spectrum analysis on the signal area spectrum data to obtain spectrum characteristics; spectrum characteristics include signal TOA time, center frequency, modulation mode, modulation parameters, and signal phase difference; Determine the type and location of the signal transmitter based on the spectrum characteristics.

[0072] The frequency domain signal detection method provided by the present invention is applied to a central processing unit (CPU). The signal noise floor threshold value is determined based on the spectrum power of the original signal spectrum data. After the signal noise floor threshold value is sent to the FPGA, the FPGA can perform validity detection on the signal to be measured and set the frequency points whose spectrum intensity is lower than the signal noise floor threshold value to zero, effectively reducing the CPU data processing workload, reducing noise interference, and improving the accuracy and real-time performance of signal detection. The method also identifies non-zero connected domains in a time-frequency graph and extracts features of the non-zero connected domains. Based on the features, the signal to be measured is detected to obtain a signal detection result, which can further reduce noise interference, ensure the accuracy of the extracted features, and thus improve the accuracy of feature-based signal detection.

[0073] Figure 4 The structure diagram of the FPGA provided by the embodiment of the present invention is as follows: Figure 4 As shown, the FPGA 400 includes: The second data sending module 401 is used to perform Fourier transform on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and send the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value based on the original signal spectrum data; The third data receiving module 402 is configured to receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The third data sending module 403 is configured to send the effective spectrum data to the CPU so that the CPU can detect the signal to be tested and obtain a signal detection result.

[0074] Since the FPGA provided in the embodiment of the present invention and the method embodiment of the present application are based on the same concept, their specific functions and technical effects can be found in the method embodiment section and will not be described in detail here.

[0075] In an embodiment of the present invention, a frequency domain signal detection device is further provided, the frequency domain signal detection device comprising an FPGA and a CPU; wherein, The CPU includes: The first data receiving module is used to receive the original signal spectrum data corresponding to the signal to be tested sent by the FPGA; The noise floor threshold calculation module is used to determine the signal noise floor threshold value according to the spectrum power of the original signal spectrum data; The first data sending module sends the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be measured based on the signal noise floor threshold value to obtain valid spectrum data; the frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value are set to zero; The second data receiving module is used to receive the valid spectrum data sent by the FPGA and construct a time-frequency graph corresponding to the valid spectrum data; A feature extraction module is used to identify non-zero connected domains in the time-frequency graph and extract features of the non-zero connected domains; the features include the coordinates of the circumscribed rectangle and the shape features; The signal detection module is used to detect the signal to be tested according to the characteristics and obtain the signal detection result; FPGAs include: The second data sending module is used to perform Fourier transform on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and send the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value based on the original signal spectrum data; The third data receiving module is used to receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The third data sending module is used to send the effective spectrum data to the CPU so that the CPU can detect the signal to be tested and obtain a signal detection result.

[0076] An embodiment of the present invention further discloses a frequency domain signal detection system, which includes the frequency domain signal detection device as described above.

[0077] It should be noted that the information interaction, execution process, etc. between the above-mentioned devices / units are based on the same concept as the method embodiments of the present application. Their specific functions and technical effects can be found in the method embodiment section and will not be described in detail here. Those skilled in the art will clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be distributed to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically alone, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units. In addition, the specific names of the functional units and modules are only for the convenience of distinguishing each other and are not used to limit the scope of protection of this application. The specific working process of the units and modules in the above-mentioned system can refer to the corresponding process in the above-mentioned method embodiment and will not be described in detail here.

[0078] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of protection of the present application is limited to these examples. In line with the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of different aspects of one or more embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0079] The one or more embodiments of this application are intended to encompass all such substitutions, modifications, and variations that fall within the broad scope of this application. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of one or more embodiments of this application should be included in the scope of protection of this application.

Claims

1. A frequency domain signal detection method, characterized in that: The method is applied to a central processing unit (CPU), and comprises: Receive the original signal spectrum data corresponding to the signal to be tested sent by FPGA; Determining a signal noise floor threshold value according to the spectrum power of the original signal spectrum data; Sending the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be measured according to the signal noise floor threshold value to obtain valid spectrum data; setting the frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value to zero; receiving the effective spectrum data sent by the FPGA, and constructing a time-frequency graph corresponding to the effective spectrum data; Identifying a non-zero connected domain in the time-frequency graph and extracting features of the non-zero connected domain; the features include circumscribed rectangle coordinates and shape features; According to the characteristics, the signal to be tested is detected to obtain a signal detection result.

2. The frequency domain signal detection method according to claim 1, wherein: The determining of the signal noise floor threshold value according to the spectrum power of the original signal spectrum data includes: Sorting the frequency points in the original signal spectrum data in descending order of spectrum power to obtain a frequency point sequence; the frequency point sequence includes a plurality of tuples, each of which is composed of a frequency point and its power value; The power values of the frequency points in the first K tuples in the frequency point sequence are determined as the signal noise floor threshold value; the value of K changes dynamically according to actual needs.

3. The frequency domain signal detection method according to claim 2, wherein: The identifying of the non-zero connected domain in the time-frequency graph and extracting the features of the non-zero connected domain includes: Binarization is performed on the time-frequency graph to obtain a binarized time-frequency graph; pixel values in non-zero areas of the binarized time-frequency graph are set to 1; A marked connected component algorithm is used to identify non-zero connected components in the binarized time-frequency graph, and the features are obtained according to the pixel coordinates and the number of pixels of the non-zero connected components.

4. The frequency domain signal detection method according to claim 3, wherein: The detecting the signal to be tested according to the feature to obtain a signal detection result includes: Inputting the shape feature into a pre-trained image classification model, and having the image classification model output a signal type corresponding to the non-zero connected domain; According to the coordinates of the circumscribed rectangle, the time-frequency ridge parameters of the non-zero connected domain are obtained; the time-frequency ridge parameters include signal frequency, signal power, signal bandwidth, signal duration, and signal coordinates; intercepting the spectrum data corresponding to the signal coordinates from the original signal spectrum data to obtain the signal region spectrum data corresponding to the non-zero connected domain; Performing spectrum analysis on the signal area spectrum data to obtain spectrum characteristics; the spectrum characteristics include signal TOA time, center frequency, modulation mode, modulation parameters, and signal phase difference; The type and location of the signal transmission source are determined based on the spectrum characteristics.

5. A frequency domain signal detection method, characterized in that: The method is applied to a field programmable gate array (FPGA), and the method comprises: Performing Fourier transform on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and sending the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value according to the original signal spectrum data; receiving the signal noise floor threshold value sent by the CPU, and performing validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The effective spectrum data is sent to the CPU so that the CPU can detect the signal to be tested and obtain a signal detection result.

6. The frequency domain signal detection method according to claim 5, characterized in that: The performing validity detection on the original signal spectrum data according to the signal noise floor threshold to obtain valid spectrum data includes: Get the spectrum intensity corresponding to each frequency point respectively; If the spectrum intensity is lower than the signal noise floor threshold, the frequency point corresponding to the spectrum intensity is set to zero.

7. A CPU, characterized in that: The CPU includes: The first data receiving module is used to receive the original signal spectrum data corresponding to the signal to be tested sent by the FPGA; A noise floor threshold calculation module, configured to determine a signal noise floor threshold value based on the spectrum power of the original signal spectrum data; A first data sending module sends the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be measured according to the signal noise floor threshold value to obtain valid spectrum data; and frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value are set to zero; A second data receiving module is configured to receive the effective spectrum data sent by the FPGA and construct a time-frequency graph corresponding to the effective spectrum data; A feature extraction module, configured to identify a non-zero connected domain in the time-frequency graph and extract features of the non-zero connected domain; the features include circumscribed rectangle coordinates and shape features; The signal detection module is used to detect the signal to be tested according to the characteristics to obtain a signal detection result.

8. An FPGA, characterized in that: The FPGA includes: A second data sending module is used to perform Fourier transform on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and send the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value according to the original signal spectrum data; a third data receiving module, configured to receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The third data sending module is used to send the effective spectrum data to the CPU, so that the CPU can detect the signal to be tested and obtain a signal detection result.

9. A frequency domain signal detection device, characterized in that: The frequency domain signal detection device includes an FPGA and a CPU; wherein, The CPU includes: The first data receiving module is used to receive the original signal spectrum data corresponding to the signal to be tested sent by the FPGA; A noise floor threshold calculation module, configured to determine a signal noise floor threshold value based on the spectrum power of the original signal spectrum data; A first data sending module sends the signal noise floor threshold value to the FPGA, so that the FPGA performs validity detection on the signal to be measured according to the signal noise floor threshold value to obtain valid spectrum data; and frequency points in the valid spectrum data whose spectrum intensity is lower than the signal noise floor threshold value are set to zero; A second data receiving module is configured to receive the effective spectrum data sent by the FPGA and construct a time-frequency graph corresponding to the effective spectrum data; A feature extraction module, configured to identify a non-zero connected domain in the time-frequency graph and extract features of the non-zero connected domain; the features include circumscribed rectangle coordinates and shape features; A signal detection module, configured to detect the signal to be tested according to the characteristics and obtain a signal detection result; The FPGA includes: A second data sending module is used to perform Fourier transform on the signal to be measured to obtain original signal spectrum data of the signal to be measured, and send the original signal spectrum data to the CPU so that the CPU can calculate the signal noise floor threshold value according to the original signal spectrum data; a third data receiving module, configured to receive the signal noise floor threshold value sent by the CPU, and perform validity detection on the original signal spectrum data according to the signal noise floor threshold value to obtain valid spectrum data; The third data sending module is used to send the effective spectrum data to the CPU, so that the CPU can detect the signal to be tested and obtain a signal detection result.

10. A frequency domain signal detection system, characterized in that: The frequency domain signal detection system includes the frequency domain signal detection device according to claim 9.

Images