Data communication method of semi-physical simulation system based on reflective memory network

Abstract

The invention relates to a data communication method of a semi-physical simulation system based on a reflective memory network, which realizes microsecond-level deterministic data transmission by adopting a global shared memory mechanism through constructing a star-shaped / ring-shaped topology network connected by an optical fiber. The method comprises the following steps: allocating a unique ID for each node, configuring a reflective memory card, and dynamically dividing a 128M shared memory into a control command function area, a system state function area and a sensor data function area; initializing a 100 [mu] s level data refresh rate and a multi-level priority interrupt mechanism; a double-buffer DMA batch transmission mechanism is adopted, and a 16MB transmission block is set to realize 2Gbps high-speed transmission; a data updating flag bit is detected in a polling / interruption mode, and completeness is ensured in combination with check and verification; and the distributed monitoring system acquires node states in real time and visually displays the node states. Compared with a traditional TCP / IP / UDP scheme, through hardware-level memory synchronization and optical fiber direct connection, the communication delay is reduced to the microsecond level, the data transmission certainty is improved, dynamic adjustment of memory allocation and priority scheduling is supported, the problems of real-time performance, expansibility and heterogeneous compatibility of a large-scale distributed simulation system are effectively solved, and the real-time performance, the expansibility and the heterogeneous compatibility of the large-scale distributed simulation system are improved. The method is especially suitable for high-precision simulation scenes such as avionics and weapon testing.

Description

Technical Field

[0001] The present invention relates to the technical field of semi-physical simulation, in particular to a data communication method of a semi-physical simulation system based on a reflective memory network. Background Art

[0002] Distributed hardware-in-the-loop simulation testing has been widely adopted in industry and the military, but existing communication solutions still face numerous technical challenges. Current mainstream transmission methods include standard TCP / IP, UDP, and the CAN bus. These traditional solutions have demonstrated significant performance limitations in engineering practice. While TCP / IP offers high reliability, its complex protocol stack leads to communication latency as high as milliseconds. While UDP reduces protocol overhead, it cannot guarantee reliable data transmission and deterministic timing. While the CAN bus offers real-time capabilities, its bandwidth and transmission distance limitations make it difficult to support large-scale distributed simulation systems. These solutions suffer from common flaws such as insufficient real-time performance, a lack of determinism, and limited synchronization accuracy, making it difficult to achieve ultra-low latency communication in the microsecond range and maintain strict time determinism. In safety-critical applications such as avionics system simulation and weapon system testing, even millisecond-level communication delays can distort simulation results and even lead to serious engineering accidents. In addition, as the scale of simulation systems expands, traditional solutions also face prominent problems such as excessive protocol stack processing overhead, limited system scalability, and poor compatibility with heterogeneous devices. These problems seriously restrict the further development of distributed semi-physical simulation systems in high-precision, high-reliability application scenarios. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a data communication method for a hardware-in-the-loop simulation system based on a reflective memory network, which can effectively solve the problems raised in the above background technology.

[0004] To solve the above problems, the technical solution adopted by the present invention is: a data communication method of a semi-physical simulation system based on a reflective memory network, comprising the following steps: Step 1: Build a reflective memory network hardware architecture, use a topology structure to connect the simulation model machine nodes, and assign a unique ID to each node; Step 2: Configure the reflective memory card of each node, set the global shared memory address mapping relationship, and divide the functional data area; Step 3: Initialize the reflective memory network communication parameters, including data refresh rate, interrupt trigger mechanism, DMA transfer mode and transfer area size; Step 4: Each node generates simulation data and writes it to the specified address area of the local reflective memory card; Step 5: The reflective memory network automatically broadcasts data to all nodes to complete global memory synchronization; Step 6: Use an optimized DMA batch transfer mechanism for large data transfers, and achieve efficient transfer by pre-allocating memory blocks; Step 7: Each node detects the data update flag in real time and reads the latest instructions and data from the shared memory; Step 8: The simulation model machine reads input data from the reflective memory and calculates and feeds back the state to the predefined memory block; Step 9: The host computer monitoring system reads the status data of each node in real time and displays the simulation operation status and performance indicators through a visual interface.

[0005] As a further preferred embodiment of the present invention, the topology in step 1 is a star or ring topology, and the reflective memory network uses optical fiber communication.

[0006] As a further preferred embodiment of the present invention, the functional data area in step 2 includes a control command area, a system status area and a sensor data area, and the memory address mapping adopts a dynamic allocation strategy to adjust the size of each functional area in real time according to the simulation task requirements.

[0007] As a further preferred embodiment of the present invention, the interrupt triggering mechanism of step three adopts a multi-level priority design, including the highest priority control instruction interrupt, the medium priority sensor data interrupt and the normal priority status feedback interrupt.

[0008] As a further preferred solution of the present invention, in step six, the optimized DMA batch transfer mechanism adopts a double buffer mechanism.

[0009] As a further preferred embodiment of the present invention, in the double buffering mechanism, the transmission block size is set to 16MB, and the transmission rate is not less than 2Gbps.

[0010] As a further preferred embodiment of the present invention, the data update detection in step seven is implemented by polling or interruption, and the data checksum is verified to ensure integrity.

[0011] As a further preferred solution of the present invention, the upper computer monitoring system in step nine adopts a distributed architecture to collect and compare status data at each node.

[0012] As a further preferred solution of the present invention, the global shared memory address in step 2 is set to 128M.

[0013] As a further preferred solution of the present invention, the data refresh rate in step three is set to 100 us.

[0014] Compared with the prior art, the present invention provides a data communication method for a hardware-in-the-loop simulation system based on a reflective memory network, which has the following beneficial effects: The present invention adopts a reflective memory network architecture with a simple structure and easy use. It can achieve microsecond-level deterministic data transmission. Through the DMA method, it can achieve high data throughput while ensuring data consistency and integrity, which is more consistent with actual physical objects and improves the real-time performance and accuracy of distributed semi-physical simulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 Schematic diagram of the process of the present invention; DETAILED DESCRIPTION

[0016] It should be noted that if "and / or" or "and / or" appears in the full text, its meaning includes three parallel options. Taking "A and / or B" as an example, it includes option A, or option B, or options in which A and B are met at the same time.

[0017] In addition, the embodiments are based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0018] Reference Figure 1 The present invention provides a data communication method for a hardware-in-the-loop simulation system based on a reflective memory network, comprising: Step 1: Use a PCIe 3.0-based reflective memory card to build a reflective memory network hardware architecture, use a ring topology to connect the simulation model machine nodes, and assign a unique ID to each node; Step 2: Configure the reflective memory card of each node and set the global shared memory address mapping relationship to ensure data access consistency; Step 3: Initialize the reflective memory network communication parameters, including data refresh, interrupt trigger mechanism, whether to enable DMA, and DMA transfer area size; Step 4: Each node in the reflective memory network generates simulation data and writes it into the specified address area of the local reflective memory card; Step 5: The reflective memory network automatically broadcasts data to all nodes, completing global memory synchronization in microseconds. Step 6: For large data transfers, an optimized DMA batch transfer mechanism is used to achieve efficient data transfer through pre-allocated memory blocks; Step 7: Each node detects data updates and reads the latest instructions and data from the shared memory; Step 8: The simulation model machine reads input data from the reflective memory and calculates and feeds back the state to the predefined memory block; Step 9: The host computer monitoring system reads the status data of each node in real time and displays the simulation operation status and system performance indicators through a visual interface; Preferably, the reflective memory network uses optical fiber communication to ensure low latency and high reliability of data transmission.

[0019] Preferably, the DMA transmission in step six adopts a double buffer mechanism to achieve zero-wait switching during the data transmission process.

[0020] As a specific embodiment of the present invention: like Figure 1 As shown, the present invention discloses a data communication method of a semi-physical simulation system based on a reflective memory network, which mainly includes the following steps: Step 1: For the distributed hardware-in-the-loop simulation structure in the power grid, a reflective memory network hardware architecture is built, and each simulation model machine node is connected using a star or ring topology, and a unique ID is assigned to each node; Step 2: Configure the reflective memory card of each node, set the global shared memory address to 128M, and divide the cache area into control command area, system status area, sensor data area, etc. according to data function to ensure data access consistency; Step 3: Initialize the reflective memory network communication parameters, set the data refresh rate to 100us, use edge triggering, start DMA transmission mode, and set the transmission buffer size to 16M; Step 4: Each node in the reflective memory network generates simulation data and writes it into the specified address area of the local reflective memory card; Step 5: The reflective memory network automatically broadcasts data to all nodes, completing global memory synchronization in microseconds. Step 6: For large data transfers exceeding 1MB, an optimized DMA batch transfer mechanism is used to achieve efficient data transmission through pre-allocated memory blocks, with a transmission rate of more than 2Gbps.

[0021] Step 7: Each node checks the data update flag in real time through polling or interruption, reads the latest instructions and data from the shared memory, and verifies the data checksum to ensure integrity; Step 8: The simulation model machine reads input data from the reflective memory, calculates and feeds back the state to the predefined memory block, and processes and calculates the data; Step 9: The host computer monitoring system reads the status data of each node in real time and displays the simulation operation status and system performance indicators through a visual interface; Preferably, the memory address mapping in step 2 adopts a dynamic allocation strategy to adjust the size of each functional area in real time according to the simulation task requirements, and the adjustment process takes no more than 100 μs (microseconds).

[0022] Preferably, the interrupt triggering mechanism in step three adopts a multi-level priority design, setting the control instruction interrupt as the highest priority, the sensor data interrupt as the middle level, and the status feedback interrupt as the normal level.

[0023] Preferably, the DMA transmission in step six adopts a double buffer mechanism, sets a 16MB transmission block, and the measured transmission rate can reach above 2 Gbps.

[0024] Preferably, the monitoring system in step nine adopts a distributed architecture, performs monitoring at each node separately, collects and compares network status data in real time, and ensures the reliability of the monitoring data.

[0025] A communication architecture based on a reflective memory network (RMN) provides an ideal solution to the technical challenges of real-time and determinism faced in distributed hardware-in-the-loop simulation testing. The RMN utilizes a unique global shared memory mechanism to synchronize data between nodes via a high-speed fiber-optic network, keeping communication latency to hundreds of nanoseconds and fully meeting microsecond-level real-time requirements. Its deterministic transmission characteristics ensure that data arrives accurately within the scheduled time, effectively resolving the timing uncertainty issues inherent in traditional protocols such as TCP / IP and UDP. In terms of synchronization accuracy, the RMN supports hardware-level clock synchronization technology, achieving nanosecond-level time synchronization accuracy and ensuring strict time consistency across all nodes in the distributed simulation system.

[0026] Compared to traditional solutions, the Reflective Memory Network utilizes a lightweight protocol stack, eliminating complex protocol processing for data transmission and significantly reducing communication overhead. Furthermore, its modular architecture supports flexible expansion, easily enabling system scale-up from a few nodes to hundreds of nodes while maintaining stable communication performance. In terms of compatibility, the Reflective Memory Network provides standardized hardware interfaces and driver support, enabling seamless integration with various heterogeneous computing platforms and real-time operating systems. These technical advantages make the Reflective Memory Network an ideal communication solution for safety-critical applications such as avionics simulation and weapons system testing, providing a solid technical foundation for building high-precision, highly reliable distributed hardware-in-the-loop simulation systems.

[0027] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. All equivalent structural transformations made by using the contents of the present invention description and drawings under the inventive concept of the present invention, or direct / indirect application in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A data communication method for a hardware-in-the-loop simulation system based on a reflective memory network, characterized in that: The following steps are involved: Step 1: Build a reflective memory network hardware architecture, use a topology structure to connect the simulation model machine nodes, and assign a unique ID to each node; Step 2: Configure the reflective memory card of each node, set the global shared memory address mapping relationship, and divide the functional data area; Step 3: Initialize the reflective memory network communication parameters, including data refresh rate, interrupt trigger mechanism, DMA transfer mode and transfer area size; Step 4: Each node generates simulation data and writes it to the specified address area of the local reflective memory card; Step 5: The reflective memory network automatically broadcasts data to all nodes to complete global memory synchronization; Step 6: Use an optimized DMA batch transfer mechanism for large data transfers, and achieve efficient transfer by pre-allocating memory blocks; Step 7: Each node detects the data update flag in real time and reads the latest instructions and data from the shared memory; Step 8: The simulation model machine reads input data from the reflective memory and calculates and feeds back the state to the predefined memory block; Step 9: The host computer monitoring system reads the status data of each node in real time and displays the simulation operation status and performance indicators through a visual interface.

2. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 1, characterized in that: The topology in step 1 is a star or ring topology, and the reflective memory network uses optical fiber communication.

3. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 1, characterized in that: The functional data area in step 2 includes a control command area, a system status area, and a sensor data area, and the memory address mapping adopts a dynamic allocation strategy to adjust the size of each functional area in real time according to the simulation task requirements.

4. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 1, characterized in that: The interrupt trigger mechanism of step three adopts a multi-level priority design, including the highest priority control instruction interrupt, the medium priority sensor data interrupt and the normal priority status feedback interrupt.

5. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 1, characterized in that: In step six, the optimized DMA batch transfer mechanism adopts a double buffer mechanism.

6. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 5, characterized in that: In the double buffer mechanism, the transmission block size is set to 16MB, and the transmission rate is above 2Gbps.

7. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 1, characterized in that: The data update detection in step seven is implemented by polling or interruption, and the data checksum is verified to ensure integrity.

8. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 1, characterized in that: In the step nine, the upper computer monitoring system adopts a distributed architecture and performs status data collection and comparison at each node.

9. The data communication method of the hardware-in-the-loop simulation system based on the reflective memory network according to claim 1, characterized in that: In step 2, the global shared memory address is set to 128M.

10. The data communication method of the hardware-in-the-loop simulation system based on reflective memory network according to claim 1, characterized in that: In step 3, the data refresh rate is set to 100 μs.

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