MEMS pressure sensor and preparation method thereof

Abstract

The invention relates to an MEMS pressure sensor and a preparation method thereof in the technical field of micromachining. The MEMS pressure sensor comprises a substrate, a silicon wafer cup-shaped structure layer, a superlattice structure layer, a phosphorus-doped polycrystalline silicon layer, a metal layer, a top silicon dioxide insulation layer and a top silicon nitride protection layer which are sequentially arranged from bottom to top. A cavity structure is formed between the surface of one side, facing the substrate, of the silicon wafer cup-shaped structure layer and the substrate, and an ion implantation block doping layer is formed on the surface layer of one side, facing the superlattice structure layer, of the silicon wafer cup-shaped structure layer; the superlattice structure layer comprises a plurality of composite layers which are sequentially stacked, and each composite layer comprises a silicon dioxide insulation layer, a magnesium oxide buffer layer and a silicon nitride protection layer which are sequentially arranged from the silicon wafer cup-shaped structure layer to the phosphorus-doped polycrystalline silicon layer. The reliability, the environmental adaptability and the signal quality of the MEMS pressure sensor can be remarkably improved, and the MEMS pressure sensor can be better suitable for extreme working conditions or high-precision detection requirement scenes.

Description

Technical Field

[0001] The present application relates to the field of micromachining technology, and in particular to a MEMS pressure sensor and a preparation method thereof. Background Art

[0002] At present, the MEMS pressure sensor industry has experienced rapid development. MEMS pressure sensors are widely used in automobiles, industrial automation, consumer electronics, medical equipment and other fields, and higher requirements are placed on the performance of MEMS pressure sensors. However, current conventional MEMS pressure sensors often have problems in reliability, environmental adaptability and signal quality, especially in extreme working conditions or high-precision detection scenarios, and their performance is insufficient. Summary of the Invention

[0003] In view of the problems existing in the background technology, the present application provides a MEMS pressure sensor and a preparation method thereof. The MEMS pressure sensor can significantly improve its reliability, environmental adaptability and signal quality, and can be better applied to extreme working conditions or high-precision detection demand scenarios.

[0004] According to one aspect of the present invention, a MEMS pressure sensor is provided, comprising a substrate, a silicon wafer cup-shaped structure layer, a superlattice structure layer, a phosphorus-doped polysilicon layer, a metal layer, a top silicon dioxide insulating layer and a top silicon nitride protective layer arranged in sequence from bottom to top; a cavity structure is formed between the surface of the silicon wafer cup-shaped structure layer on the side facing the substrate and the substrate, and an ion implantation block doping layer is formed on the surface of the silicon wafer cup-shaped structure layer on the side facing the superlattice structure layer; the superlattice structure layer comprises a plurality of composite layers stacked in sequence, each of the composite layers comprising a silicon dioxide insulating layer, a magnesium oxide buffer layer and a silicon nitride protective layer arranged in sequence from the silicon wafer cup-shaped structure layer to the phosphorus-doped polysilicon layer.

[0005] In some embodiments of the present invention, the number of the composite layers is five.

[0006] In some embodiments of the present invention, the thickness ratio of the silicon dioxide insulating layer to the silicon nitride protective layer is (0.6-1.67):1.

[0007] In some embodiments of the present invention, the thicknesses of the silicon dioxide insulating layer, the magnesium oxide buffer layer and the silicon nitride protective layer are independently

[0008] In some embodiments of the present invention, the ion implantation block doping layer includes an N+ ion block implantation layer, a P- ion block implantation layer and a P+ ion block implantation layer, and the surface layer of the silicon wafer cup-shaped structure layer facing the superlattice structure layer is located in the region of the cavity structure to form a sensitive film, and a P- ion block implantation layer and a P+ ion block implantation layer are formed on the left and right sides of the center edge of the sensitive film, respectively, and an N+ ion block implantation layer is formed on the left side of the sensitive film of the silicon cup structure layer.

[0009] In some embodiments of the present invention, the phosphorus-doped polysilicon layer overlaps with a projection of the sensitive thin film in its thickness direction.

[0010] According to another aspect of the present invention, a method for preparing the above-mentioned MEMS pressure sensor is provided, comprising the following steps:

[0011] A substrate and a silicon wafer are provided; an ion implantation block doping layer is formed on the surface of one side of the silicon wafer, and a cavity structure is formed on the surface of the other side; the substrate and the side of the silicon wafer with the cavity structure are bonded together through a bonding process; a silicon dioxide insulating layer, a magnesium oxide buffer layer, and a silicon nitride protective layer are sequentially grown on one side of the ion implantation block doping layer, and the silicon dioxide insulating layer, magnesium oxide buffer layer, and silicon nitride protective layer are alternately cycled multiple times; and a phosphorus-doped polysilicon layer, a metal layer, a top silicon dioxide insulating layer, and a top silicon nitride protective layer are sequentially grown on one side of the topmost silicon nitride protective layer.

[0012] In some embodiments of the present invention, the silicon dioxide insulating layer, the magnesium oxide buffer layer and the silicon nitride protective layer are formed by plasma enhanced chemical vapor deposition process.

[0013] In some embodiments of the present invention, the stress requirement of the magnesium oxide buffer layer or the silicon nitride protective layer is less than 1000 MPa.

[0014] In some embodiments of the present invention, the phosphorus-doped polysilicon layer is formed by a thermal oxidation process.

[0015] The MEMS pressure sensor of the present invention uses a superlattice structure layer composed of multiple layers of silicon dioxide insulating layer, magnesium oxide buffer layer and silicon nitride protective layer alternately cycled in sequence. Through the complementary material properties and functional synergy, the reliability, environmental adaptability and signal quality of the MEMS pressure sensor can be significantly improved. It is particularly suitable for extreme working conditions or scenarios requiring high-precision detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiment below. The accompanying drawings are for illustration purposes only and are not to be considered as limiting the present application. The same reference symbols are used throughout the drawings to represent the same components. In the drawings:

[0017] Figure 1 Schematic diagram of the overall structure of the MEMS pressure sensor of the present invention;

[0018] Figure 2-Figure 10 A schematic diagram of the structures obtained by some steps in the preparation method provided in Example 1 of the present invention is given.

[0019] The numbers in the accompanying drawings represent as follows: 1. substrate; 2. silicon wafer cup-shaped structure layer; 3. N+ ion block injection layer; 4. P+ ion block injection layer; 5. P- ion block injection layer; 6. superlattice structure layer; 61. silicon dioxide insulating layer; 62. magnesium oxide buffer layer; 63. silicon nitride protective layer; 7. metal layer; 8. top silicon dioxide insulating layer; 9. phosphorus-doped polysilicon layer; 10. top silicon nitride protective layer. DETAILED DESCRIPTION

[0020] It should be clear that the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0021] When the following description refers to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are merely examples of devices and methods consistent with certain aspects of the present application, as detailed in the appended claims.

[0022] In the description of this application, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances. In addition, in the description of this application, unless otherwise specified, "multiple" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the previous and subsequent associated objects are in an "or" relationship.

[0023] In this specification, for convenience, words and phrases indicating orientation or positional relationships, such as "middle," "upper," "lower," "front," "back," "vertical," "horizontal," "top," "bottom," "inside," and "outside," are used to illustrate the positional relationships of constituent elements with reference to the accompanying drawings. This is only for the purpose of facilitating the description of this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, it should not be understood as a limitation on this application. The positional relationships of the constituent elements may be appropriately changed according to the direction in which each constituent element is described. Therefore, the words and phrases are not limited to those described in the specification and may be appropriately replaced according to the circumstances.

[0024] In this specification, unless otherwise specified or limited, the terms "disposed" and "connected" should be understood broadly. For example, they can refer to fixed, removable, or integral connections; mechanical or electrical connections; direct connections, indirect connections through an intermediary, or internal communication between two components. Those skilled in the art will understand the specific meanings of these terms in this application.

[0025] Exemplary embodiments are described herein with reference to cross-sectional and / or plan views that are idealized exemplary drawings. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but rather include deviations in shape due to, for example, manufacturing. For example, an etched region shown as a rectangle will typically have curved features. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to limit the scope of the exemplary embodiments.

[0026] Micro-electro-mechanical systems (MEMS) are high-tech electronic and mechanical devices developed based on semiconductor manufacturing technology. They integrate techniques such as photolithography, etching, thin film processing, silicon micromachining, non-silicon micromachining, and precision machining. MEMS pressure sensors are widely used in the automotive, medical, and aerospace industries. Their basic principle is to convert changes in pressure or deformation into electrical signals.

[0027] MEMS pressure sensors include piezoresistive and capacitive types. Piezoresistive pressure sensors use piezoresistors to effectively convert pressure signals into electrical signals, achieving precise pressure measurement and improving measurement accuracy to a certain extent. Piezoresistive pressure sensors include silicon piezoresistive pressure sensors. Silicon piezoresistive pressure sensors are made using the piezoresistive effect of single-crystal silicon. They use a circular stress cup silicon film with a fixed periphery. Four high-precision semiconductor strain gauges are directly engraved on the inner wall of the silicon film where the surface stress is maximum. This forms a Wheatstone measuring bridge, which acts as a force-to-electricity measurement circuit, directly converting pressure into electrical charge to achieve pressure measurement.

[0028] However, current conventional MEMS pressure sensors often have problems with reliability, environmental adaptability and signal quality, especially in extreme working conditions or high-precision detection scenarios, where their performance is insufficient. Therefore, the present application provides a MEMS pressure sensor and a preparation method thereof to significantly improve the reliability, environmental adaptability and signal quality of the MEMS pressure sensor, so that it is better suitable for extreme working conditions or high-precision detection scenarios.

[0029] The embodiment of the present application discloses a MEMS pressure sensor. Figure 1 As shown, the MEMS pressure sensor includes a substrate 1, a silicon wafer cup-shaped structure layer 2, a superlattice structure layer 6, a phosphorus-doped polysilicon layer 9, a metal layer 7, a top silicon dioxide insulating layer 8 and a top silicon nitride protective layer 10, which are arranged in sequence from bottom to top.

[0030] Among them, a cavity structure is formed between the surface of the silicon wafer cup-shaped structure layer 2 facing the substrate and the substrate, and an ion implantation block doping layer is formed on the surface of the silicon wafer cup-shaped structure layer 2 facing the superlattice structure layer 6; the superlattice structure layer 6 includes a plurality of composite layers stacked in sequence, and each composite layer includes a silicon dioxide insulating layer 61, a magnesium oxide buffer layer 62 and a silicon nitride protective layer 63 arranged in sequence from the silicon wafer cup-shaped structure layer 2 to the phosphorus-doped polysilicon layer 9.

[0031] The MEMS pressure sensor of the present invention uses a superlattice structure layer composed of multiple layers of silicon dioxide insulating layer, magnesium oxide buffer layer and silicon nitride protective layer alternately cycled in sequence. Through the complementary material properties and functional synergy, the reliability, environmental adaptability and signal quality of the MEMS pressure sensor are significantly improved. It is particularly suitable for extreme working conditions or scenarios requiring high-precision detection.

[0032] Specifically, in the present invention, a superlattice structure layer is formed by alternating multiple layers of silicon dioxide insulating layers, magnesium oxide buffer layers, and silicon nitride protective layers. First, by utilizing the differences in physical properties and thermal expansion coefficients of SiO2, MgO, and SiN, and based on the different internal stresses they generate when the temperature changes or under different deposition conditions, the alternating coating can balance these stresses to a certain extent, so that the stresses of the three materials can offset each other, thereby reducing the overall stress. Second, the thermal expansion coefficients of SiO2, MgO, and SiN increase in sequence. When the temperature of the film layer changes, this difference will lead to the generation of stress. In the alternating coating structure, the difference in thermal expansion can be alleviated by the alternating layers of the three materials, thereby reducing the total stress of the film layer. Third, the interfaces between the SiO2, MgO, and SiN layers can affect the distribution of stress. By optimizing the interface properties of the alternating layers, the stress can be more evenly distributed in the film layer, thereby reducing local stress concentration. Fourth, the different material properties of the alternating layers can provide additional mechanical support, making the film layer more able to withstand external stress, thereby reducing the overall stress and increasing the overall stability of the film layer.

[0033] Therefore, based on the improvements in stress balance, overall stress reduction, interface effect, structural stability, etc. achieved by the superlattice structure layer, the risk of film rupture or damage caused by stress concentration can be reduced, the service life of the MEMS pressure sensor can be extended, and long-term stable MEMS pressure sensor operation can be ensured. The performance and reliability of the MEMS pressure sensor are improved, and the MEMS pressure sensor can provide accurate and consistent output under various working conditions, ensuring the response speed and sensitivity of the MEMS pressure sensor.

[0034] In some embodiments of the present invention, Figure 1 As shown, the number of composite layers can be two, three, four, five, six, etc., preferably five.

[0035] Specifically, in the present invention, a superlattice structure layer is formed by alternating five layers of a silicon dioxide insulating layer, a magnesium oxide buffer layer, and a silicon nitride protective layer.

[0036] Furthermore, the thickness ratio of the silicon dioxide insulating layer and the silicon nitride protective layer can be (0.6~1.67):1; and the magnesium oxide buffer layer can be equal to or similar to the thickness of the silicon dioxide insulating layer and the silicon nitride protective layer, such as the thickness ratio of the magnesium oxide buffer layer to the silicon dioxide insulating layer or the silicon nitride protective layer can be (0.6~1.67):1.

[0037] The present invention can further optimize the mechanical properties and stress distribution of the film layer by adjusting the number and thickness of the alternating layers of SiO2, MgO and SiN layers, thereby further reducing the stress.

[0038] Preferably, the thickness of the silicon dioxide insulating layer, the magnesium oxide buffer layer and the silicon nitride protective layer are independently

[0039] In some embodiments of the present invention, Figure 1 As shown, the ion implantation block doping layer includes an N+ ion block implantation layer 3, a P- ion block implantation layer 4 and a P+ ion block implantation layer 5. The surface layer of the silicon wafer cup-shaped structure layer 2 facing the superlattice structure layer is located in the area of the cavity structure to form a sensitive film. The P- ion block implantation layer 5 and the P+ ion block implantation layer 4 are formed on the left and right sides of the center edge of the sensitive film respectively. An N+ ion block implantation layer 3 is formed on the silicon wafer cup-shaped structure layer, separated from the P- ion block implantation layer 5 and the P+ ion block implantation layer 4. For example, an N+ ion block implantation layer is formed on the left side of the sensitive film of the silicon cup structure layer.

[0040] Furthermore, the thickness of the sensitive film is 10 μm to 15 μm, and the phosphorus-doped polysilicon layer coincides with the projection of the sensitive film in its thickness direction.

[0041] It should be understood that a phosphorus-doped polysilicon layer is partially formed on the upper surface of the top silicon nitride protective layer of the superlattice structure layer, and the phosphorus-doped polysilicon layer and the metal layer can be located on the same layer. After the phosphorus-doped polysilicon layer is formed on part of the surface of the superlattice structure layer, a metal layer can be further formed on the superlattice structure layer and the phosphorus-doped polysilicon layer. The metal layer covers part of the superlattice structure layer and the phosphorus-doped polysilicon layer, and then a top silicon dioxide insulating layer covering the three can be formed on the superlattice structure layer, the phosphorus-doped polysilicon layer and the metal layer.

[0042] In some embodiments of the present invention, Figure 1 As shown, penetrating through holes are formed on the left and right sides of the superlattice structure layer of alternating cycles of silicon dioxide insulating layer, magnesium oxide buffer layer and silicon nitride protective layer. The bottom of each through hole is in contact with the P+ ion block injection layer corresponding to the sensitive film and the N+ ion block injection layer. Metal is deposited in the through hole as a lead, and the lead can be integrally formed with the metal layer.

[0043] In some embodiments of the present invention, Figure 1 As shown, grooves are etched on the left and right sides of the center of the top silicon dioxide insulating layer and the top silicon nitride protective layer, and electrodes are formed in the grooves. The electrodes are electrically connected to the doped layer of the ion implantation block through the metal layer and the lead. The lead, metal layer and electrode together constitute a conductive component.

[0044] In some embodiments of the present invention, the substrate may be a piece of anodically bonded glass, which is double-sided polished and has a glass thickness of 1000±30 μm.

[0045] In some embodiments of the present invention, the size of the cavity structure is 800 μm×400 μm, and the entire silicon wafer cup-shaped structure layer is fixed after being bonded to the glass anode.

[0046] This embodiment further provides a preparation method for preparing the above-mentioned MEMS pressure sensor, which comprises the following steps:

[0047] S1. Provide a substrate and a silicon wafer.

[0048] S2. An ion implantation block doping layer is formed on the surface of one side of the silicon wafer, and a cavity structure is formed on the surface of the other side.

[0049] S3. Bond the substrate and the side of the silicon wafer with the cavity structure together through a bonding process.

[0050] S4. A silicon dioxide insulating layer, a magnesium oxide buffer layer and a silicon nitride protective layer are sequentially grown on one side of the doped layer of the ion implantation block, and the silicon dioxide insulating layer, the magnesium oxide buffer layer and the silicon nitride protective layer are alternately cycled multiple times.

[0051] S5. Growing a phosphorus-doped polysilicon layer, a metal layer, a top silicon dioxide insulating layer and a top silicon nitride protective layer in sequence on one side of the topmost silicon nitride protective layer.

[0052] In some embodiments of the present invention, a cup-shaped structure can be formed on the lower surface of the silicon wafer through an etching process, thereby forming a sensitive film in the central area of the silicon wafer; then, an ion implantation process is used to form N+, P+, and P- ion block implantation layers on the left and right sides of the central edge of the upper surface of the sensitive film.

[0053] Preferably, the N+ ion block implantation layer is implanted with a Phos dose of 4e15cm -2 , energy 80keV, tilt angle 5°, injection junction depth 30-50μm; P+ ion block injection layer injection Boron dose 1e16cm -2 , energy 60keV, tilt angle 5°, injection junction depth 20μm-30μm; P- ion block injection layer injection Boron dose 2e14cm -2 , energy 40keV, tilt angle 5°, injection junction depth 10-20μm.

[0054] In some embodiments of the present invention, the silicon dioxide insulating layer, the magnesium oxide buffer layer, and the silicon nitride protective layer can be formed by plasma enhanced chemical vapor deposition (PECVD) processes.

[0055] Preferably, the stress requirement of the magnesium oxide buffer layer or the silicon nitride protective layer is less than 1000 MPa, and the growth pressure range is 20 Pa-30 Pa.

[0056] In some embodiments of the present invention, after forming the superlattice structure layer, three through-holes are formed on the left and right sides of the superlattice structure layer, respectively, through the silicon dioxide insulating layer, the magnesium oxide layer, and the silicon nitride protective layer. The bottoms of the three through-holes contact the N+ ion block implantation layer, the P- ion block implantation layer, and the P+ ion block implantation layer, respectively. Metal is then deposited within the through-holes simultaneously with the metal layer deposition to serve as leads. Furthermore, the minimum CD of the etched through-holes is 10±2μm.

[0057] In some embodiments of the present invention, the phosphorus-doped polysilicon layer is formed by a thermal oxidation process. After the phosphorus-doped polysilicon film is grown, the phosphorus-doped polysilicon film is patterned and etched to form the phosphorus-doped polysilicon layer.

[0058] Furthermore, the thickness of the phosphorus-doped polysilicon layer can be The minimum CD (feature dimension) of the phosphorus-doped polysilicon layer after etching is 50±5μm.

[0059] In some embodiments of the present invention, after forming the phosphorus-doped polysilicon layer, a metal layer may be formed by a sputtering process, and the thickness of the metal layer may be And fill all through holes, and the minimum CD after etching is 30±2μm.

[0060] In some embodiments of the present invention, the thickness of the top silicon dioxide insulating layer and the top silicon nitride protective layer are independently After forming the top silicon nitride protective layer, an etching process is used to form grooves on the left and right sides of the top silicon nitride protective layer and the top silicon dioxide insulating layer. Electrodes are formed by sputtering, and the ion-implanted block doping layer is connected to the electrodes via metal wires. Furthermore, the minimum CD of the etched groove is 80±5μm.

[0061] The above-mentioned preparation method in this application will be further described below with reference to specific examples.

[0062] Example 1

[0063] (1) Prepare double-sided polished quartz glass and silicon wafers. The thickness of the quartz glass substrate is 1 μm to 2 μm, and the thickness of the silicon wafer is 360 μm to 415 μm.

[0064] A groove is etched on the lower surface of the silicon wafer to form a cavity for the cup-shaped structure layer of the silicon wafer. The cavity height is 350μm to 390μm, and the thickness of the sensitive film formed in the cavity is 10μm to 15μm. Figure 2 shown.

[0065] (2) The quartz glass and the cup-shaped structure layer of the silicon wafer are bonded together through a bonding process. The opening side of the cavity of the cup-shaped structure layer of the silicon wafer is located on the bottom quartz glass. The quartz glass and the cup-shaped structure layer of the silicon wafer are bonded together, and a vacuum cavity is formed between the middle of the cup-shaped structure layer of the silicon wafer and the upper surface of the quartz glass, such as Figure 3 shown.

[0066] (3) The silicon wafer surface is ion-implanted with N+, and the injection Phos dose is 4e15cm -2 , energy 80keV, tilt angle 5°, injection junction depth 30-50μm; corresponding to ion implantation P+, injection Boron dose 1e16cm -2 , energy 60keV, tilt angle 5°, injection junction depth 20-30μm; corresponding ion implantation P-, injection Boron dose 2e14cm -2 , energy 40keV, tilt angle 5°, low concentration of P-type doping (abbreviated as P-) as a varistor, injection junction depth 10-20μm, such as Figure 4 shown.

[0067] (4) After the ion implantation is completed, O2 and silane (SIH4) are introduced into the furnace tube, and the temperature is adjusted to 1000℃-1200℃ to grow the thickness. silicon dioxide insulating layer.

[0068] (5) After the silicon dioxide insulating layer is grown, Mg(Cp)2 and O2 are introduced into the furnace tube and the temperature is adjusted to 600℃-800℃. The thickness of the magnesium oxide buffer layer is 20Pa-30Pa, the stress requirement is less than 1000MPa, and the growth pressure range is 20Pa-30Pa.

[0069] (6) After the MgO buffer layer is grown, SIH2Cl2 and NH3 are introduced into the furnace tube and the temperature is adjusted to 600℃-800℃. The thickness of the silicon nitride protective layer is 20Pa-30Pa, the stress requirement is less than 1000MPa, and the growth pressure range is 20Pa-30Pa.

[0070] (7) On the upper surface of the doped layer in the ion implantation block, a silicon dioxide insulating layer, a magnesium oxide buffer layer, and a silicon nitride protective layer are formed in sequence by the above-mentioned processes (4) to (6) and alternately cycled five times to form a superlattice structure layer, such as Figure 5 shown.

[0071] (8) After the growth of the top layer of the superlattice structure layer is completed, SiH4 and PH3 are introduced into the furnace tube and the temperature is adjusted to 580℃-650℃. A phosphorus-doped polysilicon insulating layer of thickness.

[0072] (9) After the phosphorus-doped polysilicon insulating layer is grown, it is patterned by photolithography and dry-etched with CL2 and HBR gases. The minimum CD after etching is 50±5μm, which serves as the structural support layer under the pad. Figure 6 shown.

[0073] (10) After the phosphorus-doped polysilicon insulating layer is etched, it is patterned and dry-etched using CL2, BCL3, and CF4, respectively, on the silicon nitride protective layer, magnesium oxide buffer layer, and silicon dioxide insulating layer (superlattice structure layer). After etching, a VIA opening is left with a minimum CD of 10±2 μm to provide a metal electrical connection channel, such as Figure 7 shown.

[0074] (11) After the metal electrical connection channel is etched, the Al metal layer is grown again and deposited using magnetron sputtering technology with a sputtering power of 100-500W and a deposition rate of Gas pressure 2-10mTorr, sputtering thickness And fill the VIA channel.

[0075] (12) After the Al metal layer is grown, it is patterned by photolithography and the circuit pattern of the Al metal layer is etched using CL2. The minimum CD after etching is 30±2μm. Figure 8 shown.

[0076] (13) After the Al metal layer is etched, the furnace temperature is adjusted to 300°C, O2 is introduced, and the growth Thick top silicon dioxide insulating layer, such as Figure 9 shown.

[0077] (14) After the top silicon dioxide insulation layer is grown, the furnace temperature is adjusted to 300℃ and the growth thickness is The top silicon nitride protective layer, such as Figure 10 shown.

[0078] (15) After the top silicon nitride protective layer is completed, it is patterned by photolithography. The top silicon nitride protective layer and the top silicon dioxide insulating layer are dry-etched using CL2 and CF4 respectively. After etching, the Al pad opening is opened, and the minimum CD is 80±5μm. Figure 1 The MEMS pressure sensor shown.

[0079] Comparative Example 1

[0080] (1) The silicon wafer surface is ion-implanted with N+, and the injection Phos dose is 4e15cm -2 , energy 80keV, tilt angle 5°, injection junction depth 30-50μm; corresponding to ion implantation P+, injection Boron dose 1e16cm -2, energy 60keV, tilt angle 5°, injection junction depth 20-30μm; corresponding ion implantation P-, injection Boron dose 2e14cm -2 , energy 40keV, tilt angle 5°, injection junction depth 10-20μm.

[0081] (2) After the ion implantation is completed, O2 is introduced into the furnace tube and the temperature is adjusted to 1000℃-1200℃. a first SiO2 insulating layer.

[0082] (3) After the first SiO2 insulating layer is grown, SIH2Cl2 and NH3 are introduced into the furnace tube and the temperature is adjusted to 600℃-800℃. The first SiN protective layer has a thickness of 1000 Å.

[0083] (4) After the first SiN protective layer is grown, SiH4 and PH3 are introduced into the furnace tube and the temperature is adjusted to 580℃-650℃. A phosphorus-doped Dpoly (phosphorus-doped polysilicon) insulating layer of thickness.

[0084] (5) After the phosphorus-doped Dpoly insulating layer is grown, it is patterned by photolithography and dry-etched using CL2 and HBR gases. The minimum CD after etching is 50±5μm, which serves as the structural support layer under the pad.

[0085] (6) After the phosphorus-doped Dpoly insulating layer is etched, it is patterned by photolithography, and the first SiN protective layer and the first SiO2 insulating layer are dry-etched using CL2 and CF4 respectively. After etching, a VIA opening is left with a minimum CD of 10±2μm to provide a metal electrical connection channel.

[0086] (7) After the metal electrical connection channel is etched, the Al metal layer is grown again and deposited using magnetron sputtering technology with a sputtering power of 100-500W and a deposition rate of Gas pressure 2-10mTorr, sputtering thickness And fill the VIA channel.

[0087] (8) After the Al metal layer is grown, it is patterned by photolithography and the circuit pattern of the Al metal layer is etched using CL2. The minimum CD after etching is 30±2μm.

[0088] (9) After the Al metal layer is etched, the furnace temperature is adjusted to 300°C, O2 is introduced, and the growth thick second SiO2 insulating layer.

[0089] (10) After the second SiO2 insulation layer is grown, the furnace temperature is adjusted to 300℃ and the growth thickness is a second SiN protective layer.

[0090] (11) After the second SiN protective layer is completed, it is patterned by photolithography, and the second SiN protective layer and the second SiO2 insulating layer are dry-etched using CL2 and CF4 respectively. After etching, the Al pad opening is opened, and the minimum CD is 80±5μm.

[0091] (12) After the front structural layer of the silicon wafer is manufactured, the back of the silicon wafer is wet-etched with KOH to form a cup-shaped structure of the silicon wafer; the Si etching depth is 400 μm and the width is 800 μm.

[0092] (13) Finally, the cup-shaped structure layer of the silicon wafer is anodically bonded to the bonding glass with a thickness of 1000±30μm to complete the wafer structure.

[0093] Compared with using a single SiO2 or SiN layer or a composite layer structure of SiO2 and SiN near the sensitive film, the MEMS pressure sensor of the present invention uses a superlattice structure layer composed of multiple layers of silicon dioxide insulating layer, magnesium oxide buffer layer and silicon nitride protective layer alternately cycled in sequence. Through the complementary material properties and functional synergy, the reliability, environmental adaptability and signal quality of the MEMS pressure sensor can be significantly improved, and it is particularly suitable for extreme working conditions or scenarios requiring high-precision detection.

[0094] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the claims.

Claims

1. A MEMS pressure sensor, characterized in that: The method comprises a substrate, a silicon wafer cup-shaped structure layer, a superlattice structure layer, a phosphorus-doped polysilicon layer, a metal layer, a top silicon dioxide insulating layer and a top silicon nitride protective layer, which are sequentially arranged from bottom to top; A cavity structure is formed between the surface of the silicon wafer cup-shaped structure layer on the side facing the substrate and the substrate, and an ion implantation block doping layer is formed on the surface of the silicon wafer cup-shaped structure layer on the side facing the superlattice structure layer; The superlattice structure layer includes a plurality of composite layers stacked in sequence, and each composite layer includes a silicon dioxide insulating layer, a magnesium oxide buffer layer and a silicon nitride protective layer sequentially arranged from the silicon wafer cup structure layer to the phosphorus-doped polysilicon layer.

2. The MEMS pressure sensor according to claim 1, wherein: The number of the composite layers is five.

3. The MEMS pressure sensor according to claim 1, wherein: The thickness ratio of the silicon dioxide insulating layer to the silicon nitride protective layer is (0.6-1.67):

1.

4. The MEMS pressure sensor according to claim 3, wherein: The thicknesses of the silicon dioxide insulating layer, the magnesium oxide buffer layer and the silicon nitride protective layer are independently 5. The MEMS pressure sensor according to claim 1, wherein: The ion implantation block doping layer includes an N+ ion block implantation layer, a P- ion block implantation layer and a P+ ion block implantation layer. The surface layer of the silicon wafer cup-shaped structure layer facing the superlattice structure layer forms a sensitive film in the area located in the cavity structure. The P- ion block implantation layer and the P+ ion block implantation layer are formed on the left and right sides of the center edge of the sensitive film, respectively. An N+ ion block implantation layer is formed on the left side of the sensitive film of the silicon cup structure layer.

6. The MEMS pressure sensor according to claim 5, characterized in that The phosphorus-doped polysilicon layer overlaps with the projection of the sensitive film in the thickness direction.

7. A method for preparing a MEMS pressure sensor according to any one of claims 1 to 6, characterized in that: The following steps are involved: Providing substrates and silicon wafers; An ion implantation block doping layer is formed on the surface of one side of the silicon wafer, and a cavity structure is formed on the surface of the other side; Bonding the substrate and the side of the silicon wafer with the cavity structure together through a bonding process; A silicon dioxide insulating layer, a magnesium oxide buffer layer, and a silicon nitride protective layer are sequentially grown on one side of the doped layer of the ion implantation block, wherein the silicon dioxide insulating layer, the magnesium oxide buffer layer, and the silicon nitride protective layer are alternately cycled multiple times; A phosphorus-doped polysilicon layer, a metal layer, a top silicon dioxide insulating layer and a top silicon nitride protective layer are sequentially grown on one side of the topmost silicon nitride protective layer.

8. The preparation method according to claim 7, characterized in that The silicon dioxide insulating layer, magnesium oxide buffer layer and silicon nitride protective layer are prepared by adopting a plasma enhanced chemical vapor deposition process.

9. The preparation method according to claim 8, characterized in that The stress requirement of the magnesium oxide buffer layer or silicon nitride protective layer is less than 1000 MPa.

10. The preparation method according to claim 7, characterized in that The phosphorus-doped polysilicon layer is prepared and formed by adopting a thermal oxidation process.

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