A high-efficiency high-linearity dual-frequency power amplifier

Abstract

The application relates to the field of radio frequency and microwave electronic technology and discloses a high-efficiency high-linearity dual-frequency power amplifier which comprises an input duplexer, a high-frequency power amplifier, a low-frequency power amplifier, an analog voltage source, a power supply and an output duplexer; two input ends of the input duplexer are connected with a radio frequency input end; two output ends of the input duplexer are connected with an input end of the high-frequency power amplifier and an input end of the low-frequency power amplifier respectively; an output end of the high-frequency power amplifier and an output end of the low-frequency power amplifier are connected with two input ends of the output duplexer respectively; two output ends of the output duplexer are connected with a radio frequency output end; the analog voltage source is connected with a bias voltage end of the high-frequency power amplifier and a bias voltage end of the low-frequency power amplifier respectively; and the power supply is connected with a power supply end of the high-frequency power amplifier and a power supply end of the low-frequency power amplifier respectively. The application can realize high power additional efficiency and high linearity simultaneously under dual frequency bands.

Description

Technical Field

[0001] This invention relates to the field of radio frequency and microwave electronics technology, and specifically to a high-efficiency, high-linearity dual-frequency power amplifier. Background Technology

[0002] With the rapid development of 5G / 6G communication, the Internet of Things (IoT), and millimeter-wave technology, the performance requirements of power amplifiers (PAs) in wireless communication systems are becoming increasingly stringent. Modern communication equipment needs to support multiple frequency bands and standards (such as 5G NR and satellite communication), and requires high power-added efficiency (PAE) and high linearity (such as low EVM and ACPR) under complex modulation signals (such as OFDM and QAM) to reduce system power consumption and ensure signal integrity. However, traditional single-frequency power amplifiers are difficult to adapt to multi-frequency band scenarios, and existing dual-frequency / multi-frequency PA designs face the following technical bottlenecks:

[0003] Efficiency versus linearity: Traditional PAs often suffer from signal distortion due to nonlinear characteristics in high-efficiency modes (such as Class-E and Class-F), while the efficiency of linear modes (such as Class-A and Class-AB) is significantly reduced, making it difficult to meet the high efficiency and high linearity requirements of multi-band applications.

[0004] Dual-frequency impedance matching challenge: Existing multi-frequency matching networks (such as resonant circuits and distributed structures) cannot achieve optimal impedance transformation simultaneously in both frequency bands, resulting in power backoff, insufficient harmonic suppression, and affecting efficiency and bandwidth.

[0005] Traditional dual-band power amplifier architecture, such as Figure 1 As shown, a typical dual-frequency power amplifier operates at different frequencies. Its architecture includes an input signal switch, two amplifiers, and an output signal switch. The input switch switches the input signal path, and the output switch switches the output signal path. The on / off states of the input and output switches are controlled by two voltages, Vsw1 and Vsw2. The two amplifiers are powered by two independent power supplies, Vcc1 and Vcc2, respectively, and the bias circuits of the two amplifiers are controlled by external negative voltages, Vg1 and Vg2. Traditional dual-frequency power amplifier architectures have multiple power supplies, making control complex, and the large insertion loss of the switches results in significant losses in both amplifier efficiency and power. Summary of the Invention

[0006] In view of the above deficiencies in the prior art, the present application provides a high-efficiency high-linearity dual-frequency power amplifier suitable for modern wireless communication systems, which simultaneously realizes high power-added efficiency (PAE) and high linearity in dual-frequency bands, and has the advantages of high linearity, wide band, high efficiency, high output power, high power gain, simple power supply network, etc. This technology covers semiconductor device optimization, multi-frequency impedance matching network design, linearization technology, and dynamic bias control method, and can be widely applied in multi-mode mobile terminals, satellite communication systems, radar systems, etc., to solve the technical bottleneck that the efficiency and linearity of power amplifiers are difficult to balance in multi-band communication scenarios.

[0007] In order to achieve the above-mentioned application purposes, the technical scheme adopted by the present application is:

[0008] A high-efficiency high-linearity dual-frequency power amplifier comprises:

[0009] an input duplexer, a high-frequency power amplifier, a low-frequency power amplifier, an analog voltage source, a power supply, and an output duplexer;

[0010] Both input ends of the input duplexer are connected with the radio frequency input end, and both output ends of the input duplexer are connected with the input end of the high-frequency power amplifier and the input end of the low-frequency power amplifier, respectively;

[0011] The output end of the high-frequency power amplifier and the output end of the low-frequency power amplifier are connected with two input ends of the output duplexer, respectively;

[0012] Both output ends of the output duplexer are connected with the radio frequency output end;

[0013] The analog voltage source is connected with the bias voltage end of the high-frequency power amplifier and the bias voltage end of the low-frequency power amplifier, respectively;

[0014] The power supply is connected with the power supply end of the high-frequency power amplifier and the power supply end of the low-frequency power amplifier, respectively.

[0015] Further, the input duplexer comprises:

[0016] a first high-pass filter and a first low-pass filter connected in parallel;

[0017] The input end of the first high-pass filter is connected with the radio frequency input end, and the output end of the first high-pass filter is connected with the input end of the high-frequency power amplifier;

[0018] The input end of the first low-pass filter is connected with the radio frequency input end, and the output end of the first low-pass filter is connected with the input end of the low-frequency power amplifier.

[0019] Further, the analog voltage source comprises:

[0020] The positive voltage control module, the first switch tube and the second switch tube;

[0021] The positive voltage control module outputs a negative voltage according to an input control positive voltage to control the switching state of the first switch tube and the second switch tube;

[0022] The output end of the first switch tube is connected with a bias voltage end of the high-frequency power amplifier;

[0023] The output end of the second switch tube is connected with a bias voltage end of the low-frequency power amplifier.

[0024] Further, the power supply adopts a decoupling capacitor and a resistor in series to supply power to the high-frequency power amplifier and the low-frequency power amplifier at the same time.

[0025] Further, the output diplexer comprises:

[0026] The second high-pass filter and the second low-pass filter are connected in parallel;

[0027] The input end of the second high-pass filter is connected with the output end of the high-frequency power amplifier, and the output end of the second high-pass filter is connected with the radio frequency output end;

[0028] The input end of the second low-pass filter is connected with the output end of the low-frequency power amplifier, and the output end of the second low-pass filter is connected with the radio frequency output end.

[0029] Further, the high-frequency power amplifier comprises:

[0030] The high-frequency input matching circuit, the first-stage high-frequency bias filter circuit, the first-stage high-frequency power amplifier tube, the first-stage high-frequency power supply circuit, the first-and-second-stage inter-stage high-frequency matching circuit, the second-stage high-frequency bias filter circuit, the second-stage high-frequency power amplifier tube, the second-stage high-frequency power supply circuit, the second-and-third-stage inter-stage high-frequency matching circuit, the third-stage high-frequency bias filter circuit, the third-stage high-frequency power amplifier tube, the third-stage high-frequency power supply circuit and the high-frequency output matching circuit;

[0031] The input end of the high-frequency input matching circuit is connected with the input diplexer, and the output end of the high-frequency input matching circuit is connected with the gate of the first-stage high-frequency power amplifier tube;

[0032] The input end of the first-stage high-frequency bias filter circuit is connected with an analog voltage source, and the output end of the first-stage high-frequency bias filter circuit is connected with the gate of the first-stage high-frequency power amplifier tube;

[0033] The input end of the first-stage high-frequency power supply circuit is connected with the power supply, and the output end of the first-stage high-frequency power supply circuit is connected with the drain of the first-stage high-frequency power amplifier tube;

[0034] The source of the first-stage high-frequency power amplifier tube is grounded, and the drain of the first-stage high-frequency power amplifier tube is connected to the gate of the second-stage high-frequency power amplifier tube through a first-stage-to-second-stage high-frequency matching circuit;

[0035] The input of the second-stage high-frequency bias filter circuit is connected to an analog voltage source, and the output of the second-stage high-frequency bias filter circuit is connected to the gate of the second-stage high-frequency power amplifier tube;

[0036] The input of the second-stage high-frequency power supply circuit is connected to a power supply, and the output of the second-stage high-frequency power supply circuit is connected to the drain of the second-stage high-frequency power amplifier tube;

[0037] The source of the second-stage high-frequency power amplifier tube is grounded, and the drain of the second-stage high-frequency power amplifier tube is connected to the gate of the third-stage high-frequency power amplifier tube through a second-stage-to-third-stage high-frequency matching circuit;

[0038] The input of the third-stage high-frequency bias filter circuit is connected to an analog voltage source, and the output of the third-stage high-frequency bias filter circuit is connected to the gate of the third-stage high-frequency power amplifier tube;

[0039] The input of the third-stage high-frequency power supply circuit is connected to a power supply, and the output of the third-stage high-frequency power supply circuit is connected to the drain of the third-stage high-frequency power amplifier tube;

[0040] The source of the third-stage high-frequency power amplifier tube is grounded, and the drain of the second-stage high-frequency power amplifier tube is connected to an output duplexer through a high-frequency output matching circuit.

[0041] Further, the low-frequency power amplifier comprises:

[0042] a low-frequency input matching circuit, a first-stage low-frequency bias filter circuit, a first-stage low-frequency power amplifier tube, a first-stage low-frequency power supply circuit, a first-stage-to-second-stage low-frequency matching circuit, a second-stage low-frequency bias filter circuit, a second-stage low-frequency power amplifier tube, a second-stage low-frequency power supply circuit, a second-stage-to-third-stage low-frequency matching circuit, a third-stage low-frequency bias filter circuit, a third-stage low-frequency power amplifier tube, a third-stage low-frequency power supply circuit, and a low-frequency output matching circuit;

[0043] The input of the low-frequency input matching circuit is connected to an input duplexer, and the output of the low-frequency input matching circuit is connected to the gate of the first-stage low-frequency power amplifier tube;

[0044] The input of the first-stage low-frequency bias filter circuit is connected to an analog voltage source, and the output of the first-stage low-frequency bias filter circuit is connected to the gate of the first-stage low-frequency power amplifier tube;

[0045] The input of the first-stage low-frequency power supply circuit is connected to the first-stage high-frequency power supply circuit, and the output of the first-stage low-frequency power supply circuit is connected to the drain of the first-stage low-frequency power amplifier tube;

[0046] The source of the first-stage low-frequency power amplifier tube is grounded, and the drain of the first-stage low-frequency power amplifier tube is connected to the gate of the second-stage low-frequency power amplifier tube through a second-stage inter-stage low-frequency matching circuit;

[0047] The input of the second-stage low-frequency bias filter circuit is connected to an analog voltage source, and the output of the second-stage low-frequency bias filter circuit is connected to the gate of the second-stage low-frequency power amplifier tube.

[0048] The input of the second-stage low-frequency power supply circuit is connected to the third-stage high-frequency power supply circuit, and the output of the second-stage low-frequency power supply circuit is connected to the drain of the second-stage low-frequency power amplifier tube.

[0049] The source of the second-stage low-frequency power amplifier tube is grounded, and the drain of the second-stage low-frequency power amplifier tube is connected to the gate of the third-stage low-frequency power amplifier tube through a third-stage inter-stage low-frequency matching circuit.

[0050] The input of the third-stage low-frequency bias filter circuit is connected to an analog voltage source, and the output of the third-stage low-frequency bias filter circuit is connected to the gate of the third-stage low-frequency power amplifier tube.

[0051] The input of the third-stage low-frequency power supply circuit is connected to the third-stage high-frequency power supply circuit, and the output of the third-stage low-frequency power supply circuit is connected to the drain of the third-stage low-frequency power amplifier tube.

[0052] The source of the third-stage low-frequency power amplifier tube is grounded, and the drain of the second-stage low-frequency power amplifier tube is connected to the output diplexer through a low-frequency output matching circuit.

[0053] The present application has the following advantages:

[0054] The present application has the following advantages: BRIEF DESCRIPTION OF DRAWINGS

[0055] Figure 1 A schematic diagram of a conventional dual-frequency amplifier architecture;

[0056] Figure 2 A schematic diagram of a high-efficiency high-linearity dual-frequency power amplifier architecture of the present application;

[0057] Figure 3 A schematic diagram of a high-efficiency high-linearity dual-frequency power amplifier of the present application;

[0058] Figure 4 A schematic diagram of insertion loss comparison of the switch and duplexer scheme;

[0059] Figure 5 A schematic diagram of output power comparison of the low-frequency amplifier using the switch and duplexer scheme;

[0060] Figure 6 A schematic diagram of efficiency comparison of the low-frequency amplifier using the switch and duplexer scheme;

[0061] Figure 7 A schematic diagram of output power comparison of the high-frequency amplifier using the switch and duplexer scheme;

[0062] Figure 8 A schematic diagram of efficiency comparison of the high-frequency amplifier using the switch and duplexer scheme. DETAILED DESCRIPTION

[0063] The specific embodiments of the present application are described below to enable those skilled in the art to understand the present application, but it should be clear that the present application is not limited to the scope of the specific embodiments, and that all modifications that are obvious to those skilled in the art within the spirit and scope of the present application defined by the appended claims are included.

[0064] As shown in Figure 2 A high-efficiency high-linearity dual-frequency power amplifier includes:

[0065] an input duplexer, a high-frequency power amplifier, a low-frequency power amplifier, an analog voltage source, a power supply, and an output duplexer;

[0066] The two input terminals of the input duplexer are connected to the radio frequency input terminal, and the two output terminals of the input duplexer are connected to the input terminal of the high-frequency power amplifier and the input terminal of the low-frequency power amplifier, respectively;

[0067] The output terminal of the high-frequency power amplifier and the output terminal of the low-frequency power amplifier are connected to the two input terminals of the output duplexer, respectively;

[0068] The two output terminals of the output duplexer are connected to the radio frequency output terminal;

[0069] The analog voltage source is connected with the bias voltage end of the high-frequency power amplifier and the bias voltage end of the low-frequency power amplifier respectively;

[0070] The power supply is connected with the power supply end of the high-frequency power amplifier and the power supply end of the low-frequency power amplifier respectively.

[0071] The two-way amplifier of the application shares one power supply voltage Vcc, and the stability of the amplifier is improved by adding a choke inductance and a decoupling capacitor on the chip to prevent RF signal crosstalk at each stage. Compared with the traditional two independent negative voltages (Vg1, Vg2) as the bias of the amplifier, the application only uses one positive control voltage Vgc to provide bias for the two-way amplifier, greatly simplifying the power supply system of the traditional dual-frequency amplifier and reducing the application end power supply network layout requirements. The application uses a duplexer as an isolator for the two frequency bands at the input and output of the amplifier. Compared with the traditional switch used as a dual-band isolator, the duplexer scheme takes impedance matching into account and has lower insertion loss, does not require complex control logic, and occupies less chip area. The application uses a duplexer to replace the switch, which not only reduces the control circuit of the original switch, but also reduces the input and output insertion loss, so that the overall efficiency and power of the amplifier are improved. The dual-frequency amplifier has the advantages of high linearity, wide band, high efficiency, high output power, high power gain, simple power supply network, etc.

[0072] In an optional embodiment of the application, the input duplexer includes:

[0073] The first high-pass filter and the first low-pass filter are connected in parallel;

[0074] The input end of the first high-pass filter is connected with the radio frequency input end, and the output end of the first high-pass filter is connected with the input end of the high-frequency power amplifier;

[0075] The input end of the first low-pass filter is connected with the radio frequency input end, and the output end of the first low-pass filter is connected with the input end of the low-frequency power amplifier.

[0076] As shown in Figure 3 , the input duplexer structure is described in detail as follows: a high-pass filter composed of C1, C2 and TL1; a low-pass filter composed of C 32 , C 33 , TL 22 . After the radio frequency signal enters the input duplexer, it is separated into high-frequency signals and low-frequency signals.

[0077] The actual effect of the input duplexer adopted by the application is as follows Figure 4As shown, the input duplexer separates the input signal into high-frequency and low-frequency components. Besides separating RF input signals of different frequencies, the input duplexer also achieves good input matching to reduce the input reflection coefficient. The high-frequency power amplifier channel uses a high-pass filter composed of C1, C2, and TL1 to pass high-frequency signals and suppress low-frequency signals; C... 32 C 33 TL 22 The low-pass filter, composed of a low-pass and a high-pass filter, allows low-frequency signals to pass while suppressing high-frequency signals. The input duplexer, also composed of a low-pass and a high-pass filter, provides good isolation to prevent interference between the two channels. Simultaneously, it pre-matches the input impedance of the amplifier circuit to the low-impedance region to achieve a good VSWR. This amplifier differs from traditional dual-band amplifiers in that traditional dual-band amplifiers use RF switches for signal separation at the input. However, traditional RF switches require external logic control circuitry, which undoubtedly increases the complexity and area of ​​the chip. Furthermore, traditional RF switches have greater insertion loss, thus reducing the amplifier's gain.

[0078] In an optional embodiment of the present invention, the analog voltage source includes:

[0079] Positive pressure control module, first switching transistor and second switching transistor;

[0080] The positive voltage control module outputs a negative voltage based on the input positive control voltage to control the switching state of the first and second switching transistors;

[0081] The output terminal of the first switching transistor is connected to the bias voltage terminal of the high-frequency power amplifier;

[0082] The output of the second switching transistor is connected to the bias voltage terminal of the low-frequency power amplifier.

[0083] like Figure 3 As shown, the control logic of the analog voltage source chip is as follows: when Vgc is low, switch SW1 is open and SW2 is closed, and the analog voltage source chip outputs control voltage Vgc1 to the low-frequency power amplifier, at which time the low-frequency power amplifier is working; when Vgc is high, switch SW2 is open and SW1 is closed, and the analog voltage source chip outputs control voltage Vgc2 to the high-frequency power amplifier, at which time the high-frequency power amplifier is working.

[0084] RF input signal through input terminal RF IN The signal enters the power amplifier's duplexer, which separates the radio frequency (RF) signal into high-frequency and low-frequency signals. The high-frequency signal is input to the input matching circuit of the high-frequency power amplifier path. Subsequently, the high-frequency signal undergoes three stages of amplification by the high-frequency power amplifier. The amplified high-frequency signal is then connected to the RF output terminal via the output duplexer. OUTThe low frequency signal separated by the input duplexer is input to the input matching circuit of the low frequency power amplifier channel, then the low frequency signal is amplified by three stages of the low frequency power amplifier, and the amplified low frequency signal is connected to the radio frequency output end RF through the output duplexer OUT .

[0085] The analog voltage source chip adopted in the application can generate different output voltages under different control voltages Vgc, when Vgc is low, the switch SW1 pipe is opened, the switch SW2 pipe is closed, and the output negative voltage Vgc1 generated by the analog voltage source chip is connected to the gate of the low frequency power amplifier through the switch SW1, when Vgc is high, the switch SW1 pipe is closed, the switch SW2 pipe is opened, and the output negative voltage Vgc2 generated by the analog voltage source chip is connected to the gate of the high frequency power amplifier through the switch SW2, the analog voltage source chip can avoid the mutual influence between the bias of the two amplifiers by switching different bias, so that the two frequency band amplifiers can work independently, the bias scheme of the analog voltage source chip is different from the traditional bias scheme, the traditional dual-frequency amplifier adopts two independent voltage bias, the application only adopts one voltage control, and the power supply scheme of the system is greatly simplified, and the traditional millimeter wave dual-frequency amplifier usually adopts negative voltage control, and the system for generating negative voltage is relatively complex, while the application adopts positive voltage control, generates negative voltage through the analog voltage source chip, and provides bias for the amplifier, and the analog voltage source chip greatly simplifies the power supply system.

[0086] In an optional embodiment of the application, the power supply adopts the mode of series connection of a decoupling capacitor and a resistor to simultaneously supply power to the high frequency power amplifier and the low frequency power amplifier.

[0087] The high frequency power amplifier and the low frequency power amplifier adopt the same power supply Vcc, and the supply voltage Vcc is a constant voltage of 5V, the internal power supply design of the chip is optimized, the power supply part adopts the mode of series connection of a decoupling capacitor and a resistor, this mode reduces the interference between the amplifiers at all stages, realizes the signal self-excitation suppression function, and thus improves the stability of the circuit, and can prevent the amplifiers from oscillating to the greatest extent, and the application is different from the traditional dual-frequency amplifier, the traditional dual-frequency amplifier usually adopts double power supply, and unreasonable power supply wiring on the system board may cause the amplifiers to oscillate, while the amplifier only needs to adopt single power supply, the power supply is filtered in the chip, and there is no risk of oscillation at the application end.

[0088] In an optional embodiment of the application, the output duplexer comprises:

[0089] The second high-pass filter and the second low-pass filter are connected in parallel.

[0090] The input of the second high-pass filter is connected to the output of the high-frequency power amplifier, and the output of the second high-pass filter is connected to the RF output.

[0091] The input of the second low-pass filter is connected to the output of the low-frequency power amplifier, and the output of the second low-pass filter is connected to the RF output.

[0092] like Figure 3 As shown, the output duplexer structure is described in detail as follows: It consists of C... 30 C 31 TL 21 Construct a high-pass filter; composed of C 47 C 48 TL 34 This forms a low-pass filter. After the signal enters the output duplexer, it is separated into high-frequency and low-frequency signals.

[0093] The output duplexer used in this invention can not only separate radio frequency output signals of different frequencies, but also achieve good output matching to reduce the output reflection coefficient. The output duplexer consists of C... 30 C 31 TL 21 The high-pass filter composed of C passes high-frequency signals and suppresses low-frequency signals; 47 C 48 TL 34 The low-pass filter, composed of a low-pass and a high-pass filter, allows low-frequency signals to pass while suppressing high-frequency signals. The output duplexer, also composed of a low-pass and a high-pass filter, provides good isolation to prevent interference between the two channels. Simultaneously, it pre-matches the output impedance of the amplifier circuit to the low-impedance region to achieve a good VSWR. This amplifier differs from traditional dual-frequency amplifiers in that traditional dual-frequency amplifiers often use RF switches at the output for signal separation. However, traditional RF switches require external logic control circuitry, which undoubtedly increases the complexity and area of ​​the chip. Furthermore, RF switches have greater insertion loss, thus reducing the amplifier's gain, power, and efficiency. The impact of using a duplexer and switch at the output on the power and efficiency of the low-frequency amplifier is discussed in [link to documentation]. Figure 5 and Figure 6 As shown, the impact of using a duplexer and switch at the output on the power and efficiency of the high-frequency amplifier is illustrated in [reference needed]. Figure 7 and Figure 8 As shown in the figure, it can be seen that using a duplexer at the output can significantly improve the power and efficiency of the amplifier module.

[0094] In an optional embodiment of the present invention, the high-frequency power amplifier includes:

[0095] The high-frequency input matching circuit, the first-stage high-frequency bias filter circuit, the first-stage high-frequency power amplifier tube, the first-stage high-frequency power supply circuit, the first-and-second-stage interstage high-frequency matching circuit, the second-stage high-frequency bias filter circuit, the second-stage high-frequency power amplifier tube, the second-stage high-frequency power supply circuit, the second-and-third-stage interstage high-frequency matching circuit, the third-stage high-frequency bias filter circuit, the third-stage high-frequency power amplifier tube, the third-stage high-frequency power supply circuit, and the high-frequency output matching circuit;

[0096] The input end of the high-frequency input matching circuit is connected with the input duplexer, and the output end of the high-frequency input matching circuit is connected with the gate of the first-stage high-frequency power amplifier tube;

[0097] The input end of the first-stage high-frequency bias filter circuit is connected with the analog voltage source, and the output end of the first-stage high-frequency bias filter circuit is connected with the gate of the first-stage high-frequency power amplifier tube;

[0098] The input end of the first-stage high-frequency power supply circuit is connected with the power supply source, and the output end of the first-stage high-frequency power supply circuit is connected with the drain of the first-stage high-frequency power amplifier tube;

[0099] The source of the first-stage high-frequency power amplifier tube is grounded, and the drain of the first-stage high-frequency power amplifier tube is connected with the gate of the second-stage high-frequency power amplifier tube through the first-and-second-stage interstage high-frequency matching circuit;

[0100] The input end of the second-stage high-frequency bias filter circuit is connected with the analog voltage source, and the output end of the second-stage high-frequency bias filter circuit is connected with the gate of the second-stage high-frequency power amplifier tube;

[0101] The input end of the second-stage high-frequency power supply circuit is connected with the power supply source, and the output end of the second-stage high-frequency power supply circuit is connected with the drain of the second-stage high-frequency power amplifier tube;

[0102] The source of the second-stage high-frequency power amplifier tube is grounded, and the drain of the second-stage high-frequency power amplifier tube is connected with the gate of the third-stage high-frequency power amplifier tube through the second-and-third-stage interstage high-frequency matching circuit;

[0103] The input end of the third-stage high-frequency bias filter circuit is connected with the analog voltage source, and the output end of the third-stage high-frequency bias filter circuit is connected with the gate of the third-stage high-frequency power amplifier tube;

[0104] The input end of the third-stage high-frequency power supply circuit is connected with the power supply source, and the output end of the third-stage high-frequency power supply circuit is connected with the drain of the third-stage high-frequency power amplifier tube;

[0105] The source of the third-stage high-frequency power amplifier tube is grounded, and the drain of the second-stage high-frequency power amplifier tube is connected with the output duplexer through the high-frequency output matching circuit.

[0106] As Figure 3As shown, the high-frequency power amplifier is composed of three-stage transistor cascade, wherein the high-frequency input matching circuit is composed of C3, C4, C5 and TL2, R2, TL3, C6 and R1 compose the first-stage high-frequency bias filter circuit of the first-stage high-frequency power amplifier, Q1 is the first-stage high-frequency power amplifier, TL4, TL5, R3, R4, C7 and C8 compose the first-stage high-frequency power supply circuit of the first-stage high-frequency power amplifier, and TL4 and TL5 also compose the first-stage high-frequency output matching circuit; the first-stage and second-stage inter-stage high-frequency matching circuit is composed of TL4, TL5, TL6, TL7, C9, C 12 , R8, TL8, C 14 , R6, R7 and C 13 compose the second-stage high-frequency bias filter circuit, Q2 is the second-stage high-frequency power amplifier; TL9, TL 10 , R9, C 15 , C 16 compose the second-stage high-frequency power supply circuit of the second-stage high-frequency power amplifier; the second-stage and third-stage inter-stage high-frequency matching circuit is composed of TL9, TL 10 , TL 11 , TL 12 , C 17 , C 20 , TL 13 , C 21 ; R 13 , TL 14 , C 23 , R 11 , C 22 , R 12 compose the third-stage high-frequency bias filter circuit of the third-stage high-frequency power amplifier, Q3 is the third-stage high-frequency power amplifier; TL 15 , TL 16 , R 14 , C 24 , C 25 compose the third-stage high-frequency power supply circuit of the third-stage high-frequency power amplifier, and the high-frequency output matching circuit is composed of TL 17 , TL 18 , TL 19 , TL 20 , C 26 , C 27 , C 29 , R 15 .

[0107] In an optional embodiment of the present application, the low-frequency power amplifier comprises:

[0108] The low-frequency input matching circuit, the first-stage low-frequency bias filter circuit, the first-stage low-frequency power amplifier tube, the first-stage low-frequency power supply circuit, the first-and-second-stage interstage low-frequency matching circuit, the second-stage low-frequency bias filter circuit, the second-stage low-frequency power amplifier tube, the second-stage low-frequency power supply circuit, the second-and-third-stage interstage low-frequency matching circuit, the third-stage low-frequency bias filter circuit, the third-stage low-frequency power amplifier tube, the third-stage low-frequency power supply circuit, and the low-frequency output matching circuit;

[0109] The input end of the low-frequency input matching circuit is connected with the input duplexer, and the output end of the low-frequency input matching circuit is connected with the gate of the first-stage low-frequency power amplifier tube;

[0110] The input end of the first-stage low-frequency bias filter circuit is connected with the analog voltage source, and the output end of the first-stage low-frequency bias filter circuit is connected with the gate of the first-stage low-frequency power amplifier tube;

[0111] The input end of the first-stage low-frequency power supply circuit is connected with the first-stage high-frequency power supply circuit, and the output end of the first-stage low-frequency power supply circuit is connected with the drain of the first-stage low-frequency power amplifier tube;

[0112] The source of the first-stage low-frequency power amplifier tube is grounded, and the drain of the first-stage low-frequency power amplifier tube is connected with the gate of the second-stage low-frequency power amplifier tube through the first-and-second-stage interstage low-frequency matching circuit;

[0113] The input end of the second-stage low-frequency bias filter circuit is connected with the analog voltage source, and the output end of the second-stage low-frequency bias filter circuit is connected with the gate of the second-stage low-frequency power amplifier tube;

[0114] The input end of the second-stage low-frequency power supply circuit is connected with the second-stage high-frequency power supply circuit, and the output end of the second-stage low-frequency power supply circuit is connected with the drain of the second-stage low-frequency power amplifier tube;

[0115] The source of the second-stage low-frequency power amplifier tube is grounded, and the drain of the second-stage low-frequency power amplifier tube is connected with the gate of the third-stage low-frequency power amplifier tube through the second-and-third-stage interstage low-frequency matching circuit;

[0116] The input end of the third-stage low-frequency bias filter circuit is connected with the analog voltage source, and the output end of the third-stage low-frequency bias filter circuit is connected with the gate of the third-stage low-frequency power amplifier tube;

[0117] The input end of the third-stage low-frequency power supply circuit is connected with the third-stage high-frequency power supply circuit, and the output end of the third-stage low-frequency power supply circuit is connected with the drain of the third-stage low-frequency power amplifier tube;

[0118] The source of the third-stage low-frequency power amplifier tube is grounded, and the drain of the second-stage low-frequency power amplifier tube is connected with the output duplexer through the low-frequency output matching circuit.

[0119] As Figure 3As shown, the low frequency power amplifier is composed of three transistor stages in cascade, wherein the low frequency input matching circuit is composed of R 16 , C 34 , C 35 , TL 23 , R 17 , R 18 , TL 24 , C 36 , R 37 , Q4, TL 25 , C 10 , C 11 , TL 25 , C 11 comprise the first stage low frequency power amplifier first stage low frequency bias filter circuit, Q4 is the first stage low frequency power amplifier, TL 38 , TL 26 , C 39 comprise the first stage low frequency power amplifier first stage low frequency power supply circuit, and TL 19 , TL 27 , C 40 , C 41 , R 20 comprise the second stage low frequency power amplifier second stage low frequency bias filter circuit, Q5 is the second stage low frequency power amplifier; TL 28 , C 18 , C 19 , R 10 comprise the second stage low frequency power amplifier second stage low frequency power supply circuit; the second and third stage low frequency matching circuit is composed of C 42 , TL 29 , C 43 ; R 21 , TL 30 , C 44 , C 45 , R 22 comprise the third stage low frequency power amplifier third stage low frequency bias filter circuit, Q6 is the third stage low frequency power amplifier; TL 31 , TL 32 , C 28 , C 27 , R 15 comprise the third stage low frequency power amplifier third stage low frequency power supply circuit, and the low frequency output matching circuit is composed of TL 31 , TL 32 , C 46 , TL 33 .

[0120] The principles and implementation manners of the present application are described by using specific examples in the present application, and the above examples are only used for helping to understand the method of the present application and its core idea; meanwhile, for the ordinary skilled in the art, according to the idea of the present application, the specific implementation manners and application ranges can be changed, and the above description should not be understood as the limitation of the present application.

[0121] Those skilled in the art will understand that the examples described herein are for the purpose of understanding the principles of the present application and should be understood as not limiting the scope of protection of the present application. Those skilled in the art can make various other specific modifications and combinations according to the technical inspiration disclosed in the present application without departing from the essence of the present application, and these modifications and combinations are still within the scope of protection of the present application.

Claims

1. A high-efficiency, high-linearity dual-frequency power amplifier, characterized in that, include: Input duplexer, high-frequency power amplifier, low-frequency power amplifier, analog voltage source, power supply and output duplexer; Both input terminals of the input duplexer are connected to the RF input terminal, and the two output terminals of the input duplexer are connected to the input terminals of the high-frequency power amplifier and the low-frequency power amplifier, respectively. The output terminals of the high-frequency power amplifier and the low-frequency power amplifier are respectively connected to the two input terminals of the output duplexer; Both output terminals of the output duplexer are connected to the RF output terminal; The analog voltage source is connected to the bias voltage terminal of the high-frequency power amplifier and the bias voltage terminal of the low-frequency power amplifier, respectively. The power supply is connected to the power supply terminals of the high-frequency power amplifier and the low-frequency power amplifier, respectively. The analog voltage sources include: Positive pressure control module, first switch SW2 and second switch SW1; The positive voltage control module outputs a negative voltage based on the input positive control voltage to control the switching state of the first switch SW2 and the second switch SW1; The output terminal of the first switching transistor SW2 is connected to the bias voltage terminal of the high-frequency power amplifier; The output terminal of the second switching transistor SW1 is connected to the bias voltage terminal of the low-frequency power amplifier. When the input control positive voltage is low, the second switch SW1 is turned on and the first switch SW2 is turned off. The output negative voltage generated by the analog voltage source is connected to the gate of the low-frequency power amplifier through the second switch SW1. When the input control positive voltage is high, the first switch SW2 is turned on and the second switch SW1 is turned off. The output negative voltage generated by the analog voltage source is connected to the gate of the high-frequency power amplifier through the first switch SW2. High-frequency power amplifiers include: The circuit includes a high-frequency input matching circuit, a first-stage high-frequency bias filter circuit, a first-stage high-frequency power amplifier tube, a first-stage high-frequency power supply circuit, a first-stage and second-stage high-frequency matching circuit, a second-stage high-frequency bias filter circuit, a second-stage high-frequency power amplifier tube, a second-stage high-frequency power supply circuit, a second-stage and third-stage high-frequency matching circuit, a third-stage high-frequency bias filter circuit, a third-stage high-frequency power amplifier tube, a third-stage high-frequency power supply circuit, and a high-frequency output matching circuit. The input terminal of the high-frequency input matching circuit is connected to the input duplexer, and the output terminal of the high-frequency input matching circuit is connected to the gate of the first-stage high-frequency power amplifier tube. The input terminal of the first-stage high-frequency bias filter circuit is connected to the analog voltage source, and the output terminal of the first-stage high-frequency bias filter circuit is connected to the gate of the first-stage high-frequency power amplifier tube. The input terminal of the first-stage high-frequency power supply circuit is connected to the power supply, and the output terminal of the first-stage high-frequency power supply circuit is connected to the drain of the first-stage high-frequency power amplifier tube. The source of the first-stage high-frequency power amplifier tube is grounded, and the drain of the first-stage high-frequency power amplifier tube is connected to the gate of the second-stage high-frequency power amplifier tube through the high-frequency matching circuit between the first and second stages. The input terminal of the second-stage high-frequency bias filter circuit is connected to the analog voltage source, and the output terminal of the second-stage high-frequency bias filter circuit is connected to the gate of the second-stage high-frequency power amplifier tube. The input terminal of the second-stage high-frequency power supply circuit is connected to the power supply, and the output terminal of the second-stage high-frequency power supply circuit is connected to the drain of the second-stage high-frequency power amplifier tube. The source of the second-stage high-frequency power amplifier tube is grounded, and the drain of the second-stage high-frequency power amplifier tube is connected to the gate of the third-stage high-frequency power amplifier tube through the high-frequency matching circuit between the second and third stages. The input terminal of the third-stage high-frequency bias filter circuit is connected to the analog voltage source, and the output terminal of the third-stage high-frequency bias filter circuit is connected to the gate of the third-stage high-frequency power amplifier tube. The input terminal of the third-stage high-frequency power supply circuit is connected to the power supply, and the output terminal of the third-stage high-frequency power supply circuit is connected to the drain of the third-stage high-frequency power amplifier tube. The source of the third-stage high-frequency power amplifier tube is grounded, and the drain of the second-stage high-frequency power amplifier tube is connected to the output duplexer through a high-frequency output matching circuit. The high-frequency input matching circuit consists of capacitors C3, C4, and C5, and transmission line TL2. Resistor R2, transmission line TL3, capacitor C6, and resistor R1 form the first-stage high-frequency bias filter circuit for the first-stage high-frequency power amplifier transistor. Transistor Q1 is the first-stage high-frequency power amplifier transistor. Transmission lines TL4 and TL5, resistor R3, resistor R4, capacitors C7 and C8 form the first-stage high-frequency power supply circuit for the first-stage high-frequency power amplifier transistor. Transmission lines TL4 and TL5 form the first-stage high-frequency output matching circuit. The inter-stage high-frequency matching circuit consists of transmission lines TL4, TL5, TL6, and TL7, capacitor C9, and capacitor C... 12 The second-stage high-frequency bias filter circuit consists of resistor R8, transmission line TL8, and capacitor C. 14 Resistor R6, Resistor R7, Capacitor C 13 Composition: Transistor Q2 is the second-stage high-frequency power amplifier transistor; transmission line TL9, transmission line TL... 10 Resistor R9, Capacitor C 15 Capacitor C 16 The second-stage high-frequency power supply circuit forms the second-stage high-frequency power amplifier tube; the high-frequency matching circuit between the second and third stages consists of transmission line TL9 and transmission line TL 10 Transmission line TL 11 Transmission line TL 12 Capacitor C 17 Capacitor C 20 Transmission line TL 13 Capacitor C 21 Composition; Resistance R 13 Transmission line TL 14 Capacitor C 23 Resistance R 11 Capacitor C 22 Resistance R 12 The third-stage high-frequency bias filter circuit, which forms the third-stage high-frequency power amplifier transistor, uses transistor Q3 as the third-stage high-frequency power amplifier transistor; transmission line TL 15 Transmission line TL 16 Resistance R 14 Capacitor C 24 Capacitor C 25 The third-stage high-frequency power supply circuit, which forms the third-stage high-frequency power amplifier tube, and the high-frequency output matching circuit consist of the transmission line TL. 17 Transmission line TL 18 Transmission line TL 19 Transmission line TL 20 Capacitor C 26 Capacitor C 27 Capacitor C 29 Resistance R 15 composition; Low-frequency power amplifiers include: The circuit includes a low-frequency input matching circuit, a first-stage low-frequency bias filter circuit, a first-stage low-frequency power amplifier tube, a first-stage low-frequency power supply circuit, a first- and second-stage inter-stage low-frequency matching circuit, a second-stage low-frequency bias filter circuit, a second-stage low-frequency power amplifier tube, a second-stage low-frequency power supply circuit, a second- and third-stage inter-stage low-frequency matching circuit, a third-stage low-frequency bias filter circuit, a third-stage low-frequency power amplifier tube, a third-stage low-frequency power supply circuit, and a low-frequency output matching circuit. The input terminal of the low-frequency input matching circuit is connected to the input duplexer, and the output terminal of the low-frequency input matching circuit is connected to the gate of the first-stage low-frequency power amplifier tube. The input terminal of the first-stage low-frequency bias filter circuit is connected to the analog voltage source, and the output terminal of the first-stage low-frequency bias filter circuit is connected to the gate of the first-stage low-frequency power amplifier tube. The input terminal of the first-stage low-frequency power supply circuit is connected to the first-stage high-frequency power supply circuit, and the output terminal of the first-stage low-frequency power supply circuit is connected to the drain of the first-stage low-frequency power amplifier tube. The source of the first-stage low-frequency power amplifier tube is grounded, and the drain of the first-stage low-frequency power amplifier tube is connected to the gate of the second-stage low-frequency power amplifier tube through the inter-stage low-frequency matching circuit. The input of the second-stage low-frequency bias filter circuit is connected to the analog voltage source, and the output of the second-stage low-frequency bias filter circuit is connected to the gate of the second-stage low-frequency power amplifier tube. The input terminal of the second-stage low-frequency power supply circuit is connected to the second-stage high-frequency power supply circuit, and the output terminal of the second-stage low-frequency power supply circuit is connected to the drain of the second-stage low-frequency power amplifier tube. The source of the second-stage low-frequency power amplifier tube is grounded, and the drain of the second-stage low-frequency power amplifier tube is connected to the gate of the third-stage low-frequency power amplifier tube through the interstage low-frequency matching circuit between the second and third stages. The input of the third-stage low-frequency bias filter circuit is connected to the analog voltage source, and the output of the third-stage low-frequency bias filter circuit is connected to the gate of the third-stage low-frequency power amplifier tube. The input terminal of the third-stage low-frequency power supply circuit is connected to the third-stage high-frequency power supply circuit, and the output terminal of the third-stage low-frequency power supply circuit is connected to the drain of the third-stage low-frequency power amplifier tube. The source of the third-stage low-frequency power amplifier tube is grounded, and the drain of the second-stage low-frequency power amplifier tube is connected to the output duplexer through the low-frequency output matching circuit. The low-frequency input matching circuit consists of resistor R. 16 Capacitor C 34 Capacitor C 35 Transmission line TL 23 Composition, resistance R 17 Resistance R 18 Transmission line TL 24 Capacitor C 36 Resistance R 37 The first-stage low-frequency bias filter circuit, which forms the first-stage low-frequency power amplifier transistor, uses transistor Q4 as the first-stage low-frequency power amplifier transistor and transmission line TL. 25 Capacitor C 10 Capacitor C 11 The first-stage low-frequency power supply circuit, which forms the first-stage low-frequency power amplifier tube, has a transmission line TL. 25 Capacitor C 11 This forms the first-stage low-frequency output matching circuit; the inter-stage low-frequency matching circuit consists of capacitor C. 38 Transmission line TL 26 Capacitor C 39 The second-stage low-frequency bias filter circuit consists of resistor R. 19 Transmission line TL 27 Capacitor C 40 Capacitor C 41 Resistance R 20 Composition: Transistor Q5 is the second-stage low-frequency power amplifier transistor; transmission line TL 28 Capacitor C 18 Capacitor C 19 Resistance R 10 The second-stage low-frequency power supply circuit forms the second-stage low-frequency power amplifier tube; the inter-stage low-frequency matching circuit between the second and third stages consists of capacitor C. 42 Transmission line TL 29 Capacitor C 43 Composition; Resistance R 21 Transmission line TL 30 Capacitor C 44 Capacitor C 45 Resistance R 22 The third-stage low-frequency bias filter circuit, which forms the third-stage low-frequency power amplifier transistor, uses transistor Q6 as the third-stage low-frequency power amplifier transistor; transmission line TL 31 Transmission line TL 32 Capacitor C 28 Capacitor C 27 Resistance R 15 The third-stage low-frequency power supply circuit, which forms the third-stage low-frequency power amplifier tube, and the low-frequency output matching circuit, consist of transmission line TL. 31 Transmission line TL 32 Capacitor C 46 Transmission line TL 33 composition; The power supply uses a decoupling capacitor and a resistor in series to supply power to both the high-frequency power amplifier and the low-frequency power amplifier simultaneously.

2. The high-efficiency, high-linearity dual-frequency power amplifier according to claim 1, characterized in that, The input duplexer includes: A first high-pass filter and a first low-pass filter connected in parallel; The input terminal of the first high-pass filter is connected to the RF input terminal, and the output terminal of the first high-pass filter is connected to the input terminal of the high-frequency power amplifier. The input terminal of the first low-pass filter is connected to the RF input terminal, and the output terminal of the first low-pass filter is connected to the input terminal of the low-frequency power amplifier.

3. The high-efficiency, high-linearity dual-frequency power amplifier according to claim 1, characterized in that, The output duplexer includes: A second high-pass filter and a second low-pass filter are connected in parallel; The input of the second high-pass filter is connected to the output of the high-frequency power amplifier, and the output of the second high-pass filter is connected to the RF output. The input of the second low-pass filter is connected to the output of the low-frequency power amplifier, and the output of the second low-pass filter is connected to the RF output.

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