Device and method for controlling display circuit and display device

Abstract

The invention discloses a device and method for controlling a display circuit and a display device. The device comprises a detection module used for providing a detection signal according to a vertical synchronization signal of a display circuit; and the control module provides a control signal according to a detection signal to control the mode of the display circuit, and the detection signal represents the frequency of the vertical synchronization signal. The device can control the mode of the display circuit according to the vertical synchronization signal, and can effectively reduce the power consumption of the display circuit.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and more particularly, to a device and method for controlling a display circuit and a display device. Background Art

[0002] As the resolution and refresh rate of display devices continue to increase, reducing the power consumption of display devices has become a hot research issue.

[0003] In a display device, the display circuit is the core electronic circuit system responsible for processing, converting, and transmitting image signals, and controlling the display panel's light emission or imaging. The display circuit converts input video signals (such as those from a graphics card, set-top box, or other device) into drive signals that the display panel can understand, ultimately presenting a clear image on the screen. The main sources of power consumption in the display circuit include signal processing circuits, driver circuits, power management circuits, and timing and interface circuits. Therefore, the display circuit is the component with the highest power consumption in a display device.

[0004] Therefore, it is desirable to provide an improved display device to reduce the power consumption of the display circuit. Summary of the Invention

[0005] In view of the above problems, an object of the present invention is to provide an apparatus and method for controlling a display circuit and a display device, so as to reduce the power consumption of the display circuit.

[0006] According to one aspect of the present invention, there is provided an apparatus for controlling a display circuit, comprising: a detection module for providing a detection signal based on a vertical synchronization signal of the display circuit; and a control module for providing a control signal based on the detection signal to control a mode of the display circuit, wherein the detection signal represents a frequency of the vertical synchronization signal.

[0007] Optionally, the detection module provides the detection signal by detecting a changing edge of the vertical synchronization signal.

[0008] Optionally, the control module is configured to: within a predetermined time period, if the frequency of the vertical synchronization signal is 0, control the display circuit to enter a standby mode; if the frequency of the vertical synchronization signal is less than a predetermined threshold, control the display circuit to enter a low power consumption mode; if the frequency of the vertical synchronization signal is greater than or equal to a predetermined threshold, control the display circuit to enter an operating mode.

[0009] Optionally, the display circuit directly switches between any two modes among the standby mode, the low power consumption mode and the working mode according to the detection signal.

[0010] Optionally, the method further includes: a configuration module, configured to set the predetermined threshold and / or the predetermined time period.

[0011] Optionally, the detection module includes: a signal monitoring unit for monitoring the code stream data of the display circuit; a signal extraction unit for extracting the vertical synchronization signal from the code stream data; and a frequency extraction unit for detecting the changing edge of the vertical synchronization signal to provide the detection signal.

[0012] According to a second aspect of the present invention, a display device is provided, comprising: a device for controlling a display circuit as described above; a display circuit that enters a corresponding mode and performs a corresponding power state transition according to a control signal provided by the device; and a display panel that performs luminous display according to a drive signal provided by the display circuit.

[0013] According to a third aspect of the present invention, a method for controlling a display circuit is provided, comprising: providing a detection signal based on a vertical synchronization signal of the display circuit; and providing a control signal based on the detection signal to control a mode of the display circuit, wherein the detection signal represents the frequency of the vertical synchronization signal.

[0014] Optionally, providing a detection signal according to the vertical synchronization signal of the display circuit includes: monitoring the code stream data of the display circuit; extracting the vertical synchronization signal from the code stream data; and detecting a changing edge of the vertical synchronization signal to provide the detection signal.

[0015] Optionally, within a predetermined time period, if the frequency of the vertical synchronization signal is 0, the display circuit is controlled to enter a standby mode; if the frequency of the vertical synchronization signal is less than a predetermined threshold, the display circuit is controlled to enter a low power consumption mode; if the frequency of the vertical synchronization signal is greater than or equal to a predetermined threshold, the display circuit is controlled to enter an operating mode, wherein the display circuit directly switches between any two modes of the standby mode, the low power consumption mode and the operating mode according to the detection signal.

[0016] The device, method and display device for controlling a display circuit provided by the present invention can more effectively reduce the power consumption of the display circuit and achieve adaptive adjustment of the power consumption of the display circuit by accurately detecting the changing edge of the vertical synchronization signal and dynamically controlling the power state of the display circuit accordingly. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other objects, features and advantages of the present invention will become more apparent through the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:

[0018] Figure 1 A schematic diagram of a display device according to an embodiment of the present invention is shown;

[0019] Figure 2 shows a schematic diagram of a display control circuit according to an embodiment of the present invention;

[0020] Figure 3 A schematic diagram of a device for controlling a display circuit according to an embodiment of the present invention is shown;

[0021] Figure 4 shows a state transition diagram of a display circuit according to an embodiment of the present invention;

[0022] Figure 5 A flow chart of a method for controlling a display circuit according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0023] The present invention will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, identical elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown in the drawings.

[0024] Many predetermined details of the present invention are described below, such as device structures, materials, dimensions, processing techniques, and technologies, to provide a clearer understanding of the present invention. However, as will be appreciated by those skilled in the art, the present invention may be practiced without following these predetermined details.

[0025] It should be understood that the connection / coupling of A and B in the embodiment of the present application means that A and B can be connected in series or in parallel, or A and B are connected through other devices, and the embodiment of the present application is not limited to this.

[0026] Embodiments of the device and method for controlling a display circuit and a display device provided in the present application will be described below with reference to the accompanying drawings.

[0027] Figure 1 A schematic diagram of a display device according to an embodiment of the present invention is shown.

[0028] like Figure 1 As shown, the display device 100 includes a host 110 , a display control circuit 120 and a display panel 130 .

[0029] Host 110 is used to generate or receive image signals. Host 110 can be a standalone electronic device (such as a computer, mobile phone, or set-top box) or a control module integrated into display device 100. Host 110 communicates with display control circuit 120 via a wired or wireless interface (such as HDMI, USB, or Wi-Fi). The transmitted signals include, but are not limited to, digital video signals, control commands, or configuration parameters. Image signals (such as those in RGB or YCbCr format) output by host 110 are processed by display control circuit 120.

[0030] The display control circuit 120 includes a display circuit 121 and a device for controlling the display circuit (hereinafter referred to as a power consumption control module 122). The display control circuit 120 receives and processes image signals from the host 110 to generate scanning signals and data signals required to drive the display panel 130. The display control circuit 120 can be integrated on a flexible printed circuit board (FPCB) or a printed circuit board (PCB), and electrically connected to the display panel 130 via a connector (e.g., chip on film (COF), tape carrier package (TCP), etc.). The display control circuit 120 can be a timing controller, a control device that includes a timing controller and performs other control functions, or a control device different from a timing controller. The display circuit 121 includes at least a timing controller (TCON) to convert signals into synchronization signals for progressive scanning. The synchronization signals include, for example, a horizontal synchronization signal (HSYNC) and a vertical synchronization signal (VSYNC), and generates corresponding gate line and data line drive signals based on the synchronization signals.

[0031] The display panel 130 includes a substrate 131, a pixel array 132, a scan driver circuit 133, and a data driver circuit 134. The pixel array 132 is arranged on the substrate 131, and the driver circuit is used to drive each pixel circuit in the pixel array 132. In the display panel 130, a column of pixel circuits shares a data line, a row of pixel circuits shares a scan line, and all pixel circuits can share a common voltage. The scan driver circuit 133 may include one or more scan driver ICs (GDICs). Each scan driver IC may include a shift register, a level shifter, etc. The data driver circuit 134 may include one or more source driver ICs (SDICs). Each source driver IC may include a shift register, a latch circuit, a digital-to-analog converter (DAC), an output buffer, etc. In some cases, the source driver IC may also include an analog-to-digital converter (ADC). Herein, the data driver circuit 134 is also referred to as a "source driver." In the display panel 130 , scan lines activate pixel circuits sequentially in rows or columns, and data lines write data voltages or currents to the activated pixel circuits, thereby forming an image on the substrate 131 .

[0032] In the embodiment of the present invention, the type of the display panel 130 may be a low-temperature polysilicon organic light-emitting diode (LTPS OLED) display panel, a micro organic light-emitting diode (Micro-OLED) display panel, a mini organic light-emitting diode (Mini-OLED) display panel, a micro light-emitting diode (Micro-LED) display panel, a passive matrix organic light-emitting diode (Passive Matrix OLED) display panel, an active matrix organic light-emitting diode (Active Matrix OLED) display panel, a flexible organic light-emitting diode (Flexible OLED) display panel, a transparent organic light-emitting diode (Transparent OLED) display panel, a quantum dot light-emitting diode (QLED) display panel, an electronic paper display (Electronic Paper Display, Any one of the display panels such as EPD) is not limited in this application.

[0033] The display control circuit 120 controls the data driver circuit 134 and the scan driver circuit 133 by providing data signals and scan signals to the data driver circuit 134 and the scan driver circuit 133, respectively. The display control circuit 120 initiates scanning at the timing of each frame, converts image data input from the host computer 110 into output image data in a data signal format readable by the data driver circuit 134, outputs the output image data, and controls data driving at appropriate times depending on the scanning. Under the control of the display control circuit 120, the scan driver circuit 133 sequentially supplies scan signals with on or off voltages to the plurality of scan lines GL. When a predetermined scan line GL is turned on by the scan driver circuit 133, the data driver circuit 134 converts the output image data received from the display control circuit 120 into an analog image signal and supplies a data signal Vdata corresponding to the analog image signal to the plurality of data lines DL. The data driver circuit 134 drives the plurality of data lines DL by supplying the data signal Vdata to the plurality of data lines DL.

[0034] The scan drive circuit 133 sequentially drives the plurality of scan lines GL by sequentially supplying a scan signal Vgate (also referred to as a scan voltage, scan signal, or gate voltage) to the plurality of scan lines GL. Herein, the scan drive circuit 133 is also referred to as a "gate driver." Here, the scan signal Vgate includes a gate voltage at an off-level that turns off the corresponding scan line GL, and a gate voltage at an on-level that turns on the corresponding scan line GL. More specifically, the scan signal Vgate includes a gate voltage at an off-level that turns off the transistor connected to the corresponding scan line GL, and a gate voltage at an on-level that turns on the transistor connected to the corresponding scan line GL.

[0035] In the case where the transistor in the pixel circuit is an n-type transistor, the off-level scanning voltage may be a low-level scanning voltage VGL, and the on-level scanning voltage may be a high-level scanning voltage VGH. If the transistor is a p-type transistor, the off-level scanning voltage may be a high-level scanning voltage VGH, and the on-level scanning voltage may be a low-level scanning voltage VGL. Hereinafter, for the sake of simplicity, as an example, the off-level scanning voltage will be described as a low-level scanning voltage, and the on-level scanning voltage will be described as a high-level scanning voltage.

[0036] Some examples of the display device according to the embodiment of the present invention are described above. However, the embodiment of the present invention is not limited thereto and may be expanded and deformed in other ways.

[0037] The display control circuit 120 provided in the embodiment of the present application may be provided as a component separate from the data driving circuit 134 , or may be provided in combination with the data driving circuit 134 to form an integrated circuit (IC).

[0038] Each source driver IC may be connected to bonding pads of the display panel 130 by a tape automated bonding (TAB) method or a chip on glass (COG) method, may be directly mounted on the display panel 130, or in some cases, may be integrated with the display panel 130. In addition, each source driver IC may be implemented using a chip on film (COF) structure mounted on the display panel 130.

[0039] Each scan driving circuit 133 may be connected to a bonding pad of the display panel 130 by a TAB method or a COG method, may be implemented using a gate-in-panel (GIP) structure directly mounted on the display panel 130, or in some cases, may be integrated with the display panel 130. In addition, each gate driving circuit may be implemented using a COF structure mounted on a film connected to the display panel 130.

[0040] The data driving circuit 134 may be provided on one side of the display panel 130 (eg, on the upper or lower portion of the display panel 130), as shown in FIG. Figure 1 In some cases, depending on the driving system, the design of the display panel, etc., the data driving circuit 134 may be disposed on both sides of the display panel 130 (eg, on the upper and lower portions of the display panel 130 ).

[0041] The scan driving circuit 133 may be disposed on one side of the display panel 130 (eg, on the right or left side of the display panel 130), as shown in FIG. Figure 1 In some cases, depending on the driving system, the design of the display panel, etc., the scan driving circuit 133 may be disposed on both sides of the display panel 130 (eg, on the right and left sides of the display panel 130 ).

[0042] Each pixel circuit arranged in the display panel 130 may include one or more circuit elements (eg, transistors or capacitors).

[0043] For example, when the display panel 130 is an LCD panel, a pixel electrode may be provided in each pixel circuit, and a transistor may be electrically connected between the pixel electrode and the corresponding data line DL. The transistor may be turned on by a scan signal Vgate supplied to the gate electrode via the scan line GL. When turned on, the transistor may output a data signal Vdata supplied to the source electrode (or drain electrode) via the data line DL to the drain electrode (or source electrode), so that the data signal Vdata is applied to the pixel electrode electrically connected to the drain electrode (or source electrode). An electric field may be generated between the pixel electrode to which the data signal Vdata is applied and the common electrode COM to which the common voltage Vcom is applied, and a capacitance may be generated between the pixel electrode and the common electrode COM.

[0044] The structure of each pixel circuit may be determined differently depending on the type of display panel, the functions provided by the panel, the design, etc.

[0045] In addition, the display device can also integrate other functional modules. For example, a touch-sensing layer, integrated on or within the display panel 130, enables touch input; a 3D display module, which alternately displays left-eye and right-eye images through time division and works with shutter glasses or cylindrical lenses to achieve stereoscopic vision; a flexible display component, where the display panel 130 uses a flexible substrate (such as PI material) that supports bending or folding; a power management module, which provides a stable operating voltage for the display driver circuit 120 and display panel 130; and a heat dissipation structure: for high-brightness display panels (such as Micro-LEDs), heat dissipation fins or heat pipes are provided to ensure long-term reliability.

[0046] At the same time, those skilled in the art will appreciate that, in conjunction with the various exemplary structures and methods described in the embodiments disclosed herein, different configuration methods or adjustment methods can be used for each structure or reasonable variations of the structure to achieve the described functions, but such implementations should not be considered beyond the scope of this application. Furthermore, it should be understood that the connection relationships between the various components of the amplifier in the aforementioned figures in the embodiments of this application are for illustrative purposes only and do not impose any limitations on the embodiments of this application.

[0047] In the embodiment of the present invention, in order to control the power consumption of the display device, a power consumption control module 122 is provided in the display control circuit 120. Figure 2-4 The power consumption control module 122 of the present application is described in detail.

[0048] Figure 2 FIG. 1 is a schematic diagram showing a display control circuit according to an embodiment of the present invention.

[0049] like Figure 2 As shown, the display control circuit 120 includes a display circuit 121 and a device for controlling the display circuit (hereinafter referred to as a power consumption control module 122). The display control circuit 120 receives and processes image signals from the host 110 to generate the scan signals and data signals required to drive the display panel 130. For example, the display circuit 121 converts the signals into synchronization signals for progressive scanning, such as horizontal synchronization signals (HSYNC) and vertical synchronization signals (VSYNC), and generates corresponding drive signals for the scan lines (Gate Line) and data lines (Data Line) based on these synchronization signals. The power consumption control module 122 controls the mode of the display circuit 121 based on the frequency of the vertical synchronization signal.

[0050] The display circuit 121 is the core electronic circuit system responsible for processing, converting, and transmitting image signals, and controlling the display panel's light emission and imaging. Its function is to convert input video signals (such as those from a graphics card, set-top box, or other device) into drive signals that the display panel can recognize, ultimately presenting a clear image on the screen.

[0051] As an example, the core components of the display circuit include a signal processing circuit, a driving circuit, a power management circuit, a timing control circuit, an interface circuit, a protection circuit, and the like.

[0052] Signal processing circuits receive external video signals (such as HDMI, DP, VGA, etc.) and perform processing such as decoding, scaling, noise reduction, and color correction. Signal processing circuits are typically integrated into display circuits in the form of chips, such as image processing chips and video decoding chips.

[0053] The driver circuit directly controls the pixel illumination or liquid crystal deflection of the display panel. For example, in LCD displays, the driver circuit generates row and column drive signals through a timing controller (T-CON) to control the LCD panel's backlight and pixel voltage. For OLED displays, the driver circuit directly controls the current flowing through each pixel through driver ICs (such as source and gate driver ICs), achieving self-luminescence.

[0054] The power management circuit is used to provide stable voltages (such as the LCD backlight voltage, the OLED high-voltage power supply, and the OLED common voltage) to the display panel and driver circuits. The power management circuit includes a buck / boost module, a voltage stabilization circuit, and other components. In embodiments of the present invention, the power management circuit can be directly or indirectly controlled by the power consumption control module 122. For example, the power management circuit can be controlled by the microprocessor in the display circuit 121, and the microprocessor can be controlled by the power consumption control module 122.

[0055] The timing control circuit synchronizes the timing of input signals, for example, by generating vertical and horizontal synchronization signals to ensure the correct image scanning order and prevent screen tearing or flickering. In embodiments of the present invention, the vertical synchronization signal indicates the refresh period of a frame and is a key control signal in the display circuit. Typically, the vertical synchronization signal varies at a fixed frequency to synchronize the transmission and refresh of display data. However, in certain application scenarios, the displayed content may remain unchanged for extended periods. In these cases, the frequency of variation of the vertical synchronization signal may decrease or even cease. Therefore, by accurately detecting the changing edges of the vertical synchronization signal and dynamically controlling the power state of the display circuit accordingly, low power consumption can be more effectively achieved. The changing edges of the vertical synchronization signal include rising and falling edges, which mark the start and end of the refresh of a display frame. The power consumption control module 122 captures the time intervals between these changing edges, sets a threshold, determines whether the refresh frequency of the current displayed content exceeds the threshold, and issues an indication. Based on this indication, the power consumption control module 122 dynamically adjusts the power state of the display circuit, achieving adaptive regulation of circuit power consumption.

[0056] Interface circuits are used to connect display devices to external signal sources (such as HDMI and LVDS). Some devices integrate Type-C interfaces, which support integrated signal and power transmission.

[0057] Protection circuit, used for overvoltage and overcurrent protection to prevent damage to the panel or driver chip due to voltage fluctuations.

[0058] It should be noted that the configuration of the specific components of the display control circuit described above is merely an example provided to more clearly and in detail illustrate the technical solution of the present invention. These examples are not intended to limit the scope of protection of the present invention, nor do they mean that the present invention is limited to the specific circuit structures and components described.

[0059] Figure 3 A schematic diagram of a device for controlling a display circuit according to an embodiment of the present invention is shown; Figure 4 FIG. 4 shows a state transition diagram of a display circuit according to an embodiment of the present invention.

[0060] like Figure 3 As shown, the device for controlling the display circuit (hereinafter referred to as the power consumption control module 122) includes a detection module 1221, a control module 1222 and a configuration module 1223. The power consumption control module 122 is connected to the display circuit 121 and is used to control the mode of the display circuit 121 to save power consumption.

[0061] Detection module 1221 is configured to provide a detection signal based on the vertical synchronization signal from display circuit 121. The detection signal represents the frequency of the vertical synchronization signal. For example, detection module 1221 continuously collects time points at which the vertical synchronization signal changes, calculates the time interval between adjacent edges, and determines the frequency of the vertical synchronization signal based on the calculated time interval.

[0062] In an embodiment of the present invention, the detection module 1221 can be directly connected to the display circuit 121 to sample the vertical synchronization signal, or it can be connected to a host or other part of the drive control circuit to obtain the bit stream data and extract the vertical synchronization signal from the bit stream data. After obtaining the vertical synchronization signal, the detection module 1221 provides a detection signal by detecting the changing edge of the vertical synchronization signal.

[0063] As an example, the detection module 1221 includes: a signal monitoring unit for monitoring the code stream data of the display circuit; a signal extraction unit for extracting a vertical synchronization signal from the code stream data; and a frequency extraction unit for detecting a changing edge of the vertical synchronization signal to provide a detection signal.

[0064] In some specific embodiments, the detection module 1221 or the frequency extraction unit may sample the vertical synchronization signal using a sampling method such as a hardware trigger, a field programmable gate array (FPGA), a microcontroller, a phase-locked loop (PLL), or oversampling technology. Hardware trigger-based sampling, for example, uses a D-type flip-flop to sample the vertical synchronization signal at a predetermined edge of a clock signal. When the vertical synchronization signal arrives, the trigger captures the signal level based on the clock signal state, thereby achieving signal sampling. Field programmable gate array-based sampling, for example, involves programming flexible logic functions. Sampling logic is designed within the FPGA, which uses an internal clock to periodically sample the vertical synchronization signal and store the sampling results in a register. Microcontroller-based sampling, for example, involves connecting the vertical synchronization signal to a general-purpose input / output (GPIO) pin, triggering the sampling operation using a timer interrupt generated by an internal timer, and then reading the GPIO pin level in the timer interrupt service routine to complete the sampling of the vertical synchronization signal. Phase-locked loop-based sampling, for example, tracks the phase and frequency of the input signal and generates an output signal synchronized with the input signal. The vertical synchronization signal is used as the input of a phase-locked loop (PLL). The PLL's feedback mechanism synchronizes the output signal with the vertical synchronization signal. The vertical synchronization signal is sampled at predetermined edges of the output signal, achieving precise sampling. Oversampling, for example, involves sampling at a frequency significantly higher than the vertical synchronization signal. The sampled data is then processed using algorithms such as digital filtering to extract valid information from the vertical synchronization signal.

[0065] The control module 1222 is configured to provide a control signal based on the detection signal to control the mode of the display circuit 121. For example, the control module 1222 is configured to: within a predetermined time period, if the frequency of the vertical synchronization signal is 0, control the display circuit to enter the standby mode; if the frequency of the vertical synchronization signal is less than a predetermined threshold, control the display circuit to enter the low power mode; if the frequency of the vertical synchronization signal is greater than or equal to the predetermined threshold, control the display circuit to enter the working mode.

[0066] The configuration module 1223 is used to set a predetermined threshold and / or a predetermined time period so that the user can adjust the sensitivity of the display circuit power consumption change.

[0067] like Figure 4 As shown, the display circuit 121 can directly switch between any two modes among the standby mode, the low-power mode, and the working mode according to the detection signal. For example, when the display circuit 121 is in the working mode, if the detection module 1221 detects that the frequency of the vertical synchronization signal is 0 (no vertical synchronization signal is detected), the display circuit directly switches to the standby mode; if the detection module 1221 detects that the frequency of the vertical synchronization signal is less than a predetermined threshold, the display circuit directly switches to the low-power mode; when the display circuit 121 is in the low-power mode, if the detection module 1221 detects that the frequency of the vertical synchronization signal is 0 (no vertical synchronization signal is detected), the display circuit directly switches to the standby mode; if the detection module 1221 detects that the frequency of the vertical synchronization signal is greater than or equal to the predetermined threshold, the display circuit directly switches to the working mode; when the display circuit 121 is in the standby mode, if the detection module 1221 detects that the frequency of the vertical synchronization signal is less than the predetermined threshold, the display circuit directly switches to the low-power mode; if the detection module 1221 detects that the frequency of the vertical synchronization signal is greater than or equal to the predetermined threshold, the display circuit directly switches to the working mode.

[0068] In the above embodiments, the standby mode, for example, is to turn off all or most of the signal processing circuits, driving circuits, power management circuits, timing control circuits, interface circuits, protection circuits, etc. in the display circuit 121, and only retain the most basic maintenance circuits to retain the basic wake-up function; the low power consumption mode, for example, is to turn off some unnecessary circuits in the signal processing circuits, driving circuits, power management circuits, timing control circuits, interface circuits, protection circuits, etc. in the display circuit 121, and / or reduce the power supply voltage provided by the power management circuit, and / or control the display circuit to maintain a low frame rate / refresh rate for the display panel; the working mode, for example, is to turn on the signal processing circuits, driving circuits, power management circuits, timing control circuits, interface circuits, protection circuits, etc. in the display circuit 121 normally, so that the display panel can display normally.

[0069] Figure 5A flow chart of a method for controlling a display circuit according to an embodiment of the present invention is shown.

[0070] The method for controlling a display circuit includes steps S101 and S102 .

[0071] In step S101, a detection signal is provided based on a vertical synchronization signal of a display circuit. The detection signal represents the frequency of the vertical synchronization signal. Optionally, providing the detection signal based on the vertical synchronization signal of the display circuit includes: monitoring bit stream data of the display circuit; extracting the vertical synchronization signal from the bit stream data; and detecting a changing edge of the vertical synchronization signal to provide the detection signal.

[0072] In step S102, a control signal is provided based on the detection signal to control the mode of the display circuit. Optionally, within a predetermined time period, if the frequency of the vertical synchronization signal is 0, the display circuit is controlled to enter a standby mode; if the frequency of the vertical synchronization signal is less than a predetermined threshold, the display circuit is controlled to enter a low-power mode; if the frequency of the vertical synchronization signal is greater than or equal to the predetermined threshold, the display circuit is controlled to enter an operating mode, wherein the display circuit directly switches between any two of the standby mode, the low-power mode, and the operating mode based on the detection signal.

[0073] In summary, embodiments of the present invention provide a device and method for controlling a display circuit, as well as a display device incorporating the device and method. By accurately detecting the changing edges of a vertical synchronization signal and dynamically controlling the power state of the display circuit accordingly, the device and method can more effectively reduce the power consumption of the display circuit and achieve adaptive regulation of the power consumption of the display circuit.

[0074] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus comprising the element.

[0075] While embodiments of the present invention have been described above, these embodiments do not exhaustively describe all details and do not limit the invention to the specific embodiments described. Obviously, many modifications and variations are possible based on the above description. These embodiments are selected and described in detail in this specification in order to better explain the principles and practical applications of the present invention, thereby enabling those skilled in the art to better utilize the present invention and its modifications. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A device for controlling a display circuit, comprising: A detection module, configured to provide a detection signal according to a vertical synchronization signal of the display circuit; as well as a control module, providing a control signal according to the detection signal to control the mode of the display circuit, The detection signal represents the frequency of the vertical synchronization signal.

2. The device according to claim 1, wherein The detection module provides the detection signal by detecting a changing edge of the vertical synchronization signal.

3. The device according to claim 1 or 2, wherein: The control module is configured to: If the frequency of the vertical synchronization signal is 0 within a predetermined time period, the display circuit is controlled to enter a standby mode. If the frequency of the vertical synchronization signal is less than a predetermined threshold, the display circuit is controlled to enter a low power consumption mode. If the frequency of the vertical synchronization signal is greater than or equal to a predetermined threshold, the display circuit is controlled to enter a working mode.

4. The device according to claim 3, wherein The display circuit directly switches between any two modes among the standby mode, the low power consumption mode and the working mode according to the detection signal.

5. The device according to claim 3, wherein Also includes: A configuration module is configured to set the predetermined threshold and / or the predetermined time period.

6. The device according to claim 1, wherein The detection module includes: A signal monitoring unit, configured to monitor the code stream data of the display circuit; a signal extraction unit, extracting the vertical synchronization signal from the code stream data; and The frequency extraction unit detects a changing edge of the vertical synchronization signal to provide the detection signal.

7. A display device comprising: The device for controlling a display circuit according to any one of claims 1 to 6; The display circuit enters a corresponding mode and performs a corresponding power state transition according to a control signal provided by the device; as well as The display panel is used for performing light-emitting display according to the driving signal provided by the display circuit.

8. A method for controlling a display circuit, comprising: providing a detection signal according to a vertical synchronization signal of the display circuit; as well as providing a control signal according to the detection signal to control the mode of the display circuit, The detection signal represents the frequency of the vertical synchronization signal.

9. The method according to claim 8, wherein Providing a detection signal according to a vertical synchronization signal of the display circuit includes: monitoring the code stream data of the display circuit; Extracting the vertical synchronization signal from the code stream data; and A changing edge of the vertical synchronization signal is detected to provide the detection signal.

10. The method according to claim 8, wherein If the frequency of the vertical synchronization signal is 0 within a predetermined time period, the display circuit is controlled to enter a standby mode. If the frequency of the vertical synchronization signal is less than a predetermined threshold, the display circuit is controlled to enter a low power consumption mode. If the frequency of the vertical synchronization signal is greater than or equal to a predetermined threshold, the display circuit is controlled to enter a working mode. Wherein, the display circuit directly switches between any two modes among the standby mode, the low power consumption mode and the working mode according to the detection signal.

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