Low-cost power line carrier communication module based on dual-mode adaptive modulation

Abstract

The invention provides a low-cost power line carrier communication module based on dual-mode adaptive modulation. High-precision power consumption estimation is realized through state prediction, Kalman gain calculation, state updating and dynamic noise correction. The power line noise interference variable is collected in real time in combination with the zero-cross detection circuit, the system noise covariance matrix is dynamically optimized, and the anti-interference capacity is remarkably improved; meanwhile, an abnormal electricity utilization detection mechanism is introduced, and when the deviation between an estimated value and an observed value exceeds a threshold value, alarm or remote electricity limiting operation is triggered. The system supports power line carrier and wireless radio frequency dual-mode communication redundancy transmission, executes a Kalman filtering algorithm and a Q-Learning optimization strategy, is suitable for scenes such as an intelligent electric meter and an industrial internet of things, has high reliability, real-time performance and adaptability, and can effectively reduce the peak load of a power grid and improve the power consumption economy of a user.

Description

Technical Field

[0001] The present invention relates to the technical field of power line carrier communication, and in particular to a low-cost power line carrier communication module based on dual-mode adaptive modulation. Background Art

[0002] In traditional power carrier communication systems, power consumption estimation often suffers from inaccurate power line channel noise (such as impedance fluctuations and electromagnetic interference), and a single modulation mode struggles to adapt to dynamic channel changes. Existing solutions often rely on fixed filtering algorithms or static noise models, which are unable to correct for noise interference in real time. This significantly increases the bit error rate, especially in inclement weather or high-load scenarios. Furthermore, the lack of an intelligent decision-making mechanism makes it difficult to coordinate and optimize grid load balancing with user needs.

[0003] Patent CN201510023456.X supports BPSK modulation but does not address dynamic channel adaptability. Patent CN201810567890.1 improves stability through an external impedance matching network, but this increases hardware costs. This invention overcomes these shortcomings through hardware-algorithm collaborative design of Kalman filtering and zero-crossing detection, combining dual-mode communication with edge computing, and redefines the technical boundaries of low-voltage power line communication. Summary of the Invention

[0004] Based on this, it is necessary to provide a low-cost power line carrier communication module based on dual-mode adaptive modulation to address the above technical problems.

[0005] A low-cost power carrier communication module based on dual-mode adaptive modulation, comprising: a power line coupling circuit, a time-domain double-sideband modulation circuit, a power management module, an MCU main control chip module, a radio frequency front-end circuit, and an electronic carrier module communication chip;

[0006] The power line coupling circuit is connected to the power grid through a power line interface for receiving or sending carrier signals; the time domain double sideband modulation circuit is connected to the power line coupling circuit for signal modulation and dynamic optimization; the power management module is connected to the power line coupling circuit, the time domain double sideband modulation circuit, the MCU main control chip module, the RF front-end circuit and the electronic carrier module communication chip for stable power supply and status monitoring; the MCU main control chip module is connected to the power line coupling circuit, the time domain double sideband modulation circuit, the power management module, the RF front-end circuit and the electronic carrier module communication chip for real-time analysis of the channel state through a dynamic channel assessment algorithm, and predicting the target state through a Kalman filter algorithm, while predicting noise and correcting it; the RF front-end circuit is connected to the time domain double sideband modulation circuit for wireless communication link implementation; the electronic carrier module communication chip is connected to the power line coupling circuit, the time domain double sideband modulation circuit, the power management module, the RF front-end circuit and the MCU main control chip module for making an optimal modulation mode decision based on a Q-learning reinforcement learning algorithm.

[0007] In one embodiment, the power line coupling circuit includes: capacitor C104, Zener diode V100, transformer coil T100, Zener diode V101, diode D2, diode D113, diode D112, diode D1, resistor R101, resistor R104, diode D4, diode D114, diode D110, diode D3, resistor R100, resistor R102, resistor R103, resistor R105, capacitor C100, capacitor C101, capacitor C102, capacitor C103, capacitor C105, capacitor C106, and inductor L100;

[0008] The two ends of the voltage stabilizing diode V100 are connected to the serial ports N_PLC and L_PLC respectively, and the capacitor C104 is provided between the serial port N_PLC; the two ends of the voltage stabilizing diode V100 are connected to the serial port 2 and serial port 5 of the transformer coil T100 respectively, and the serial port 1 and serial port 4 of the transformer coil T100 are connected to the two ends of the voltage stabilizing diode V101 respectively; the diode D2 and the diode D113 are connected in parallel, one end is grounded, and the other end is connected to the transformer coil T100. Serial port 1 is connected; the diode D112, the diode D1 and the resistor R101 are connected in parallel, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port V12P0; the resistor R104, the diode D4 and the diode D114 are connected in parallel, one end of which is grounded, and one end is connected to the serial port 4 of the transformer coil T100; the diode D110 and the diode D3 are connected in parallel, one end of which is connected to the serial port 4 of the transformer coil T100, and the other end is connected to the serial port V 12P0 connection; the resistor R100, the capacitor C100 and the capacitor C101 are connected in series, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port RX_P; the resistor R103 and the capacitor C105 are connected in series, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port TX_P, and then connected in parallel with the resistor R100; the resistor R102, the capacitor C102 and the capacitor C103 are connected in series, One end is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port RX_N; the resistor R105 is connected in series with the capacitor C106, one end is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port TX_N, and then connected in parallel with the resistor R102; one end of the inductor element L100 is connected between the capacitor C100 and the capacitor C101, and the other end of the inductor element L100 is connected between the capacitor C102 and the capacitor C103.

[0009] In one embodiment, a time-domain double-sideband modulation circuit includes: a resistor R106, a resistor R107, a control switch Q100, a resistor R108, a resistor R120, a resistor R121, a supercapacitor C108, a supercapacitor C1, an inductor L101, a diode D104, a diode D105, a resistor R114, a resistor R115, a control switch Q101, a resistor R116, a resistor R117, an integrated circuit U102, a resistor R1, a resistor R2, and a capacitor C109;

[0010] The serial port V3P3 is connected to one end of the resistor R106 and the emitter of the control switch Q100. The other end of the resistor R106 and the base of the control switch Q100 are connected to one end of the resistor R107. The other end of the resistor R107 is connected to the serial port CHG_EN. The collector of the control switch Q100 is connected to one end of the resistor R108. The resistor R121, the supercapacitor C108, and the supercapacitor C1 are connected in parallel, with one end grounded and one end connected to the other end of the resistor R108. The resistor R120 One end of the resistor R120 is connected to the other end of the resistor R108, and one end of the resistor R120 is also connected to the serial port ADC0; the other end of the resistor R108 is also connected to the serial port VSCAP; the other end of the resistor R108 is also connected to one end of the inductor L101; the other end of the inductor L101 is connected to the interface 1 of the integrated circuit U102; the other end of the inductor L101 is also connected in series with the diode D104 and the resistor R1. The integrated circuit U102 is connected to the interface 3; the diode D104 and the diode D105 are connected in series and then connected to the serial port VIN; the diode D104 is also connected to the serial port V12P0; one end of the capacitor C109 is connected to the interface 1 of the integrated circuit U102, and the other end of the capacitor C109 is connected to the interface 2 of the integrated circuit U102; one end of the resistor R2 is connected to the interface 3 of the integrated circuit U102, and the other end of the capacitor C109 is connected to the interface 2 of the integrated circuit U102; the integrated circuit U Interface 5 and interface 6 of 102 are connected to serial port V3P3; interface 2 of the integrated circuit U102 is grounded; interface 4 of the integrated circuit U102 is connected to the electrode of the control switch Q101 and one end of the resistor R117; the other end of the resistor R117 is grounded; the emitter of the control switch Q101 is connected to the resistor R115 and then to the serial port V3P3; the base of the control switch Q101 is connected to the resistor R114 and the resistor R116; the resistor R114 is connected to the serial port PWR_IN; and the resistor R116 is grounded.

[0011] In one embodiment, the power management module includes: a zero-crossing voltage detection circuit and a DC-DC power conversion circuit;

[0012] The external input signal of the zero-crossing detection voltage circuit forms a loop through the serial port N_PLC, the capacitor C111, the resistor R110, the diode D101, U100 and the serial port L_PLC, and transmits the signal through the optical coupler to provide timing synchronization and protection trigger signal;

[0013] The DC-DC power conversion circuit is used to provide stable power supply for the entire system and optimize energy efficiency through dynamic regulation.

[0014] In one embodiment, the MCU main control chip module includes: an MCU main control chip and an MCU peripheral circuit;

[0015] The V3P3 interface of the MCU main control chip is connected to the electronic carrier module communication chip; the ADD pin and CH pin of the MCU main control chip are connected to the expansion device for communication; the SPI / I2C interface of the MCU main control chip is connected to the radio frequency front-end circuit for data packaging, verification and protocol conversion;

[0016] The MCU peripheral circuit includes: an LED status indicator light and an I / O port definition configuration circuit; the I / O port definition configuration circuit is connected to the LED status indicator light, and the communication status is displayed through the LED status indicator light.

[0017] In one embodiment, it further includes:

[0018] The V3P3 interface of the electronic carrier module communication chip is connected to the power line carrier signal, and the industrial frequency high voltage is isolated by the high-voltage coupling capacitor C501, capacitor C502, capacitor C503 and capacitor C504, allowing only the carrier high-frequency signal to pass through; the resistor R503 and the resistor R528 form an impedance matching network to adjust the input and output characteristics of the PLC signal and reduce reflection loss; the pin DQ6 and the pin DQ8 are connected to the MCU main control chip module through the radio frequency data line to transmit the modulated wireless signal; the electronic carrier module communication chip integrates a PLC modem, modulates the metering data into a carrier signal, and sends it to the power grid through the serial port V3P3; the pins DQ6 and DQ8 demodulate the remote control instructions when receiving and connect to the external PLC enhancement module to expand the communication bandwidth; the digital signal is modulated into a carrier waveform and output to the power line through the serial port V3P3; the electronic carrier module communication chip enables PLC or wireless mode according to the instructions of the MCU main control chip module.

[0019] In one embodiment, predicting the target state using a Kalman filter algorithm includes:

[0020] The target state is predicted using the following formula:

[0021]

[0022] Among them, x k| k-1 represents the predicted state value at the current moment, P k| k-1 represents the prediction error covariance matrix, F k Represents x k-1 State transition model of state, Bk represents the control model, μk represents the external control quantity, Q k represents the system noise covariance matrix, T represents the matrix transpose;

[0023] Based on the predicted state value, the Kalman gain is calculated:

[0024]

[0025] Among them, K k represents the Kalman gain, H k represents the observation matrix, P k|k-1 represents the prediction error covariance matrix, R k represents the observation noise covariance matrix;

[0026] The state is updated according to the Kalman gain:

[0027]

[0028] Among them, x k|k represents the estimate of the state at time k, x k|k-1 Represents the predicted state value at the current moment, K k represents the Kalman gain, y k represents the measurement residual, P k|k represents the estimate of the observation at time k, H k represents the observation matrix at time k, P k|k-1 represents the forecast error covariance matrix.

[0029] In one embodiment, determining the optimal modulation mode according to the Q-learning reinforcement learning algorithm includes:

[0030] Acquire user electricity usage data, weather data, and electricity price policy from a smart meter, and construct a state feature vector based on the user electricity usage data, the weather data, and the electricity price policy;

[0031] The user's electricity consumption data is clustered and statistically analyzed, and the data is discretized to obtain a specific electricity consumption behavior pattern corresponding to each state;

[0032] Obtain the action strategy corresponding to the preset power consumption behavior pattern;

[0033] A virtual simulation environment was built based on historical electricity consumption and weather data to simulate user responses to electricity price adjustments and peak-shifting instructions. A Q-Learning algorithm was used to train the policy model, defining the reward function as a weighted sum of grid load reduction, user satisfaction, and electricity cost savings. The action strategy was optimized by iteratively updating the Q-value table.

[0034] The trained Q-value table is embedded in the edge computing module of the smart meter to collect grid status data in real time and execute action strategies to obtain the strategy execution effect;

[0035] The strategy execution effect is remotely monitored through the cloud platform, and the Q value table is dynamically updated to adapt to changes in power grid operation.

[0036] Compared with the existing technology, the advantages and beneficial effects of the present invention are: the present invention dynamically corrects the power line noise interference through the Kalman filter algorithm, and combines the zero-crossing detection circuit to optimize the system noise covariance matrix in real time, which significantly improves the accuracy of power consumption estimation and anti-interference ability; adopts dual-mode communication redundancy design (HPLC and HRF) to ensure the reliability of the communication link in harsh environments and avoid the risk of single channel failure. Through the Q-Learning optimization strategy to achieve intelligent decision-making, the system can adaptively adjust the electricity price strategy and load distribution, effectively reducing the peak load of the power grid by 15%, and increasing the user's electricity bill savings by 8%. In addition, the abnormal power consumption detection mechanism and remote control function enhance the security of the power grid, solve the pain points of traditional solutions that rely on static models, high bit error rate and slow response, and have high real-time performance, low cost and wide applicability, providing efficient and reliable communication and energy management solutions for smart meters and industrial Internet of Things. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 Schematic diagram of the structure of a low-cost power line carrier communication module based on dual-mode adaptive modulation in one embodiment;

[0038] Figure 2 is a circuit diagram of a power line coupling circuit in one embodiment;

[0039] Figure 3 1 is a circuit diagram of a time-domain double-sideband modulation circuit in one embodiment;

[0040] Figure 4 1 is a circuit diagram of a zero-crossing detection voltage circuit in one embodiment;

[0041] Figure 5 1 is a circuit diagram of a DC-DC power conversion circuit in one embodiment;

[0042] Figure 6 This is a circuit diagram of an MCU main control chip in one embodiment;

[0043] Figure 7 A schematic diagram of a Kalman filter algorithm operation flow in one embodiment;

[0044] Figure 8 A circuit diagram of an I / O port definition configuration circuit in one embodiment;

[0045] Figure 9 A schematic diagram of a circuit of an LED status indicator light in one embodiment;

[0046] Figure 10 1 is a circuit diagram of a radio frequency front-end circuit in one embodiment;

[0047] Figure 11 Schematic diagram of a circuit of an electronic carrier module communication chip in one embodiment;

[0048] Figure 12 The figure is a schematic diagram of a process for implementing mode adaptive switching based on a Q-learning reinforcement learning framework in one embodiment. DETAILED DESCRIPTION

[0049] Before describing the specific embodiments of the present invention, the overall concept of the present invention is described as follows:

[0050] The present invention is mainly developed based on the power line carrier communication modulation process. The OFDM modulation technology in traditional power communication has large signal instantaneous power fluctuations, weak anti-interference ability, sensitivity to phase noise, insufficient dynamic channel adaptability, challenges in electromagnetic compatibility, severe high-frequency signal attenuation, and difficulty in remote monitoring of user abnormalities.

[0051] Therefore, the present invention proposes a low-cost power line carrier communication module based on dual-mode adaptive modulation. This module uses a dual-mode hybrid modulation algorithm to address the above issues. Its core component, the HZ3211 chip, uses the dynamic channel algorithm in dual-mode hybrid modulation technology to evaluate channel states. It implements adaptive line switching through Q-learning, overcoming various interferences on low-voltage power lines for highly reliable data transmission. It features high speeds and strong resistance to power line interference. It also has broadband power line carrier communication (HPLC) and wireless communication (HRF) capabilities, enabling dual-channel automatic fusion networking for greater flexibility. It can also function as a STA / PCO during communications.

[0052] After introducing the overall concept of the present invention, in order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below through specific implementation methods in conjunction with the accompanying drawings.

[0053] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in one or more embodiments of this specification should have the usual meanings understood by people with ordinary skills in the field to which the invention belongs. The words "first", "second" and similar terms used in one or more implementations of this specification do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0054] In one embodiment, Figure 1 As shown, a low-cost power carrier communication module based on dual-mode adaptive modulation is provided, including: a power line coupling circuit 10, a time domain double-sideband modulation circuit 11, a power management module 12, an MCU main control chip module 13, a radio frequency front-end circuit 14 and an electronic carrier module communication chip 15.

[0055] The power line coupling circuit 10 is connected to the power grid via a power line interface and is used to receive or send a carrier signal.

[0056] like Figure 2 As shown, the power line coupling circuit 10 includes: a capacitor C104, a Zener diode V100, a transformer coil T100, a Zener diode V101, a diode D2, a diode D113, a diode D112, a diode D1, a resistor R101, a resistor R104, a diode D4, a diode D114, a diode D110, a diode D3, a resistor R100, a resistor R102, a resistor R103, a resistor R105, a capacitor C100, a capacitor C101, a capacitor C102, a capacitor C103, a capacitor C105, a capacitor C106 and an inductor L100;

[0057] The two ends of the voltage stabilizing diode V100 are connected to the serial ports N_PLC and L_PLC respectively, and the capacitor C104 is provided between the serial port N_PLC; the two ends of the voltage stabilizing diode V100 are connected to the serial port 2 and serial port 5 of the transformer coil T100 respectively, and the serial port 1 and serial port 4 of the transformer coil T100 are connected to the two ends of the voltage stabilizing diode V101 respectively; the diode D2 and the diode D113 are connected in parallel, one end is grounded, and the other end is connected to the transformer coil T100. Serial port 1 is connected; the diode D112, the diode D1 and the resistor R101 are connected in parallel, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port V12P0; the resistor R104, the diode D4 and the diode D114 are connected in parallel, one end of which is grounded, and one end is connected to the serial port 4 of the transformer coil T100; the diode D110 and the diode D3 are connected in parallel, one end of which is connected to the serial port 4 of the transformer coil T100, and the other end is connected to the serial port V 12P0 connection; the resistor R100, the capacitor C100 and the capacitor C101 are connected in series, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port RX_P; the resistor R103 and the capacitor C105 are connected in series, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port TX_P, and then connected in parallel with the resistor R100; the resistor R102, the capacitor C102 and the capacitor C103 are connected in series, One end is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port RX_N; the resistor R105 is connected in series with the capacitor C106, one end is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port TX_N, and then connected in parallel with the resistor R102; one end of the inductor element L100 is connected between the capacitor C100 and the capacitor C101, and the other end of the inductor element L100 is connected between the capacitor C102 and the capacitor C103.

[0058] The power line coupling circuit 10 (PLCAFE circuit) plays a crucial role in power signal transmission. When the left side is lightly loaded, the module's microcontroller sends or receives data via serial ports RX_P, TX_P, RX_N, and TX_N. The module uses transformer coil T100 to transmit the signal via the power cable to the backend or other data transmission base station. Zener diode V101 in the figure reduces transient interference signal voltage fluctuations during data transmission. Meanwhile, diodes D2, D113, D112, and D1 clamp the voltage to prevent the signal from falling below GND, a negative voltage, thus preventing module damage. D112 and D1 also provide reverse protection, shaping the signal. R101 limits the line current, maintaining high impedance. The diode provides transient protection, while the resistor maintains normal line operation, minimizing signal attenuation during transmission, improving signal immunity, and reducing transient power fluctuations.

[0059] The time-domain double-sideband modulation circuit 11 is connected to the power line coupling circuit 10 for signal modulation and dynamic optimization.

[0060] like Figure 3 As shown, the time-domain double-sideband modulation circuit 11 includes: a resistor R106, a resistor R107, a control switch Q100, a resistor R108, a resistor R120, a resistor R121, a supercapacitor C108, a supercapacitor C1, an inductor L101, a diode D104, a diode D105, a resistor R114, a resistor R115, a control switch Q101, a resistor R116, a resistor R117, an integrated circuit U102, a resistor R1, a resistor R2, and a capacitor C109;

[0061] The serial port V3P3 is connected to one end of the resistor R106 and the emitter of the control switch Q100. The other end of the resistor R106 and the base of the control switch Q100 are connected to one end of the resistor R107. The other end of the resistor R107 is connected to the serial port CHG_EN. The collector of the control switch Q100 is connected to one end of the resistor R108. The resistor R121, the supercapacitor C108, and the supercapacitor C1 are connected in parallel, with one end grounded and one end connected to the other end of the resistor R108. The resistor R120 One end of the resistor R120 is connected to the other end of the resistor R108, and one end of the resistor R120 is also connected to the serial port ADC0; the other end of the resistor R108 is also connected to the serial port VSCAP; the other end of the resistor R108 is also connected to one end of the inductor L101; the other end of the inductor L101 is connected to the interface 1 of the integrated circuit U102; the other end of the inductor L101 is also connected in series with the diode D104 and the resistor R1. The integrated circuit U102 is connected to the interface 3; the diode D104 and the diode D105 are connected in series and then connected to the serial port VIN; the diode D104 is also connected to the serial port V12P0; one end of the capacitor C109 is connected to the interface 1 of the integrated circuit U102, and the other end of the capacitor C109 is connected to the interface 2 of the integrated circuit U102; one end of the resistor R2 is connected to the interface 3 of the integrated circuit U102, and the other end of the capacitor C109 is connected to the interface 2 of the integrated circuit U102; the integrated circuit U Interface 5 and interface 6 of 102 are connected to serial port V3P3; interface 2 of the integrated circuit U102 is grounded; interface 4 of the integrated circuit U102 is connected to the electrode of the control switch Q101 and one end of the resistor R117; the other end of the resistor R117 is grounded; the emitter of the control switch Q101 is connected to the resistor R115 and then to the serial port V3P3; the base of the control switch Q101 is connected to the resistor R114 and the resistor R116; the resistor R114 is connected to the serial port PWR_IN; and the resistor R116 is grounded.

[0062] In the time-domain double-sideband modulation circuit 11 (TDSB circuit), when the CHG_EN signal is activated, Q100 conducts, activating the supercapacitor charging circuit. The supercapacitor is charged via a current-limiting resistor (e.g., R107 = 30kΩ) or an inductor. The inclusion of capacitors in the circuit improves the module's electromagnetic compatibility. Overvoltage protection can be implemented using a combination of resistor divider and the chip's feedback pin (FB) to ensure the capacitor does not exceed the 2.7V threshold. The feedback network (R116 = 250kΩ and R2) divides the Vout voltage and feeds it to the chip's FB pin. The chip adjusts the duty cycle to maintain Vout = 0.6*(1+R1 / R2). If a 3.3V output is required, the R1 / R2 ratio is approximately 4.5:1. Key signals CHG_EN and EN are controlled by an external MCU, allowing for flexible charging and output adjustments. Software control of this port enables dynamic dual-mode switching of the module.

[0063] The power management module 12 is connected to the power line coupling circuit 10, the time domain double sideband modulation circuit 11, the MCU main control chip module 13, the radio frequency front end circuit 14 and the electronic carrier module communication chip 15 for stable power supply and status monitoring.

[0064] The power management module 12 includes a zero-crossing voltage detection circuit and a DC-DC power conversion circuit.

[0065] like Figure 4 As shown, the external input signal of the zero-crossing detection voltage circuit forms a loop through the serial port N_PLC, capacitor C111, resistor R110, diode D101, U100 and serial port L_PLC, and transmits the signal through the optocoupler to provide timing synchronization and protection trigger signal.

[0066] like Figure 5 As shown in FIG, the DC-DC power conversion circuit is used to provide stable power supply for the entire system and optimize energy efficiency through dynamic adjustment.

[0067] The DC-DC power conversion circuit primarily handles power switching, status detection, and signal adaptation for communication. The BL3121486 chip (synchronous buck controller) efficiently converts the input 12V power source (such as the power line or external adapter) to 3.3V, powering the digital logic circuits (MCU and communication chip). The output voltage is set by the feedback resistor network (R1 / R2): Vout = 0.6*(1+R1 / R2) (when R1 = 200kΩ and R2 = 100kΩ, the output is 3.3V). An inductor (L22 / 2500) and a filter capacitor (such as a 2.4F / 39V supercapacitor) suppress ripple, ensuring low-voltage output stability and reducing high-frequency signal attenuation. Furthermore, a voltage divider resistor (such as 100kΩ / 29MΩ) and a comparator circuit detect whether the 12V input is normal and output a logic signal (such as a high / low level) to the MCU, triggering power failure protection or mode switching.

[0068] The MCU main control chip module 13 is connected to the power line coupling circuit 10, the time domain double-sideband modulation circuit 11, the power management module 12 and the RF front-end circuit 14, and is used to analyze the channel status in real time through the dynamic channel evaluation algorithm, and predict the target state through the Kalman filter algorithm, while predicting the noise and correcting it.

[0069] The MCU main control chip module 13 includes: an MCU main control chip and an MCU peripheral circuit.

[0070] The V3P3 interface of the MCU main control chip is connected to the electronic carrier module communication chip; the ADC pin and CH pin of the MCU main control chip are connected to the expansion device for communication; the SPI / I2C interface of the MCU main control chip is connected to the RF front-end circuit for data packaging, verification and protocol conversion.

[0071] like Figure 6 The figure shows the MCU main control chip, which is used to control the I / O port circuit of the MCU peripheral circuit. It is used for dual-mode communication control and protocol processing mode switching logic (V3P3). The enable signal (EN) of the external dual-mode communication chip (such as the power line carrier chip and wireless module) is controlled through GPIO (such as V3P3) to achieve dynamic mode switching. The ADD (address bus) and CH (channel selection) pins are used to expand multi-device communication and support multi-node networking. It interacts with the external RF chip or modem through SPI / I2C (such as the SP100 interface) to complete data packaging, verification and protocol conversion.

[0072] The system also performs signal modulation and data processing, utilizing the MCU's built-in PWM module to generate carrier modulation signals (such as FSK and PSK waveforms), smoothing the output through a filter capacitor to drive the power line coupling circuit. The VCORE pin powers the MCU core, ensuring high-speed computing stability. The power line carrier signal is acquired in real time through the ADC channel, and the dynamic channel assessment algorithm and Q-learning algorithm are used to restore the original data and reduce phase noise interference. Capacitor C131 is used in the hardware for high-frequency noise suppression, improving sampling accuracy.

[0073] The MCU main control chip uses a dynamic channel evaluation algorithm to analyze the channel status in real time, and uses the Kalman filter algorithm to predict the target state, while also predicting and correcting the noise.

[0074] The core goal of the Dynamic Channel Assessment Algorithm (DCA) is to obtain channel status information in real time, track channel changes, adaptively switch modes according to the current state, and optimize module system performance through algorithms. In order to meet the characteristics of dynamic tracking, the prediction and update characteristics of the Kalman filter algorithm are used, and in the above Figure 7The algorithm is executed in the hardware MCU processing unit. Its core is to predict the target state and the noise at the same time and correct it, which can effectively suppress the noise and reduce the fluctuation of the instantaneous power of the signal.

[0075] When signal data is transmitted through electricity, the process is accompanied by noise interference or data loss, which increases the fluctuation of the instantaneous power of the signal. Therefore, the current state is defined as x k The dynamic characteristics of the system are F k , is x k-1 State transformation model, add control model B k ,ω k is the process error, where is the process noise, and the state equation of the Kalman filter is obtained:

[0076] x k =F k x k-1 +B k μ k +ω k

[0077] Assume that its mean is zero and the covariance matrix Q(k) conforms to the multivariate normal distribution ω k ~N(0,Q k ), where cov{ω k}=Q(k) is the covariance matrix.

[0078] For the real state x k To make a prediction, write the observation equation:

[0079] z k =H k x k +υ k

[0080] Among them H k is the observation model, υ k is the observation noise, which includes data interference and data loss in the statistical system process, and has a mean of zero. The covariance matrix is ​​R k Normal distribution:

[0081] υ k ~N(0,R k )

[0082] where cov{υ k}=R(k) is the covariance matrix, and each of the above noises is independent of each other.

[0083] The Kalman filter state is represented by the following two variables:

[0084] X k|k =E(X k|Y1,Y2,...,Y k ) represents the estimate of the state at time k.

[0085] X k|k-1 =E(X k-1 |Y1,Y2,...,Y k-1 ) represents the prediction of the state at time k given the state at the past k-1 moments.

[0086] P k|k is the estimated error covariance matrix, which measures the accuracy of the estimated value.

[0087] Use the linear mathematical model to bring in the data from the previous moment, predict the current state value and error value, add the current observation value, and make corrections to get a value that is infinitely close to the true value.

[0088] like Figure 7 As shown in the Kalman filter algorithm operation flow chart, taking the power consumption statistics as an example, when the module is working, the algorithm is based on the current system status data obtained by the carrier module at the previous moment, that is, the power consumption. In the prediction step, the estimated power value at the current moment is predicted. The predicted value is the error covariance matrix, which is calculated by the error covariance matrix of the previous moment and the system noise equation matrix. It includes the noise interference during the module operation. The noise interference is calculated by Figure 4 The zero-crossing detection circuit detects the interference amount, combines the algorithm to count the noise of the previous moment in real time, and uses it as the calculation amount of the prediction value of the next moment.

[0089]

[0090] According to the above current predicted value x k|k-1 With the observed value P k|k-1 , calculates the current state estimate, i.e., the power consumption. This value includes the current observation value and is more accurate. The error covariance matrix of the state estimate is calculated using the error covariance matrix from the prediction step, the observation noise covariance matrix, and the Kalman gain.

[0091]

[0092] In the last update step: calculate the measurement residual y k , measurement residual covariance S k and the Kalman gain K k .

[0093]

[0094] Substituting the optimal Kalman gain back into the above equation, we can get the updated state estimate, i.e., the power consumption.

[0095]

[0096] When dealing with noise interference in the line, the algorithm predicts the current state value through the numerical value of the previous moment, calculates the observation value, and obtains the state error and observation error between the two. After correcting the error with the Kalman gain value, the true value can be obtained.

[0097] The MCU peripheral circuits include: LED status display lights and I / O port definition configuration circuits.

[0098] The I / O port definition configuration circuit is connected to the LED status indicator, and the communication status is displayed through the LED status indicator. Figure 8 As shown, it is the IO port signal port. The LED status indicator is as follows Figure 9 As shown, it shows the current status of serial port data transmission. When the light flashes, it means the signal is being sent, received and transmitted.

[0099] The RF front-end circuit 14 is connected to the time-domain double-sideband modulation circuit 11 for realizing a wireless communication link.

[0100] like Figure 10 As shown, the RF front-end circuit 14 is the core of wireless communication, responsible for RF signal transmission and reception, mode switching, filtering and matching, and anti-interference processing, supporting power line carrier (PLC) and wireless RF. Antenna interface and matching network (ANT, L400-L407). ANT (antenna port) forms an impedance matching network (4.7μH inductor and 100pF capacitor form an LC network) through inductors (L400-L407) and capacitors (C400-C403) to ensure impedance matching (typically 50Ω) between the antenna and the RF front-end (RTIC6603SP chip) to maximize signal transmission efficiency. Frequency tuning, inductance values ​​(4.7μH, 50nH) and capacitance values ​​(22pF, 100pF) are designed for the target high frequency band (433MHz, 2.4GHz) to filter out non-working frequency band interference. The RF transceiver chip, which integrates a PA (power amplifier) ​​and LNA (low-noise amplifier), is responsible for modulating baseband signals into RF signals, amplifying them through the PA and transmitting them through the antenna. Alternatively, it receives weak signals from the antenna, amplifies them through the LNA, and demodulates them into baseband signals. Chip peripheral circuits (such as C476 and C403) provide power supply decoupling (VC pin filtering) and signal conditioning to ensure stable chip operation.

[0101] The mode switching switches (SW_GP1, SW_GP2) control the signal path through the SPDT switches (SW_GP1, SW_GP02) as follows.

[0102] Mode 1 (PLC-dominant): The switch connects the antenna to the PLC coupling circuit (not shown), and the power line carrier signal is transmitted through the coupler. Mode 2 (Wireless-dominant): The switch switches to the RF front end (RTIC6603SP), enabling the wireless communication link.

[0103] The VC1 / RF1 / RF2 control signals come from the MCU, dynamically switching operating modes (for example, activating wireless backup during a power line failure). Bandpass filtering (L403, C403): A 4.7μH inductor and a 22pF capacitor form an LC filter to suppress out-of-band noise (such as power frequency harmonics). Isolation (L405, 50nH inductor): Prevents the transmitted signal from returning to the receiver, reducing self-interference. The VC (power supply pin) filters high-frequency noise through a 100pF capacitor (C401) and a 5.6mm inductor (L402), ensuring clean power supply to the RF chip. VC1 (control voltage), which may be the PA / LNA bias voltage, is stabilized by a 500pF capacitor (C476) to prevent power fluctuations. The GND network uses a multi-point grounding design to reduce ground loop impedance and common-mode interference. An RC snubber circuit (150pF + 50Ω) absorbs transient spikes (surge diodes during switching).

[0104] The electronic carrier module communication chip 15 is connected to the power line coupling circuit 10, the time domain double-sideband modulation circuit 11, the power management module 12, the radio frequency front-end circuit 14 and the MCU main control chip module 13, and is used to make the optimal modulation mode decision based on the Q-learning reinforcement learning algorithm.

[0105] like Figure 11 As shown, the electronic carrier module communication chip 15 has core functions including dual-mode signal coupling, data modulation and demodulation, power management and mode switching control, and supports the coordinated or independent operation of power line carrier (PLC) and wireless radio frequency.

[0106] V3P3 is the power line carrier signal input / output port. High-voltage coupling capacitors (C501-C504) isolate the power frequency high voltage, allowing only the high-frequency carrier signal to pass. R503 (6kΩ) and R528 (250Ω) form an impedance matching network to adjust the input and output characteristics of the PLC signal and reduce reflection loss. DQ6 / DQ8 are RF data lines (SPI or a custom serial interface) connecting the RF chip and the MCU, transmitting the modulated wireless signal. The chip integrates a PLC modem, which modulates metering data into a carrier signal (FSK / OFDM) and transmits it to the power grid via V3P3. Upon reception, it demodulates remote control commands. The DQ6 / DQ8 pins can be connected to an external PLC enhancement module (such as a broadband carrier chip) to expand communication bandwidth. The digital signal is modulated into a carrier waveform (FSK / PSK) and output to the power line via V3P3. RF transceiver control: DQ6 / DQ8 interacts with an external RF module (RTIC6603SP) to manage the wireless link. PLC or wireless mode is enabled based on MCU instructions. C507 (22pF) and L (inductor) form an RF filter network to suppress high-frequency noise interference. R516 (1% precision resistor) and D97 / D98 (diodes) are used for signal level clamping and ESD protection to prevent overvoltage damage to the chip.

[0107] The electronic carrier module communication chip 15 makes an optimal modulation mode decision based on the Q-learning reinforcement learning algorithm.

[0108] On this basis, the optimal modulation mode decision is made according to the Q-learning reinforcement learning algorithm, including:

[0109] Acquire user electricity usage data, weather data, and electricity price policy from a smart meter, and construct a state feature vector based on the user electricity usage data, the weather data, and the electricity price policy;

[0110] The user's electricity consumption data is clustered and statistically analyzed, and the data is discretized to obtain a specific electricity consumption behavior pattern corresponding to each state;

[0111] Obtain the action strategy corresponding to the preset power consumption behavior pattern;

[0112] A virtual simulation environment was built based on historical electricity consumption and weather data to simulate user responses to electricity price adjustments and peak-shifting instructions. A Q-Learning algorithm was used to train the policy model, defining the reward function as a weighted sum of grid load reduction, user satisfaction, and electricity cost savings. The action strategy was optimized by iteratively updating the Q-value table.

[0113] The trained Q-value table is embedded in the edge computing module of the smart meter to collect grid status data in real time and execute action strategies to obtain the strategy execution effect;

[0114] The strategy execution effect is remotely monitored through the cloud platform, and the Q value table is dynamically updated to adapt to changes in power grid operation.

[0115] Taking into account the adaptive mode switching, based on Figure 11 The electronic carrier module communication chip uses a reinforcement learning framework based on Q-learning to achieve mode adaptive switching. Figure 12 As shown in the figure, Q is Q(s,a), where s corresponds to the state, a corresponds to the action, and the expectation of the benefit of taking action in a certain state. The environment responds accordingly based on the state feedback of the power carrier module, overcoming the problem of insufficient adaptability of the electronic carrier module in dynamic channels. The core of the algorithm is to construct a Q value table based on the action and state to store the Q value.

[0116] This algorithm monitors user electricity usage data, including demand response, abnormal usage, and user electricity forecasts. Taking electricity demand as an example, it incentivizes users to shift their electricity consumption to high-load periods through electricity pricing, thus reducing peak pressure on the power grid.

[0117] The load of the current power grid is divided into three levels: low, medium and high. The user's 24-hour electricity consumption data and real-time electricity price signals (the price changes dynamically over time) are used as state quantities (State).

[0118] The action quantity (Action) is to send suggestions for adjusting electricity consumption to users and dynamically adjust the electricity price by time period.

[0119] The rewards are based on the reduction of grid load, user satisfaction and grid operation cost. Build a Q value table:

[0120] Q(s,a)←Q(s,a)+α[γmax a` Q(s`,a`)-Q(s,a)]

[0121] α: learning rate, γ: discount factor.

[0122] The specific implementation steps are as follows:

[0123] 1. Obtain user electricity usage data (power, timestamp, device type) from smart meters, combine it with weather data (temperature, humidity) and electricity price policies, and build state features.

[0124] 2. After collecting the user's electricity consumption data through the meter, perform category clustering statistics and discretize the continuous consumption data into finite states. Formulate the current action strategy, such as when staggering electricity consumption, the grid load level does not exceed the highest level. And feedback after electricity consumption, including electricity price adjustment,

[0125] 3. Use big data models to simulate user response behaviors in a virtual environment and train the Q-Learning model.

[0126] 4. Embed the trained model strategy into the smart meter to implement decision-making and remotely adjust the strategy dynamically.

[0127] After the strategy was tested in the pilot area, the peak load in the area was reduced by 15%, and users saved 8% on electricity bills.

[0128] The use of the present invention is described in detail below with reference to an embodiment.

[0129] 1. Press Figure 5 Weld the DC-DC power conversion circuit, set R1 = 4.7K, R2 = 10K, and output Vout = 3.3V.

[0130] High-efficiency DC / DC power module: Using the BL3121AM6G chip, it dynamically adjusts the feedback resistors (R1 / R2) to achieve multiple output voltages (3.3V / 5V / 12V) to meet the power supply requirements of different modules.

[0131] 2. Press Figure 8 Connect the PA1450 chip and configure the LNA gain control resistors (R400-R403) to 4.7K to achieve three-level gain adjustment. RF Power Amplifier (PA): Uses the PA1450 chip and combines it with the LNA gain control circuit (LNA GAIN CTR0-2) to improve signal transmission power and receive sensitivity.

[0132] 3. Press Figure 5 Connect GPIO42 / 43 of the MCU main control chip to the PA_TX_EN and PA_RX_EN pins respectively for mode switching.

[0133] 4.PLC analog front end (AFE): Based on zero-crossing detection (ZEROCROSS) technology, it realizes signal synchronization and pulse triggering, and supports 09 / 13 protocol compatible design (by configuring pull-up resistors and open-drain output).

[0134] 5. Dual-mode communication controller: Built-in MCU (QJ5582D) and multi-protocol stack, supports automatic switching of communication modes (such as power line carrier and RF wireless dual-mode).

[0135] Step 2: Software Configuration

[0136] 1. Initialize the MCU main control chip, load the dual-mode protocol stack, and enable the power line communication mode by default.

[0137] 2. When the signal strength is detected to be lower than the threshold (sampled by ADC1), it switches to RF mode and activates the PA_RX_EN signal.

[0138] 3. Trigger an interrupt through the EVENT_EX pin to achieve real-time mode switching response (response time <10ms).

[0139] Step 3: Anti-interference optimization

[0140] 1. Connect a 10K resistor (R222 / R223) and a Schottky diode (D201) in parallel at the PLC input to suppress inrush current.

[0141] 2. Add a 22μF tantalum capacitor (C203) at the output of the power management module to filter out high-frequency ripple.

[0142] Step 3: Implementation Effect

[0143] 1. Improved communication distance: Power line communication distance reaches 500 meters, and radio frequency communication covers 200 meters.

[0144] 2. Enhanced compatibility: supports 09 / 13 protocols and custom protocols, and the adaptation rate is increased to 98%.

[0145] 3. Reduced energy consumption: Overall power consumption is less than 1.5W, which is 30% less than traditional solutions.

[0146] 4. After the module is installed and powered on normally, the red and green lights will be on.

[0147] 5. After connecting to the broadband meter controller (or broadband concentrator), the green light (on the left) on the module flashes quickly to start networking. After the networking is successful, both the red and green lights go out, and you can start reading the electricity meter data.

[0148] 6. Users can use the universal DL / T 645-2007 meter reading software to read the meter. When reading data, the module indicator lights RXD (green) and TXD (red) flash alternately.

[0149] This invention provides a low-cost power line carrier communication module based on dual-mode adaptive modulation. It employs dual-algorithm modulation. When operating in the 2-12 MHz wide frequency band, the power line carrier (HPLC) achieves a high data rate of 50 Mbps with dynamic subcarrier allocation (up to 4096-QAM). Experimental results demonstrate a communication success rate of up to 99.2%.

[0150] The wireless communication (HRF) 470-510MHz frequency band provides a backup channel to resist grid noise, and the dual-channel automatic switching delay is less than 50ms (measured data). The default communication parameters are 8 data bits, 1 stop bit, even parity, and supported communication rates of 1200bps, 2400bps, 4800bps, and 9600bps.

[0151] The present invention provides an intelligent networking mode with dynamic role switching (STA / PCO) to support Mesh network self-repair. When a node fails, the path reconstruction time is less than 3 seconds (80% shorter than the single HPLC solution).

[0152] The HR3221 SoC design features an integrated analog front end (AFE) supporting a 120dB dynamic range ADC, enabling direct coupling of power line signals (eliminating the need for an external attenuation network). Physical layer baseband processing latency is <1us, meeting the <5ms end-to-end response requirement of State Grid Q / GDW 12073-2020.

[0153] An Advanced Metering Infrastructure (AMI) has been built, enabling meter reading in seconds: data from 100,000 meters can be collected in 15 minutes (State Grid standards require ≤ 4 hours). Accurate cost control: The remote trip command execution success rate reaches 99.99% (via a dual-channel confirmation mechanism). Grid status awareness: Leveraging the channel characteristics of the 2-12MHz frequency band, impedance spectroscopy analysis detects line aging (resolution 0.10), and harmonic distortion monitoring (THD <1% accuracy).

[0154] It can carry multiple services and support simultaneous transmission of: metering data (DL / T645-2007 protocol), power outage event reporting (<100ms latency), and firmware over-the-air upgrades (OTA, rate >2Mbps).

[0155] Deeply compatible with State Grid, the mechanical interface complies with Q / GDW 10355-2020:: 34mmx34mm module size; metal shielding shell design (EMC Level IV) protocol stack supports: broadband carrier communication standard Q / GDW 11612-2016, wireless HRF interoperability specification.

[0156] It can realize intelligent spectrum management. Through dynamic frequency band switching strategy, when it detects grid noise >60dBuV, it will automatically hop to use the 1.7-3MHz frequency band to avoid interference from home appliances.

[0157] Improved meter reading success rate, maintained at 99.93% in severe weather (traditional square room ≤ 98%), operation and maintenance efficiency, fault location time shortened from 4 hours to 15 minutes, power outage event reporting accuracy 100% (false alarm rate <0.001%)

[0158] Compared with the fiber optic solution, the cabling cost is reduced by RMB 23 million per 10,000 cables. The wireless channel reduces the use of repeaters by 60%.

[0159] This invention has the potential for technological expansion. As an LPWAN terminal access unit, it forms a "PLC+5G" heterogeneous network with a 5G base station. The chip has a reserved AI acceleration interface, which can deploy a line loss analysis model (supporting TensorFlow Lite microcontroller version). This solution redefines the capability boundaries of low-voltage power line communication through physical layer technology innovation and dual-mode collaboration mechanism. Its value is not only reflected in current meter reading scenarios, but also provides infrastructure-level support for building a new type of power Internet of Things.

[0160] It should be noted that the above description is limited to some embodiments of the present invention. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recited in the claims may be performed in an order different from that described in the above embodiments and still achieve the desired results. Furthermore, the processes depicted in the accompanying drawings do not necessarily require the specific order or sequential order shown to achieve the desired results. In certain embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0161] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present invention (including the claims) is limited to these examples. Within the scope of the present invention, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present invention as described above, which are not provided in detail for the sake of simplicity.

[0162] While specific details have been set forth to describe exemplary embodiments of the present invention, it will be apparent to those skilled in the art that embodiments of the present invention may be practiced without or with variations in these specific details. Therefore, these descriptions should be considered illustrative rather than restrictive. Although the present invention has been described in conjunction with specific embodiments thereof, many alternatives, modifications, and variations of these embodiments will be apparent to those skilled in the art in light of the foregoing description.

[0163] The embodiments of the present invention are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present invention should be included in the scope of protection of the present invention.

Claims

1. A low-cost power carrier communication module based on dual-mode adaptive modulation, characterized in that: include: Power line coupling circuit, time domain double sideband modulation circuit, power management module, MCU main control chip module, RF front-end circuit and electronic carrier module communication chip; The power line coupling circuit is connected to the power grid through a power line interface for receiving or sending carrier signals; the time domain double sideband modulation circuit is connected to the power line coupling circuit for signal modulation and dynamic optimization; the power management module is connected to the power line coupling circuit, the time domain double sideband modulation circuit, the MCU main control chip module, the RF front-end circuit and the electronic carrier module communication chip for stable power supply and status monitoring; the MCU main control chip module is connected to the power line coupling circuit, the time domain double sideband modulation circuit, the power management module, the RF front-end circuit and the electronic carrier module communication chip for real-time analysis of the channel state through a dynamic channel assessment algorithm, and predicting the target state through a Kalman filter algorithm, while predicting noise and correcting it; the RF front-end circuit is connected to the time domain double sideband modulation circuit for wireless communication link implementation; the electronic carrier module communication chip is connected to the power line coupling circuit, the time domain double sideband modulation circuit, the power management module, the RF front-end circuit and the MCU main control chip module for making an optimal modulation mode decision based on a Q-learning reinforcement learning algorithm.

2. A low-cost power line carrier communication module based on dual-mode adaptive modulation according to claim 1, characterized in that: The power line coupling circuit includes: capacitor C104, Zener diode V100, transformer coil T100, Zener diode V101, diode D2, diode D113, diode D112, diode D1, resistor R101, resistor R104, diode D4, diode D114, diode D110, diode D3, resistor R100, resistor R102, resistor R103, resistor R105, capacitor C100, capacitor C101, capacitor C102, capacitor C103, capacitor C105, capacitor C106 and inductor L100; The two ends of the voltage stabilizing diode V100 are connected to the serial ports N_PLC and L_PLC respectively, and the capacitor C104 is provided between the serial port N_PLC; the two ends of the voltage stabilizing diode V100 are connected to the serial port 2 and serial port 5 of the transformer coil T100 respectively, and the serial port 1 and serial port 4 of the transformer coil T100 are connected to the two ends of the voltage stabilizing diode V101 respectively; the diode D2 and the diode D113 are connected in parallel, one end is grounded, and the other end is connected to the transformer coil T100. Serial port 1 is connected; the diode D112, the diode D1 and the resistor R101 are connected in parallel, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port V12P0; the resistor R104, the diode D4 and the diode D114 are connected in parallel, one end of which is grounded, and one end is connected to the serial port 4 of the transformer coil T100; the diode D110 and the diode D3 are connected in parallel, one end of which is connected to the serial port 4 of the transformer coil T100, and the other end is connected to the serial port V 12P0 connection; the resistor R100, the capacitor C100 and the capacitor C101 are connected in series, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port RX_P; the resistor R103 and the capacitor C105 are connected in series, one end of which is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port TX_P, and then connected in parallel with the resistor R100; the resistor R102, the capacitor C102 and the capacitor C103 are connected in series, One end is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port RX_N; the resistor R105 is connected in series with the capacitor C106, one end is connected to the serial port 1 of the transformer coil T100, and the other end is connected to the serial port TX_N, and then connected in parallel with the resistor R102; one end of the inductor element L100 is connected between the capacitor C100 and the capacitor C101, and the other end of the inductor element L100 is connected between the capacitor C102 and the capacitor C103.

3. A low-cost power line carrier communication module based on dual-mode adaptive modulation according to claim 1, characterized in that: The time-domain double-sideband modulation circuit includes: a resistor R106, a resistor R107, a control switch Q100, a resistor R108, a resistor R120, a resistor R121, a supercapacitor C108, a supercapacitor C1, an inductor L101, a diode D104, a diode D105, a resistor R114, a resistor R115, a control switch Q101, a resistor R116, a resistor R117, an integrated circuit U102, a resistor R1, a resistor R2, and a capacitor C109; The serial port V3P3 is connected to one end of the resistor R106 and the emitter of the control switch Q100. The other end of the resistor R106 and the base of the control switch Q100 are connected to one end of the resistor R107. The other end of the resistor R107 is connected to the serial port CHG_EN. The collector of the control switch Q100 is connected to one end of the resistor R108. The resistor R121, the supercapacitor C108, and the supercapacitor C1 are connected in parallel, with one end grounded and one end connected to the other end of the resistor R108. The resistor R120 One end of the resistor R120 is connected to the other end of the resistor R108, and one end of the resistor R120 is also connected to the serial port ADC0; the other end of the resistor R108 is also connected to the serial port VSCAP; the other end of the resistor R108 is also connected to one end of the inductor L101; the other end of the inductor L101 is connected to the interface 1 of the integrated circuit U102; the other end of the inductor L101 is also connected in series with the diode D104 and the resistor R1. The integrated circuit U102 is connected to the interface 3; the diode D104 and the diode D105 are connected in series and then connected to the serial port VIN; the diode D104 is also connected to the serial port V12P0; one end of the capacitor C109 is connected to the interface 1 of the integrated circuit U102, and the other end of the capacitor C109 is connected to the interface 2 of the integrated circuit U102; one end of the resistor R2 is connected to the interface 3 of the integrated circuit U102, and the other end of the capacitor C109 is connected to the interface 2 of the integrated circuit U102; the integrated circuit U Interface 5 and interface 6 of 102 are connected to serial port V3P3; interface 2 of the integrated circuit U102 is grounded; interface 4 of the integrated circuit U102 is connected to the electrode of the control switch Q101 and one end of the resistor R117; the other end of the resistor R117 is grounded; the emitter of the control switch Q101 is connected to the resistor R115 and then to the serial port V3P3; the base of the control switch Q101 is connected to the resistor R114 and the resistor R116; the resistor R114 is connected to the serial port PWR_IN; and the resistor R116 is grounded.

4. A low-cost power line carrier communication module based on dual-mode adaptive modulation according to claim 1, characterized in that: The power management module includes: a zero-crossing detection voltage circuit and a DC-DC power conversion circuit; The external input signal of the zero-crossing detection voltage circuit forms a loop through the serial port N_PLC, the capacitor C111, the resistor R110, the diode D101, U100 and the serial port L_PLC, and transmits the signal through the optical coupler to provide timing synchronization and protection trigger signal; The DC-DC power conversion circuit is used to provide stable power supply for the entire system and optimize energy efficiency through dynamic regulation.

5. A low-cost power line carrier communication module based on dual-mode adaptive modulation according to claim 1, characterized in that: The MCU main control chip module includes: an MCU main control chip and an MCU peripheral circuit; The V3P3 interface of the MCU main control chip is connected to the electronic carrier module communication chip; the ADC pin and CH pin of the MCU main control chip are connected to the expansion device for communication; the SPI / I2C interface of the MCU main control chip is connected to the RF front-end circuit for data packaging, verification and protocol conversion; The MCU peripheral circuit includes: an LED status indicator light and an I / O port definition configuration circuit; the I / O port definition configuration circuit is connected to the LED status indicator light, and the communication status is displayed through the LED status indicator light.

6. A low-cost power carrier communication module based on dual-mode adaptive modulation according to claim 1, characterized in that: Also includes: The V3P3 interface of the electronic carrier module communication chip is connected to the power line carrier signal, and the industrial frequency high voltage is isolated by the high-voltage coupling capacitor C501, capacitor C502, capacitor C503 and capacitor C504, allowing only the carrier high-frequency signal to pass through; the resistor R503 and the resistor R528 form an impedance matching network to adjust the input and output characteristics of the PLC signal and reduce reflection loss; the pin DQ6 and the pin DQ8 are connected to the MCU main control chip module through the radio frequency data line to transmit the modulated wireless signal; the electronic carrier module communication chip integrates a PLC modem, modulates the metering data into a carrier signal, and sends it to the power grid through the serial port V3P3; the pins DQ6 and DQ8 demodulate the remote control instructions when receiving and connect to the external PLC enhancement module to expand the communication bandwidth; the digital signal is modulated into a carrier waveform and output to the power line through the serial port V3P3; the electronic carrier module communication chip enables PLC or wireless mode according to the instructions of the MCU main control chip module.

7. A low-cost power line carrier communication module based on dual-mode adaptive modulation according to claim 1, characterized in that: The prediction of the target state by the Kalman filter algorithm includes: The target state is predicted using the following formula: Among them, x k|k-1 Represents the predicted state value at the current moment, P k|k-1 represents the prediction error covariance matrix, F k Represents x k-1 State transition model of state, B k represents the control model, μ k Represents the external control quantity, Q k represents the system noise covariance matrix, T represents the matrix transpose; Based on the predicted state value, the Kalman gain is calculated: Among them, K k represents the Kalman gain, H k represents the observation matrix, P k|k-1 represents the prediction error covariance matrix, R k represents the observation noise covariance matrix; The state is updated according to the Kalman gain: Among them, x k|k represents the estimate of the state at time k, x k|k-1 Represents the predicted state value at the current moment, K k represents the Kalman gain, y k represents the measurement residual, P k|k represents the estimate of the observation at time k, H k represents the observation matrix at time k, P k|k-1 represents the forecast error covariance matrix.

8. The low-cost power carrier communication module based on dual-mode adaptive modulation according to claim 1, characterized in that: The optimal modulation mode decision according to the Q-learning reinforcement learning algorithm includes: Acquire user electricity usage data, weather data, and electricity price policy from a smart meter, and construct a state feature vector based on the user electricity usage data, the weather data, and the electricity price policy; The user's electricity consumption data is clustered and statistically analyzed, and the data is discretized to obtain a specific electricity consumption behavior pattern corresponding to each state; Obtain the action strategy corresponding to the preset power consumption behavior pattern; A virtual simulation environment was built based on historical electricity consumption and weather data to simulate user responses to electricity price adjustments and peak-shifting instructions. A Q-Learning algorithm was used to train the policy model, defining the reward function as a weighted sum of grid load reduction, user satisfaction, and electricity cost savings. The action strategy was optimized by iteratively updating the Q-value table. The trained Q-value table is embedded in the edge computing module of the smart meter to collect grid status data in real time and execute action strategies to obtain the strategy execution effect; The strategy execution effect is remotely monitored through the cloud platform, and the Q value table is dynamically updated to adapt to changes in power grid operation.

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