Integrated circuit testing system and method

Abstract

The present application discloses a testing system and method for integrated circuits, which relate to the field of data processing technology, and include: an edge sensing system, a secure transmission system, an intelligent analysis system, a controller, and a display terminal; the edge sensing system fuses multiple types of collected operating parameters to obtain fused data, and sends the fused data to the secure transmission system; the secure transmission system preprocesses the fused data to obtain encrypted fused data and a hash value, and sends the data to the intelligent analysis system; the intelligent analysis system decrypts and classifies the encrypted fused data after verifying the hash value to obtain each group of operating data to be tested, generates a fault probability tree and a parameter optimization instruction based on each group of operating data to be tested, and sends the results to the controller; the controller determines a parameter optimization path based on the parameter optimization instruction, generates a test report based on the fault probability tree and the parameter optimization path, and the display terminal outputs the test report, thereby improving the compatibility of the data and the accuracy of the test report.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and in particular to a testing system and method for integrated circuits. Background Art

[0002] Integrated circuit testing is a critical step in verifying the functionality, performance, and reliability of integrated circuits through specific methods and tools, spanning the entire lifecycle from design and manufacturing to application. Integrated circuit testing primarily involves comprehensive functional verification of integrated circuits to ensure that no defects were introduced during the packaging process. The testing process includes logic function testing, electrical parameter testing, and reliability testing. Its results directly impact product yield and market competitiveness, making it a core quality control measure in the integrated circuit industry.

[0003] In the related art, conventional integrated circuit testing systems use monitoring modules to collect multiple test data from the integrated circuits, transmit the data to a monitoring center, and process the data to obtain and output test results. However, this method of collecting multiple test data from the integrated circuits through monitoring modules and transmitting the data to the monitoring center for processing suffers from poor compatibility among the test data, which can easily lead to inaccurate test results and make it impossible to optimize the integrated circuits based on the test results. Summary of the Invention

[0004] The present application provides a testing system and method for integrated circuits, which at least solves the problem in the related art of collecting multiple test data of integrated circuits through a monitoring module and transmitting the multiple test data to a monitoring center for processing, which has poor compatibility of the test data, easily leads to inaccurate test results, and cannot optimize the integrated circuit according to the test results.

[0005] The present application provides an integrated circuit testing system, comprising:

[0006] An edge sensing system (10), a secure transmission system (20), an intelligent analysis system (30), and a feedback execution system (40), wherein the feedback execution system (40) includes a controller (401) and a display terminal (402);

[0007] An edge sensing system (10) collects multiple types of operating parameters of the integrated circuit to be tested, fuses the multiple types of operating parameters to obtain corresponding fused data, and transmits the fused data to a secure transmission system (20);

[0008] The secure transmission system (20) encrypts the fused data to obtain the encrypted fused data, performs blockchain evidence storage on the fused data to obtain a corresponding hash value, and sends the encrypted fused data and the hash value to the intelligent analysis system (30);

[0009] The intelligent analysis system (30) decrypts the encrypted fusion data after the hash value verification is passed to obtain the fusion data, and classifies the fusion data to obtain one or more groups of operating data to be tested, compares each group of operating data to be tested with the corresponding standard operating data, generates a fault probability tree, and generates a parameter optimization instruction when it is detected that the error rate of the fault probability tree exceeds a preset error threshold, and sends the fault probability tree and the parameter optimization instruction to the feedback execution system (40);

[0010] A controller (401) determines a proportional gain value, an error signal, a time variable, a gain integral, an integral variable, and a differential gain value according to a parameter optimization instruction; determines a parameter control amount corresponding to the integrated circuit according to the proportional gain value, the error signal, the time variable, the gain integral, the integral variable, and the differential gain value; sets a mapping relationship between a key parameter offset and a sampling rate adjustment coefficient; adjusts a sampling rate parameter of a parameter optimization path corresponding to the integrated circuit according to the parameter control amount and the mapping relationship; and generates a corresponding test report according to a fault probability tree and the parameter optimization path;

[0011] The display terminal (402) outputs the test report in a preset output mode.

[0012] The present application also provides a method for testing an integrated circuit, comprising:

[0013] Collecting multiple types of operating parameters of the integrated circuit to be tested, fusing the multiple types of operating parameters to obtain corresponding fused data;

[0014] Encrypt the fused data to obtain the encrypted fused data, and store the fused data in the blockchain to obtain the corresponding hash value;

[0015] After the hash value is verified, the encrypted fused data is decrypted to obtain fused data, and the fused data is classified and processed to obtain one or more groups of operating data to be tested. Each group of operating data to be tested is compared with the corresponding standard operating data to generate a fault probability tree. When it is detected that the bit error rate of the fault probability tree exceeds the preset error threshold, a parameter optimization instruction is generated;

[0016] Determine the proportional gain value, error signal, time variable, gain integral, integral variable and differential gain value according to the parameter optimization instruction; determine the parameter control quantity corresponding to the integrated circuit according to the proportional gain value, error signal, time variable, gain integral, integral variable and differential gain value, set the mapping relationship between the key parameter offset and the sampling rate adjustment coefficient, adjust the sampling rate parameter of the parameter optimization path corresponding to the integrated circuit according to the parameter control quantity and the mapping relationship, generate a corresponding test report according to the fault probability tree and the parameter optimization path; and output the test report according to the preset output method.

[0017] The integrated circuit test system and method provided by the embodiment of the present application, through the edge perception system, fuses the collected multiple types of operating parameters to obtain corresponding fused data, and transmits the fused data to the secure transmission system; the secure transmission system encrypts the fused data to obtain encrypted fused data, and performs blockchain evidence processing on the fused data to obtain the corresponding hash value, and sends the encrypted fused data and the hash value to the intelligent analysis system; the intelligent analysis system decrypts the encrypted fused data after the hash value is verified to obtain fused data, and classifies the fused data to obtain each group of operating data to be tested, and compares it with the corresponding standard operating data. The data is compared to generate a fault probability tree and parameter optimization instructions, and the fault probability tree and parameter optimization instructions are sent to the feedback execution system; the feedback execution system determines the corresponding parameter control amount according to the parameter optimization instruction to adjust the sampling rate parameter of the integrated circuit corresponding to the parameter optimization path, generates and outputs a test report according to the fault probability tree and the parameter optimization path, obtains fused data by fusing multiple types of operating parameters, and processes the fused data, thereby improving the compatibility of the data and the accuracy of the test report; at the same time, the controller can adjust the sampling rate parameter of the integrated circuit corresponding to the parameter optimization path according to the parameter optimization instruction, thereby achieving the technical effect of optimizing the integrated circuit according to the test results. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 Schematic diagram of the structure of the integrated circuit test system provided in the embodiment of the present application Figure 1 ;

[0020] Figure 2 Schematic diagram of the structure of the integrated circuit test system provided in the embodiment of the present application Figure 2 ;

[0021] Figure 3 A flowchart of a method for testing an integrated circuit provided in an embodiment of the present application. DETAILED DESCRIPTION

[0022] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0023] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0024] Integrated circuit testing is a key step in verifying the functions, performance, and reliability of integrated circuits through specific methods and tools, and runs through the entire life cycle from design, manufacturing to application. Integrated circuit testing mainly conducts comprehensive functional verification of integrated circuits to ensure that no defects are introduced during the packaging process. The testing process includes logic function testing, electrical parameter testing, and reliability testing. Its test results directly affect product yield and market competitiveness, and are the core means of quality control in the integrated circuit industry. In the related art, traditional integrated circuit testing systems collect multiple test data of integrated circuits through monitoring modules, transmit the multiple test data to a monitoring center, and process each test data through the monitoring center to obtain and output test results. However, in the related art, the method of collecting multiple test data of integrated circuits through monitoring modules and transmitting the multiple test data to a monitoring center for processing has the problem of poor compatibility of each test data, which easily leads to inaccurate test results and the inability to optimize the integrated circuit based on the test results.

[0025] In order to solve the above-mentioned technical problems, the embodiments of the present application propose the following technical concepts: the inventors consider an integrated circuit test system constructed by an edge perception system, a secure transmission system, an intelligent analysis system and a feedback execution system; based on the edge perception system, the collected multiple types of operating parameters of the integrated circuit are fused and transmitted to the secure transmission system; the secure transmission system encrypts the fused data and sends the encrypted fused data to the intelligent analysis system; the intelligent analysis system decrypts the encrypted fused data to obtain the fused data, and generates a fault probability tree and parameter optimization instructions based on the fused data, and sends the fault probability tree and parameter optimization instructions to the feedback execution system; the feedback execution system determines the corresponding parameter optimization path according to the parameter optimization instruction, generates a corresponding test report according to the fault probability tree and the parameter optimization path, and outputs the test report, thereby realizing the fusion of multi-source heterogeneous data, improving the data compatibility and the accuracy of the test report, and at the same time, the controller can adjust the sampling rate parameters of the corresponding parameter optimization path of the integrated circuit according to the parameter optimization instruction, thereby achieving the technical effect of optimizing the integrated circuit according to the test results.

[0026] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0027] Figure 1 Schematic diagram of the structure of the integrated circuit test system provided in the embodiment of the present application Figure 1 .

[0028] like Figure 1 The integrated circuit testing system includes: an edge perception system 10, a secure transmission system 20, an intelligent analysis system 30 and a feedback execution system 40, and the feedback execution system 40 includes a controller 401 and a display terminal 402.

[0029] The edge sensing system 10 collects multiple types of operating parameters of the integrated circuit to be tested, fuses the multiple types of operating parameters to obtain corresponding fused data, and transmits the fused data to the secure transmission system 20.

[0030] In this embodiment, the multiple types of operating parameters include one or more of the following parameters: electrical parameters, solder joint parameters, and environmental parameters.

[0031] The electrical parameters include one or more of the following parameters: voltage parameters, current parameters, frequency parameters and transient response parameters of the integrated circuit.

[0032] The solder joint parameters include one or more of the following parameters: solder joint shape, solder joint size and solder joint connection status data of the integrated circuit.

[0033] The environmental parameters include one or more of the following parameters: temperature and humidity variation parameters of the integrated circuit, electromagnetic interference level, and vibration parameters.

[0034] Specifically, the edge sensing system 10 performs weighted fusion processing on multiple types of operating parameters according to preset confidence levels and interference coefficients to obtain corresponding fusion data.

[0035] The secure transmission system 20 encrypts the fused data to obtain the encrypted fused data, performs blockchain evidence storage on the fused data to obtain the corresponding hash value, and sends the encrypted fused data and the hash value to the intelligent analysis system 30.

[0036] After the hash value verification is passed, the intelligent analysis system 30 decrypts the encrypted fused data to obtain the fused data, and classifies the fused data to obtain one or more groups of operating data to be tested. Each group of operating data to be tested is compared with the corresponding standard operating data to generate a fault probability tree. When it is detected that the bit error rate of the fault probability tree exceeds the preset error threshold, a parameter optimization instruction is generated, and the fault probability tree and the parameter optimization instruction are sent to the feedback execution system 40.

[0037] Controller 401 determines a proportional gain value, an error signal, a time variable, a gain integral, an integral variable, and a differential gain value according to a parameter optimization instruction; determines a parameter control quantity corresponding to the integrated circuit according to the proportional gain value, the error signal, the time variable, the gain integral, the integral variable, and the differential gain value, sets a mapping relationship between a key parameter offset and a sampling rate adjustment coefficient, adjusts a sampling rate parameter of a parameter optimization path corresponding to the integrated circuit according to the parameter control quantity and the mapping relationship, and generates a corresponding test report according to the fault probability tree and the parameter optimization path.

[0038] Specifically, the calculation formula for determining the parameter control quantity corresponding to the integrated circuit according to the proportional gain value, the error signal, the time variable, the gain integral, the integral variable and the differential gain value includes:

[0039]

[0040] Where, is the parameter control amount; is the proportional gain value, generally 0.8; is the error signal, that is, the deviation between the measured value and the standard value; t is the time variable; is the gain integral, usually 0.2; is the integral variable; is the differential gain value, usually 0.1.

[0041] The display terminal 402 outputs the test report in a preset output mode.

[0042] In this embodiment, the preset output mode is paper, email, interface display or other modes.

[0043] In addition, the test report can also include electrical performance degradation curves and environmental stress correlation matrices.

[0044] In summary, the integrated circuit test system provided by this embodiment, through the edge perception system, fuses the collected multiple types of operating parameters to obtain corresponding fused data, and transmits the fused data to the secure transmission system; the secure transmission system encrypts the fused data to obtain encrypted fused data, and performs blockchain evidence processing on the fused data to obtain the corresponding hash value, and sends the encrypted fused data and the hash value to the intelligent analysis system; the intelligent analysis system decrypts the encrypted fused data after the hash value is verified to obtain fused data, and classifies the fused data to obtain each group of operating data to be tested, and compares it with the corresponding standard operating data. The system compares the rows and generates a fault probability tree and parameter optimization instructions, which are then sent to the feedback execution system; the feedback execution system determines the corresponding parameter control quantity according to the parameter optimization instructions to adjust the sampling rate parameters of the integrated circuit's corresponding parameter optimization path, generates and outputs a test report according to the fault probability tree and the parameter optimization path, obtains fused data by fusing multiple types of operating parameters, and processes the fused data, thereby improving the data compatibility and the comprehensiveness and accuracy of the test report; at the same time, the controller can adjust the sampling rate parameters of the integrated circuit's corresponding parameter optimization path according to the parameter optimization instructions, thereby achieving the technical effect of optimizing the integrated circuit according to the test results.

[0045] In addition, the integrated circuit testing system provided in this embodiment encrypts the fused data through a secure transmission system to obtain encrypted fused data, and performs blockchain evidence processing on the fused data to obtain a corresponding hash value, and sends the encrypted fused data and hash value to the intelligent analysis system, so as to ensure the security and integrity of the fused data during transmission.

[0046] In addition, the integrated circuit test system provided in this embodiment, by adding a feedback execution system, determines the corresponding parameter control quantity according to the parameter optimization instruction, and adjusts the sampling rate parameter of the corresponding parameter optimization path of the integrated circuit according to the parameter control quantity, thereby realizing a closed-loop test of the integrated circuit, and can continuously adjust the test strategy and parameters of the integrated circuit to improve the test effect.

[0047] Figure 2 Schematic diagram of the structure of the integrated circuit test system provided in the embodiment of the present application Figure 2 ,exist Figure 1Based on the embodiment, the edge perception system 10 includes: an electrical parameter sensor 101, an infrared thermal imager 102, an environmental sensor unit 103 and a first processor 104.

[0048] The electrical parameter sensor 101, the infrared thermal imager 102 and the environmental sensor unit 103 collect various operating parameters of the integrated circuit to be tested.

[0049] Exemplarily, the infrared thermal imager 102 is equipped with an optical lens with a resolution of 5 μm.

[0050] In this embodiment, the environmental sensor unit 103 includes a temperature and humidity sensor 1031 , an electromagnetic interference intensity sensor 1032 , and a vibration spectrum sensor 1033 .

[0051] For example, in Figure 1 Based on the specific development of multiple types of operating parameters in the embodiment, the electrical parameter sensor 101, the infrared thermal imager 102 and the environmental sensor unit 103 collect multiple types of operating parameters of the integrated circuit to be tested, specifically:

[0052] The electrical parameter sensor 101 collects the voltage parameters, current parameters, frequency parameters and transient response parameters of the integrated circuit; the infrared thermal imager 102 collects the solder joint shape, solder joint size and solder joint connection status data of the integrated circuit; the environmental sensor unit 103 collects the temperature and humidity change parameters, electromagnetic interference level and vibration parameters of the integrated circuit.

[0053] Among them, the temperature and humidity sensor 1031 collects the temperature and humidity change parameters of the integrated circuit; the electromagnetic interference intensity sensor 1032 collects the electromagnetic interference level of the integrated circuit; and the vibration spectrum sensor 1033 collects the vibration parameters of the integrated circuit.

[0054] The first processor 104 fuses the multiple types of operating parameters to obtain corresponding fused data, and transmits the fused data to the secure transmission system 20 .

[0055] Continue to refer Figure 2 The secure transmission system 20 includes an encryption unit 201 and a second processor 202 .

[0056] The encryption unit 201 encrypts the fused data to obtain encrypted fused data.

[0057] In this embodiment, the encryption unit 201 is an encryption hardware device.

[0058] The second processor 202 performs blockchain evidence processing on the fused data to obtain a corresponding hash value, and sends the encrypted fused data and hash value to the intelligent analysis system 30.

[0059] In addition, the hash value needs to be written into the Hyperledger Fabric consortium chain.

[0060] Among them, Hyperledger Fabric consortium chain is a hyperledger tool designed to provide enterprises with modular and scalable blockchain solutions.

[0061] Continue to refer Figure 2 The intelligent analysis system 30 includes: a sorting server unit 301, a comparison server 302 and a third processor 303.

[0062] The third processor 303 decrypts the encrypted fused data to obtain fused data after the hash value verification is passed.

[0063] The sorting server unit 301 classifies the fused data to obtain corresponding multiple types of source data, and pre-processes the multiple types of source data to obtain one or more groups of operating data to be tested;

[0064] The comparison server 302 compares each set of operating data to be tested with the corresponding standard operating data to generate a fault probability tree.

[0065] In this embodiment, the standard operating data is specifically standard training data.

[0066] The standard operation data is obtained by training the LSTM-Attention prediction model integrated by the comparison server 302 based on a large amount of historical data.

[0067] Among them, the LSTM-Attention prediction model is a deep learning model that combines the long short-term memory network and the attention mechanism, which is mainly used to process the prediction of sequence data with spatiotemporal correlation.

[0068] The third processor 303 generates a parameter optimization instruction when detecting that the bit error rate of the fault probability tree exceeds a preset error threshold, and sends the fault probability tree and the parameter optimization instruction to the feedback execution system 40 .

[0069] In this embodiment, the preset error threshold may be 10 -3 , 10 -5 or 10 -6 Any value in , or other values.

[0070] Continue to refer Figure 2 The sorting server unit 301 includes: a mechanical performance sorting server 3011, an electrical performance sorting server 3012, an environmental adaptability sorting server 3013 and a load balancer 3014.

[0071] The mechanical performance sorting server 3011 , the electrical performance sorting server 3012 and the environmental adaptability sorting server 3013 are respectively connected to the load balancer 3014 for communication.

[0072] The load balancer 3014 classifies the fused data according to a preset distribution strategy to obtain multiple types of source data, wherein the multiple types of source data are mechanical impact data, electrical transient response data, and environmental stress data.

[0073] Among them, mechanical impact data is allocated to the mechanical performance sorting server 3011, and the response delay needs to be less than 30ms; electrical transient response data is allocated to the electrical performance sorting server 3012, and the response delay needs to be less than 10ms; environmental stress data is allocated to the environmental adaptability sorting server 3013, and the response delay needs to be less than 50ms.

[0074] The mechanical performance sorting server 3011 pre-processes the mechanical impact data to obtain a corresponding first set of operating data to be tested.

[0075] Specifically, the mechanical performance sorting server 3011 pre-processes the mechanical impact data, analyzes the vibration spectrum and the fatigue life of the weld point, and obtains the corresponding first set of operating data to be tested.

[0076] The electrical performance sorting server 3012 pre-processes the electrical transient response data to obtain a corresponding second set of operating data to be tested.

[0077] Specifically, the electrical performance sorting server 3012 pre-processes the electrical transient response data, analyzes the signal integrity, and extracts the voltage and current transient characteristics to obtain the corresponding second set of operating data to be tested.

[0078] The environmental adaptability sorting server 3013 pre-processes the environmental stress data to obtain a corresponding third set of operating data to be tested.

[0079] Specifically, the environmental adaptability sorting server 3013 pre-processes the environmental stress data, calculates the failure acceleration factor under the temperature and humidity cycle, and obtains the corresponding third set of operating data to be tested.

[0080] Continue to refer Figure 2 The integrated circuit testing system further includes: a dual-active disaster recovery architecture system 50; the dual-active disaster recovery architecture system 50 includes a heartbeat detector 501 and a database server 502.

[0081] The database server 502 includes a MySQL database and a Redis cache layer.

[0082] The main sorting node of the sorting server unit 301 periodically sends heartbeat packets to the heartbeat detector 501 .

[0083] In this embodiment, the period may be any one of 50 ms, 100 ms, or 150 ms, or other periods.

[0084] The heartbeat detector 501 generates confirmation response information according to the heartbeat packet, and sends the confirmation response information to the sorting server unit 301.

[0085] The sorting server unit 301 sends the fused data to the database server 502 according to the confirmation response information.

[0086] Specifically, the sorting server unit 301 sends the fused data to the MySQL database in the database server 502 according to the confirmation response information.

[0087] The heartbeat detector 501 sends a preset switching instruction to the slave sorting node of the sorting server unit 301 after confirming that the response information has timed out.

[0088] Exemplarily, the heartbeat detector 501 should send the preset switching instruction to the slave sorting node of the sorting server unit 301 within 150 ms.

[0089] In addition, the time for switching from the master sorting node of the sorting server unit 301 to the slave sorting node of the sorting server unit 301 should be controlled within 200ms.

[0090] The slave sorting node of the sorting server unit 301 reads the fused data from the database server 502 and takes over the data service of the database server 502 .

[0091] Specifically, the slave sorting node of the sorting server unit 301 reads the fusion data from the MySQL database of the database server 502 and takes over the data service of the Redis cache layer in the database server 502 .

[0092] In summary, the integrated circuit testing system and secure transmission system provided in this embodiment include: an encryption unit and a second processor; the encryption unit encrypts the fused data to obtain encrypted fused data; the second processor performs blockchain evidence processing on the fused data to obtain the corresponding hash value, and sends the encrypted fused data and the hash value to the intelligent analysis system. By adding a hardware-level encryption unit, the transmission of the fused data is made more secure.

[0093] In addition, the integrated circuit testing system provided in this embodiment can ensure the security and integrity of fused data during transmission by writing hash values ​​into the Hyperledger Fabric consortium chain.

[0094] In addition, the integrated circuit testing system provided in this embodiment uses a load balancer to classify the fused data according to a preset distribution strategy to obtain multiple types of source data, where the multiple types of source data are mechanical impact data, electrical transient response data, and environmental stress data; the mechanical performance sorting server preprocesses the mechanical impact data to obtain a corresponding first group of operating data to be tested; the electrical performance sorting server preprocesses the electrical transient response data to obtain a corresponding second group of operating data to be tested; and the environmental adaptability sorting server preprocesses the environmental stress data to obtain a corresponding third group of operating data to be tested, thereby achieving efficient classification and data processing of the fused data.

[0095] In addition, the integrated circuit test system provided by this embodiment has a dual-active disaster recovery architecture system including a heartbeat detector and a database server; the master sorting node of the sorting server unit periodically sends heartbeat packets to the heartbeat detector; the heartbeat detector generates confirmation response information based on the heartbeat packet and sends the confirmation response information to the sorting server unit; the sorting server unit sends fused data to the database server based on the confirmation response information; the heartbeat detector sends a preset switching instruction to the slave sorting node of the sorting server unit after the confirmation response information times out; the slave sorting node of the sorting server unit reads the fused data from the database server and takes over the data service of the database server. By introducing the dual-active disaster recovery architecture system, the stability and disaster recovery capability of the test system are enhanced, the test interruption and data loss caused by test system failures are reduced, and the production efficiency and equipment utilization are improved.

[0096] Figure 3 This is a flow chart of the integrated circuit testing method provided in the embodiment of the present application. The execution subject of this embodiment can be Figure 1 The integrated circuit test system in the embodiment shown is not particularly limited in this embodiment. Figure 3 As shown, the method includes:

[0097] S301: Collect multiple types of operating parameters of the integrated circuit to be tested, and fuse the multiple types of operating parameters to obtain corresponding fused data.

[0098] Specifically, step S301 includes:

[0099] S3011: Controls the electrical parameter sensor, infrared thermal imager, and environmental sensor unit to collect multiple operating parameters of the integrated circuit to be tested.

[0100] In this embodiment, the multiple types of operating parameters include electrical parameters, solder joint parameters, and environmental parameters; accordingly, step S3011 specifically includes:

[0101] S30111: Control the electrical parameter sensor to collect the electrical parameters of the integrated circuit to be tested.

[0102] S30112: Control the infrared thermal imager to collect solder joint parameters of the integrated circuit to be tested.

[0103] S30113: Control the environmental sensor unit to collect environmental parameters of the integrated circuit to be tested.

[0104] S3012: Fusing multiple types of operating parameters to obtain corresponding fused data, and transmitting the fused data to the intelligent analysis system.

[0105] S302: Encrypt the fused data to obtain the encrypted fused data, and perform blockchain notarization processing on the fused data to obtain the corresponding hash value.

[0106] S303: After the hash value verification is passed, the encrypted fusion data is decrypted to obtain the fusion data, and the fusion data is classified and processed to obtain one or more groups of operating data to be tested. Each group of operating data to be tested is compared with the corresponding standard operating data to generate a fault probability tree. When it is detected that the bit error rate of the fault probability tree exceeds the preset error threshold, a parameter optimization instruction is generated.

[0107] S304: Determine the proportional gain value, error signal, time variable, gain integral, integral variable and differential gain value according to the parameter optimization instruction; determine the parameter control quantity corresponding to the integrated circuit according to the proportional gain value, error signal, time variable, gain integral, integral variable and differential gain value, set the mapping relationship between the key parameter offset and the sampling rate adjustment coefficient, adjust the sampling rate parameter of the parameter optimization path corresponding to the integrated circuit according to the parameter control quantity and the mapping relationship, generate a corresponding test report according to the fault probability tree and the parameter optimization path; and output the test report according to the preset output method.

[0108] In summary, the integrated circuit testing method provided in this embodiment fuses the collected multiple types of operating parameters to obtain corresponding fused data; encrypts the fused data to obtain encrypted fused data, and performs blockchain notarization processing on the fused data to obtain a corresponding hash value; after the hash value verification is passed, the encrypted fused data is decrypted to obtain fused data, and the fused data is classified to obtain each group of operating data to be tested, and compared with the corresponding standard operating data to generate a fault probability tree and parameter optimization instructions; according to the parameter optimization instructions, the corresponding parameter control amount is determined to adjust the sampling rate parameter of the corresponding parameter optimization path of the integrated circuit, and a test report is generated and output according to the fault probability tree and the parameter optimization path. By fusing multiple types of operating parameters to obtain fused data and processing the fused data, the data compatibility and the comprehensiveness and accuracy of the test report are improved; at the same time, the controller can adjust the sampling rate parameter of the corresponding parameter optimization path of the integrated circuit according to the parameter optimization instruction, thereby achieving the technical effect of optimizing the integrated circuit according to the test results.

[0109] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0110] The above describes in detail the integrated circuit testing system and method provided by the present application. This article uses specific examples to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only intended to help understand the method and core concept of the present application. It should be noted that for those skilled in the art, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.

Claims

1. A test system for an integrated circuit, characterized in that: include: An edge perception system (10), a secure transmission system (20), an intelligent analysis system (30), and a feedback execution system (40), wherein the feedback execution system (40) includes a controller (401) and a display terminal (402); The edge sensing system (10) collects multiple types of operating parameters of the integrated circuit to be tested, fuses the multiple types of operating parameters to obtain corresponding fused data, and transmits the fused data to the secure transmission system (20); The secure transmission system (20) encrypts the fused data to obtain encrypted fused data, performs blockchain evidence storage on the fused data to obtain a corresponding hash value, and sends the encrypted fused data and the hash value to the intelligent analysis system (30); The intelligent analysis system (30) decrypts the encrypted fusion data after the hash value verification to obtain fusion data, and classifies the fusion data to obtain one or more groups of operating data to be tested, compares each group of operating data to be tested with corresponding standard operating data, generates a fault probability tree, and generates a parameter optimization instruction when it is detected that the error rate of the fault probability tree exceeds a preset error threshold, and sends the fault probability tree and the parameter optimization instruction to the feedback execution system (40); The controller (401) determines a proportional gain value, an error signal, a time variable, a gain integral, an integral variable, and a differential gain value according to the parameter optimization instruction; determines a parameter control amount corresponding to the integrated circuit according to the proportional gain value, the error signal, the time variable, the gain integral, the integral variable, and the differential gain value, sets a mapping relationship between a key parameter offset and a sampling rate adjustment coefficient, adjusts a sampling rate parameter of a parameter optimization path corresponding to the integrated circuit according to the parameter control amount and the mapping relationship, and generates a corresponding test report according to the fault probability tree and the parameter optimization path; The display terminal (402) outputs the test report in a preset output mode.

2. The integrated circuit test system according to claim 1, wherein: The edge sensing system (10) comprises: an electrical parameter sensor (101), an infrared thermal imager (102), an environmental sensor unit (103) and a first processor (104); The electrical parameter sensor (101), the infrared thermal imager (102), and the environmental sensor unit (103) collect multiple types of operating parameters of the integrated circuit to be tested; The first processor (104) performs fusion processing on the multiple types of operating parameters to obtain corresponding fusion data, and transmits the fusion data to the secure transmission system (20).

3. The integrated circuit test system according to claim 2, wherein: The environmental sensor unit (103) includes: a temperature and humidity sensor (1031), an electromagnetic interference intensity sensor (1032), and a vibration spectrum sensor (1033); wherein the multiple types of operating parameters include at least temperature and humidity change parameters, electromagnetic interference level values, and vibration parameters; A temperature and humidity sensor (1031) for collecting the temperature and humidity change parameters of the integrated circuit; An electromagnetic interference intensity sensor (1032) collects the electromagnetic interference level value of the integrated circuit; The vibration spectrum sensor (1033) collects the vibration parameters of the integrated circuit.

4. The integrated circuit testing system according to claim 1, wherein: The secure transmission system (20) comprises: an encryption unit (201) and a second processor (202); The encryption unit (201) encrypts the fused data to obtain encrypted fused data; The second processor (202) performs blockchain evidence storage processing on the fused data to obtain a corresponding hash value, and sends the encrypted fused data and the hash value to the intelligent analysis system (30).

5. The integrated circuit testing system according to claim 1, wherein: The intelligent analysis system (30) comprises: a sorting server unit (301), a comparison server (302) and a third processor (303); The third processor (303), after the hash value is verified, decrypts the encrypted fused data to obtain fused data; The sorting server unit (301) classifies the fused data to obtain corresponding multiple types of source data, and pre-processes the multiple types of source data to obtain one or more groups of operating data to be tested; The comparison server (302) compares each set of operating data to be tested with corresponding standard operating data to generate a fault probability tree; The third processor (303) generates a parameter optimization instruction when detecting that the bit error rate of the fault probability tree exceeds a preset error threshold, and sends the fault probability tree and the parameter optimization instruction to the feedback execution system (40).

6. The integrated circuit testing system according to claim 5, wherein: The sorting server unit (301) includes: a mechanical performance sorting server (3011), an electrical performance sorting server (3012), an environmental adaptability sorting server (3013) and a load balancer (3014); The mechanical performance sorting server (3011), the electrical performance sorting server (3012) and the environmental adaptability sorting server (3013) are respectively connected to the load balancer (3014) for communication; The load balancer (3014) classifies the fused data according to a preset distribution strategy to obtain multiple types of source data, wherein the multiple types of source data are mechanical impact data, electrical transient response data, and environmental stress data; The mechanical performance sorting server (3011) pre-processes the mechanical impact data to obtain a corresponding first set of operating data to be tested; The electrical performance sorting server (3012) pre-processes the electrical transient response data to obtain a corresponding second set of operating data to be tested; The environmental adaptability sorting server (3013) pre-processes the environmental stress data to obtain a corresponding third set of operating data to be tested.

7. The integrated circuit testing system according to claim 5, wherein: The integrated circuit test system further comprises: a dual-active disaster recovery architecture system (50); the dual-active disaster recovery architecture system (50) comprises a heartbeat detector (501) and a database server (502); The main sorting node of the sorting server unit (301) periodically sends a heartbeat packet to the heartbeat detector (501); The heartbeat detector (501) generates confirmation response information according to the heartbeat packet, and sends the confirmation response information to the sorting server unit (301); The sorting server unit (301) sends the fused data to the database server (502) according to the confirmation response information; The heartbeat detector (501) sends a preset switching instruction to the slave sorting node of the sorting server unit (301) after the confirmation response information times out; The slave sorting node of the sorting server unit (301) reads the fused data from the database server (502) and takes over the data service of the database server (502).

8. A method for testing an integrated circuit, characterized in that: include: Collecting multiple types of operating parameters of the integrated circuit to be tested, fusing the multiple types of operating parameters to obtain corresponding fused data; Encrypting the fused data to obtain encrypted fused data, and performing blockchain evidence storage on the fused data to obtain a corresponding hash value; After the hash value is verified, the encrypted fused data is decrypted to obtain fused data, and the fused data is classified and processed to obtain one or more groups of operating data to be tested. Each group of operating data to be tested is compared with the corresponding standard operating data to generate a fault probability tree. When it is detected that the bit error rate of the fault probability tree exceeds a preset error threshold, a parameter optimization instruction is generated; Determine a proportional gain value, an error signal, a time variable, a gain integral, an integral variable, and a differential gain value according to the parameter optimization instruction; determine a parameter control quantity corresponding to the integrated circuit according to the proportional gain value, the error signal, the time variable, the gain integral, the integral variable, and the differential gain value, set a mapping relationship between a key parameter offset and a sampling rate adjustment coefficient, adjust a sampling rate parameter of a parameter optimization path corresponding to the integrated circuit according to the parameter control quantity and the mapping relationship, generate a corresponding test report according to the fault probability tree and the parameter optimization path; and output the test report according to a preset output method.

9. The integrated circuit testing method according to claim 8, wherein: include: Control electrical parameter sensors, infrared thermal imagers, and environmental sensor units to collect multiple operating parameters of the integrated circuit to be tested; The multiple types of operating parameters are fused to obtain corresponding fused data, and the fused data is transmitted to the intelligent analysis system.

10. The integrated circuit testing method according to claim 9, wherein: The multiple types of operating parameters include electrical parameters, solder joint parameters and environmental parameters; Accordingly, the control electrical parameter sensor, infrared thermal imager and environmental sensor unit collect multiple types of operating parameters of the integrated circuit to be tested, including: Controlling the electrical parameter sensor to collect electrical parameters of the integrated circuit to be tested; Controlling the infrared thermal imager to collect solder joint parameters of the integrated circuit to be tested; The environmental sensor unit is controlled to collect environmental parameters of the integrated circuit to be tested.

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