RISC-V architecture-based edge detection method and image processing accelerator
Through the image processing accelerator based on the RISC-V architecture, the Scharr operator and customized instruction set are used to optimize the edge detection algorithm, which solves the performance bottleneck of traditional RISC-V processors in Sobel edge detection and achieves efficient edge detection effect.
Patent Information
- Application Number
- CN202510672379.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-23
- Publication Date
- 2025-09-19
AI Technical Summary
Traditional RISC-V processors have performance bottlenecks when executing complex image processing algorithms such as the Sobel edge detection algorithm, resulting in unsatisfactory edge detection results.
An image processing accelerator based on RISC-V architecture is designed. The image processing hardware accelerator is customized through the coprocessor interface. The Scharr operator is used to improve the edge detection algorithm. The edge detection module and control module are included, and the customized instruction set is used to optimize the edge detection process.
It achieves accurate edge detection, improves the efficiency and performance of image processing, and brings new technological breakthroughs to the field of image processing.
Smart Images
Figure CN120672785A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of image processing technology, and in particular to an edge detection method and an image processing accelerator based on a RISC-V architecture. Background Art
[0002] Digital image processing plays a crucial role in modern computer vision and image processing applications. Edge detection is a fundamental operation in image processing, used to identify edges and contours within an image. It forms the basis of many advanced image processing algorithms. The Sobel algorithm is a classic edge detection algorithm that detects edges by calculating the gradient of pixels within an image. However, it lacks accuracy and clarity in edge detection, resulting in poor results.
[0003] As an open and flexible instruction set architecture, the RISC-V architecture has attracted considerable attention in processor design. Its concise instruction set and scalability make it an ideal choice for hardware accelerator design. However, traditional RISC-V processors face potential performance bottlenecks when executing complex image processing algorithms. This is particularly true for algorithms requiring a large number of floating-point operations, such as the Sobel edge detection algorithm, which can result in unsatisfactory image edge detection results. Summary of the Invention
[0004] The purpose of the present invention is to solve the problems raised in the above background technology, and then proposes an image processing accelerator based on the RISC-V architecture. By customizing the image processing hardware accelerator as a coprocessor through the coprocessor interface of the main processor based on the RISC-V architecture, efficient acceleration of the improved image edge detection algorithm is achieved, bringing new technological breakthroughs and application potential to the field of image processing.
[0005] The technical solution adopted by the present invention to solve the technical problem is: An edge detection method based on the RISC-V architecture includes the core Scharr operator in the edge detection algorithm. The Scharr operator is two sets of matrices in the horizontal direction and the vertical direction. The specific steps are as follows: Perform convolution calculation on the image data according to the Scharr operator to obtain the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction; The grayscale value and gradient value of a point are obtained based on the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction; Set the threshold, compare the grayscale value and gradient value with the threshold, and output a binary image.
[0006] Furthermore, the calculation formula for the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction is:
[0007]
[0008] Where, is the difference in grayscale values of adjacent pixels in the horizontal direction, is the horizontal matrix, A is the grayscale value of the image data, is the difference in grayscale values between adjacent pixels in the vertical direction, is the vertical matrix.
[0009] Furthermore, the one point The grayscale value is calculated as follows: .
[0010] Furthermore, the calculation formula of the gradient value is: .
[0011] An image processing accelerator includes an edge detection module and a control module. The control module is mainly responsible for interacting with a main processor through a processor expansion interface. The edge detection module receives grayscale value data of an image and performs edge detection processing on the grayscale value data of the image. The image grayscale value data and gradient value data processed by the edge detection module are returned to the control module.
[0012] Furthermore, the processor expansion interface includes: Request channel: used to interact with the execution level of the main processor, receive instruction information and source operands from the execution level, and return received signal information to the execution level; Feedback channel: used to notify the main processor that image data processing has been completed and write the results back to the main processor; Memory request channel: used to initiate memory read and write requests to the main processor through this channel and receive read and write receive signals from the main processor; Memory feedback channel: receives memory read and write results and returns memory read and write feedback reception signals to the main processor.
[0013] Furthermore, the edge detection module uses an edge detection algorithm to perform edge detection processing on the grayscale value data of the image to obtain the grayscale value and gradient value of a point in the image, which is specifically implemented as follows: The core Scharr operator in the edge detection algorithm is two sets of matrices in the horizontal and vertical directions. The two sets of matrices in the horizontal and vertical directions are used to perform convolution calculations on the image data to obtain the difference in the grayscale values of adjacent pixels in the horizontal direction and the difference in the grayscale values of adjacent pixels in the vertical direction. The calculation formula for the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction is:
[0014]
[0015] Where, is the difference in grayscale values of adjacent pixels in the horizontal direction, is the horizontal matrix, A is the grayscale value of the image data, is the difference in grayscale values between adjacent pixels in the vertical direction, is the vertical matrix; The grayscale value and gradient value of a point are obtained based on the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction. The grayscale value calculation formula of a point is:
[0016] The gradient value is calculated as:
[0017] Set the threshold, compare the grayscale value and gradient value of a point with the threshold, and output a binary image.
[0018] Furthermore, the instruction format of the image processing accelerator is: .insnropcode, func3, func7, rd, rs1, rs2.
[0019] Furthermore, the "r" in the .insn form instruction indicates that the instruction type is R-type.
[0020] The opcode is an operation code, which has 7 bits in total; The rd indicates the target register, which has 5 bits in total; xs2 is 1 bit, indicating whether the general register indexed by rs2 needs to be read and used as source operand 2. xs1 indicates whether to read the general register indexed by rs1 and use it as source operand 2, a total of 1 bit; The rs1 is the source register 1, a total of 1 bit; The rs2 is the source register 2, a total of 1 bit; The funct7 is an additional coding space, a total of 7 bits; The funct3xd is composed of xs1 and xs2.
[0021] Furthermore, the three instructions set during the execution of the image processing accelerator are: LOAD_GRAYSCALE: Loads the image grayscale value from the memory to the image processing hardware accelerator register. The specific instructions are: .insnr0x7b,2,1,x0,%1,x0 SOBEL_CALCULATE: Execute the improved Sobel edge detection algorithm. The specific instructions are: .insnr0x7b,1,1,x0,%1,%2 STORE_RESULT: Returns the calculation results of the improved Sobel edge detection algorithm to the memory. The specific instructions are: .insnr0x7b,3,1,x0,x0,%1.
[0022] Compared with the prior art, the present invention has the following beneficial effects: The present invention is based on the design of an edge detection module that can quickly process image grayscale value data and perform gradient calculations, thereby achieving accurate edge detection. By customizing an image processing hardware accelerator as a coprocessor through the coprocessor interface of a main processor based on the RISC-V architecture, it can achieve efficient acceleration of the improved Sobel edge detection algorithm, bringing new technological breakthroughs and application potential to the field of image processing. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 This is a hardware block diagram of the image processing accelerator of the present invention; Among them: 1. Edge detection module; 2. Control module; 3. Main processor; 4. Request channel; 5. Memory feedback channel; 6. Memory request channel; 7. Feedback channel. DETAILED DESCRIPTION
[0024] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. The present invention is further described in conjunction with the drawings and embodiments: An edge detection method based on the RISC-V architecture includes the core Scharr operator in the edge detection algorithm. The Scharr operator is two sets of matrices in the horizontal direction and the vertical direction. The specific steps are as follows: Perform convolution calculation on the image data according to the Scharr operator to obtain the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction; The calculation formula for the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction is:
[0025]
[0026] Where, is the difference in grayscale values of adjacent pixels in the horizontal direction, is the horizontal matrix, A is the grayscale value of the image data, is the difference in grayscale values between adjacent pixels in the vertical direction, is the vertical matrix.
[0027] The grayscale value and gradient value of a point are obtained based on the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction; The grayscale value calculation formula is: , The calculation formula of the gradient value is:
[0028] Set the threshold, compare the grayscale value and gradient value with the threshold, and output a binary image.
[0029] Refer to the attached Figure 1 As shown, an image processing accelerator includes an edge detection module 1 and a control module 2. The control module 2 is mainly responsible for interacting with the main processor 3 through the processor expansion interface. The edge detection module 1 receives the grayscale value data of the image and performs edge detection processing on the grayscale value data of the image. The image grayscale value data and gradient value data processed by the edge detection module 1 are returned to the control module 1.
[0030] Processor expansion interfaces include: Request channel: used to interact with the execution level of the main processor, receive instruction information and source operands from the execution level, and return the received signal information to the execution level. The specific interface signals are shown in Table 1:
[0031] Table 1 Interface signals of request channel Feedback channel: used to notify the main processor that image data processing has been completed and write the results back to the main processor. The specific interface signals are shown in Table 2:
[0032] Table 2 Feedback channel interface signals Memory request channel: used to initiate memory read and write requests to the main processor through this channel and receive the main processor read and write receive signals. The specific interface signals are shown in Table 3:
[0033] Table 3 Interface signals of memory request channel Memory feedback channel: Receives memory read and write results and returns memory read and write feedback reception signals to the main processor. The specific interface signals are shown in Table 4:
[0034] Table 4 Interface signals of memory feedback channel The edge detection module uses the edge detection algorithm to perform edge detection on the grayscale value data of the image to obtain the grayscale value and gradient value of a point in the image. The specific implementation is as follows: The core Scharr operator in the edge detection algorithm is two sets of matrices in the horizontal and vertical directions. The two sets of matrices in the horizontal and vertical directions are used to perform convolution calculations on the image data to obtain the difference in the grayscale values of adjacent pixels in the horizontal direction and the difference in the grayscale values of adjacent pixels in the vertical direction. The calculation formula for the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction is:
[0035]
[0036] Where, is the difference in grayscale values of adjacent pixels in the horizontal direction, is the horizontal matrix, A is the grayscale value of the image data, is the difference in grayscale values between adjacent pixels in the vertical direction, is the vertical matrix; The grayscale value and gradient value of a point are obtained based on the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction. The grayscale value calculation formula of a point is:
[0037] The gradient value is calculated as:
[0038] Set the threshold, compare the grayscale value and gradient value of a point with the threshold, and output a binary image.
[0039] The Scharr operator is used to improve the edge detection algorithm in the edge detection module. In order to obtain more accurate and clear image edge information, the image processing accelerator of the present invention adopts a funny parallel computing structure, which can quickly process the grayscale value data of the image and perform gradient value calculation, thereby realizing accurate edge detection.
[0040] According to the characteristics of the image processing accelerator, corresponding instruction sets are customized to optimize the execution efficiency and performance of the edge detection module 1. These customized instruction sets are compatible with the RISC-V architecture and can effectively guide the edge detection module to execute the edge detection algorithm.
[0041] Customized instructions are implemented through pseudo-instructions .insn. The instruction format used by the image processing accelerator is: .insnropcode, func3, func7, rd, rs1, rs2.
[0042] The "r" in the .insn form instruction indicates that the instruction type is R-type. The remaining instruction bit fields are shown in Table 5:
[0043] Table 5 Instruction bit fields opcode is the operation code, with a total of 7 bits; rd indicates the target register, with a total of 5 bits; xs2 indicates whether it is necessary to read the general register indexed by rs2 and use it as the source operand 2, with a total of 1 bit; xs1 indicates whether it is necessary to read the general register indexed by rs1 and use it as the source operand 2, with a total of 1 bit; rs1 is the source register 1, with a total of 1 bit; rs2 is the source register 2, with a total of 1 bit; funct7 is the additional encoding space, with a total of 7 bits; funct3 consists of xd, xs1, and xs2.
[0044] To improve performance, three instructions in the image accelerator execution process are customized based on the edge detection algorithm: LOAD_GRAYSCALE: Loads the image grayscale value from the memory to the image processing hardware accelerator register. The specific instructions are: .insnr0x7b,2,1,x0,%1,x0 SOBEL_CALCULATE: Execute the improved Sobel edge detection algorithm. The specific instructions are: .insnr0x7b,1,1,x0,%1,%2 STORE_RESULT: Returns the calculation results of the improved Sobel edge detection algorithm to the memory. The specific instructions are: .insnr0x7b,3,1,x0,x0,%1.
[0045] The basic principles, main features, and advantages of the present invention are shown and described above. Those skilled in the art should understand that the present invention is not limited to the above-described embodiments. The above-described embodiments and descriptions are merely illustrative of the principles of the present invention. Various changes and modifications may be made to the present invention without departing from the spirit and scope of the present invention. Such changes and modifications are intended to fall within the scope of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.
Claims
1. An edge detection method based on RISC-V architecture, including the core Scharr operator in the edge detection algorithm, wherein the Scharr operator is two sets of matrices in the horizontal direction and the vertical direction, characterized in that: The specific steps are: Perform convolution calculation on the image data according to the Scharr operator to obtain the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction; The grayscale value and gradient value of a point are obtained based on the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction; Set the threshold, compare the grayscale value and gradient value with the threshold, and output a binary image.
2. The edge detection method based on RISC-V architecture according to claim 1, characterized in that: The calculation formula for the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction is: Where, is the difference in grayscale values of adjacent pixels in the horizontal direction, is the horizontal matrix, A is the grayscale value of the image data, is the difference in grayscale values between adjacent pixels in the vertical direction, is the vertical matrix.
3. The edge detection method based on RISC-V architecture according to claim 2, characterized in that: The one point The grayscale value is calculated as follows:
4. The edge detection method based on RISC-V architecture according to claim 2, characterized in that: The calculation formula of the gradient value is: 。 5. An image processing accelerator based on the edge detection method according to claim 1, characterized in that: The system includes an edge detection module and a control module. The control module is mainly responsible for interacting with the main processor through the processor expansion interface. The edge detection module receives the grayscale value data of the image and performs edge detection processing on the grayscale value data of the image. The image grayscale value data and gradient value data processed by the edge detection module are returned to the control module.
6. An image processing accelerator according to claim 5, characterized in that: The processor expansion interface includes: Request channel: used to interact with the execution level of the main processor, receive instruction information and source operands from the execution level, and return received signal information to the execution level; Feedback channel: used to notify the main processor that image data processing has been completed and write the results back to the main processor; Memory request channel: used to initiate memory read and write requests to the main processor through this channel and receive read and write receive signals from the main processor; Memory feedback channel: receives memory read and write results and returns memory read and write feedback reception signals to the main processor.
7. The image processing accelerator according to claim 5, wherein: The edge detection module uses an edge detection algorithm to perform edge detection processing on the grayscale value data of the image to obtain the grayscale value and gradient value of a point in the image. The specific implementation is: The core Scharr operator in the edge detection algorithm is two sets of matrices in the horizontal and vertical directions. The two sets of matrices in the horizontal and vertical directions are used to perform convolution calculations on the image data to obtain the difference in the grayscale values of adjacent pixels in the horizontal direction and the difference in the grayscale values of adjacent pixels in the vertical direction. The calculation formula for the difference in grayscale values of adjacent pixels in the horizontal direction and the difference in grayscale values of adjacent pixels in the vertical direction is: Where, is the difference in grayscale values of adjacent pixels in the horizontal direction, is the horizontal matrix, A is the grayscale value of the image data, is the difference in grayscale values between adjacent pixels in the vertical direction, is the vertical matrix; According to the difference between the grayscale values of adjacent pixels in the horizontal direction and the grayscale value of adjacent pixels in the vertical direction, the grayscale value and gradient value of a point G are obtained. The grayscale value calculation formula of a point is: The gradient value is calculated as: Set the threshold, compare the grayscale value and gradient value of a point with the threshold, and output a binary image.
8. The image processing accelerator according to claim 5, wherein: The instruction format of the image processing accelerator is: .insnropcode, func3, func7, rd, rs1, rs2.
9. An image processing accelerator according to claim 8, characterized in that: The "r" in the .insn form instruction indicates that the instruction type is R-type. The opcode is an operation code, which has 7 bits in total; The rd indicates the target register, which has 5 bits in total; xs2 indicates whether to read the general register indexed by rs2 and use it as source operand 2, a total of 1 bit; xs1 indicates whether to read the general register indexed by rs1 and use it as source operand 2, a total of 1 bit; The rs1 is the source register 1, a total of 1 bit; The rs2 is the source register 2, a total of 1 bit; The funct7 is an additional coding space, a total of 7 bits; The funct3xd is composed of xs1 and xs2.
10. The image processing accelerator according to claim 5, wherein: The three instructions set in the image processing accelerator execution process are: LOAD_GRAYSCALE: Loads the image grayscale value from the memory to the image processing hardware accelerator register. The specific instructions are: .insnr0x7b,2,1,x0,%1,x0 SOBEL_CALCULATE: Execute the improved Sobel edge detection algorithm. The specific instructions are: .insnr0x7b,1,1,x0,%1,%2 STORE_RESULT: Returns the calculation results of the improved Sobel edge detection algorithm to the memory. The specific instructions are: .insnr0x7b,3,1,x0,x0,%1.