Cable, sideband signal processing method and apparatus, and computer-readable storage medium

Abstract

The application discloses a kind of cable, sideband signal processing method, device and computer readable storage medium, it is related to communication technical field, cable includes: cable body;Connector is connected with cable body;Wherein, connector includes multiple first pins and multiple path switching circuits connected with multiple first pins;Multiple first pins are used to connect multiple sideband signals;Multiple path switching circuits are used to connect with the multiple second pins of external device one by one;The multiple second pins of external device are used to connect multiple sideband signals;Each path switching circuit includes multiple first circuits connected with multiple first pins respectively;Each first circuit includes first field effect transistor, second field effect transistor, first resistance, second resistance and switch.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of communication, and in particular to a cable, a sideband signal processing method and device, and a computer readable storage medium. BACKGROUND

[0002] In modern electronic devices, high-speed data transmission and signal interconnection are the key to achieving high-performance computing, storage, and communication. With the continuous progress of technology, various specifications and standards have emerged to ensure compatibility and interoperability between different devices. Among them, specifications such as SFF-TA-1016, SFF-TA-1005, SFF-8848, and SFF-9402 play an important role in high-speed cable design and use. These specifications not only define the transmission method of high-speed signals, but also cover the management and interconnection of sideband signals. Among them, sideband signals are often used for control, state monitoring, power management, and other functions, and there are many types and inconsistent pin definitions. For example, different specifications and device manufacturers may have different requirements for the pin positions of sideband signals, which leads to compatibility problems when using standardized high-speed cables, such as MCIO (Modular Connector Input Output) cables, to interconnect different devices in actual applications. SUMMARY

[0003] In view of this, the embodiments of the present application provide a cable, a sideband signal processing method and device, and a computer readable storage medium.

[0004] According to a first aspect of the present application, the embodiments of the present application provide a cable, comprising:

[0005] a cable body;

[0006] a connector connected to the cable body;

[0007] wherein the connector comprises a plurality of first pins and a plurality of path switching circuits connected to the plurality of first pins; the plurality of first pins are used to connect a plurality of sideband signals; the plurality of path switching circuits are used to be connected one-to-one with a plurality of second pins of an external device; the plurality of second pins of the external device are used to connect the plurality of sideband signals;

[0008] Each path switching circuit comprises a plurality of first circuits connected with a plurality of first pins respectively; each first circuit comprises a first field effect transistor, a second field effect transistor, a first resistor, a second resistor and a switch; the source of the first field effect transistor is connected with the first pin, the gate is connected with the first end of the first resistor, the gate of the second field effect transistor and the first end of the second resistor respectively, and the drain is connected with the second end of the first resistor and the source of the second field effect transistor respectively; the first end of the switch is connected with the second end of the second resistor, and the second end is used for grounding; the drain of the second field effect transistor is used for connecting with the second pin of an external device.

[0009] Optionally, the number of the connectors is two, one of which is connected with the first end of the cable body, and the other of which is connected with the second end of the cable body.

[0010] Optionally, the plurality of sideband signals comprise integrated circuit bus data signals, integrated circuit bus clock signals, reset signals and board ID identification signals.

[0011] Optionally, the first field effect transistor is a PMOS transistor.

[0012] Optionally, the second field effect transistor is a PMOS transistor.

[0013] Optionally, the connector further comprises a plurality of third pins used for connecting a plurality of high-speed signals of the cable body.

[0014] Optionally, the connector further comprises a fourth pin used for grounding.

[0015] Optionally, the connector further comprises a power taking module and a logic processing module.

[0016] The input end of the power taking module is connected with at least one first pin, and the output end is connected with the logic processing module; the power taking module is used for generating a voltage according to the sideband signal connected with the first pin, so as to supply power to the logic processing module.

[0017] The logic processing module is used for obtaining cable connection scene information, determining the closing information of the switch in each first circuit in each path switching circuit based on the cable connection scene information, and controlling the switch in each first circuit based on the closing information.

[0018] Optionally, the power taking module comprises a rectifier module, a filter module and a voltage stabilizing module.

[0019] Optionally, the rectifier module is a diode.

[0020] Optionally, the filter module is a capacitor.

[0021] Optionally, the connector further comprises:

[0022] An information generating module is configured to generate cable connection scene information and send the cable connection scene information to the logic processing module.

[0023] Optionally, the information generating module is a dial switch.

[0024] Optionally, the logic processing module comprises a communication module,

[0025] The communication module is configured to communicate with an external device to obtain cable connection scene information sent by the external device.

[0026] According to a second aspect of the present application, an embodiment of the present application provides a sideband signal processing method applied to a cable, the cable comprising a cable body and a connector connected to the cable body; wherein the connector comprises a plurality of first pins, a plurality of path switching circuits connected to the plurality of first pins, a power taking module, and a logic processing module; the plurality of first pins are configured to connect a plurality of sideband signals; the plurality of path switching circuits are configured to be connected to a plurality of second pins of an external device one by one; the plurality of second pins of the external device are configured to connect the plurality of sideband signals; each path switching circuit comprises a plurality of first circuits connected to the plurality of first pins respectively; each first circuit comprises a first field effect transistor, a second field effect transistor, a first resistor, a second resistor, and a switch; a source of the first field effect transistor is connected to a first pin, a gate is connected to a first end of the first resistor, a gate of the second field effect transistor, and a first end of the second resistor respectively, and a drain is connected to a second end of the first resistor and a source of the second field effect transistor respectively; a first end of the switch is connected to a second end of the second resistor, and a second end is configured to be grounded; a drain of the second field effect transistor is configured to be connected to a second pin of the external device; an input end of the power taking module is connected to at least one first pin, and an output end is connected to the logic processing module; the power taking module is configured to generate a voltage based on a sideband signal connected to the first pin to supply power to the logic processing module.

[0027] The method comprises:

[0028] The logic processing module obtains the cable connection scene information;

[0029] Based on the cable connection scene information, the closing information of the switch in each first circuit in each path switching circuit is determined;

[0030] Based on the closing information, the switch in each first circuit is controlled, so that the plurality of first pins of the cable are connected to the plurality of second pins of the external device in correspondence, and the corresponding first pin and second pin are configured to connect the same sideband signal.

[0031] Optionally, based on the cable connection scene information, the closing information of the switch in each first circuit in each path switching circuit is determined, comprising:

[0032] The switch closing information of each first circuit in each path switching circuit is found based on the cable connection scene information from a preset correspondence between the cable connection scene information and the switch closing information of each first circuit.

[0033] Optionally, the connector further comprises an information generation module,

[0034] The cable connection scene information is obtained by the logic processing module, including:

[0035] The cable connection scene information is generated by the information generation module, and is sent to the logic processing module, so that the logic processing module obtains the cable connection scene information.

[0036] Optionally, the logic processing module comprises a communication module,

[0037] The cable connection scene information is obtained by the logic processing module, including:

[0038] The cable connection scene information sent by the external device is obtained by the communication module of the logic processing module.

[0039] According to a third aspect of the present application, an embodiment of the present application provides a sideband signal processing device, applied to a cable, the cable comprising a cable body, a connector connected with the cable body, a power taking module and a logic processing module; wherein the connector comprises a plurality of first pins and a plurality of path switching circuits connected with the plurality of first pins; the plurality of first pins are used for connecting a plurality of sideband signals; the plurality of path switching circuits are used for one-to-one corresponding connection with a plurality of second pins of an external device; the plurality of second pins of the external device are used for connecting the plurality of sideband signals; each path switching circuit comprises a plurality of first circuits respectively connected with the plurality of first pins; each first circuit comprises a first field effect transistor, a second field effect transistor, a first resistor, a second resistor and a switch; the source of the first field effect transistor is connected with the first pin, the gate is connected with the first end of the first resistor, the gate of the second field effect transistor and the first end of the second resistor respectively, and the drain is connected with the second end of the first resistor and the source of the second field effect transistor respectively; the first end of the switch is connected with the second end of the second resistor, and the second end is used for grounding; the drain of the second field effect transistor is used for connecting with the second pin of the external device; the input end of the power taking module is connected with at least one first pin, and the output end is connected with the logic processing module; the power taking module is used for generating a voltage according to the sideband signal connected with the first pin, to supply power to the logic processing module;

[0040] The device comprises:

[0041] The cable connection scene information is obtained by the logic processing module, including:

[0042] determining module, configured to determine, based on the cable connection scene information, closing information of the switch in the first circuit of each path switching circuit;

[0043] The control module is configured to control the switch in the first circuit based on the closing information, so that the plurality of first pins of the cable are connected to the plurality of second pins of the external device in correspondence, and the corresponding first pins and second pins are used for the same sideband signal connection.

[0044] According to the fourth aspect of the present application, the embodiments of the present application provide a computer readable storage medium, which stores computer instructions, and the computer instructions are used to make a computer execute the sideband signal processing method in the second aspect or any implementation manner of the second aspect.

[0045] According to the fifth aspect of the present application, the embodiments of the present application provide a computer program product, which includes a computer program or instructions, and the computer program or instructions are executed by a processor to realize the sideband signal processing method in the second aspect or any implementation manner of the second aspect.

[0046] The path switching circuit inside the cable can dynamically adjust the signal connection relationship, so that the first pin of the connector and the second pin of the external device can be correctly corresponded, even if the order of the sideband signals they originally used for connection does not match. This design avoids the incorrect transmission and identification of the sideband signals, improves the interoperability between heterogeneous devices, realizes the flexible switching of the sideband signal path, and solves the compatibility problem caused by the non-corresponding of the sideband signal pin positions between different devices. At the same time, since the signal path reconstruction is realized by pure hardware circuit, no additional power supply is needed, the passive characteristics of the cable are maintained, the system design is simplified, and the reliability is improved. This scheme makes the same cable adapt to multiple sideband signal definition specifications, reduces the hardware deployment cost and operation and maintenance complexity of the data center, and provides the possibility for backward compatibility of cross-generation devices.

[0047] The above description is only a summary of the technical solutions of the present application. In order to more clearly understand the technical means of the present application, the following specific embodiments of the present application can be implemented according to the content of the specification, and in order to make the above and other purposes, characteristics and advantages of the present application more obvious and easy to understand, the following specific embodiments of the present application are described in detail. BRIEF DESCRIPTION OF DRAWINGS

[0048] Figure 1 A schematic diagram of the incompatibility of the sideband signals of the main control board and the expansion board;

[0049] Figure 2 A structure schematic diagram of a cable in an embodiment of the present application;

[0050] Figure 3Fig. 1 is a schematic diagram of the 4 pairs of sideband signal paths freely switched in the embodiment of the present application;

[0051] Figure 4 Fig. 2 is a schematic diagram of the path switching circuit in the embodiment of the present application;

[0052] Figure 5 Fig. 3 is a schematic diagram of the switch matrix in the embodiment of the present application;

[0053] Figure 6 Fig. 4 is a schematic diagram of the connection of the sideband signals after the multi-path switching in the embodiment of the present application;

[0054] Figure 7 Fig. 5 is a schematic diagram of the structure of another cable in the embodiment of the present application;

[0055] Figure 8 Fig. 6 is a schematic diagram of the structure of another cable in the embodiment of the present application;

[0056] Figure 9 Fig. 7 is a schematic diagram of the logic control of the logic processing module in the embodiment of the present application;

[0057] Figure 10 Fig. 8 is a logic diagram of the power supply of the sideband signals in the embodiment of the present application;

[0058] Figure 11 Fig. 9 is a circuit diagram of the voltage generation of the analog sideband signals in the embodiment of the present application;

[0059] Figure 12 Fig. 10 is a schematic diagram of the power taking module structure in the embodiment of the present application;

[0060] Figure 13 Fig. 11 is a flowchart of a sideband signal processing method in the embodiment of the present application;

[0061] Figure 14 Fig. 12 is a schematic diagram of the structure of a sideband signal processing device in the embodiment of the present application. DETAILED DESCRIPTION

[0062] In order to make the purpose, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0063] In the traditional existing high-speed interconnection system, the compatibility problem caused by the non-corresponding pin position of the sideband signal between different devices seriously restricts the interoperability of heterogeneous devices. In the multi-specification coexistence environment, the difference in the definition of the sideband signal pin directly causes the misplacement of the signal path, resulting in that the control signal cannot be correctly mapped to the target device. For example, in the data center storage architecture using MCIO x8 high-speed cable, the host board card and the expansion board card respectively comply with SFF-TA-1005 and SFF-8848 specifications. As shown in Figure 1 , the sideband signals of the host board card include integrated circuit bus data signal (I2C_SDA), integrated circuit bus clock signal (I2C_SCL), reset signal (PERST_N) and board card ID identification signal (CTRL_ID). The sideband signals of the expansion board card also include integrated circuit bus data signal (I2C_SDA), integrated circuit bus clock signal (I2C_SCL), reset signal (PERST_N) and board card ID identification signal (CTRL_ID). The host board card distributes the I2C bus clock signal to the 19th pin of the connector, while the same type of signal of the expansion board card is defined in the 22nd pin. When using a conventional cable for direct interconnection, the I2C clock signal sent by the host board card is transmitted to the 19th pin of the expansion board card through the 19th pin of the cable, but this pin is defined as the board card ID identification signal input port in the expansion board card. The mismatch between the signal type and function caused by this results in that the expansion board card cannot complete device identification, and the ID signal received by the host board card is mixed with the clock pulse, causing bus arbitration failure. In this scenario, the rigid connection characteristics of the sideband signal path directly block the effective communication between heterogeneous devices, forcing the system to downgrade to a single board operation mode.

[0064] When facing the above problems, the present application first analyzes the physical layer limitation of the traditional cable architecture, and finds that the fixed signal path mapping mechanism is the core problem leading to the failure of heterogeneous device interconnection. The conventional solution tries to unify the pin allocation by increasing the adapter plate or redefining the connector standard, but faces the dilemma of high equipment modification cost and inability to backward compatible. Therefore, the present application turns to explore the possibility of realizing dynamic signal routing without changing the existing connector physical interface, and focuses on how to build a reconfigurable signal path network.

[0065] Therefore, the embodiment of the present application provides a cable, as shown in Figure 2 , which comprises:

[0066] The cable body 11; the connector 12 is connected with the cable body 11.

[0067] The connector 12 comprises a plurality of first pins 121 and a plurality of path switching circuits 122 connected with the plurality of first pins 121; the plurality of first pins 121 are used for connecting a plurality of sideband signals; the plurality of path switching circuits 122 are used for connecting a plurality of second pins of an external device one by one; the plurality of second pins of the external device are used for connecting the plurality of sideband signals.

[0068] Each path switching circuit 122 comprises a plurality of first circuits 1221 connected with the plurality of first pins 121 respectively; each first circuit 1221 comprises a first field effect transistor 1222, a second field effect transistor 1223, a first resistor 1224, a second resistor 1225 and a switch 1226; the source of the first field effect transistor 1222 is connected with the first pin 121, the gate is connected with the first end of the first resistor 1224, the gate of the second field effect transistor 1223 and the first end of the second resistor 1225 respectively, and the drain is connected with the second end of the first resistor 1224 and the source of the second field effect transistor 1223 respectively; the first end of the switch 1226 is connected with the second end of the second resistor 1225, and the second end is used for grounding; the drain of the second field effect transistor 1223 is used for connecting with the second pin of the external device.

[0069] In the embodiment, the path switching circuit 122 refers to an electronic module capable of dynamically changing the signal transmission path according to the control signal, which can be realized by combining the field effect transistor array and the switch resistor network, and different signal channels can be established by controlling the conduction state of the field effect transistor. The feature realizes signal path reconstruction through hardware circuit, and solves the problem of physical layer mismatch caused by the difference of sideband signal pin positions of different devices.

[0070] In the embodiment, in each first circuit 1221, the first field effect transistor 1222 and the second field effect transistor 1223 are connected in back-to-back field effect transistor connection. The back-to-back field effect transistor connection refers to a structure in which the source and the drain of two field effect transistors are connected in reverse series, and a PMOS tube is used to form a bidirectional conduction path, and the body diode characteristic is used to realize forced pull-down of low-level signal. The feature realizes signal bidirectional transmission compatibility under the condition of no external power supply, and guarantees the complete transmission of different level type signals.

[0071] In the embodiment, in each first circuit 1221, the switch 1226 can be a single-pole single-throw switch. The gate potential of the field effect transistor can be changed by the switch state. In this way, a passive control mechanism can be provided, and signal path switching can be realized by physical switch operation, avoiding complex power supply requirements. For example, as shown in Figure 2As shown, when switch 0 is closed, if the sideband signal output by the first pin 121 is low, the VGS (voltage difference between gate and source) of the first field effect transistor 1222 and the second field effect transistor 1223 is 0, so the first field effect transistor 1222 and the second field effect transistor 1223 are not turned on, but due to the body diode inside the field effect transistor, the signals on both sides of the first field effect transistor 1222 and the second field effect transistor 1223 are pulled to low by the body diode, so the sideband signal of the second pin of the external device is also low. If the sideband signal output by the first pin is high, the VGS of the first field effect transistor 1222 and the second field effect transistor 1223 is negative logic, so the first field effect transistor 1222 and the second field effect transistor 1223 are turned on, and both sides are conductive, so the sideband signal of the second pin of the external device becomes high.

[0072] When switch 0 is open, the VGS (voltage difference between gate and source) is 0, the first field effect transistor 1222 and the second field effect transistor 1223 are not conductive, and the body diode inside the first field effect transistor 1222 and the second field effect transistor 1223 cannot be pulled down to ground, so the signals on both ends are floating, i.e. not connected.

[0073] Therefore, the switch 1226 is closed, the path is closed, the switch 1226 is open, and the path is floating, i.e. not connected. Since this first circuit is a symmetric circuit, this first circuit can be compatible with both signal direction transmission and reception.

[0074] In this embodiment, the plurality of first circuits 1221 are connected in parallel, which means that each path switching circuit 122 includes a plurality of independent signal channels, and the circuit units with the same topology are arranged side by side, and each channel corresponds to a different sideband signal input. This feature forms a signal mapping matrix, providing multiple selectable signal sources for each external device pin, realizing flexible adaptation of pin definition.

[0075] In this embodiment, the state of the switch 1226 of each first circuit 1221 can be controlled in combination with Latin square control logic, which can effectively solve the problem of mismatching of sideband signal pin positions between different specification devices while maintaining the compatibility of the physical interface of the traditional connector. For example, as shown in Figure 3 If 4 pairs of sideband signals (Sideband0, Sideband1, Sideband2, Sideband3) are combined in pairs, there are 24 combination ways, i.e. 24 cable connection scenarios. Among them, GND is a ground signal. The specific implementation can use the path switching circuit as shown in Figure 4 to switch the sideband signal path, which requires 4 groups of path switching circuits as shown in Figure 4 , i.e. 16 switches. When switching the path, follow the Latin square control logic as shown in Figure 5The switch matrix shown is a Latin square. Among them, column 0-column 3 represents the 4-way first circuit in the path switching circuit, and row 0-row 3 represents the 4-way sideband signal (Sideband0, Sideband1, Sideband2, Sideband3). The control mode of the 16 switches (KEY00-KEY33) is: select 4 switches, so that each row and each column has exactly one switch selected, that is, a Latin square, and the corresponding column cannot be selected again.

[0076] For example Figure 6 As shown, the switch matrix selects column 1 in the 0th row, which can connect the left Sideband0 with the right Sideband1; the switch matrix can only select column 0, 2, 3 in the 1st row, and selects 0 here, which can connect the left Sideband1 with the right Sideband0; the switch matrix can only select column 2, 3 in the 2nd row, and selects 3 here, which can connect the left Sideband2 with the right Sideband3; the switch matrix can only select column 2 in the 3rd row, which can connect the left Sideband3 with the right Sideband2.

[0077] The cable provided by the embodiment of the present application can dynamically adjust the signal connection relationship through the path switching circuit inside the cable, so that the first pin of the connector and the second pin of the external device can be correctly matched, even if the originally connected sideband signals do not match in sequence. This design avoids the error transmission and identification of the sideband signals, improves the interoperability between heterogeneous devices, realizes the flexible switching of the sideband signal path, and solves the compatibility problem caused by the non-corresponding of the sideband signal pin positions between different devices. At the same time, since the signal path reconstruction is realized by using a pure hardware circuit, no additional power supply is needed, the passive characteristics of the cable are maintained, the system design is simplified, and the reliability is improved. This scheme enables the same cable to adapt to multiple sideband signal definition specifications, reduces the hardware deployment cost and operation and maintenance complexity of the data center, and provides the possibility for backward compatibility of cross-generation devices.

[0078] In an optional embodiment, when the cable is provided with only a single connector, it can only realize one-way signal transmission and cannot meet the demand for bidirectional interconnection between different devices. Since the external device usually needs to be bidirectionally connected to realize signal transmission matching, the single-connector structure will cause the cable to be unable to adapt to the difference in sideband signal pin definitions of the two devices, thereby causing signal transmission interruption or function failure.

[0079] To this end, the present application further provides that the number of connectors is two, such as Figure 7 As shown, one connector 12 is connected to the first end of the cable body 11, and the other connector 12 is connected to the second end of the cable body 11.

[0080] Two connectors 12 are symmetrically arranged at the two ends of the cable body 11. Each connector 12 includes a plurality of first pins and corresponding path switching circuits. The number of first pins can be 4, 8, or 10. For example, in an embodiment, 4 pins are used to transmit 4-channel sideband signals. The field effect tube in the path switching circuit can be a PMOS tube. The conduction direction of the drain and source of the PMOS tube is independent of the signal transmission direction, thereby realizing bidirectional signal transmission compatibility. The path switching circuits of the two connectors are independently configured. For example, the first pin of the left connector is connected to the second pin of the right connector through the switch matrix in the path switching circuit to form a programmable mapping relationship. The mapping relationship follows the Latin square control logic, ensuring that there is only one conduction path in each row and each column.

[0081] Specifically, when the first end connector of the cable body is connected to the interface of the external device A, the path switching circuit forms a conduction path by closing the corresponding switch according to the sideband signal pin definition of the device A. At the same time, when the second end connector of the cable body is connected to the external device B, the path switching circuit is independently configured to match the pin definition of the device B. For example, when the integrated circuit bus clock signal of the device A is defined at pin 2 and the corresponding signal of the device B is defined at pin 5, the path switching circuit controls the switch at the intersection of the second row and the fifth column in the switch matrix to close, thereby establishing a bidirectional conduction path. The symmetric design of the two connectors makes the signal transmission direction reversible. For example, when the device A is the transmitting end, the signal is transmitted at a low level through the body diode of the PMOS tube; when the device B is the transmitting end, the high-level signal is directly transmitted through the conduction channel of the PMOS tube. The physical separation design of the two connectors isolates the signal paths. For example, in a 10-pair sideband signal transmission scenario, the left and right connectors form independent ground loops, respectively, thereby avoiding signal crosstalk caused by common ground interference. Thus, the double-connector structure realizes adaptive matching of bidirectional signal definitions while maintaining the passive characteristics of the path switching circuit, and improves the stability of multi-channel signal parallel transmission through spatial isolation.

[0082] The embodiment of the present application realizes a bidirectional interconnection structure, which enables the cable to adapt to the sideband signal pin definitions of the external devices at both ends. The cable can independently configure the transmission paths of the sideband signals in two directions, ensuring that the signal is correctly mapped from the first pin of one end to the second pin of the other end through the path switching circuit. This design solves the compatibility problem of single-connector cables in bidirectional interconnection scenarios, enabling the cable to flexibly match the differences in sideband signal definitions between different devices while maintaining the integrity and bidirectional configurability of signal transmission. The double-connector structure physically separates the signal paths at both ends, thereby avoiding signal cross interference and enhancing the stability and reliability of the cable in complex connection scenarios.

[0083] In an optional embodiment, the connector is proposed to realize adaptive connection of multiple sideband signals through path switching circuit, however, in the specific implementation process, due to the difference in the definition of sideband signal types by different devices, the key control signal type cannot be matched when the cable body is interconnected with external devices, for example, there is a problem that bus control signals and device identification signals cannot be distinguished, thereby causing insufficient adaptation accuracy of signal path switching.

[0084] To this end, the present application further proposes that the multiple sideband signals include integrated circuit bus data signals, integrated circuit bus clock signals, reset signals and board card ID identification signals.

[0085] Among them, the integrated circuit bus data signals realize data interaction between devices through differential transmission mode, and the transmission rate can be set to the range of 100 kHz to 3.4 MHz; the integrated circuit bus clock signal adopts a synchronous trigger mechanism, and the phase deviation is controlled within ±5% to maintain timing consistency; the reset signal triggers the hardware reset operation through a low-level pulse, and the pulse width is configured to be in the interval of 1 ms to 50 ms; the board card ID identification signal adopts a single-wire serial encoding mode, and contains 8-bit to 32-bit address identification code. The bus data signal and the clock signal realize anti-interference transmission through a twisted pair structure, and form a complementary matching relationship in the path switching circuit; the reset signal and the board card ID identification signal are respectively connected to independent pull-up resistance networks to ensure that the signal level is stable in the disconnected state.

[0086] Specifically, when the path switching circuit performs signal routing, the bus data signal and the clock signal are synchronously switched to the target pin to avoid communication interruption caused by timing misalignment; the reset signal is transmitted through an independent channel to ensure that the hardware reset operation is not affected by other signal level fluctuations; the board card ID identification signal maintains the integrity of the unique code during the switching process to prevent address conflicts. The bus data signal transmission path adopts impedance matching design, and the characteristic impedance is controlled to be 90Ω±10% to reduce signal reflection; the clock signal path is additionally provided with an RC filter circuit, and the cutoff frequency is set to 1.5 times the signal frequency to suppress high-frequency noise; the reset signal path is configured with a transient voltage suppression diode, and the response time is less than 1 ns to eliminate electrostatic interference; the board card ID identification signal path is provided with a Schmitt trigger, and the hysteresis voltage range is set to 0.3V to 1.2V to improve noise tolerance. Through the differentiated configuration of the four types of signals in electrical characteristics, timing requirements and functional logic, the path switching circuit can accurately distinguish and match the signal types defined by different devices while maintaining the compatibility of the physical interface, so that the adaptation error rate is reduced to below 0.1%.

[0087] The embodiments of the present application can effectively solve the problem of inconsistent definition of sideband signals between different devices. By clearly defining four key sideband signal types, a clear signal classification reference is provided for the path switching circuit. This enables the cable to flexibly match different types of sideband signals to the corresponding pins of external devices according to the actual connection scene. Thus, the present scheme significantly improves the compatibility of the cable between different specifications and devices, reduces connection errors caused by signal type confusion, ensures accurate transmission of key control signals such as reset signals, and at the same time guarantees the normal operation of core functions such as data communication, timing synchronization and identity recognition between devices. The flexibility of this adaptive capability greatly enhances the versatility of the cable, reducing the need for dedicated cables in complex systems, thereby simplifying system design and maintenance.

[0088] In an optional embodiment, when the back-to-back field effect tube structure is used in the path switching circuit to realize bidirectional transmission of signals, the selection of the field effect tube directly affects the threshold voltage characteristics and the body diode conduction direction when the signal is turned on. If other types of field effect tubes are used, it may cause problems such as level mismatch, excessive conduction path voltage drop, or inability to effectively use the body diode to maintain signal integrity during signal transmission, thereby affecting the reliability of sideband signal switching.

[0089] To this end, the present application further proposes that the first field effect tube is a PMOS tube, and the second field effect tube is a PMOS tube.

[0090] In which, the source of a PMOS tube is directly connected with the first pin, and the gate forms a control loop with the ground switch through a resistance voltage dividing network composed of the first resistor and the second resistor. When the switch is closed, the gate voltage is pulled down to the ground potential. At this time, if the signal end is high, a negative voltage difference is formed between the source and the gate, so that the PMOS tube enters the conduction state. The drain-source voltage drop in this conduction state can be controlled within the range of 0.1V to 0.3V, effectively reducing the conduction loss of the signal path. In the off state of the switch, the gate potential is lifted to a voltage level close to that of the source through the resistance voltage dividing network. At this time, the body diode direction of the PMOS tube matches the signal transmission direction, and the signal integrity can be maintained through the forward conduction of the body diode under low-level signals. The threshold voltage range of the PMOS tube is preferably -0.7V to -1.5V, which ensures that there is no false triggering in a weak leakage current environment.

[0091] Specifically, when a signal is input from the cable body end, a high-level signal is transmitted to the external device end through the source-drain conduction channel of the PMOS tube in the on state. At this time, the body diode of the PMOS tube is in a reverse blocking state, avoiding signal shunting. When a low-level signal is input from the external device end, if the switch is in an off state, the body diode of the PMOS tube is forwardly conducted, pulling down the signal end potential to a low level, maintaining signal integrity. The structure cooperates with the second PMOS tube in a back-to-back layout to form a bidirectional symmetric conduction path, so that the signal transmission direction is no longer limited by the unidirectional conduction characteristic of the field effect tube. In a passive control scenario, the high threshold voltage characteristic of the PMOS tube can effectively suppress the false conduction caused by environmental noise or leakage current, and the typical leakage current value can be controlled below 1nA. Through the synergistic effect of the resistance voltage division network and the ground switch, the gate control voltage of the PMOS tube is always dynamically balanced with the signal end potential, ensuring reliable conduction or blocking under different signal levels.

[0092] Therefore, by controlling the closing and opening of the switch, the conduction and disconnection of the signal path can be realized. Since a symmetric circuit design is adopted, the circuit can be compatible with bidirectional signal transmission.

[0093] The embodiment of the present application realizes reliable signal transmission in a passive control scenario. Specifically, the PMOS tube is adopted as the first field effect tube, and a symmetric conduction characteristic is formed with the second field effect tube (also a PMOS tube), solving the problems of signal level attenuation and direction dependence. When the switch is closed, the gate voltage of the PMOS tube is controlled by the resistance voltage division network and the ground switch, and the design of the source connected to the signal end forms a negative gate-source voltage difference when the signal is high, thereby reliably conducting the signal path. When the switch is open, the body diode direction of the PMOS tube matches the signal transmission direction, and the signal integrity can be maintained through the body diode at a low level. This selection cooperates with the back-to-back structure, so that the signal can be transmitted bidirectionally through the conduction characteristic of the PMOS or the body diode path regardless of whether it is input from the cable body end or the external device end. At the same time, the high threshold voltage characteristic of the PMOS tube can avoid false conduction caused by weak leakage current, ensuring that the signal path is connected only under explicit control, and improving the reliability of the sideband signal switching.

[0094] In an optional embodiment, the connector realizes adaptive configuration of the sideband signal through the path switching circuit, but in a high-speed signal transmission scenario, the connector also needs to set a separate pin for high-speed signals.

[0095] In this regard, the present application further proposes that the connector further comprises a plurality of third pins for connecting a plurality of high-speed signals of the cable body.

[0096] The third pin adopts a physical layout independent of the sideband signal transmission channel, and the number thereof matches the number of high-speed signal channels carried by the cable body. The third pin can be provided in a differential pair structure, and a shielding layer or a ground isolation strip is arranged between adjacent pins. For example, the number of third pins can be 4 to 8, the pitch is 0.5 mm to 1.0 mm, and a gold-plated contact surface is adopted to reduce impedance. The arrangement of the third pins can follow the pin distribution mode required by the high-speed signal transmission specification, such as the PCIe Gen4 or SAS 12Gbps standard.

[0097] Specifically, the third pin is directly connected to the high-speed signal transmission line of the cable body to form a dedicated transmission channel independent of the sideband signal path. When the high-speed signal is transmitted through the third pin, the signal path thereof is kept at a physical distance of 0.5 mm or more from the first pin of the sideband signal in space, and is electromagnetically shielded by a ground isolation layer. For example, when transmitting a PCIe 4.0x8 signal, 8 pairs of high-speed differential signals are independently transmitted through 16 third pins, and the sideband signal is dynamically configured through the first pin and the path switching circuit. This physical isolation design enables the high-speed signal transmission bandwidth to be increased to 16 GT / s, the bit error rate to be reduced to below 1E-15, and the sideband signal switching response time to be kept within 10 ns. Through the independent pin layout, the impedance continuity of the high-speed signal path is guaranteed, the signal reflection loss is reduced to below -30 dB, and the sideband signal path can still be configured in 24 or more combinations through a field effect transistor matrix.

[0098] The embodiments of the present application enable the cable to simultaneously transmit high-speed signals and sideband signals, and realize physical isolation of the high-speed signals and the sideband signals.

[0099] In an optional embodiment, the connector includes a plurality of signal pins and a path switching circuit to solve the sideband signal compatibility problem. However, during signal transmission, since the high-speed signal and the sideband signal share the cable body, the lack of effective ground pins will cause the signal loop to be incomplete, which may cause signal interference, increased noise, and decreased signal integrity.

[0100] To this end, the present application further provides that the connector further includes a fourth pin for grounding.

[0101] The fourth pin can be arranged in the edge area of the connector and spaced apart from the plurality of first pins and third pins, for example, made of copper alloy material to reduce contact resistance. The fourth pin and the shielding layer of the cable body can be connected by conductive glue or welding to achieve low impedance connection, and the ground impedance can be controlled within 50 milliohms. Further, the number of fourth pins can be adjusted according to the signal transmission rate, for example, two fourth pins can be symmetrically arranged to form a double-loop structure when the transmission rate exceeds 10 Gbps. The introduction of the fourth pin and the field effect tube in the path switching circuit form a complement, when the second field effect tube is turned on, the fourth pin provides a low impedance loop for the drain current, avoiding the gate voltage drift caused by charge accumulation.

[0102] Specifically, the fourth pin is directly connected to the equipment chassis or system ground plane to form a closed reference potential network. During high-speed signal transmission, the fourth pin absorbs the common-mode interference current between the cable body and the external environment, reducing the capacitive coupling between the signal lines. For example, during the switching process of the sideband signal, when the first field effect tube and the second field effect tube are turned on at the same time, the fourth pin can quickly lead the transient current generated during switch switching to the ground, shortening the signal rise time by about 30%. At the same time, the fourth pin and the third pin form a spatial isolation of the high-speed signal loop, and the actual measurement shows that it can reduce the near-end crosstalk by more than 15 dB. In the scenario of parallel transmission of sideband signals and high-speed signals, the ground path of the fourth pin reduces the signal return area by 60%, effectively suppressing electromagnetic radiation. Further, the ground characteristics of the fourth pin and the resistance value of the second resistor in the path switching circuit form a match, when the second resistor is 10 kilohms, it can ensure that the signal line potential is stable within ±0.2V in the off state of the switch, avoiding false triggering.

[0103] In the embodiment, by adding a dedicated ground pin in the connector, a stable reference ground is provided for high-speed signals and sideband signals. This design makes the signal transmission line have a clear loop path, effectively reducing the crosstalk and noise interference between signals.

[0104] In an optional embodiment, the design of free configuration of the sideband signal path through the passive switching circuit faces the problems of high configuration complexity of the switch matrix, tedious manual operation, and inability to dynamically adjust when the number of sideband signals is large. At the same time, since the cable physical interface is not provided with a dedicated power pin, the traditional logic control module cannot be directly powered, making it difficult to introduce an intelligent control mechanism.

[0105] To this end, the application further proposes a scheme of adding a power module and a logic processing module in the connector. For example, Figure 8As shown, the input terminal of the power supply module 13 is connected to at least one first pin 121, and the output terminal is connected to the logic processing module 14; the power supply module 13 is used to generate voltage according to the sideband signal connected to the first pin 121 to supply power to the logic processing module 14.

[0106] The logic processing module 14 is used to obtain cable connection scenario information; based on the cable connection scenario information, determine the closing information of the switch in each first circuit 1221 of each path switching circuit 122; and control the switch in each first circuit 1221 based on the closing information.

[0107] In this embodiment, the logic processing module 14 controls the switch matrix in the path switching circuit based on the configuration input, i.e., the cable connection scenario information. Figure 9 As shown.

[0108] In this embodiment, since the cable does not contain power signals, the power supply problem for the logic processing module 14 needs to be addressed. For example... Figure 10 As shown, this application proposes a method for solving the power supply problem by drawing power from sideband signals, and aims to achieve the following based on this method: Figure 9 The functional logic processing module also needs to meet the following requirements. Figure 10 Requirements: ultra-low power consumption, low voltage input, and power-saving latch.

[0109] In this embodiment, the design for powering the sideband signals was verified. For example... Figure 11 As shown, the sideband signal used for power generation is an I2C clock signal with a level of 3.3V and a frequency of 100kHz rectangular wave. By using a VG1 waveform generator to simulate the low level of the sideband signal and configuring a 1K pull-up resistor (as shown in R1), a power supply of 1.2V / 0.12mA can be generated (load R2=1kΩ). If the power supply is directly pulled up (SW-SPST1 closed loop, SW-SPST1 open), a power supply capability of 1.2V / 1.6mA can be achieved. Diode D1 is used for rectification, and capacitor C1 is used for filtering. Based on the power supply capability, a suitable logic processing module can be selected, such as a microcontroller with an ultra-low power image processor (MCU), a main frequency of 125kHz, a power supply of 0.9V-1.65V, and external input / output interfaces (IO) that do not provide current externally, with a power consumption of no more than 40uA. Therefore, the power supply design of this application using the sideband signal for power generation is feasible. In addition, to ensure that its I / O does not supply current to the outside, the I / O of the microcontroller can be used to directly control the gate of the field-effect transistor instead of the switch to realize the on and off of the first circuit.

[0110] In some embodiments, since the sideband signal itself is not dedicated to the power supply signal, the voltage may have problems of fluctuation, noise interference or unstable polarity, and direct power supply may cause unstable power supply of the logic processing module, and even unable to work normally. Therefore, it is necessary to solve the technical defects of voltage distortion, ripple interference and unstable output when extracting power from non-power signal.

[0111] To this end, as shown in Figure 12 the present application further proposes a power extraction module including a rectifier module, a filter module and a voltage stabilizing module.

[0112] Among them, the rectifier module can adopt a bridge rectifier circuit or a full-wave rectifier circuit, for example, a rectifier bridge composed of four diodes, which is used to convert the alternating component or the direct current signal with unstable polarity in the sideband signal into a single polarity direct current signal; the filter module can use a parallel structure of electrolytic capacitor and ceramic capacitor, for example, a combination of 100 μF aluminum electrolytic capacitor and 0.1 μF ceramic capacitor, which is used to filter out high-frequency noise and reduce voltage ripple; the voltage stabilizing module can use a low-dropout linear voltage regulator, for example, an LDO chip with an output voltage set to 3.3 V, which dynamically adjusts the output through a feedback mechanism to stabilize the voltage within the working range of the logic processing module. The output end of the rectifier module is directly connected to the input end of the filter module, and the output end of the filter module is connected to the input end of the voltage stabilizing module, forming a three-stage energy conversion link.

[0113] Specifically, when the sideband signal is input to the rectifier module, the polarity alternating signal is converted into a unidirectional pulsating direct current, for example, a ±5V fluctuating signal is converted into a 0-5V pulsating signal; the filter module smooths the voltage waveform through the charge-discharge characteristics of the capacitor, for example, reduces the pulsating amplitude from ±1V to ±0.2V; the voltage stabilizing module stabilizes the input voltage at the target value through the internal reference voltage and error amplifier, for example, stabilizes the input voltage of 4.5-5.5V to output 3.3V±2%. This multi-stage processing structure makes the output voltage fluctuation less than 3% even if the sideband signal voltage fluctuation exceeds 50%, ensuring that the logic processing module continuously obtains stable power in the environment without a dedicated power supply, and further reliably controls the 16 PMOS tube switch array in the path switching circuit.

[0114] The implementation mode of the power taking module 13 includes extracting power from the sideband signal, such as converting alternating current signal to direct current through a rectification module, eliminating high-frequency noise through a filtering module, and outputting stable voltage through a voltage stabilizing module. The rectification module can implement half-wave or full-wave rectification by using a diode, the filtering module can perform smoothing processing by using a capacitor, and the voltage stabilizing module adjusts the voltage to the working range of the logic processing module by using a low-dropout linear voltage regulator. The power supply voltage range of the logic processing module can be 1.8 V to 3.3 V, depending on the amplitude of the sideband signal and the conversion efficiency of the power taking module. The logic processing module generates switch control instructions by analyzing the cable connection scene information, such as manually inputting scene codes through a dial switch or receiving scene configuration data sent by an external device through a communication module. The determination of the switch closing information implies the Latin square constraint rule, ensuring that only one switch is closed in each row and column, avoiding signal path conflicts.

[0115] In some embodiments, the connector further comprises:

[0116] The information generation module is configured to generate cable connection scene information and send the cable connection scene information to the logic processing module.

[0117] In some embodiments, the logic processing module comprises a communication module configured to communicate with an external device to obtain cable connection scene information sent by the external device.

[0118] Specifically, when the cable is connected to an external device, the power taking module extracts energy from the sideband signal, such as when the sideband signal is an I2C bus clock signal, the periodic level change generates a pulsating direct current after rectification by a diode, forms a basic voltage after filtering by a capacitor, and outputs a stable voltage for the logic processing module to run through a voltage stabilizing module. The logic processing module generates corresponding switch control signals according to the scene code set by the dial switch or the configuration instructions received by the communication module, matches the corresponding relationship between the preset cable connection scene information and the closing information of the switches in each first circuit (the corresponding relationship conforms to the Latin square rule), and generates corresponding switch control signals. For example, in a four-way signal switching scene, the logic processing module maps the scene information to the closing coordinates of a 4x4 switch matrix, and outputs high and low level signals through a GPIO port to drive the closing or opening of the switches in each first circuit. The switch control signal forms a loop by grounding through a second resistor, controls the gate voltage of the first field effect transistor and the second field effect transistor, and thus turns on or turns off the signal path. Thus, dynamic adaptation of the sideband signal path is achieved while retaining the physical compatibility of passive design. This scheme reduces the switch configuration complexity from manually operating 16 switches to 5 dial switches or automatic configuration through the cooperation of sideband signal power taking and logic control, significantly improving the operation efficiency in multi-device interconnection scenes.

[0119] The embodiments of the present application realize the establishment of a self-powered system in a cable without a dedicated power pin, so that the logic control module can analyze the device connection scene in real time and automatically generate switch control instructions. Through the energy conversion mechanism of the sideband signal, the physical limitation that the traditional passive cable cannot integrate the control circuit is broken, and the Latin square constraint rule is used to ensure the exclusivity and integrity of multi-path signal switching. The scheme converts the manual configuration of the switch matrix operation into automatic control based on scene recognition, significantly reduces the complexity of multi-signal path switching, enables the same cable to dynamically adapt to different specifications of device interfaces, and solves the compatibility problem caused by pin definition differences.

[0120] The embodiments of the present application also provide a sideband signal processing method applied to a cable, the cable comprising a cable body and a connector connected with the cable body; wherein the connector comprises a plurality of first pins, a plurality of path switching circuits connected with the plurality of first pins, a power taking module and a logic processing module; the plurality of first pins are used for connecting a plurality of sideband signals; the plurality of path switching circuits are used for one-to-one corresponding connection with a plurality of second pins of an external device; the plurality of second pins of the external device are used for connecting the plurality of sideband signals; each path switching circuit comprises a plurality of first circuits connected with the plurality of first pins respectively; each first circuit comprises a first field effect tube, a second field effect tube, a first resistor, a second resistor and a switch; the source electrode of the first field effect tube is connected with the first pin, the gate electrode is connected with the first end of the first resistor, the gate electrode of the second field effect tube and the first end of the second resistor respectively, and the drain electrode is connected with the second end of the first resistor and the source electrode of the second field effect tube respectively; the first end of the switch is connected with the second end of the second resistor, and the second end is used for grounding; the drain electrode of the second field effect tube is used for connection with the second pin of the external device; the input end of the power taking module is connected with at least one first pin, and the output end is connected with the logic processing module; the power taking module is used for generating a voltage according to the sideband signal connected with the first pin, to supply power to the logic processing module.

[0121] As shown in Figure 13 , the method comprises:

[0122] S130, the logic processing module acquires cable connection scene information.

[0123] S131, based on the cable connection scene information, the closure information of the switch in each first circuit in each path switching circuit is determined.

[0124] S132, based on the closure information, the switch in each first circuit is controlled, so that the plurality of first pins of the cable are connected with the plurality of second pins of the external device in correspondence, and the corresponding first pin and second pin used for connecting the sideband signal are the same.

[0125] The specific implementation manner can refer to the description of the cable in the above embodiments, which will not be repeated here.

[0126] The sideband signal processing method provided by the embodiment of the application can dynamically adjust the signal connection relationship by the path switching circuit inside the cable, so that the first pin of the connector and the second pin of the external device can be correctly matched, even if the original sideband signal order used for connection does not match. This design avoids the error transmission and identification of the sideband signal, improves the interoperability between heterogeneous devices, realizes the flexible switching of the sideband signal path, and solves the compatibility problem caused by the non-correspondence of the sideband signal pin positions between different devices. At the same time, since the signal path reconstruction is realized by pure hardware circuit, no additional power supply is needed, the passive characteristics of the cable are maintained, the system design is simplified, and the reliability is improved. This scheme enables the same cable to adapt to multiple sideband signal definition specifications, reduces the hardware deployment cost and operation and maintenance complexity of the data center, and provides the possibility for backward compatibility of cross-generation devices.

[0127] In an optional embodiment, step S131, based on the cable connection scene information, determining the closing information of the switch in each first circuit in each path switching circuit, comprising:

[0128] Based on the cable connection scene information, the closing information of the switch in each first circuit in each path switching circuit is found from the correspondence between the preset cable connection scene information and the closing information of the switch in each first circuit.

[0129] In an optional embodiment, the connector further comprises an information generation module.

[0130] Step S130, the logic processing module acquires the cable connection scene information, comprising:

[0131] The cable connection scene information is generated by the information generation module, and the cable connection scene information is sent to the logic processing module, so that the logic processing module acquires the cable connection scene information.

[0132] In an optional embodiment, the logic processing module comprises a communication module.

[0133] Step S130, the logic processing module acquires the cable connection scene information, comprising:

[0134] The communication module of the logic processing module acquires the cable connection scene information sent by the external device.

[0135] This application also provides a sideband signal processing device applied to a cable. The cable includes a cable body, a connector connected to the cable body, a power supply module, and a logic processing module. The connector includes multiple first pins and multiple path switching circuits connected to the multiple first pins. The multiple first pins are used to connect multiple sideband signals. The multiple path switching circuits are used to connect one-to-one with multiple second pins of an external device. The multiple second pins of the external device are used to connect multiple sideband signals. Each path switching circuit includes multiple first circuits respectively connected to the multiple first pins. Each first circuit includes a first field-effect transistor, a second field-effect transistor, and... A first resistor, a second resistor, and a switch; the source of a first field-effect transistor (FET) is connected to a first pin, the gate of the first FET is connected to the first end of the first resistor, the gate of the second FET, and the first end of the second resistor, and the drain of the first FET is connected to the second end of the first resistor and the source of the second FET; the first end of the switch is connected to the second end of the second resistor, and the second end is used for grounding; the drain of the second FET is used to connect to the second pin of an external device; the input of the power supply module is connected to at least one first pin, and the output is connected to the logic processing module; the power supply module is used to generate voltage according to the sideband signal connected to the first pin to power the logic processing module.

[0136] like Figure 14 As shown, the device includes:

[0137] Module 41 is used to acquire cable connection scenario information;

[0138] The determination module 42 is used to determine the closing information of the switch in each first circuit of each path switching circuit based on the cable connection scenario information.

[0139] The control module 43 is used to control the switches in each first circuit based on the closure information, so that multiple first pins of the cable are connected to multiple second pins of the external device, and the sideband signals used for connection of the corresponding first pins and second pins are the same.

[0140] This application provides a computer program product or computer program that includes computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the sideband signal processing method described above in this application.

[0141] This application provides a computer-readable storage medium storing executable instructions, wherein the executable instructions are executed by a processor, causing the processor to execute the sideband signal processing method provided in this application.

[0142] In some embodiments, a computer-readable storage medium can be a tangible medium that can contain or store a program for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable storage medium can be a machine-readable signal medium or a machine-readable storage medium. A computer-readable storage medium can include but is not limited to an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the computer-readable storage medium can include a wired or wireless connection, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0143] In some embodiments, executable instructions can be in the form of programs, software, modules, scripts, or code, written in any form of programming language, including compiled or interpreted languages, or declarative or procedural languages, and can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment.

[0144] By way of example, executable instructions can, but need not, reside in a file system's files, can be stored in a part of a file that holds other programs or data, can be stored as a single file dedicated to the program or code, or can be stored in multiple files, in a location separate from the files that hold programs or data that are executed with the program or code.

[0145] By way of example, executable instructions can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

[0146] To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user and a keyboard and a pointing device (e.g., a mouse or a trackball) by which the user can provide input to the computer. Other kinds of devices can be used to provide for interaction with a user as well; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form, including acoustic, speech, or tactile input.

[0147] The systems and techniques described here can be implemented in a computing system that includes a back end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front end component (e.g., a user computer having a graphical user interface or a Web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back end, middleware, or front end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network (LAN), a wide area network (WAN), and the Internet.

[0148] The computer system can include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server is generally established by computer programs running on the respective computers and having a client-server relationship to each other. The servers can be cloud servers, servers of a distributed system, or servers combined with a blockchain.

[0149] It should be understood that various forms of flow shown above can be used, with steps re-ordered, added, or removed. For example, various steps recited in the present application can be performed in parallel, in series, or in different orders, as long as the desired results of the technology disclosed in the present application are achieved, and the present application is not limited herein.

[0150] In addition, the terms "first", "second", etc., are used herein only to describe different instances, and do not imply or suggest relative importance or a number of the indicated technical features. Therefore, the features defined with "first", "second", etc. can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is two or more, unless otherwise specifically limited.

[0151] The above merely provides the specific implementation of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of the changes or replacements within the technical range disclosed by the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A cable, characterized by The cable connector comprises a cable body, a connector connected with the cable body, and a plurality of first pins for connecting a plurality of sideband signals. The connector comprises a plurality of first pins for connecting a plurality of sideband signals, and a plurality of path switching circuits connected with the plurality of first pins. Each path switching circuit comprises a plurality of first circuits connected with the plurality of first pins respectively. The first circuit comprises a first field effect transistor, a second field effect transistor, a first resistor, a second resistor, and a switch. The first field effect transistor is a PMOS transistor. The second field effect transistor is a PMOS transistor.

2. The cable of claim 1, wherein, The connector further comprises a plurality of third pins for connecting a plurality of high-speed signals of the cable body.

3. The cable of claim 1, wherein, The connector further comprises a fourth pin for grounding.

4. The cable of claim 1, wherein, The connector further comprises a power supply module and a logic processing module.

5. The cable of claim 1, wherein, The power supply module is connected with at least one first pin and outputs a voltage to the logic processing module.

6. The cable of claim 1, wherein, The logic processing module is configured to acquire cable connection scene information and determine the closing information of the switch in each first circuit based on the cable connection scene information.

7. The cable of claim 1, wherein, The closing information is used to control the switch in each first circuit.

8. The cable of claim 1, wherein, The power supply module comprises a rectifier module, a filter module, and a voltage stabilizing module. The rectifier module is a diode. The filter module is a capacitor. The connector further comprises an information generation module configured to generate the cable connection scene information and send the cable connection scene information to the logic processing module.

9. The cable of claim 8, wherein, The information generation module is a dial switch.

10. The cable of claim 9, wherein, The logic processing module comprises a communication module configured to communicate with an external device and acquire the cable connection scene information sent by the external device.

11. The cable of claim 9, wherein, ​ 12. The cable of claim 8, wherein, ​ ​ 13. The cable of claim 12, wherein, ​ 14. The cable of claim 8, wherein, ​ ​ 15. A method of processing a sideband signal, characterized by, The application is applied to a cable, the cable comprises a cable body and a connector connected with the cable body; wherein the connector comprises a plurality of first pins, a plurality of path switching circuits connected with the plurality of first pins, a power taking module and a logic processing module; the plurality of first pins are used for connecting a plurality of sideband signals; the plurality of path switching circuits are used for one-to-one corresponding connection with a plurality of second pins of an external device; the plurality of second pins of the external device are used for connecting the plurality of sideband signals; each path switching circuit comprises a plurality of first circuits connected with the plurality of first pins respectively; each first circuit comprises a first field effect transistor, a second field effect transistor, a first resistor, a second resistor and a switch; the source of the first field effect transistor is connected with the first pin, the gate is connected with the first end of the first resistor, the gate of the second field effect transistor and the first end of the second resistor respectively, and the drain is connected with the second end of the first resistor and the source of the second field effect transistor respectively; the first end of the switch is connected with the second end of the second resistor, and the second end is used for grounding; the drain of the second field effect transistor is used for connection with the second pin of the external device; the input end of the power taking module is connected with at least one first pin, and the output end is connected with the logic processing module; the power taking module is used for generating a voltage according to the sideband signal connected with the first pin, so as to supply power to the logic processing module; The method comprises: The logic processing module acquires cable connection scene information; Based on the cable connection scene information, the closing information of the switch in each first circuit in each path switching circuit is determined; Based on the closing information, the switch in each first circuit is controlled, so that the plurality of first pins of the cable are connected with the plurality of second pins of the external device, and the corresponding connected first pin and second pin are used for connecting the same sideband signal.

16. The sideband signal processing method of claim 15, wherein, Based on the cable connection scene information, the closing information of the switch in each first circuit in each path switching circuit is determined, comprising: Based on the cable connection scene information, the closing information of the switch in each first circuit in each path switching circuit is found from the corresponding relationship between the preset cable connection scene information and the closing information of the switch in each first circuit.

17. The sideband signal processing method of claim 15, wherein, The connector further comprises an information generating module, The logic processing module acquires cable connection scene information, comprising: The cable connection scene information is generated by the information generating module, and the cable connection scene information is sent to the logic processing module, so that the logic processing module acquires the cable connection scene information.

18. The sideband signal processing method of claim 15, wherein, The logic processing module comprises a communication module, The logic processing module acquires cable connection scene information, comprising: The communication module of the logic processing module acquires the cable connection scene information sent by the external device.

19. A sideband signal processing apparatus, characterized by comprising: The application is applied to a cable, which comprises a cable body, a connector connected with the cable body, a power taking module and a logic processing module. The connector comprises a plurality of first pins and a plurality of path switching circuits connected with the first pins. The first pins are used for connecting a plurality of sideband signals. The path switching circuits are used for connecting a plurality of second pins of an external device one by one. The second pins of the external device are used for connecting the plurality of sideband signals. Each path switching circuit comprises a plurality of first circuits connected with the first pins respectively. Each first circuit comprises a first field effect transistor, a second field effect transistor, a first resistor, a second resistor and a switch. The source of the first field effect transistor is connected with the first pin, the gate is connected with the first end of the first resistor, the gate of the second field effect transistor and the first end of the second resistor respectively, and the drain is connected with the second end of the first resistor and the source of the second field effect transistor respectively. The first end of the switch is connected with the second end of the second resistor, and the second end is used for grounding. The drain of the second field effect transistor is used for connecting the second pin of the external device. The input end of the power taking module is connected with at least one first pin, and the output end is connected with the logic processing module. The power taking module is used for generating a voltage according to the sideband signal connected with the first pin, so as to supply power to the logic processing module. The device comprises: An acquisition module is configured to acquire cable connection scene information. A determination module is configured to determine, based on the cable connection scene information, closing information of a switch in each first circuit in each path switching circuit. A control module is configured to control the switch in each first circuit based on the closing information, so that the plurality of first pins of the cable are connected with the plurality of second pins of the external device, and the corresponding connected first pin and second pin are used for connecting the same sideband signal.

20. A computer-readable storage medium, characterized in that, The computer readable storage medium stores computer instructions for causing a computer to execute the sideband signal processing method of any one of claims 15-18.

21. A computer program product comprising computer programs or instructions, characterized in that, The computer program or instructions are executed by a processor to implement the sideband signal processing method of any one of claims 15-18.

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