Message transmission method and device, electronic equipment and readable storage medium
By employing a non-uniform topology with missing corners in the on-chip network, and combining XY-dimensional and YX-dimensional routing algorithms to select a suitable transmission path, the problem of low link utilization in traditional MESH topologies is solved, achieving efficient message transmission and optimized layout and routing.
Patent Information
- Application Number
- CN202511290168.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-10
- Publication Date
- 2025-11-28
- Estimated Expiration
- 2045-09-10
AI Technical Summary
Traditional MESH topologies have low link utilization, resulting in low packet transmission efficiency in on-chip networks. Furthermore, conventional topologies are not suitable for large devices or scenarios where no devices need to be connected, leading to layout and wiring congestion and unnecessary production costs.
By employing an irregular topology with missing corners, and combining the XY-dimensional routing algorithm and the YX-dimensional routing algorithm, the target routing algorithm is selected based on the ordinates of the starting node and the target node to control the message transmission path, thereby achieving deadlock-free message transmission on the missing corner topology.
It improves link utilization, reduces layout and routing congestion, lowers production costs, increases chip yield, and enables efficient message transmission on corner-canceling topologies.
Smart Images

Figure CN120785809B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of network-on-chip technology, and particularly to a message transmission method and device, electronic equipment and readable storage medium. BACKGROUND
[0002] With the development of network-on-chip technology, the physical layout and linkage mode of network-on-chip nodes and channels are more and more, at present, in order to make each node in the network connected to as many other nodes as possible, mesh topology is often used to realize on-chip interconnection.
[0003] However, the link utilization rate on the diagonal in the traditional MESH topology is low, but the channel area overhead is the same as other links, resulting in low link utilization rate when transmitting messages in the network-on-chip. SUMMARY
[0004] The purpose of the embodiment of the present application is to provide a message transmission method, device, electronic equipment and readable storage medium to solve the problem of low link utilization rate. The specific technical solutions are as follows:
[0005] In the first aspect of the present application, a message transmission method is first provided, the method is applied to a network-on-chip, the topology of the network-on-chip includes at least one missing corner; the method comprises:
[0006] In response to a message transmission request, determining the starting node and the target node corresponding to the message transmission request;
[0007] In the case that the starting node is located in the missing corner routing area corresponding to the missing corner, based on the longitudinal coordinates of the starting node and the target node, determine the target routing algorithm from the XY dimension sequence routing algorithm and the YX dimension sequence routing algorithm;
[0008] Control the message transmission request indicated by the to-be-transmitted message according to the path indicated by the target routing algorithm, and transmit the message from the starting node to the target node.
[0009] Optionally, in the case that the missing corner is located in the upper area of the topology, the target routing algorithm is determined from the XY dimension sequence routing algorithm and the YX dimension sequence routing algorithm based on the longitudinal coordinates of the starting node and the target node, comprising:
[0010] In the case that the longitudinal coordinate of the target node is not less than the longitudinal coordinate of the starting node, the XY dimension sequence routing algorithm is determined as the target routing algorithm;
[0011] In the case that the longitudinal coordinate of the target node is less than the longitudinal coordinate of the starting node, the YX dimension sequence routing algorithm is determined as the target routing algorithm.
[0012] Optionally, in the case that the corner is located in a lower region of the topology, determining the target routing algorithm from the XY dimension routing algorithm and the YX dimension routing algorithm based on the longitudinal coordinates of the start node and the target node comprises:
[0013] In the case that the longitudinal coordinate of the target node is not greater than the longitudinal coordinate of the start node, determining the XY dimension routing algorithm as the target routing algorithm;
[0014] In the case that the longitudinal coordinate of the target node is greater than the longitudinal coordinate of the start node, determining the YX dimension routing algorithm as the target routing algorithm.
[0015] Optionally, the method further comprises:
[0016] In the case that the start node is not located in the corner region, determining the XY dimension routing algorithm as the target routing algorithm.
[0017] Optionally, the method further comprises:
[0018] For any node in the network-on-chip, if the longitudinal coordinate of the node is within the longitudinal coordinate range of the corner, determining that the node is located in the corner routing region corresponding to the corner.
[0019] Optionally, the control of the transmission of the to-be-transmitted packet indicated by the packet transmission request according to the path indicated by the target routing algorithm from the start node to the target node comprises:
[0020] Adding an algorithm identifier in the routing information corresponding to the to-be-transmitted packet indicated by the packet transmission request, the algorithm identifier being used to represent the target routing algorithm;
[0021] Taking the start node as a to-be-transmitted node, so that the to-be-transmitted node determines a target routing algorithm based on the algorithm identifier, and determines a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmits the to-be-transmitted packet to the next node;
[0022] Taking the next node as a new to-be-transmitted node, and performing again the operation of taking the to-be-transmitted node as a to-be-transmitted node, so that the to-be-transmitted node determines a target routing algorithm based on the algorithm identifier, and determines a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmits the to-be-transmitted packet to the next node, until the next node is the target node.
[0023] In a second aspect of the embodiment of the present application, a packet transmission device is further provided, which is applied to a network-on-chip, and a topology of the network-on-chip comprises at least one corner; the device comprises:
[0024] a first determining module, configured to determine a starting node and a target node corresponding to the message transmission request in response to the message transmission request;
[0025] a second determining module, configured to determine a target routing algorithm from an XY-dimensional sequence routing algorithm and a YX-dimensional sequence routing algorithm based on longitudinal coordinates of the starting node and the target node in a case that the starting node is located in a missing corner routing area corresponding to the missing corner;
[0026] a transmitting module, configured to control a to-be-transmitted message indicated by the message transmission request to be transmitted from the starting node to the target node according to a path indicated by the target routing algorithm.
[0027] In a third aspect of the present application, an electronic device is provided, which comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory complete communication with each other through the communication bus;
[0028] the memory is configured to store a computer program;
[0029] the processor is configured to execute the program stored in the memory, and implement the method in the first aspect.
[0030] In a fourth aspect of the present application, a computer readable storage medium is provided, which stores instructions, and when the instructions are run on a computer, the computer executes the method in the first aspect.
[0031] In a fifth aspect of the present application, a computer program product is provided, which comprises instructions, and when the instructions are run on a computer, the computer executes the method in the first aspect.
[0032] The message transmission method provided by the embodiment of the present application is applied to a network on chip, and the topology of the network on chip comprises at least one missing corner; in response to a message transmission request, a starting node corresponding to the message transmission request and a target node are determined; in the case that the starting node is located in a missing corner routing area corresponding to the missing corner, a target routing algorithm is determined from XY dimension sequence routing algorithms and YX dimension sequence routing algorithms based on the longitudinal coordinates of the starting node and the target node; and the message transmission request is controlled to transmit a to-be-transmitted message from the starting node to the target node according to a path indicated by the target routing algorithm. In this way, the embodiment of the present application realizes message transmission by adopting a topology comprising at least one missing corner, realizes chip interconnection on a missing corner heterogeneous topology, can place more large-scale devices in a larger area, reduces congestion of layout and wiring, and reduces unnecessary production overhead, which is beneficial to the improvement of backend layout and wiring convergence and chip yield, and the missing corner heterogeneous topology can also reduce links on a diagonal, thereby improving the link utilization rate of the message.
[0033] Meanwhile, the embodiment of the present application selects a target routing algorithm from XY dimension sequence routing algorithms and YX dimension sequence routing algorithms according to the longitudinal coordinates of the starting node and the target node in the case that the starting node of the message is located in a missing corner routing area, which can avoid the problem that some nodes cannot transmit messages when directly adopting XY dimension sequence routing algorithms, thereby realizing a message transmission mode suitable for a missing corner heterogeneous topology. BRIEF DESCRIPTION OF DRAWINGS
[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced.
[0035] Figure 1 is a step flow chart of a message transmission method in the embodiment of the present application;
[0036] Figure 2 is a schematic diagram of a missing corner heterogeneous topology provided by the embodiment of the present application;
[0037] Figure 3 is a schematic diagram of message transmission provided by the embodiment of the present application;
[0038] Figure 4 is a schematic diagram of path dependence provided by the embodiment of the present application;
[0039] Figure 5 is a structural schematic diagram of a message transmission device in the embodiment of the present application;
[0040] Figure 6 is a schematic diagram of an electronic device in the embodiment of the present application. DETAILED DESCRIPTION
[0041] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all of them. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative efforts belong to the scope of the present application.
[0042] The terms "first", "second" and the like in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second" and the like are generally a class, not limited to the number of objects, for example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B can represent: A exists alone, A and B exist together, and B exists alone. The character " / " generally represents an "or" relationship between the associated objects. The term "multiple" in the embodiments of the present application means two or more, and other quantifiers are similar.
[0043] Figure 1 A step flowchart of a packet transmission method in an embodiment of the present application, the method is applied to a network on a chip, the topology of the network on a chip includes at least one missing corner. As shown in the figure, the method can include: Figure 1
[0044] Step 101, in response to a packet transmission request, determining a starting node and a target node corresponding to the packet transmission request.
[0045] Step 102, in the case that the starting node is located in a missing corner routing area corresponding to the missing corner, determining a target routing algorithm from XY dimension order routing algorithm and YX dimension order routing algorithm based on the longitudinal coordinates of the starting node and the target node.
[0046] Step 103, controlling the packet to be transmitted indicated by the packet transmission request to be transmitted from the starting node to the target node according to the path indicated by the target routing algorithm.
[0047] For the steps 101-103, the embodiment of the present application can be applied to a Network-on-Chip (NoC) containing at least one corner missing area. The topology refers to the connection mode between the nodes of the Network-on-Chip, which is used to determine the physical layout and connection of the nodes and channels of the Network-on-Chip. Further, the node can be a router, which is a basic component of the Network-on-Chip, and is used for data storage and transmission.
[0048] The corner missing area refers to a missing corner, and the topology containing the corner missing area is a special topology. Specifically, the topology of the Network-on-Chip in the embodiment of the present application can contain one corner missing area or two corner missing areas, and the embodiment of the present application does not limit this.
[0049] It should be noted that when a chip is produced, a rectangular array is often used to arrange the chip on a wafer. When some special large devices are placed on the periphery of the chip, a large space is often occupied, causing waste of resources. In some scenarios, the peripheral devices or Intellectual Property Cores (IPs) connected to the corners of the Network-on-Chip are large, which leads to congestion when wiring is performed according to a conventional topology (for example, a MESH topology). Or in some other scenarios, no device needs to be connected to the corners of the Network-on-Chip, which leads to unnecessary production overhead. It can be understood that the actual needs of the above two scenarios do not match the shape of the conventional topology. In this case, the embodiment of the present application can use a topology containing at least one corner missing area to transmit a packet, so that more area can be used to place large devices on the corner missing area, reduce the congestion of layout and wiring, and reduce unnecessary production overhead.
[0050] The packet transmission request can be sent by a peripheral device or a functional module connected to a node, and the embodiment of the present application does not limit this. Specifically, the packet transmission request can include a packet to be transmitted (that is, a data packet) and a target node of the packet. Accordingly, the node receiving the packet transmission request is a starting node.
[0051] The corner missing area refers to a missing corner, and the topology containing the corner missing area is a special topology. Specifically, the topology of the Network-on-Chip in the embodiment of the present application can contain one corner missing area or two corner missing areas, and the embodiment of the present application does not limit this.
[0052] Optionally, the embodiment of the present application can further include the following steps:
[0053] For any node in the Network-on-Chip, if the vertical coordinate of the node is within the vertical coordinate range of the corner missing area, it is determined that the node is located in the corner missing area corresponding to the corner missing area.
[0054] wherein the longitudinal coordinate range of the missing corner refers to a coordinate coverage range of the missing corner in the longitudinal direction of the topology, and correspondingly, a node with a longitudinal coordinate within the longitudinal coordinate range is located in the missing corner routing area corresponding to the missing corner.
[0055] wherein the routing algorithm refers to a delivery rule of a data packet in a routing network, and determines a delivery route of the data packet, the XY dimension sequence routing algorithm refers to horizontal (X direction) first and vertical (Y direction) second path selection, and correspondingly, the YX dimension sequence routing algorithm refers to vertical (Y direction) first and horizontal (X direction) second path selection. It should be noted that in the related art, the routing scheme on the traditional MESH topology chip is the XY dimension sequence routing algorithm, which can reduce the combination logic depth of routing calculation and improve the chip frequency. At the same time, since the turning from Y direction to X direction is prohibited in the XY dimension sequence routing algorithm, the diagonal in the clockwise or counterclockwise path dependence is broken, so that the path dependence of loop is not generated in the message transmission routing process, and then the on-chip network message can be routed and transmitted on the chip without deadlock.
[0056] However, in the topology containing at least one missing corner, the nodes with part of longitudinal coordinates within the longitudinal coordinate range of the missing corner cannot use the XY dimension sequence routing algorithm to transmit the message to the nodes located in other areas. In this case, the application embodiment can determine the area as a missing corner routing area.
[0057] Further, in the case that the starting node is located in the missing corner routing area, the application embodiment can select one of the XY dimension sequence routing algorithm and the YX dimension sequence routing algorithm as a target routing algorithm based on the longitudinal coordinates of the starting node and the target node, and then can control the to-be-transmitted message to be transmitted from the starting node to the target node according to the path indicated by the target routing algorithm.
[0058] Optionally, the operation of controlling the to-be-transmitted message indicated by the message transmission request to be transmitted from the starting node to the target node according to the path indicated by the target routing algorithm, the application embodiment can specifically include:
[0059] S1031, adding an algorithm identifier in the routing information corresponding to the to-be-transmitted message indicated by the message transmission request, the algorithm identifier being used to represent the target routing algorithm.
[0060] S1032, taking the starting node as a to-be-transmitted node, so that the to-be-transmitted node determines the target routing algorithm based on the algorithm identifier, and determines the next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmits the to-be-transmitted message to the next node.
[0061] S1033, taking the next node as a new to-be-transmitted node, and performing again the operation of causing the to-be-transmitted node to determine a target routing algorithm based on the algorithm identification, and determining a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmitting the to-be-transmitted packet to the next node, until the next node is the target node.
[0062] Specifically, in the embodiment of the present application, after determining the target routing algorithm, an algorithm identification can be added in the routing information of the to-be-transmitted packet to represent the routing algorithm adopted by the to-be-transmitted packet. For example, when the target routing algorithm is XY-dimensional sequence routing algorithm, the identification added is XY, and correspondingly, when the target routing algorithm is YX-dimensional sequence routing algorithm, the identification added is YX. Of course, 1, 0 and other identifications can also be used for differentiation, which is not limited in the embodiment of the present application.
[0063] Further, the algorithm identification can be 1 bit, and of course other sizes can also be set, which is not limited in the embodiment of the present application.
[0064] Further, after adding the algorithm identification, each node in the process of packet transmission can determine the routing algorithm adopted by the packet according to the algorithm identification in the routing information, and determine the next node of the current node according to the routing algorithm. Specifically, the starting node can be taken as a to-be-transmitted node first, and the to-be-transmitted node is caused to determine a target routing algorithm based on the algorithm identification in the routing information, and determine a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmit the to-be-transmitted packet to the next node. Further, the determined next node can be taken as a new to-be-transmitted node, and the operation of causing the to-be-transmitted node to determine the next node and transmit is performed again, until the next node is the target node, at which time the to-be-transmitted packet has been transmitted to the target node, and the process of packet transmission has been completed.
[0065] In the embodiment of the present application, by adding the algorithm identification to the routing information of the to-be-transmitted packet in the above manner, each node receiving the to-be-transmitted packet can determine the routing algorithm adopted by the to-be-transmitted packet based on the algorithm identification, and each node can further adopt the pre-determined target routing algorithm to transmit the to-be-transmitted packet in turn until the target node, so that the packet transmission on the missing corner topology can be realized.
[0066] In summary, the packet transmission method provided by the embodiment of the present application is applied to a network on chip, the topology of the network on chip comprises at least one missing corner; in response to a packet transmission request, a starting node corresponding to the packet transmission request and a target node are determined; in a case where the starting node is located in a missing corner routing area corresponding to the missing corner, a target routing algorithm is determined from XY-dimensional sequence routing algorithms and YX-dimensional sequence routing algorithms based on the longitudinal coordinates of the starting node and the target node; and the packet to be transmitted indicated by the packet transmission request is transmitted from the starting node to the target node according to a path indicated by the target routing algorithm. In this way, the embodiment of the present application realizes packet transmission by using a topology comprising at least one missing corner, realizes chip interconnection on a missing corner heterogeneous topology, can place more large-scale devices in a larger area, reduces congestion of layout and wiring, and reduces unnecessary production overhead, which is conducive to improving backend layout and wiring convergence and chip yield, and the missing corner heterogeneous topology can also reduce links on a diagonal, thereby improving link utilization of the packet.
[0067] Meanwhile, the embodiment of the present application selects a target routing algorithm from XY-dimensional sequence routing algorithms and YX-dimensional sequence routing algorithms according to the longitudinal coordinates of the starting node and the target node in a case where the starting node of the packet is located in a missing corner routing area, which can avoid the problem that some nodes cannot perform packet transmission when directly using XY-dimensional sequence routing algorithms, thereby realizing a packet transmission mode that is adapted to a missing corner heterogeneous topology.
[0068] Optionally, in a case where the missing corner is located in an upper region of the topology, the operation of determining a target routing algorithm from XY-dimensional sequence routing algorithms and YX-dimensional sequence routing algorithms based on the longitudinal coordinates of the starting node and the target node can specifically comprise the following operations:
[0069] S21, in a case where the longitudinal coordinate of the target node is not less than the longitudinal coordinate of the starting node, the XY-dimensional sequence routing algorithm is determined as the target routing algorithm.
[0070] S22, in a case where the longitudinal coordinate of the target node is less than the longitudinal coordinate of the starting node, the YX-dimensional sequence routing algorithm is determined as the target routing algorithm.
[0071] The upper region can be the upper left or the upper right, and the embodiment of the present application does not limit this. The longitudinal coordinate refers to the coordinate of a node in the Y direction of the topology. Correspondingly, in a case where the missing corner is located in the upper region of the topology, the missing corner routing area is also the upper region of the topology, and in this case, the starting node located in the missing corner area cannot use the XY-dimensional sequence routing algorithm when sending a packet to some nodes because it cannot first perform transmission in the X direction.
[0072] Specifically, in the case that the vertical coordinate of the target node is not less than the vertical coordinate of the starting node, the target node is often located in the same row or above the starting node, and since the missing corner is located at the upper left or upper right, the path of the starting node to the node located in the same row or above the starting node is not blocked in the X direction by the missing corner, and the starting node is not blocked in the X direction by the missing corner when transmitting the message to the node above, and therefore the XY dimension sequence routing algorithm can be directly determined as the target routing algorithm.
[0073] Correspondingly, in the case that the vertical coordinate of the target node is less than the vertical coordinate of the starting node, the target node is located below the starting node, and since the missing corner is located at the upper left or upper right, the path of the starting node to the node located below the missing corner routing area is likely to be blocked in the X direction, and cannot be transmitted in the X direction first, and in this case, the YX dimension sequence routing algorithm can be determined as the target routing algorithm.
[0074] In the embodiment of the application, in the case that the missing corner is located in the upper area of the topology, the target routing algorithm can be flexibly determined according to the vertical coordinates of the target node and the starting node, so that the message to be transmitted can be transmitted by using the XY dimension sequence routing algorithm or the YX dimension sequence routing algorithm, and the routing algorithm without deadlock can be realized on the special-shaped topology of the missing corner.
[0075] Optionally, in the case that the missing corner is located in the lower area of the topology, the operation of determining the target routing algorithm from the XY dimension sequence routing algorithm and the YX dimension sequence routing algorithm based on the vertical coordinates of the starting node and the target node can specifically include the following operations.
[0076] S31, in the case that the vertical coordinate of the target node is not greater than the vertical coordinate of the starting node, the XY dimension sequence routing algorithm is determined as the target routing algorithm.
[0077] S32, in the case that the vertical coordinate of the target node is greater than the vertical coordinate of the starting node, the YX dimension sequence routing algorithm is determined as the target routing algorithm.
[0078] The lower area can be the lower left or the lower right, and the embodiment of the application does not limit this. The vertical coordinate refers to the coordinate of the node in the Y direction of the topology. Correspondingly, in the case that the missing corner is located in the lower area of the topology, the missing corner routing area is also the lower area of the topology, and in this case, the starting node located in the missing corner area cannot use the XY dimension sequence routing algorithm when transmitting the message to the node since the X direction transmission cannot be performed first.
[0079] Specifically, in the case that the vertical coordinate of the target node is not greater than the vertical coordinate of the starting node, the target node is usually located below the starting node, and since the missing corner is located at the lower left or the lower right, the path of the starting node to the node located below the starting node is not blocked in the X direction by the missing corner, and the starting node is not blocked in the X direction by the missing corner when transmitting the message to the node below, and thus the XY dimension sequence routing algorithm can be directly determined as the target routing algorithm.
[0080] Correspondingly, in the case that the vertical coordinate of the target node is greater than the vertical coordinate of the starting node, the target node is located above the starting node, and since the missing corner is located at the lower left or the lower right, the path of the starting node to the node located above the missing corner routing area is likely to be blocked in the X direction, and the transmission in the X direction cannot be performed first, and in this case, the YX dimension sequence routing algorithm can be determined as the target routing algorithm.
[0081] In the embodiment of the application, in the case that the missing corner is located in the lower region of the topology, the target routing algorithm to be used is flexibly determined according to the vertical coordinate of the target node relative to the starting node, so that the message to be transmitted can be transmitted by using the XY dimension sequence routing algorithm or the YX dimension sequence routing algorithm, and a non-deadlock routing algorithm can be implemented on the missing corner-shaped topology.
[0082] Optionally, the embodiment of the application can specifically include:
[0083] In the case that the starting node is not located in the missing corner area, the XY dimension sequence routing algorithm is determined as the target routing algorithm.
[0084] Specifically, in the case that the starting node is not located in the missing corner area, the XY dimension sequence routing algorithm can be directly used in the embodiment of the application. In this way, unnecessary processing operations can be reduced, and efficiency can be improved.
[0085] Exemplarily, Figure 2 is a schematic diagram of a missing corner-shaped topology provided by the embodiment of the application, as Figure 2 shown, in this example, the missing corners of the topology are located at the upper left and the upper right, and large devices can be arranged in the upper left region (domain 0) and the upper right region (domain 1), wherein the uppermost router (router, R) can be connected to other devices, for example, a double data rate synchronous dynamic random-access memory (Double Data Rate Synchronous Dynamic Random-Access Memory, DDR).
[0086] Further, Figure 3 is a schematic diagram of message transmission provided by the embodiment of the application, as Figure 3As shown, path 1 is a router in the notched corner routing area sending a packet to the router where the DDR (memory) is located above, at this time, the XY routing algorithm is adopted because the Y coordinate (YID) of the destination router is not less than the YID of the starting router. Correspondingly, path 2 is a router in the notched corner routing area sending a packet to the router where the device is located below, at this time, the YX routing algorithm is adopted because the YID of the destination router is less than the YID of the starting router. Path 3 is a router in the non-notched corner area sending a packet, which directly adopts the XY routing algorithm.
[0087] It should be noted that in the related art, for a special-shaped topology, a topology routing is often realized by configuring a register, and the input port and the output port are connected in correspondence by configuring the register in the routing. However, this method has configurability, and a large amount of redundant connections are brought, which affects the line density of the back-end implementation, and there are also some problems in the configuration of the router in the case of no connection. The signal from the register will affect the timing of the routing calculation of the main path, thereby affecting the performance of the whole chip.
[0088] The notched corner topology and the packet transmission method provided in the embodiments of the present application can more flexibly adapt to different device placement and back-end layout and wiring requirements. Meanwhile, by determining the target routing algorithm from the XY dimension sequence routing algorithm and the YX dimension sequence routing algorithm based on the Y coordinates of the target node and the starting node of the packet to be transmitted, the no-deadlock routing scheme can be realized on the notched corner topology.
[0089] Specifically, in the related art, the routing scheme on the traditional MESH topology chip is the XY dimension sequence routing algorithm, which can reduce the combination logic depth of routing calculation and improve the chip frequency. Meanwhile, in the XY dimension sequence routing algorithm, turning from the Y direction to the X direction is prohibited, thereby breaking the diagonal in the clockwise or counterclockwise path dependence, so that the path dependence of the loop is not generated in the packet transmission routing process, and then the on-chip network packet can be routed and transmitted on the chip without deadlock. Wherein, deadlock refers to the phenomenon that the entire on-chip network data packet stops transmission due to the mutual occupation of mutually dependent resources (for example, routing buffer or routing arbitrator). Wherein, the routing buffer refers to a logical functional block for temporarily storing data packets in the routing hardware, and the routing arbitrator refers to a logical functional block for determining which one obtains the output channel authorization from the data slice transmission request of multiple data channels according to a certain rule.
[0090] Further, in the embodiments of the present application, as shown in FIG. 2, the XY dimension sequence routing algorithm is adopted when the Y coordinate of the destination router is not less than the Y coordinate of the starting router, and the YX dimension sequence routing algorithm is adopted when the Y coordinate of the destination router is less than the Y coordinate of the starting router. Figure 2The devices connected to the three routers at the top of the missing corner topology cannot be routed to the devices connected to the routers at the lower left corner or the lower right corner through the XY dimension sequence routing algorithm due to the missing link. Therefore, the XY-YX hybrid routing algorithm is used in the embodiment of the present application to transmit the message in the missing corner topology. Specifically, as shown in Figure 2 In the missing corner topology, for all routers in the missing corner MESH topology, the XY routing algorithm can be used to transmit the message to the device above the position of the router. For the routers in the missing corner routing area, when they transmit the message to the device below the position of the router, the XY routing algorithm cannot be used to reach the destination. In this case, the YX routing algorithm needs to be used.
[0091] Further, Figure 4 is a path dependence diagram provided by the embodiment of the present application, as shown in Figure 4 As shown, by using the message transmission method provided by the embodiment of the present application, the left upper dependence and the right upper dependence (the path corresponding to the dashed line) in the forward / inverse two kinds of deadlock cycle path dependence can be broken by only adding one level of multiplexer (MUX) in the missing corner topology. Figure 4 The dashed line corresponds to the path), and the deadlock cycle is also broken in the missing corner topology, avoiding the mutual occupation of the mutually dependent resources to stop the transmission of the data packet in the whole network on chip, thereby forming a deadlock-free routing algorithm, realizing the high-performance and deadlock-free transmission of the message in the whole chip, and solving the problem of the routing mode not adapted to the heterogeneous topology in the related art. The edge corner utilization rate of the MESH interconnected chip is improved, the back-end pressure is reduced, and the routing deadlock scene is not generated.
[0092] It should be noted that, for the method embodiment, in order to simply describe, all are described as a series of action combinations, but those skilled in the art should know that the embodiment of the present application is not limited by the described action sequence, because according to the embodiment of the present application, certain steps can be performed in other order or simultaneously. Secondly, those skilled in the art should know that the embodiments described in the specification all belong to preferred embodiments, and the involved actions are not necessarily the necessary of the embodiment of the present application.
[0093] Figure 5 is a structure diagram of a message transmission device in the embodiment of the present application, which is applied to a network on chip, and the topology of the network on chip comprises at least one missing corner; as shown in Figure 5 The device 20 can comprise:
[0094] A first determination module 201 is configured to determine the starting node and the target node corresponding to the message transmission request in response to the message transmission request.
[0095] The second determining module 202 is configured to determine a target routing algorithm from an XY dimension sequence routing algorithm and a YX dimension sequence routing algorithm based on the longitudinal coordinates of the start node and the target node when the start node is located in the corner-omitted routing area corresponding to the corner.
[0096] The transmission module 203 is configured to control the to-be-transmitted packet indicated by the packet transmission request to be transmitted from the start node to the target node along a path indicated by the target routing algorithm.
[0097] Optionally, when the corner is located in the upper area of the topology, the second determining module comprises:
[0098] The third determining sub-module is configured to determine the XY dimension sequence routing algorithm as the target routing algorithm when the longitudinal coordinate of the target node is not less than the longitudinal coordinate of the start node.
[0099] The fourth determining sub-module is configured to determine the YX dimension sequence routing algorithm as the target routing algorithm when the longitudinal coordinate of the target node is less than the longitudinal coordinate of the start node.
[0100] Optionally, when the corner is located in the lower area of the topology, the second determining module comprises:
[0101] The fifth determining sub-module is configured to determine the XY dimension sequence routing algorithm as the target routing algorithm when the longitudinal coordinate of the target node is not greater than the longitudinal coordinate of the start node.
[0102] The sixth determining sub-module is configured to determine the YX dimension sequence routing algorithm as the target routing algorithm when the longitudinal coordinate of the target node is greater than the longitudinal coordinate of the start node.
[0103] Optionally, the apparatus further comprises:
[0104] The seventh determining module is configured to determine the XY dimension sequence routing algorithm as the target routing algorithm when the start node is not located in the corner-omitted routing area.
[0105] Optionally, the apparatus further comprises:
[0106] The eighth determining module is configured to determine that a node in the network on chip is located in the corner-omitted routing area corresponding to the corner when the longitudinal coordinate of the node is located in the longitudinal coordinate range of the corner.
[0107] Optionally, the transmission module comprises:
[0108] add a sub-module for adding an algorithm identifier in the routing information corresponding to the to-be-transmitted packet indicated by the packet transmission request, the algorithm identifier being used to represent the target routing algorithm;
[0109] a ninth determining module for taking the starting node as a to-be-transmitted node, causing the to-be-transmitted node to determine a target routing algorithm based on the algorithm identifier, determining a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmitting the to-be-transmitted packet to the next node;
[0110] an executing module for taking the next node as a new to-be-transmitted node, and executing again the operation of causing the to-be-transmitted node to determine a target routing algorithm based on the algorithm identifier, determining a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmitting the to-be-transmitted packet to the next node, until the next node is the target node.
[0111] In summary, the packet transmission device provided by the embodiment of the present application is applied to a network on chip, the topology of the network on chip contains at least one missing corner; in response to a packet transmission request, a starting node and a target node corresponding to the packet transmission request are determined; in the case that the starting node is located in a missing corner routing area corresponding to the missing corner, a target routing algorithm is determined from XY-dimensional sequence routing algorithms and YX-dimensional sequence routing algorithms based on the longitudinal coordinates of the starting node and the target node; and the to-be-transmitted packet indicated by the packet transmission request is transmitted from the starting node to the target node according to a path indicated by the target routing algorithm. In this way, the embodiment of the present application realizes packet transmission by adopting a topology containing at least one missing corner, realizes chip interconnection on a missing corner heterogeneous topology, can place more large-scale devices in a larger area, reduces congestion of layout and wiring, and reduces unnecessary production overhead, which is conducive to the improvement of backend layout and wiring convergence and chip yield, and the missing corner heterogeneous topology can also reduce links on a diagonal, thereby improving the link utilization rate of packets.
[0112] Meanwhile, the embodiment of the present application selects a target routing algorithm from XY-dimensional sequence routing algorithms and YX-dimensional sequence routing algorithms based on the longitudinal coordinates of the starting node and the target node in the case that the starting node of a packet is located in a missing corner routing area, which can avoid the problem that some nodes cannot transmit packets when directly adopting XY-dimensional sequence routing algorithms, thereby realizing a packet transmission mode that is adapted to a missing corner heterogeneous topology.
[0113] For the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and relevant parts are referred to the part of the description of the method embodiment.
[0114] Each of the embodiments in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments, and the same or similar parts between the embodiments can be referred to each other.
[0115] As to the packet transmission apparatus in the above embodiments, the specific manner in which each module performs the operation has been described in detail in the embodiments related to the method, and will not be described in detail here.
[0116] The embodiment of the application further provides an electronic device, comprising: a processor, a memory for storing processor-executable instructions, wherein the processor is configured to execute the packet transmission method.
[0117] Reference Figure 6 is a structural schematic diagram of an electronic device provided by the embodiment of the application. As shown in Figure 6 The electronic device comprises: a processor, a memory, a communication interface and a communication bus, the processor, the memory and the communication interface complete mutual communication through the communication bus; the memory is used for depositing at least one executable instruction, and the executable instruction makes the processor execute the packet transmission method of the foregoing embodiments.
[0118] It should be noted that the electronic device in the embodiment of the application comprises a mobile electronic device and a non-mobile electronic device.
[0119] The processor can be a CPU (Central Processing Unit, central processor), a general-purpose processor, a DSP (Digital Signal Processor, digital signal processor), an ASIC (Application Specific Integrated Circuit, application specific integrated circuit), an FPGA (Field Programmable Gate Array, field programmable gate array) or other programmable devices, transistor logic devices, hardware components or any combination thereof. The processor can also be a combination of computing functions, such as one or more microprocessor combinations, combinations of DSP and microprocessor, etc.
[0120] The communication bus can include a channel for transmitting information between the memory and the communication interface. The communication bus can be a PCI (Peripheral Component Interconnect, peripheral component interconnect) bus or an EISA (Extended Industry Standard Architecture, extended industry standard architecture) bus, etc. The communication bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6Only one line is used to represent a bus, but it could also be a combination of buses or bus segments, a simple wire, or various other means.
[0121] The memory can be a ROM (Read Only Memory) or other type of static storage device that can store static information and instructions, a RAM (Random Access Memory) or other type of dynamic storage device that can store information and instructions, an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory), a magnetic tape, a floppy disk, an optical data storage device, or the like.
[0122] The embodiment of the present application further provides a non-transitory computer readable storage medium, when instructions in the storage medium are executed by a processor of an electronic device (a server or a terminal), the processor can execute the packet transmission method shown in the embodiment of the present application. Figure 1 The packet transmission method shown in the embodiment of the present application.
[0123] The embodiment of the present application further provides a computer program product containing instructions, when the computer program product is run on a computer, the computer can execute the packet transmission method shown in the embodiment of the present application. Figure 1 The packet transmission method shown in the embodiment of the present application.
[0124] The embodiment of the present application further provides a chip, the chip comprises a processor and a communication interface, the communication interface is coupled with the processor, the processor is used for running a program or instructions, realizes each process of the packet transmission method embodiment and can achieve the same technical effect, to avoid repetition, here is not repeated.
[0125] It should be understood that the chip mentioned in the embodiment of the present application can also be called a system-level chip, a system chip, a chip system or a system-on-chip chip, etc.
[0126] Each embodiment in the specification is described in a progressive manner, and each embodiment focuses on the difference from other embodiments. The same and similar parts between each embodiment can be referred to each other.
[0127] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, device, or computer program product. Therefore, the embodiments of the present application can be realized wholly or partially by software, hardware, firmware, or any combination thereof. When realized by software, the embodiments of the present application can be realized wholly or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed by a computer, the computer instructions wholly or partially produce the processes or functions described in the embodiments of the present application. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center through a wired (for example, coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (for example, infrared, wireless, microwave, etc.) manner. The computer-readable storage medium can be any available medium accessible by a computer or a data storage device such as a server, data center, etc. that includes one or more available media sets. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)), etc.
[0128] The embodiments of the present application are described with reference to flowcharts and / or block diagrams of the method, terminal device (system), and computer program product according to the embodiments of the present application. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal devices to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal devices produce the functions described in the flowcharts and / or block diagrams. Figure 1 The functions described in one or more flows and / or blocks Figure 1 The functions described in one or more flows and / or blocks
[0129] These computer program instructions can also be stored in a computer-readable memory that can cause the computer or other programmable data processing terminal devices to work in a predictive manner, so that the instructions stored in the computer-readable memory produce a manufactured product including instruction devices that implement the functions described in the flowcharts and / or block diagrams. Figure 1 The functions described in one or more flows and / or blocks Figure 1 The functions described in one or more flows and / or blocks
[0130] These computer program instructions can also be loaded into computer or other programmable data processing devices to cause a series of operational steps to be performed on the computer or other programmable devices to produce a computer-implemented process such that the instructions which execute on the computer or other programmable devices provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flowcharts and / or blocks Figure 1 one or more flowcharts and / or blocks
[0131] Although preferred embodiments of the application have been described, those skilled in the art will recognize that additional modifications and changes can be made thereto without departing from the scope of the application. Accordingly, the appended claims are intended to cover all such modifications and changes as fall within the scope of the application.
[0132] Each of the embodiments in the present specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other. Each of the embodiments mainly explains the difference from other embodiments. In particular, for the system embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the related parts can be referred to the part of the method embodiments.
[0133] It should be noted that the acquisition of various data related processes in the embodiments of the present application are performed under the premise of complying with the corresponding data protection regulations and policies of the country where the device is located, and with the authorization given by the owner of the corresponding device.
[0134] Finally, it should be noted that the relationship terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "contain" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or terminal device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or terminal device. Without more limitations, the element defined by the statement "including a" does not exclude the presence of another identical element in the process, method, article or terminal device including the element.
[0135] The above describes in detail the message transmission method, device, electronic equipment and readable storage medium provided by the present application. The principles and implementation manners of the present application are described by using specific examples. The above example is only used to help understand the method of the present application and its core idea. Meanwhile, for those skilled in the art, according to the idea of the present application, the specific implementation manners and application ranges can be changed. In conclusion, the content of the specification should not be understood as a limitation of the present application.
Claims
1. A message transmission method, the method being applied to a network on chip, characterized in that, The topology of the network-on-chip comprises at least one corner; the method comprises: In response to a message transmission request, determining a starting node and a target node corresponding to the message transmission request; In a case where the starting node is located in a corner routing area corresponding to the corner, determining a target routing algorithm from XY-dimensional sequence routing algorithm and YX-dimensional sequence routing algorithm based on longitudinal coordinates of the starting node and the target node; Controlling a to-be-transmitted message indicated by the message transmission request to be transmitted from the starting node to the target node according to a path indicated by the target routing algorithm.
2. The method of claim 1, wherein, In a case where the corner is located in an upper region of the topology, the determining a target routing algorithm from XY-dimensional sequence routing algorithm and YX-dimensional sequence routing algorithm based on longitudinal coordinates of the starting node and the target node comprises: In a case where the longitudinal coordinate of the target node is not less than the longitudinal coordinate of the starting node, determining the XY-dimensional sequence routing algorithm as the target routing algorithm; In a case where the longitudinal coordinate of the target node is less than the longitudinal coordinate of the starting node, determining the YX-dimensional sequence routing algorithm as the target routing algorithm.
3. The method of claim 1, wherein, In a case where the corner is located in a lower region of the topology, the determining a target routing algorithm from XY-dimensional sequence routing algorithm and YX-dimensional sequence routing algorithm based on longitudinal coordinates of the starting node and the target node comprises: In a case where the longitudinal coordinate of the target node is not greater than the longitudinal coordinate of the starting node, determining the XY-dimensional sequence routing algorithm as the target routing algorithm; In a case where the longitudinal coordinate of the target node is greater than the longitudinal coordinate of the starting node, determining the YX-dimensional sequence routing algorithm as the target routing algorithm.
4. The method of claim 1, wherein, The method further comprises: In a case where the starting node is not located in the corner routing area corresponding to the corner, determining the XY-dimensional sequence routing algorithm as the target routing algorithm.
5. The method of claim 1, wherein, The method further comprises: For any node in the network-on-chip, if a longitudinal coordinate of the node is located in a longitudinal coordinate range of the corner, determining that the node is located in the corner routing area corresponding to the corner.
6. The method according to any one of claims 1 to 5, characterized in that, The controlling a to-be-transmitted message indicated by the message transmission request to be transmitted from the starting node to the target node according to a path indicated by the target routing algorithm comprises: Adding an algorithm identifier in routing information corresponding to the to-be-transmitted message indicated by the message transmission request, the algorithm identifier being used to represent the target routing algorithm; Taking the starting node as a to-be-transmitted node, so that the to-be-transmitted node determines a target routing algorithm based on the algorithm identifier, and determines a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmits the to-be-transmitted message to the next node; Taking the next node as a new to-be-transmitted node, and performing again the operation of taking the to-be-transmitted node as a to-be-transmitted node, so that the to-be-transmitted node determines a target routing algorithm based on the algorithm identifier, and determines a next node corresponding to the to-be-transmitted node based on the target routing algorithm, and transmits the to-be-transmitted message to the next node, until the next node is the target node.
7. A packet transmission device applied to a network on chip, comprising: The topology of the network-on-chip comprises at least one corner; the apparatus comprises: A first determining module, configured to determine a starting node and a target node corresponding to a message transmission request in response to the message transmission request; A second determining module, configured to determine a target routing algorithm from an XY dimension sequence routing algorithm and a YX dimension sequence routing algorithm based on longitudinal coordinates of the starting node and the target node in a case that the starting node is located in a missing corner routing area corresponding to the missing corner; A transmission module, configured to control a to-be-transmitted message indicated by the message transmission request to be transmitted from the starting node to the target node according to a path indicated by the target routing algorithm.
8. An electronic device, comprising: The computer device comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory complete mutual communication through the communication bus; The memory is used for storing a computer program; The processor is used for executing the program stored on the memory, and the method in any one of claims 1-6 is implemented.
9. A computer-readable storage medium having stored thereon a computer program, characterized in that, The program is executed by the processor, and the method in any one of claims 1-6 is implemented.
10. A computer program, characterized in that, The computer program is executed by the computer, and the method in any one of claims 1-6 is implemented.
Citation Information
Patent Citations
Link layer fault tolerance circuit design suitable for on-chip network system
CN102724115A
Routing method, device, equipment, medium and computer program product
CN118827528A