User mode memory management method, product, electronic equipment and storage medium

Abstract

The invention discloses a user mode memory management method, a product, electronic equipment and a storage medium, which are applied to the technical field of computer systems, and in order to solve the technical problems that the memory utilization rate is low, the allocation efficiency is low and the system performance is influenced, the invention provides a method for allocating a memory according to a memory allocation request sent by a first upper-layer service thread. Determining a first target central processing unit core corresponding to the first upper-layer service thread and the number of first memory pages contained in a memory block corresponding to the memory allocation request; determining a first target order according to the number of the first memory pages; determining a first target order sub-cache pool corresponding to the first target order from a local cache pool corresponding to the first target central processing unit core; and determining a first free memory block under the condition that the free memory block exists in the first target-order sub-cache pool, and allocating the first free memory block to the first upper-layer service thread. In the memory allocation process, the memory utilization rate, the memory allocation efficiency and the system performance can be improved.

Description

Technical Field

[0001] This application relates to the field of computer system technology, and in particular to a user-mode memory management method, product, electronic device, and storage medium. Background Technology

[0002] In computer systems, with the widespread adoption of multi-core processors and the ever-increasing demands on system performance, Non-United Memory Access (NUMA) architecture has been widely adopted due to its ability to effectively expand memory capacity and improve system performance. However, in related technologies, when the user-space memory management system does not have a memory block of the requested size in the local cache corresponding to the upper-layer application, it allocates a memory block larger than the requested size to the upper-layer application, resulting in wasted memory. Furthermore, multiple CPU cores sharing the entire local cache affects memory allocation efficiency and system performance.

[0003] In addition, the local cache has a fixed limit. If a thread suddenly makes a large number of memory requests, the cache is easily exhausted and will frequently fall back to the central cache, which will damage the performance and stability of the system. Summary of the Invention

[0004] This application provides a user-mode memory management method, product, electronic device, and storage medium, which can improve memory utilization, reduce memory waste, improve memory allocation efficiency, and enhance system performance during use.

[0005] This application provides a user-mode memory management method, including: Based on the memory allocation request sent by the first upper-layer business thread, determine the first target central processing unit core corresponding to the first upper-layer business thread and the number of first memory pages contained in the memory block corresponding to the memory allocation request; The first target order is determined based on the number of first memory pages; The first target order sub-cache pool corresponding to the first target order is determined from the local cache pool corresponding to the first target CPU core; wherein, a local cache pool is allocated to each CPU core on each node, and the local cache pool includes multiple sub-cache pools of different orders. The number of memory pages contained in a single memory block in two adjacent sub-cache pools increases by a single page as the order increases. The number of memory pages in each memory block in the sub-cache pool of the same order is the same. If there is a free memory block in the first target-level sub-cache pool, the first free memory block is determined and allocated to the first upper-level business thread.

[0006] This application also provides a user-mode memory management device, including: The first determining module is used to determine the first target central processing unit core corresponding to the first upper-layer business thread and the number of first memory pages contained in the memory block corresponding to the memory allocation request, based on the memory allocation request sent by the first upper-layer business thread. The second determining module is used to determine the first target order based on the number of first memory pages; The third determining module is used to determine the first target order sub-cache pool corresponding to the first target order from the local cache pool corresponding to the first target CPU core; wherein, each node allocates a local cache pool for each CPU core, the local cache pool includes multiple sub-cache pools of different orders, the number of memory pages contained in a single memory block in two adjacent sub-cache pools increases by a single page as the order increases, and the number of memory pages in each memory block in the sub-cache pool of the same order is the same; The first allocation module is used to determine the first free memory block and allocate it to the first upper-layer business thread when there is a free memory block in the first target-level sub-cached pool.

[0007] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing any of the above-described user-mode memory management methods when executing the computer program.

[0008] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described user-mode memory management methods.

[0009] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described user-mode memory management methods.

[0010] As can be seen from the above technical solution, the beneficial effects of the present invention are as follows: This application provides a user-mode memory management method, including: determining a first target CPU core corresponding to the first upper-layer business thread and the number of first memory pages contained in the memory block corresponding to the memory allocation request based on a memory allocation request sent by a first upper-layer business thread; determining a first target order based on the number of first memory pages; determining a first target order sub-cache pool corresponding to the first target order from the local cache pool corresponding to the first target CPU core; wherein, a local cache pool is allocated to each CPU core on each node, the local cache pool includes multiple sub-cache pools of different orders, the number of memory pages contained in a single memory block in two adjacent sub-cache pools increases sequentially by the number of pages as the order increases, and the number of memory pages in each memory block in the sub-cache pool of the same order is the same; if there is a free memory block in the first target order sub-cache pool, determining a first free memory block and allocating it to the first upper-layer business thread.

[0011] Therefore, in this application, for each node, a local cache pool is allocated for each CPU core of the node. The local cache pool includes multiple sub-cache pools of different orders. Following the order from smallest to largest, the number of memory pages contained in a single memory block in two adjacent sub-cache pools increases by one page as the order increases. That is, the number of memory pages contained in a memory block in the current order sub-cache pool is one more than the number of memory pages contained in a memory block in the previous order sub-cache pool. When the system receives a memory allocation request sent by the first upper-layer business thread, it can determine the corresponding first target CPU core and the number of first memory pages contained in the requested memory block based on the memory allocation request. Based on the number of first memory pages, it determines the corresponding first target order. Then, based on the first target CPU core, it determines the corresponding local cache pool. Next, it determines the first target order sub-cache pool from the local cache pool, and if there is a free memory block in the first target order sub-cache pool, it determines the first free memory block and allocates it to the first upper-layer business thread. Since the number of memory pages in the first allocated free memory block is the same as the number of memory pages requested in the memory allocation request, meaning the size of the allocated memory block is the same as the requested memory block size, there is no memory waste, thus improving memory utilization. Furthermore, since each CPU core corresponds to a local cache pool, memory block request conflicts will not occur even when multiple CPU cores are occupied, further improving memory allocation efficiency.

[0012] Furthermore, the present invention also provides corresponding implementation devices, electronic devices, and computer-readable storage media for user-mode memory management methods, further making the method more practical, and the devices, electronic devices, and computer-readable storage media have corresponding advantages. Attached Figure Description

[0013] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 A flowchart illustrating a user-mode memory management method provided in this application embodiment; Figure 2 A schematic diagram illustrating the correspondence between a central processing unit core and a local cache pool, provided for an embodiment of this application; Figure 3 A schematic diagram of a user-mode memory management architecture provided for an embodiment of this application; Figure 4 This application provides an arbitrary diagram of a memory allocation process. Figure 5 A schematic diagram illustrating the dynamic adjustment process of memory blocks in a local cache pool, provided for an embodiment of this application; Figure 6 This is a structural diagram of a user-mode memory management device provided in an embodiment of this application. Detailed Implementation

[0015] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0016] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0017] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0018] Embodiments of this application provide a user-mode memory management method, combined with, for example... Figure 1The flowchart shown illustrates the user-mode memory management method, which provides a detailed description of the method. The method includes the following steps, S110 to S140.

[0019] S110: Based on the memory allocation request sent by the first upper-layer business thread, determine the first target central processing unit core corresponding to the first upper-layer business thread and the number of first memory pages contained in the memory block corresponding to the memory allocation request.

[0020] It should be noted that each node (e.g., a NUMA (Non-Uniform Memory Access) node) may have multiple central processing unit cores (i.e., CPU cores or physical cores), such as... Figure 2 As shown in the embodiment of this application, for each node, a local cache pool PagePool is allocated to each CPU core from the node's local total cache pool, and this local cache pool is divided into multiple sub-cache pools. Each sub-cache pool includes multiple memory blocks. The sub-cache pools have different orders. According to the order from smallest to largest, the number of memory pages contained in the memory blocks of two adjacent sub-cache pools increases by one page. For example, the orders of the sub-cache pools from smallest to largest are order 0, order 1, order 2, ..., order 511, etc. The number of memory pages in each memory block of the order 0 sub-cache pool is 1. The number of memory pages in each memory block of the order 1 sub-cache pool is 2. The memory block consists of two consecutive memory pages. The number of memory pages in each memory block of the order 2 sub-cache pool is 3. The memory block consists of 3 consecutive memory pages. ... and so on. The number of memory pages in each memory block of the order 511 sub-cache pool is 512. The memory block consists of 512 consecutive memory pages.

[0021] In the user-mode memory management system, when a request for memory allocation from an upper-level business thread is detected, the memory allocation request sent by the first upper-level business thread that requested the memory allocation can be obtained. Based on the first upper-level business thread, the first target CPU core occupied by the first upper-level business thread can be determined, as well as the number of first memory pages corresponding to the memory block requested by the first upper-level business thread.

[0022] In practical applications, the user-mode memory management system can receive memory allocation requests sent by the first upper-level application thread by actively calling the provided API functions through the application. The memory allocation request includes the number of memory pages requested, that is, memory is requested in units of pages.

[0023] S120: Determine the first target order based on the number of first memory pages.

[0024] Understandably, after determining the number of first memory pages, the first target order corresponding to that number of first memory pages can be determined according to the division rules of each order. For example, if the number of first memory pages is 3, then the corresponding first target order is order 2.

[0025] S130: Determine the first target order sub-cache pool corresponding to the first target order from the local cache pool corresponding to the first target CPU core; wherein, each node allocates a local cache pool for each CPU core, the local cache pool includes multiple sub-cache pools of different orders, the number of memory pages contained in a single memory block in two adjacent sub-cache pools increases by a single page as the order increases, and the number of memory pages in each memory block in the sub-cache pool of the same order is the same.

[0026] In other words, since each CPU core in a node corresponds to a local cache pool (PagePool), after determining the first target CPU core, the corresponding local cache pool can be determined based on that first CPU core. Specifically, the target node where the first target CPU core resides can be identified, and the local cache pool corresponding to that first target CPU core on that target node can be further determined. Since each local cache pool includes multiple sub-cache pools of different orders, a first target order sub-cache pool of order 2 can be determined from the local cache pool corresponding to the first CPU core, based on the determined first target order. For example, if the first target order is 2, then a sub-cache pool of order 2 can be determined from the local cache pool and used as the first target order sub-cache pool.

[0027] S140: If there is a free memory block in the first target-level sub-cache pool, determine the first free memory block and allocate it to the first upper-level business thread.

[0028] It should be noted that in practical applications, it can be further determined whether there are free memory blocks in the first target-level sub-cache pool. If free memory blocks exist, one free memory block can be selected from the first target-level sub-cache pool as the first free memory block and allocated to the first upper-layer business thread. Since the number of memory pages in the allocated first free memory block is consistent with the number of memory pages requested in the memory allocation request, that is, the size of the allocated memory block is consistent with the size of the requested memory block, there will be no memory waste, and memory utilization can be improved. In addition, since one CPU core corresponds to one local cache pool, there will be no memory block request conflict when multiple CPU cores are occupied, which can improve memory allocation efficiency. Of course, in this embodiment, since each CPU core has an independent local cache pool, the memory operations of applications on different CPU cores are isolated from each other, and different applications on the same node (such as database and network processing applications) will not interfere with each other, thus protecting the service quality of each application.

[0029] In one embodiment, the method may further include: If there are no free memory blocks in the first target sub-cache pool, determine the first memory allocator corresponding to the target node where the first target central processing unit core is located; The first target order memory partition corresponding to the first target order is determined from the first memory allocator; wherein, the memory allocator of each node includes multiple memory partitions of different orders, the number of memory pages contained in a single memory block in two adjacent order memory partitions increases by a single page as the order increases, and the number of memory pages in each memory block in the same order memory partition is the same. If there is a free memory block in the first target-level memory partition of the first memory allocator, the second free memory block is determined and allocated to the first upper-level business thread.

[0030] It should be noted that in practical applications, NUMA nodes can adopt a multi-level caching collaborative architecture of a local cache pool (PagePool) and a memory allocator (Buddy). The memory allocator in each NUMA node also includes multiple memory partitions of different orders. Following the order from smallest to largest, the number of memory pages contained in a single memory block within two adjacent memory partitions increases sequentially by the number of pages per block, and the number of memory pages in each memory block within the same memory partition is the same. For example, the orders of the memory partitions, from smallest to largest, are 0, 1, 2, ..., 511. In a 0-order memory partition, each memory block contains 1 memory page; in a 1-order partition, each memory block contains 2 memory pages (each block consists of two consecutive memory pages); in a 2-order partition, each memory block contains 3 memory pages (each block consists of 3 consecutive memory pages); and so on, until in a 511-order partition, each memory block contains 512 memory pages (each block consists of 512 consecutive memory pages). That is, the order of each memory partition and node in the memory allocator is set in a one-to-one correspondence with the order of each sub-cache pool in the local cache pool corresponding to each CPU core.

[0031] In this embodiment of the application, after determining the first target CPU core, the target node where the first target CPU core is located can be further determined. If it is determined that there is no free memory block in the first target level sub-cache pool, the first memory allocator of the target node can be further determined. Then, according to the first target level, the corresponding first target level memory partition is determined from the first memory allocator. Furthermore, it is determined whether there is a free memory block in the first target level memory partition of the first memory allocator. If there is a free memory block, the corresponding second free memory block is determined and allocated to the first upper-layer business thread.

[0032] In this embodiment, when a memory allocation request is received from the first upper-layer business thread, the system first finds the first target-level sub-cache pool with the same order as the requested memory block in the local cache pool corresponding to the first target central processing unit core. It then determines whether there is a free memory block in the first target-level sub-cache pool. If there is a free memory block, the system first determines the first free memory block from the first target-level sub-cache pool in the local cache and allocates it to the first upper-layer business thread. If there is no free memory block in the first target-level cache pool, the system further determines whether there is a free memory block in the first target-level memory partition with the same order as the first target order in the first internal allocator of the corresponding target node. If there is a free memory block, the system determines the corresponding second memory block from the first target-level memory partition of the first memory allocator and allocates it to the first upper-layer application thread.

[0033] Understandably, the allocation method provided in this application enables the local cache pool PagePool to become a "dedicated cache" for the memory allocator Buddy, directly responding to high-frequency small / specific-size memory requests, reducing direct calls to the memory allocator Buddy, and lowering lock contention. In other words, by configuring the sub-cache pools of each tier in the local cache pool to correspond with the memory partitions of each tier in the memory allocator, this application achieves efficient linkage between the local cache pool and the memory allocator.

[0034] In addition, since the local cache pool corresponding to the target CPU is a private PagePool, the private PagePool has extremely low access latency and can quickly satisfy most memory requests, especially high-frequency small object memory requests. Therefore, when a memory allocation request sent by the first upper-layer application thread is detected, a memory block that meets the requirements is first obtained from the local cache pool corresponding to the first CPU core. If there is no memory block that meets the requirements in the local cache pool, it is then obtained from the memory partition of the corresponding order in the first memory allocator.

[0035] In one embodiment, the method may further include: If there is no free memory block in the first target level memory partition of the first memory allocator, a free third free memory block is determined from other level memory partitions in the first memory allocator that are of higher order than the first target level memory partition. The third free memory block is split to obtain the first memory block corresponding to the order of the first target order memory partition, and the first memory block is placed into the first target order memory partition and allocated to the first upper-level business thread.

[0036] It should be noted that, in the case that there is still no free memory block in the first target level memory partition of the first memory allocator in this embodiment of the application, a third free memory block can be determined from other memory partitions with a higher level than the first target level memory partition. The third free memory block is then split to obtain the first memory block of the required level (i.e., the first target level). The first memory block is then placed into the first target level memory partition and allocated to the first upper-layer business thread.

[0037] In other words, in this embodiment of the application, if there are no free memory blocks in the memory partition of the corresponding order in the first memory allocator, the memory block in the memory partition of the higher order in the first memory allocator can be split to split out a memory block of the required order, and the memory block can be put into the memory partition of the corresponding order and allocated to the corresponding upper-layer business thread.

[0038] For example, when the first upper-layer business thread requests a memory block of 3 memory pages, the system first tries to obtain the memory block from the second level of the local cache pool PagePool (because the second level stores memory blocks with 3 consecutive memory pages). If there is no free memory block in the second level, it means that the private local cache pool PagePool cannot meet the allocation requirements. It needs to obtain the memory block from the second level memory partition of the memory allocator Buddy of the NUMA node to which the CPU core belongs (because each Buddy can manage all the memory of a NUMA node). If there is no free memory block in the second level memory partition of the Buddy, it means that the second level memory partition of the Buddy cannot meet the requirements either. At this time, the memory block can be split from the higher-level memory partition of the Buddy to obtain the second-level memory block for allocation.

[0039] It should be noted that, in order to ensure system performance, the higher-order levels of the local cache pool PagePool are not split in this embodiment. In this application, when a memory allocation request is received, memory blocks are first retrieved from the corresponding-order sub-cache pool within the local cache pool PagePool. Since the local cache pool PagePool can respond quickly, directly allocating memory blocks from the corresponding-order sub-cache pool effectively avoids locking contention and fragmented traversal in the memory allocator Buddy. This prefetching caching mechanism in this embodiment can significantly improve the allocation speed of memory requests of a specific size. Furthermore, when the local cache pool cannot meet the demand, memory blocks are retrieved from the corresponding-order memory partition of the memory allocator Buddy. When the corresponding-order memory partition of the memory allocator Buddy also cannot meet the demand, memory blocks are split from the higher-order memory partition of the memory allocator Buddy.

[0040] Furthermore, after splitting the third free memory block to obtain the first memory block corresponding to the order of the first target order memory partition, the method may further include: Determine the second memory block obtained after splitting the third free memory block; Obtain the number of memory pages in the second memory block, and determine the order of the second memory block based on the number of memory pages in the second memory block; Based on the order of the second memory block, the second memory block is placed into the memory partition of the corresponding order in the first memory allocator.

[0041] It should be noted that, in this embodiment of the application, after splitting the third free memory block to obtain the first memory block, the remaining memory pages in the third free memory block constitute the second memory block. The order corresponding to the second memory block can be further determined according to the number of memory pages in the second memory block, and then the second memory block is placed into the memory partition in the first memory allocator that has the same order. This ensures that the order of each memory block in each memory partition is the same, and realizes flexible management of the memory blocks in each memory partition in the first memory allocator.

[0042] In practical applications, for each sub-cache pool of each order in the local cache pool Pagepool and each memory partition of each order in the memory allocator Buddy, a corresponding counter is used to count the number of free memory blocks in that order. When an upper-layer business thread requests memory from a certain order in the Pagepool or Buddy, it can be determined whether there are free memory blocks in the sub-cache pool or memory partition of that order by checking whether the counter of the corresponding order in the Pagepool or Buddy is 0. When a memory block is requested, the counter of the corresponding order in the Pagepool or Buddy will be decremented by one. When a memory block is subsequently filled into the sub-cache pool of that order or released to the memory partition of that order, the counter value of that order will be incremented by 1. This allows for quick identification of whether there are free memory blocks in a certain order, improving memory allocation efficiency.

[0043] In one implementation, each node includes a shared local cache pool, and the shared local cache pools constitute a global shared cache pool. Each shared local cache pool includes multiple sub-shared cache pools of different orders. The number of memory pages contained in a single memory block in two adjacent sub-shared cache pools increases sequentially with the order, and the number of memory pages in each memory block in the same sub-shared cache pool is the same.

[0044] It should be noted that, in this embodiment, the cache pool on each NUAM node can also be divided into a portion as a shared local cache pool. The shared local cache pools of each node constitute a global shared cache pool. That is, the global shared cache pool is established based on the shared local cache pools of each NUAM node, and the global shared cache pool can be accessed by each NUAM node. Each shared local cache pool is also divided into multiple partitions of different orders, each partition being a sub-shared cache pool. The order of each sub-shared cache pool in the shared local cache pool corresponds to the order of each sub-cache pool in the local cache pool and the order of each memory partition in the memory allocator. That is, the i-th order sub-cache pool in the local cache pool corresponds to the i-th order memory partition in the memory allocator, and corresponds to the i-th order sub-shared cache pool in the shared local cache pool, where i∈[0,511].

[0045] The method may further include: if there is no free third free memory block in other memory partitions of higher order than the first target order in the first memory allocator, determining the first target order sub-shared cache pool corresponding to the first target order from the first shared local cache pool corresponding to the target node according to the first target order; if there is a free memory block in the first target order sub-shared cache pool, determining the fourth free memory block and allocating it to the first upper-layer business thread.

[0046] Understandably, if there are no free third memory blocks available for memory block splitting in higher orders of the first memory allocator, it indicates that the first memory allocator is also unable to meet the memory allocation requirements. In this case, a free fourth memory block can be determined from the global shared cache pool, the first shared local cache pool corresponding to the target node, and the first target-order sub-shared cache pool with the first target order, and allocated to the first upper-layer business thread. Please refer to... Figure 3 For core x in node 0, if the corresponding local cache pool x and memory allocator cannot meet the demand, memory blocks can be obtained from the global shared cache pool. Similarly, cores 32 and 33 in node n can also obtain memory blocks from the global shared cache pool if the corresponding local cache pool and memory allocator cannot meet the demand.

[0047] For example, when the first upper-layer business thread requests a memory block of 3 memory pages, if there are no free memory blocks in the second-order sub-cache pool of the local cache pool PagePool and the second-order memory partition of the first memory allocator Buddy, and the higher-order memory partition of Buddy is also unable to split the memory block, then the memory block can be obtained from the second-order sub-shared cache pool in the shared local cache pool of the target node.

[0048] In other words, the shared local cache pool in this embodiment can serve as a supplement and emergency channel to the local cache pool PagePool. When neither the local cache pool nor the memory allocator can meet the memory allocation requirements, memory blocks can be obtained from the shared local cache pool to achieve dynamic memory replenishment without directly requesting across nodes, thus avoiding the overhead of cross-node access and making full use of local memory resources. At the same time, the shared local cache pool also acts as a coordinator for cross-core resources within the same node, responsible for balancing the memory requirements among different cores.

[0049] In one embodiment, the method may further include: If there are no free memory blocks in the first target order sub-shared cache pool, determine the second shared local cache pool located on other nodes and corresponding to the first target order from the global shared cache pool; The fifth free memory block is determined from the second shared local cache pool, corresponding to the first target order, and allocated to the first upper-layer business thread.

[0050] It should be noted that if the first target-order sub-shared cache pool in the global shared cache pool still cannot meet the memory allocation requirements, cross-node requests can be made from the global shared cache pool. For example, target other nodes with the first target order and free memory blocks can be identified from the sub-shared cache pools corresponding to each other node in the global shared cache pool. Then, the shared local cache pool of the target other node is used as the second shared local cache pool, and the fifth free memory block with the first target order in the second target-order sub-shared cache pool is identified and allocated to the first upper-layer business thread.

[0051] In practical applications, when the order determined in the global shared cache pool is the first target order and there are multiple target other nodes with free memory blocks, the distance between each target other node and the local target node can be obtained (for example, by directly reading the NUMA distance file under a specified path in the system). Then, the distances are sorted from smallest to largest, and the target other node with the smallest distance is selected as the final target other node. Alternatively, if there are multiple target other nodes with the smallest distance, the node with the largest memory capacity in the sub-shared cache pool corresponding to the first target order can be determined from the multiple target other nodes with the smallest distance as the final target other node for memory block allocation.

[0052] Based on the above embodiments, such as Figure 4 As shown, when the first upper-layer business thread requests a memory block of 3 memory pages, if there are no free memory blocks in the second-order sub-cache pool of the local cache pool PagePool and the second-order memory partition of the first memory allocator Buddy, and the higher-order memory partition of Buddy cannot split the memory block, and there are no free memory blocks in the second-order sub-shared cache pool of the target node's shared local cache pool, then the only option is to make a cross-node request in the global shared cache pool. Since the global shared cache pool contains the shared local cache pools of each node, it can provide cross-node paths, thereby further satisfying the memory request requirements and better meeting the business needs.

[0053] In one embodiment, the method may further include: Upon detecting a memory block release request, the memory block to be released and the target location for release are determined based on the memory block release request. Place the memory block to be released at the target location.

[0054] It should be noted that after the upper-layer business thread allocates a memory block, performs business operations, and then releases the memory block when it is no longer needed, the upper-layer application can call the `free` interface to release the memory block when it no longer needs it. In this embodiment, to better manage memory, the system can also, upon detecting a memory block release request, determine the memory block to be released and its target location (i.e., the release target location) based on the information in the release request, and then place the memory block to be released at the release target location, thus completing the release of the memory block.

[0055] In one implementation, the process of determining the memory block to be released and the target location based on the memory block release request when a memory block release request is detected may include: Get the memory block release request sent by the second upper-layer business thread; Determine the memory block to be released based on the memory block release request; The second target order corresponding to the memory block to be released is determined based on the number of second memory pages in the memory block to be released. Determine whether the memory block to be released was allocated across nodes in the last allocation. If so, determine the original node corresponding to the memory block to be released and put the memory block to be released into the shared local cache pool of the original node and the sub-shared cache pool corresponding to the second target order. If not, determine the target local cache pool corresponding to the second target CPU core corresponding to the second upper-layer business thread and put the memory block to be released into the target local cache pool and the sub-cache pool corresponding to the second target order.

[0056] It is understood that in this embodiment, the upper-layer business thread that sends the memory block release request is referred to as the second upper-layer business thread (which may be the same thread as the first upper-layer business thread). When the system receives the memory block release request sent by the second upper-layer business thread, it can determine the memory block to be released based on the memory block information in the memory block release request, determine the number of second memory pages in the memory block to be released, and determine the corresponding second target order based on the number of second memory pages, that is, determine the order (second target order) of the memory block to be released. Then, it is further determined whether the memory block to be released was allocated across nodes in the last allocation (that is, whether it came from the shared local cache pool of other nodes in the global shared cache pool). If it was allocated across nodes, the original node where the memory block to be released was originally located is further determined, and the shared local cache pool corresponding to the original node and the sub-shared cache pool with the same order as the second target order in the shared local cache pool are determined from the global shared cache pool. The memory block to be released is then placed into the sub-shared cache pool, thereby completing the release of the memory block.

[0057] Of course, if it is determined that it is not a cross-node allocation, the second target CPU core corresponding to the second upper-layer business thread can be further determined, and the target local cache pool corresponding to the second target CPU core can be determined. Then, the memory block to be released is placed into the sub-cache pool in the target local cache pool with the same order as the second target, so as to complete the release of the memory block.

[0058] The allocation method provided in this application enables the local cache pool PagePool to become a "dedicated cache" for the memory allocator Buddy. It can directly respond to high-frequency small / specific size memory requests, reduce direct calls to the memory allocator Buddy, reduce lock contention, and achieve batch reclamation and precise preheating of memory blocks through the characteristics of being at the same level as Buddy. For example, when releasing, it can directly fall back to the local cache pool of the corresponding level without Buddy traversing the fragmented space.

[0059] In one implementation, the process of determining whether the memory block to be released was allocated across nodes during the last allocation may include: Based on the second upper-level business thread, determine the second target central processing unit core corresponding to the second upper-level business thread; Based on the core of the second target CPU, determine the node where the core of the second target CPU is located; Based on the memory pages in the memory block to be released, determine the node to which the memory block to be released belongs; If the node where the second target CPU core is located is different from the node to which the memory block to be released belongs, it is determined that the memory block to be released was allocated across nodes in the last allocation. If the node where the second target CPU core is located is the same as the node to which the memory block to be freed belongs, it is determined that the memory block to be freed was not allocated across nodes in the last allocation.

[0060] Understandably, in determining whether the memory block to be released was allocated across nodes in the last allocation, the node where the second target CPU core is located can be determined based on the second target CPU core occupied by the second upper-layer business thread. Then, based on the specific location information or historical source information of each memory page in the memory block to be released, the node to which the memory block to be released belongs can be determined. Then, it is further determined whether the node to which the memory block to be released belongs is the same node as the node where the second target CPU core is located. If they are the same node, it means that the memory block to be released was not allocated across nodes in the last allocation. If they are not the same node, it means that the memory block to be released was allocated across nodes in the last allocation.

[0061] For example, if a second upper-layer business thread needs to release a memory block consisting of three memory pages, it first checks whether the NUMA node to which these three memory pages belong is consistent with the NUMA node to which the CPU core corresponding to the second upper-layer business thread belongs. If they are consistent, it means there was no cross-NUMA allocation, and the memory block consisting of the three memory pages needs to be placed in the second-order sub-cache pool of the private local cache pool corresponding to the CPU core. If they are inconsistent, the memory block is placed in the second-order sub-shared cache pool corresponding to the three memory pages in the shared local cache pool of the original node in the global shared cache pool.

[0062] In one embodiment, the method may further include: Detect whether there is a second target sub-cache pool in each sub-cache pool of the local cache pool corresponding to the first target central processing unit core, where the number of free memory blocks is lower than a preset lower limit; If it exists, then determine the third target order of the second target sub-cache pool; From the first memory allocator corresponding to the target node where the first target central processing unit core is located, a second target-level memory partition with the same level as the third target is determined, and a first preset number of free memory blocks are determined from the second target-level memory partition and filled into the second target sub-cache pool.

[0063] It's important to note that if the capacity of the local cache pool (PagePool) is fixed, a sudden, large, and sustained allocation of memory at a specific tier by a core or thread manager can quickly exhaust the corresponding sub-cache pools of that tier within the local cache pool. This can lead to frequent fallbacks to Buddies, shared local cache pools, or cross-node allocations, thus undermining the performance isolation advantage. Conversely, if memory usage decreases for a CPU core, resulting in a larger number of unused memory blocks in its local cache pool (PagePool), it can lead to resource waste and even premature exhaustion of the entire node's Buddies (memory fragmentation or ineffective "hoarding").

[0064] Therefore, in this embodiment, multiple dynamic watermarks can be pre-set for each local cache pool. For example, three dynamic watermarks can be set: a low watermark (corresponding to a preset lower limit), a high watermark (corresponding to a preset upper limit), and a target watermark (corresponding to a preset target range). If the number of free memory blocks in a sub-cache pool within the local cache pool is lower than the preset lower limit, it indicates that free memory blocks need to be added. If the number of free memory blocks is higher than the preset upper limit, it indicates that the number of free memory blocks in that sub-cache pool is relatively high, and some can be safely released back to the upper-level memory allocator to avoid memory waste. Of course, if the number of free memory blocks is within the preset target range, it indicates that the number of free memory blocks is relatively ideal.

[0065] Please refer to Figure 5 In the embodiments of this application, the following will be combined Figure 5The solution is described in detail. In practical applications, for each CPU core, the number of free memory blocks in each sub-cache pool of each order in the local cache pool corresponding to that CPU core can be monitored in real time. In this embodiment, the first target CPU core is used as an example. By monitoring the number of free memory blocks in each sub-cache pool of the local cache pool corresponding to the first target CPU core, it is possible to determine the third target order (i.e., the order of the second target sub-cache pool) corresponding to the second target sub-cache pool where the number of free memory blocks is lower than a preset lower limit. Then, from the first memory allocator corresponding to the target node where the first target CPU core is located, a second target order memory partition consistent with the third target order is determined, and a first preset number of free memory blocks are determined from the second target order memory partition and filled into the second target sub-cache pool. After the first preset number of free memory blocks are filled into the second target sub-cache pool in batches, the number of free memory blocks in the second target sub-cache pool can reach the preset target range, thereby realizing the dynamic replenishment of memory blocks in sub-cache pools with fewer free memory blocks. It should be noted that during the memory block filling process, the business does not affect the acquisition of memory blocks from the second target sub-cache pool, because the number of memory blocks in the second target sub-cache pool is not zero at this time.

[0066] Furthermore, the process of determining a second target-level memory partition of the same order as the third target from the first memory allocator corresponding to the target node where the first target CPU core is located, and determining a first preset number of free memory blocks from the second target-level memory partition to fill the second target sub-cache pool, may include: In the first memory allocator corresponding to the target node where the first target central processing unit core is located, the second target level memory partition with the same level as the third target is determined; If there are a first preset number of free memory blocks in the second target memory partition, the first preset number of free memory blocks in the second target memory partition are directly filled into the second target sub-cache pool; If there are no first preset number of free memory blocks in the second target memory partition, determine the total number of memory pages corresponding to the first preset number of free memory blocks; Based on the total number of memory pages, the third target-order memory partition that satisfies the total number of memory pages is determined from the first memory allocator; The free memory blocks in the third target order memory partition are split into a first preset number of free memory blocks of the third target order; The first preset number of free memory blocks obtained after splitting are filled into the second target sub-cache pool.

[0067] Understandably, in determining the free memory blocks to be filled into the second target sub-cache pool from the first memory allocator, two scenarios can be considered. One is that a first preset number of free memory blocks exist in the second target level memory partition of the same order as the third target in the first memory allocator. In this case, the first preset number of free memory blocks can be directly obtained from the second target memory partition and filled into the second target sub-cache pool. The other is that the first preset number of free memory blocks do not exist in the second target level memory partition. In this case, the second target level memory partition can be skipped, and the corresponding order can be determined based on the total number of memory pages of the first preset number of free memory blocks. Then, a third target level memory partition that satisfies this order can be determined from the first memory allocator, where the order of the third target level memory partition is equal to or greater than the order corresponding to the total number of memory pages. The free memory blocks in the third target level memory partition are then split into a first preset number of free memory blocks, ensuring that the order of the split first preset number of free memory blocks is the third target order. Finally, the split first preset number of free memory blocks are filled into the second target sub-cache pool.

[0068] It should be noted that if the order of the third target level memory partition is equal to the order corresponding to the total number of memory pages, after splitting the free memory blocks in the third target level memory partition into a first preset number of free memory blocks of the third target level, there will be no remaining memory pages. If the order of the third target level memory partition is greater than the order corresponding to the total number of memory pages, after splitting the free memory blocks in the third target level memory partition into a first preset number of free memory blocks of the third target level, there will be remaining memory pages. In this case, the corresponding order can be determined based on the total number of remaining memory pages, and the memory blocks composed of the remaining memory pages are placed into the memory partition of the corresponding level in the first memory allocator. For example, if the third target level is 2 and the first preset number is 10, and the free memory blocks in the third target level memory partition include 21 memory pages, then after splitting the free memory blocks into 10 memory blocks of 2 pages each, there will be one memory page remaining. The memory block composed of this memory page can be placed into the 0th level memory partition of the first memory allocator.

[0069] In one embodiment, the method may further include: Detect whether there is a third target sub-cache pool in each sub-cache pool of the local cache pool corresponding to the first target central processing unit core where the number of free memory blocks exceeds a preset limit; If it exists, then determine the fourth target order of the third target sub-cache pool; Release the second preset number of free memory blocks in the third target sub-cache pool to the third target level memory partition in the first memory allocator that corresponds to the fourth target level.

[0070] It should be noted that, in this embodiment of the application, when the number of free memory blocks in the sub-cache pool (third target sub-cache pool) in the local cache pool is detected to be higher than the preset upper limit, the fourth target order of the third target sub-cache pool can be further determined, and then the second preset number of free memory blocks in the third target sub-cache pool can be released to the third target order memory partition in the first memory allocator corresponding to the fourth target order, thereby putting the excess memory blocks into the memory allocator so that the number of free memory blocks in the adjusted third target sub-cache pool is within the preset target range, thereby realizing the dynamic adjustment of memory blocks in the local cache pool.

[0071] In practical applications, a second preset number of free memory blocks are released one by one to the third target level memory partition of the first memory allocator. The first memory allocator can also merge the released free memory blocks. Each time the first memory allocator receives a released free memory block, it can identify the memory pages in the free memory block. If the memory pages of the released free memory block are contiguous with the memory pages of a memory block in the third target level memory partition (for example, the first page of the released memory block is contiguous with the last memory page of a memory block in the third target level memory partition, or the last memory page of the released memory block is contiguous with the first memory page of a memory block in the third target level memory partition), the released memory block can be merged with the contiguous memory blocks in the third target level memory partition. The number of memory pages in the merged memory block will double. A new level is determined based on the total number of memory pages in the merged memory block. Then, the merged memory block is moved to the memory partition in the first memory allocator corresponding to the new level, thereby realizing the merging of memory blocks.

[0072] Additionally, it should be noted that the target water level can be adjusted according to historical needs in this embodiment. For example, by monitoring the allocation frequency of sub-cache pools at each tier of each local cache pool, if the allocation frequency increases, the target water level can be slowly raised, up to the highest level. If the allocation frequency decreases, the water level can be slowly lowered, down to the lowest level. Both the low and high water levels can be updated according to actual needs.

[0073] It is understood that in this embodiment, each order in the local cache pool corresponds one-to-one with each order in the system Buddy allocator. Therefore, the memory block size in the sub-cache pools of the local cache pool is consistent with the memory block size of the corresponding order in each memory partition managed by the Buddy, achieving precise matching. This allows for batch reclamation and eliminates the need for frequent splitting / merging during warm-up, improving memory management efficiency. Furthermore, in this embodiment, the shared cache pool and Buddy memory are reclaimed first, protecting the application memory working set of the CPU core and improving memory utilization.

[0074] In practice, this application not only improves performance but also enhances resource isolation and memory utilization efficiency, while delaying cross-node access. Specifically, by allocating a local cache pool for each CPU core, memory allocation requests can quickly retrieve memory blocks from the bound local cache pool, reducing allocation latency, decreasing reliance on the Buddy memory allocator, and avoiding lock contention waiting. For example, high-performance database threads can quickly acquire memory blocks, improving response speed. Furthermore, this application's embodiment prioritizes the low-latency memory resources of the local cache pool, optimizing the memory allocation process and reducing performance losses due to cache misses.

[0075] Because this embodiment of the application finely divides the local cache pool according to its tier, it enables memory requests of different sizes to quickly obtain memory from the corresponding tier of the local cache pool's sub-cache pool, reducing memory fragmentation. This embodiment of the application can also automatically adjust the number of memory blocks in each sub-cache pool of the local cache pool based on memory usage, avoiding excessive accumulation or insufficient memory, and rationally allocating memory resources.

[0076] The memory management method provided in this application embodiment avoids easily triggering high-latency access across NUMA nodes when local memory resources (private local cache pool, local memory allocator, and local shared local cache pool) can meet the requirements, thereby maximizing the use of local cache and improving the overall system performance.

[0077] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0078] Embodiments of this application also provide a user-mode memory management device, please refer to... Figure 6 The user-mode memory management device includes: The first determining module 11 is used to determine the first target central processing unit core corresponding to the first upper-layer business thread and the number of first memory pages contained in the memory block corresponding to the memory allocation request, based on the memory allocation request sent by the first upper-layer business thread. The second determining module 12 is used to determine the first target order based on the number of first memory pages; The third determining module 13 is used to determine the first target order sub-cache pool corresponding to the first target order from the local cache pool corresponding to the first target central processing unit core; wherein, each node allocates a local cache pool for each central processing unit core, the local cache pool includes multiple sub-cache pools of different orders, the number of memory pages contained in a single memory block in two adjacent sub-cache pools increases by a single page as the order increases, and the number of memory pages in each memory block in the sub-cache pool of the same order is the same; The first allocation module 14 is used to determine the first free memory block and allocate it to the first upper-layer business thread when there is a free memory block in the first target-level sub-cached pool.

[0079] In one embodiment, the device may further include: The fourth determining module is used to determine the first memory allocator corresponding to the target node where the first target central processing unit core is located when there is no free memory block in the first target stage. The fifth determining module is used to determine the first target order memory partition corresponding to the first target order from the first memory allocator; wherein, the memory allocator of each node includes multiple memory partitions of different orders, the number of memory pages contained in a single memory block in two adjacent order memory partitions increases by a single page as the order increases, and the number of memory pages in each memory block in the same order memory partition is the same. The sixth determining module is used to determine the second free memory block and allocate it to the first upper-layer business thread when there is a free memory block in the first target-level memory partition of the first memory allocator.

[0080] In one embodiment, the device may further include: The seventh determining module is used to determine a free third free memory block from other memory partitions of higher order than the first target order in the first memory allocator when there is no free memory block in the first target order memory partition of the first memory allocator. The splitting module is used to split the third free memory block to obtain the first memory block corresponding to the order of the first target order memory partition, and put the first memory block into the first target order memory partition and allocate it to the first upper-level business thread.

[0081] In one embodiment, the device may further include: The eighth determining module is used to determine the second memory block obtained after splitting the third free memory block; The ninth determining module is used to obtain the number of memory pages in the second memory block and determine the order corresponding to the second memory block based on the number of memory pages in the second memory block; The first placement module is used to place the second memory block into the memory partition of the corresponding order in the first memory allocator according to the order of the second memory block.

[0082] In one implementation, each node includes a shared local cache pool, and the shared local cache pools constitute a global shared cache pool. Each shared local cache pool includes multiple sub-shared cache pools of different orders. The number of memory pages contained in a single memory block in two adjacent sub-shared cache pools increases sequentially with the order, and the number of memory pages in each memory block in the same sub-shared cache pool is the same.

[0083] The device may also include: The tenth determining module is used to determine the first target order sub-shared cache pool corresponding to the first target order from the first shared local cache pool corresponding to the target node, when there is no free third free memory block in other memory partitions with an order higher than the first target order memory partition in the first memory allocator. The eleventh determination module is used to determine the fourth free memory block and allocate it to the first upper-layer business thread when there is a free memory block in the first target-level shared cache pool.

[0084] In one embodiment, the device may further include: The twelfth determining module is used to determine, in the case that there are no free memory blocks in the first target order sub-shared cache pool, a second shared local cache pool located on other nodes and corresponding to the first target order that has free memory blocks from the global shared cache pool; The second allocation module is used to determine the fifth free memory block from the second shared local cache pool corresponding to the first target order, and allocate the fifth free memory block to the first upper-layer business thread.

[0085] In one embodiment, the device may further include: The thirteenth determination module is used to determine the memory block to be released and the target location for release based on the memory block release request when a memory block release request is detected. The second module is used to place the memory block to be released into the target location for release.

[0086] In one implementation, the thirteenth determining module includes: The first acquisition unit is used to acquire memory block release requests sent by the second upper-layer business thread; The first determining unit is used to determine the memory block to be released based on the memory block release request. The second determining unit is used to determine the second target order corresponding to the memory block to be released based on the number of second memory pages of the memory block to be released. The first determination unit is used to determine whether the memory block to be released was allocated across nodes in the last allocation. If so, the third determination unit is triggered; if not, the fourth determination unit is triggered. The third determining unit is used to determine the original node corresponding to the memory block to be released, and put the memory block to be released into the shared local cache pool of the original node and the sub-shared cache pool corresponding to the second target order; The fourth determining unit is used to determine the target local cache pool corresponding to the second target central processing unit core corresponding to the second upper-layer business thread, and put the memory block to be released into the sub-cache pool corresponding to the second target order in the target local cache pool.

[0087] In one implementation, the first determination unit includes: The first determining subunit is used to determine the second target central processing unit core corresponding to the second upper-level business thread based on the second upper-level business thread. The second determining subunit is used to determine the node where the second target central processing unit core is located based on the second target central processing unit core. The third determining subunit is used to determine the node to which the memory block to be released belongs based on each memory page in the memory block to be released; The fourth determining subunit is used to determine that the memory block to be released was allocated across nodes in the last allocation, when the node where the second target central processing unit core is located is different from the node to which the memory block to be released belongs. The fifth determining subunit is used to determine, when the node where the second target central processing unit core is located is the same as the node to which the memory block to be released belongs, that the memory block to be released was not allocated across nodes in the last allocation.

[0088] In one embodiment, the device includes: The first judgment module is used to detect whether there is a second target sub-cache pool in each sub-cache pool of the local cache pool corresponding to the first target central processing unit core, where the number of free memory blocks is lower than a preset lower limit; If it exists, then the thirteenth determination module is triggered; The thirteenth determination module is used to determine the third target order of the second target sub-cache pool; The fourteenth determining module is used to determine the second target level memory partition, which is the same as the third target level, from the first memory allocator corresponding to the target node where the first target central processing unit core is located, and to determine a first preset number of free memory blocks from the second target level memory partition to fill the second target sub-cache pool.

[0089] In one implementation, the fourteenth determining module includes: The fifth determining unit is used in the first memory allocator corresponding to the target node where the first target central processing unit core is located to determine the second target level memory partition that is the same as the third target level. The first filling unit is used to directly fill the first preset number of free memory blocks in the second target memory partition into the second target sub-cache pool when there are a first preset number of free memory blocks in the second target memory partition. The sixth determining unit is used to determine the total number of memory pages corresponding to the first preset number of free memory blocks when there are no first preset number of free memory blocks in the second target memory partition. The seventh determining unit is used to determine, from the first memory allocator, a third target-order memory partition whose memory blocks satisfy the total number of memory pages, based on the total number of memory pages. The splitting unit is used to split the free memory blocks in the third target order memory partition into a first preset number of free memory blocks of the third target order. The second filling unit is used to fill the first preset number of free memory blocks obtained after splitting into the second target sub-cache pool.

[0090] In one embodiment, the device may further include: The second judgment module is used to detect whether there is a third target sub-cache pool in each sub-cache pool of the local cache pool corresponding to the first target central processing unit core, where the number of free memory blocks is higher than a preset limit. If it exists, then the fifteenth determination module is triggered; The fifteenth determination module is used to determine the fourth objective order of the third objective sub-cache pool; The release module is used to release a second preset number of free memory blocks in the third target sub-cache pool to the third target level memory partition in the first memory allocator that corresponds to the fourth target level.

[0091] It should be noted that the description of the features of the user-mode memory management device provided in the embodiments of this application can be found in the relevant description of the user-mode memory management method, and will not be repeated here.

[0092] Embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the user-mode memory management method embodiments described above.

[0093] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the user-mode memory management method embodiments described above when running.

[0094] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0095] The embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the user-mode memory management method embodiments described above.

[0096] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the user-mode memory management method embodiments described above.

[0097] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0098] The foregoing has provided a detailed description of a user-mode memory management method, product, electronic device, and storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to help understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A user-mode memory management method, characterized in that, include: Based on the memory allocation request sent by the first upper-layer business thread, determine the first target central processing unit core corresponding to the first upper-layer business thread and the number of first memory pages contained in the memory block corresponding to the memory allocation request; The first target order is determined based on the number of the first memory pages; A first target order sub-cache pool corresponding to the first target order is determined from the local cache pool corresponding to the first target CPU core; wherein, a local cache pool is allocated to each CPU core on each node, and the local cache pool includes multiple sub-cache pools of different orders. The number of memory pages contained in a single memory block in two adjacent sub-cache pools increases by a single page as the order increases, and the number of memory pages in each memory block in the sub-cache pool of the same order is the same. If there is a free memory block in the first target-level sub-cache pool, the first free memory block is determined and allocated to the first upper-layer business thread.

2. The user-mode memory management method according to claim 1, characterized in that, Also includes: If there are no free memory blocks in the first target sub-cache pool, determine the first memory allocator corresponding to the target node where the first target central processing unit core is located; A first target order memory partition corresponding to the first target order is determined from the first memory allocator; wherein, the memory allocator of each node includes multiple memory partitions of different orders, the number of memory pages contained in a single memory block in two adjacent order memory partitions increases sequentially with the order increasing, and the number of memory pages in each memory block in the same order memory partition is the same. If there is a free memory block in the first target-level memory partition of the first memory allocator, a second free memory block is determined and allocated to the first upper-layer business thread.

3. The user-mode memory management method according to claim 2, characterized in that, Also includes: If there is no free memory block in the first target level memory partition of the first memory allocator, a free third free memory block is determined from other level memory partitions in the first memory allocator that have a higher level than the first target level memory partition. The third free memory block is split to obtain a first memory block corresponding to the order of the first target order memory partition, and the first memory block is placed into the first target order memory partition and allocated to the first upper-layer business thread.

4. The user-mode memory management method according to claim 3, characterized in that, After splitting the third free memory block to obtain the first memory block corresponding to the order of the first target order memory partition, the method further includes: Determine the second memory block obtained after splitting the third free memory block; Obtain the number of memory pages in the second memory block, and determine the order of the second memory block based on the number of memory pages in the second memory block; Based on the order of the second memory block, the second memory block is placed into the memory partition of the corresponding order in the first memory allocator.

5. The user-mode memory management method according to claim 3, characterized in that, Each node includes a shared local cache pool, and the shared local cache pools constitute a global shared cache pool. Each shared local cache pool includes multiple sub-shared cache pools of different orders. The number of memory pages contained in a single memory block in two adjacent sub-shared cache pools increases by the number of pages as the order increases. The number of memory pages in each memory block in a sub-shared cache pool of the same order is the same. The method further includes: If there is no free third free memory block in other memory partitions with a higher order than the first target order memory partition in the first memory allocator, the first target order sub-shared cache pool corresponding to the first target order is determined from the first shared local cache pool corresponding to the target node according to the first target order. If there is a free memory block in the first target-level shared cache pool, the fourth free memory block is determined and allocated to the first upper-layer business thread.

6. The user-mode memory management method according to claim 5, characterized in that, Also includes: If there are no free memory blocks in the first target order sub-shared cache pool, determine from the global shared cache pool a second shared local cache pool that is located on other nodes and has free memory blocks in the sub-shared cache pool corresponding to the first target order; The fifth free memory block is determined from the second shared local cache pool, which corresponds to the first target order, and then allocated to the first upper-layer business thread.

7. The user-mode memory management method according to any one of claims 1 to 6, characterized in that, Also includes: Upon detecting a memory block release request, the memory block to be released and the target location for release are determined based on the memory block release request. Place the memory block to be released at the target release location.

8. The user-mode memory management method according to claim 7, characterized in that, The step of determining the memory block to be released and the target location for release based on the memory block release request when a memory block release request is detected includes: Get the memory block release request sent by the second upper-layer business thread; The memory block to be released is determined based on the memory block release request; The second target order corresponding to the memory block to be released is determined based on the number of second memory pages in the memory block to be released; Determine whether the memory block to be released was allocated across nodes in the last allocation. If so, determine the original node corresponding to the memory block to be released and put the memory block to be released into the sub-shared cache pool corresponding to the second target order in the shared local cache pool of the original node. If not, determine the target local cache pool corresponding to the second target CPU core corresponding to the second upper-layer business thread and put the memory block to be released into the sub-cache pool corresponding to the second target order in the target local cache pool.

9. The user-mode memory management method according to claim 8, characterized in that, Determining whether the memory block to be released was allocated across nodes in the last allocation includes: Based on the second upper-layer business thread, determine the second target central processing unit core corresponding to the second upper-layer business thread; Based on the second target CPU core, determine the node where the second target CPU core is located; Based on each memory page in the memory block to be released, determine the node to which the memory block to be released belongs; If the node where the second target central processing unit core is located is different from the node to which the memory block to be released belongs, it is determined that the memory block to be released was allocated across nodes in the last allocation. If the node where the second target central processing unit core is located is the same as the node to which the memory block to be released belongs, it is determined that the memory block to be released was not allocated across nodes in the previous allocation.

10. The user-mode memory management method according to claim 7, characterized in that, Also includes: Detect whether there is a second target sub-cache pool in each sub-cache pool of the local cache pool corresponding to the first target central processing unit core, where the number of free memory blocks is lower than a preset lower limit; If it exists, then determine the third target order of the second target sub-cache pool; From the first memory allocator corresponding to the target node where the first target central processing unit core is located, a second target-level memory partition with the same level as the third target is determined, and a first preset number of free memory blocks are determined from the second target-level memory partition and filled into the second target sub-cache pool.

11. The user-mode memory management method according to claim 10, characterized in that, The step of determining a second target-level memory partition of the same order as the third target from the first memory allocator corresponding to the target node where the first target CPU core is located, and determining a first preset number of free memory blocks from the second target-level memory partition to fill the second target sub-cache pool includes: In the first memory allocator corresponding to the target node where the first target central processing unit core is located, a second target-level memory partition with the same level as the third target is determined; If there are a first preset number of free memory blocks in the second target memory partition, the first preset number of free memory blocks in the second target memory partition are directly filled into the second target sub-cache pool; If there are no first preset number of free memory blocks in the second target memory partition, determine the total number of memory pages corresponding to the first preset number of free memory blocks; Based on the total number of memory pages, a third target-order memory partition is determined from the first memory allocator to satisfy the total number of memory pages; The free memory blocks in the third target order memory partition are split into the first preset number of free memory blocks of the third target order; The first preset number of free memory blocks obtained after splitting are filled into the second target sub-cache pool.

12. The user-mode memory management method according to claim 10, characterized in that, Also includes: Detect whether there is a third target sub-cache pool in each sub-cache pool of the local cache pool corresponding to the first target central processing unit core where the number of free memory blocks exceeds a preset limit; If it exists, then the fourth target order of the third target sub-cache pool is determined; Release a second preset number of free memory blocks from the third target sub-cache pool to the third target level memory partition in the first memory allocator that corresponds to the fourth target level.

13. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the user-mode memory management method as described in any one of claims 1 to 12.

14. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the user-mode memory management method as described in any one of claims 1 to 12 when executing the computer program.

15. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the user-mode memory management method as described in any one of claims 1 to 12.

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