Display panel and display device
By incorporating transition and bending sections in the display panel to improve wiring density and shape consistency, the display pattern problem caused by FIP technology under high pixel density is solved, thereby enhancing display effect and uniformity.
Patent Information
- Application Number
- CN202410534933.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-29
- Publication Date
- 2025-10-31
AI Technical Summary
In high-pixel-density display panels, when using FIP technology, different trace densities increase the difficulty of wiring, resulting in display patterns and affecting display uniformity.
By setting multiple adapters in the display panel to connect fan-out signal lines and analog lines, and ensuring that the bends of data signal lines in adjacent and non-adjacent adapters have the same shape, the routing density and shape consistency are improved, and the formation of streaks is avoided.
It improves the consistency of the wiring density and reflectivity in the display area, avoids display patterns, and enhances the display effect and uniformity.
Smart Images

Figure CN120882246A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and in particular to a display panel and a display device. Background Technology
[0002] In Fanout In Panel (FIP) technology, the display area of the display panel includes the fan-out area and the normal display area outside the fan-out area. The fan-out area is equipped with fan-out signal lines, and the normal display area is equipped with analog signal lines. The analog signal lines can simulate the layout of the fan-out lines so that the signal line density in the fan-out area and the normal display area is the same or approximately the same.
[0003] However, the pixel density (Pixels Per Inch, PPI) of existing panels is getting higher and higher, and the wiring is getting denser. When using FIP technology on this basis, the increased wiring will increase the difficulty of wiring. Usually, FIP wiring can only be inserted sequentially through multiple columns of pixels, resulting in different wiring densities and different wiring layer patterns, which leads to display patterns. Summary of the Invention
[0004] To address at least one of the aforementioned problems, a first aspect of this disclosure provides a display panel, the display area of which includes a fan-out area and a normal display area located outside the fan-out area, and the display panel further includes:
[0005] Substrate;
[0006] Multiple data signal lines are located in the display area. The data signal lines are arranged along a first direction and extend along a second direction, and the first direction and the second direction intersect.
[0007] Multiple first signal lines, arranged along a first direction and extending along a second direction, wherein a portion of the first signal lines located in the fan-out area form a first fan-out signal line, and the first signal lines located in the normal display area form a first analog line; and
[0008] Multiple second signal lines are arranged along a second direction and extend along a first direction. A portion of the second signal lines located in the fan-out area form a second fan-out signal line, while the second signal lines located in the normal display area form a second analog line. The second fan-out signal lines are connected to the first fan-out signal lines.
[0009] Multiple first adapters are provided. The first adapter in the fan-out area is electrically connected to the first fan-out signal line. The first adapter in the normal display area is located between the first analog line and the second analog line that intersect when projected onto the substrate. Both the first adapter and the first signal line are disposed in the first metal layer.
[0010] The data signal line adjacent to the first signal line includes a first vertical portion and a first bend portion, the first bend portion partially surrounding the first transition portion. The data signal line not adjacent to the first signal line includes a second vertical portion and a second bend portion, the second bend portion and the first bend portion being located in the same row along the first direction.
[0011] The second bend has the same shape as the first bend.
[0012] Optionally, the display panel further includes: a plurality of first redundant portions and a second transition portion disposed in a second metal layer, wherein the second metal layer is different from the first metal layer.
[0013] The orthographic projection of the second adapter on the substrate overlaps with the orthographic projection of the first adapter on the substrate, and is electrically connected to the first adapter through a through-hole extending to the first adapter.
[0014] The orthographic projection of the first redundant part on the substrate falls within the area surrounded by the orthographic projection of the second bent part on the substrate.
[0015] Optionally, the first redundant part is electrically connected to the second signal line.
[0016] Optionally, the display panel further includes: a plurality of second redundant sections disposed in the first metal layer.
[0017] Wherein, the orthographic projection of the second redundant part on the substrate falls within the orthographic projection of the first redundant part on the substrate, or the orthographic projection of the second redundant part on the substrate covers the orthographic projection of the first redundant part on the substrate, and
[0018] The second redundancy section is electrically isolated from the data signal line.
[0019] Optionally, the display panel further includes: a plurality of third redundancy sections disposed in the first metal layer.
[0020] Wherein, the orthographic projection of the third redundant part on the substrate covers the orthographic projection of the first redundant part on the substrate, and
[0021] The third redundancy unit is electrically connected to one of the adjacent data signal lines.
[0022] Optionally, the projected area of the second redundant part on the substrate is smaller than the projected area of the first adapter part on the substrate.
[0023] Optionally, the display panel further includes: a power switching section disposed in the second metal layer, the power switching section including a first power switching section near the first redundancy section and a second power switching section near the second switching section.
[0024] The projected area of the first power adapter on the substrate is smaller than the projected area of the second power adapter on the substrate.
[0025] Optionally, the orthographic projection of the second power adapter on the substrate overlaps with the orthographic projections of the first signal line and the two data signal lines adjacent to the first signal line on the substrate.
[0026] The orthographic projection of the first power adapter on the substrate overlaps with the orthographic projections of the two data signal lines not adjacent to the first signal line on the substrate.
[0027] Optionally, the display panel further includes: a data transfer section disposed in a second metal layer, the data transfer section including a first data transfer section and a second data transfer section, the second metal layer being different from the first metal layer.
[0028] The orthographic projection of the first data transfer unit on the substrate overlaps with the orthographic projection of the first bending unit on the substrate, and the orthographic projection of the second data transfer unit on the substrate overlaps with the orthographic projection of the second bending unit on the substrate.
[0029] In the first direction, the distance between adjacent first data transfer units is greater than the distance between adjacent second data transfer units.
[0030] Optionally, a data switching section is disposed in the second metal layer, the data switching section including a first data switching section and a second data switching section.
[0031] The orthographic projection of the first data transfer unit on the substrate overlaps with the orthographic projection of the first bending unit on the substrate, and the orthographic projection of the second data transfer unit on the substrate overlaps with the orthographic projection of the second bending unit on the substrate.
[0032] The distance between the second transfer section and the two adjacent first data transfer sections is approximately equal, while the distance between the first redundant section and the two adjacent second data transfer sections is not equal.
[0033] Optionally, the display area includes: pixel electrodes arranged in an array, and multiple data signal lines including bent portions, the bent portions including a first bent portion on a data signal line adjacent to the first signal line and a second bent portion on a data signal line not adjacent to the first signal line.
[0034] A row of bends along the first direction corresponds to a row of pixel electrodes.
[0035] For other row pixel electrodes that do not correspond to a single row bend, their data signal lines are provided with a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend.
[0036] The first dummy bend of the same data signal line has the same shape as the first bend, and the second dummy bend of the same data signal line has the same shape as the second bend.
[0037] Optionally, the display area includes: pixel electrodes arranged in an array, and multiple data signal lines including bent portions, the bent portions including a first bent portion on a data signal line adjacent to the first signal line and a second bent portion on a data signal line not adjacent to the first signal line.
[0038] A row of bends along the first direction corresponds to a row of pixel electrodes.
[0039] For pixel electrodes in rows that do not correspond to a single bend, every N rows, a first dummy bend is set at the position corresponding to the first bend, and a second dummy bend is set at the position corresponding to the second bend, where N is an integer greater than or equal to 2.
[0040] The first dummy bend of the same data signal line has the same shape as the first bend, and the second dummy bend of the same data signal line has the same shape as the second bend.
[0041] Optionally, for other row pixel electrodes not corresponding to the bends described in one row, for other row pixel electrodes in odd-numbered rows, the data signal lines are provided with a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend; for other row pixel electrodes in even-numbered rows, the data signal lines are provided with a first vertical portion at the position corresponding to the first bend and a second vertical portion at the position corresponding to the second bend, or...
[0042] For other row pixel electrodes that do not correspond to the bends described in the first row, for other row pixel electrodes in even-numbered rows, the data signal line is provided with a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend; for other row pixel electrodes in odd-numbered rows, the data signal line is provided with a first vertical portion at the position corresponding to the first bend and a second vertical portion at the position corresponding to the second bend.
[0043] Optionally, the display area includes an array of pixel electrodes, and the display panel further includes pixel circuitry for driving the pixel electrodes.
[0044] The orthographic projection of the pixel circuit corresponding to each pixel electrode onto the substrate is a mirror image structure that is symmetrical with respect to the central axis of the pixel circuit extending along the second direction.
[0045] The two adjacent data signal lines are mirror images of each other.
[0046] Optionally, there are at least four data signal lines between adjacent first signal lines.
[0047] A second aspect of this disclosure provides a display device including the display panel described above.
[0048] The beneficial effects of this invention are as follows:
[0049] This invention addresses existing problems by providing a display panel and display device. It offers multiple first transition sections, with some sections connecting first and second fan-out signal lines, and others connecting first and second analog lines. Data signal lines adjacent to the first transition sections form first bends to avoid them, while data signal lines not adjacent to the first transition sections form second bends in the same row. This improves the consistency of trace density and shape in the display area, enhances the consistency of ambient light reflectivity, prevents streaks, improves display uniformity, and enhances display performance, thus demonstrating broad application prospects. Attached Figure Description
[0050] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0051] Figure 1 A schematic structural diagram of a display panel illustrating related technologies;
[0052] Figure 2 Show Figure 1 A schematic diagram of the structure of the central display panel;
[0053] Figure 3 A schematic structure of a display panel according to an embodiment of the present disclosure is shown;
[0054] Figure 4 A schematic structural diagram of a display panel according to an embodiment of the present disclosure is shown;
[0055] Figure 5 A schematic structure of a display panel according to another disclosed embodiment is shown;
[0056] Figure 6 Show Figure 5 The structure of the first metal layer in the layout shown;
[0057] Figure 7 Show Figure 5 The structure of the second metal layer in the layout shown;
[0058] Figure 8 A schematic structure of a display panel according to another disclosed embodiment is shown;
[0059] Figure 9 Show Figure 8 The structure of the first metal layer in the layout shown;
[0060] Figure 10 Show Figure 8 The structure of the second metal layer in the layout shown;
[0061] Figure 11 A schematic structure of a display panel according to another disclosed embodiment is shown;
[0062] Figure 12 Show Figure 11 The structure of the first metal layer in the layout shown;
[0063] Figure 13 Show Figure 11 The structure of the second metal layer in the layout shown; and
[0064] Figure 14 A schematic structure of a first metal layer in a display panel according to another embodiment of the present disclosure is shown. Detailed Implementation
[0065] To more clearly illustrate the present invention, the following description, in conjunction with preferred embodiments and accompanying drawings, further explains the invention. Similar components in the drawings are indicated by the same reference numerals. Those skilled in the art should understand that the specific description below is illustrative rather than restrictive and should not be construed as limiting the scope of protection of the present invention.
[0066] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects.
[0067] The terms "on," "formed on," and "set on" as used herein can indicate that one layer is directly formed or set on another layer, or that one layer is indirectly formed or set on another layer, meaning that there are other layers between the two layers. Unless otherwise stated, the term "located on the same layer" as used herein means that two layers, components, elements, or parts can be formed by the same drawing process, and that these two layers, components, elements, or parts are generally formed of the same material.
[0068] As used in this disclosure, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).
[0069] Furthermore, in this disclosure, the term "co-layer arrangement" refers to two layers, components, elements, or portions that can be formed using the same manufacturing process (e.g., patterning process), and these two layers, components, elements, or portions are generally formed from the same material. For example, co-layer arrangement of two or more functional layers means that these co-layered functional layers can be formed using the same material layers and the same manufacturing process, thereby simplifying the manufacturing process of the display panel.
[0070] like Figure 1 The diagram illustrates an exemplary structure of a display panel in the related art. The display panel includes a display area AA, which includes a fan-out area FA and a normal display area outside the fan-out area FA. The display panel also includes a plurality of data signal lines Data, a plurality of first signal lines L1, and a plurality of second data signal lines L2 disposed on a substrate. The data signal lines Data are disposed throughout the display area AA, arranged along the x-direction and extending along the y-direction. The plurality of first signal lines L1 include a first fan-out signal line Fa1 disposed in the fan-out area FA and a first analog line Dl1 disposed in other areas, the extension and arrangement direction of the first signal lines L1 being consistent with that of the data signal lines Data. The plurality of second signal lines L2 include a second fan-out signal line Fa2 disposed in the fan-out area FA and a second analog line Dl2 disposed in other areas, the second signal lines L2 intersecting with the data signal lines Data. Furthermore, the first signal lines L1 also include a first connecting line Dl3 disposed in the fan-out area FA, and the second signal lines L2 also include a second connecting line Dl4 disposed in the fan-out area FA. The first fan-out signal line Fa1 and the second fan-out signal line Fa2 are set in a one-to-one correspondence and electrically connected through a via by the adapter Cn set in the fan-out area FA, thereby forming a fan-out line to achieve a narrow bezel design.
[0071] Reference Figure 1As shown, currently, in order to use FIP technology in high PPI display products, the first fan-out signal line Fa1 of the fan-out area FA, as part of the FIP trace, does not correspond one-to-one with the data signal lines Data. That is, to reduce wiring complexity, the number of first fan-out signal lines Fa1 is less than the number of data signal lines Data. In practical applications, a first fan-out signal line Fa1 is set every other data signal line Data. Because the first analog line Dl1 is set to ensure that the wiring in the normal display area outside the fan-out area FA is relatively consistent with the metal trace of the fan-out area Fa1, the number and arrangement of the first analog line Dl1 are consistent with the first fan-out signal line Fa1. Therefore, the number of first analog lines Dl1 is less than the number of data signal lines Data. The second signal line L2 is set on a different metal layer than the first signal line L1, and the second signal line L2 is also set on a different metal layer than the data signal line Data. The display panel also includes a first adapter Cn1, which includes a first adapter Cn disposed in the fan-out area FA and a first adapter H disposed in the normal display area. The first adapter Cn is used to electrically connect the second fan-out signal line Fa2 to the first fan-out signal line Fa1. The first adapter H located in the normal display area is disposed at the intersection of the first analog line Dl1 and the second analog line Dl2.
[0072] Continue to refer to Figure 1 As shown, because not all columns are provided with the first signal line L1, not every pixel electrode in the display screen is provided with a corresponding first adapter. Further refer to... Figure 2 As shown in the figure, the structure of the metal layer containing the data signal line Data and the first signal line L1 is illustrated. Because the signal lines are densely packed, the data signal lines adjacent to the first adapter need to be routed around the first adapter, while the data signal lines in other areas without the first adapter remain unchanged. This results in different metal trace densities and metal layer patterns within different pixel ranges. When illuminated by ambient light, these different metal trace densities and patterns will reflect ambient light differently, creating visually perceptible mura, severely affecting the visibility of the display device.
[0073] To address at least one of the above problems, embodiments of this disclosure provide a display panel, referring to... Figure 3 and Figure 4 As shown, the display area AA of the display panel includes a fan-out area FA and a normal display area located outside the fan-out area FA. The display panel also includes:
[0074] Substrate;
[0075] Multiple data signal lines are located in the display area. The data signal lines are arranged along a first direction and extend along a second direction, and the first direction and the second direction intersect.
[0076] Multiple first signal lines L1 are arranged along a first direction and extend along a second direction. The first signal lines L1 located in the fan-out area FA form the first fan-out signal line Fa1, and the first signal lines L1 located in the normal display area form the first analog line Dl1.
[0077] Multiple second signal lines L2 are arranged along a second direction and extend along a first direction. A portion of the second signal lines L2 located in the fan-out area FA forms a second fan-out signal line Fa2, and the second signal lines L2 located in the normal display area form a second analog line Dl2. The second fan-out signal line Fa2 is connected to the first fan-out signal line Fa1.
[0078] Multiple first transition sections Cn1 are provided. The first transition section Cn in the fan-out area FA is electrically connected to the first fan-out signal line Fa1. The first transition section H in the normal display area is located between the first analog line Dl1 and the second analog line Dl2, which intersect on the substrate by orthographic projection. Both the first transition section Cn1 and the first signal line are disposed in the first metal layer.
[0079] The data signal line Data includes a vertical portion and a bent portion. The data signal line Data adjacent to the first signal line L1 includes a first vertical portion and a first bent portion D-1. The first bent portion D-1 partially surrounds the first transition portion Cn1. The data signal line Data not adjacent to the first signal line L1 includes a second vertical portion and a second bent portion D-2. The second bent portion D-2 and the first bent portion D-1 are located in the same row along the first direction.
[0080] The second bend has the same shape as the first bend.
[0081] In embodiments of this disclosure, "identical" means identical within the range of process tolerance.
[0082] In this embodiment, by setting the data signal line adjacent to the first adapter portion as a first bend portion to avoid the first adapter portion, and setting the data signal line not adjacent to the first adapter portion as a second bend portion at the position on the same row as the first adapter portion, the consistency of the trace density and shape in the display area can be improved, the consistency of the reflectivity of ambient light can be improved, the occurrence of patterns can be avoided, and the display effect can be improved.
[0083] The structure and advantages of the display panel of the present disclosure will be described in detail below with specific examples.
[0084] In a specific example, refer to Figure 3 and Figure 4 As shown, where Figure 3 This is an exemplary structural diagram illustrating the first metal layer of the display panel. Figure 4 This is a schematic structural diagram illustrating the overall wiring structure in the display panel.
[0085] It should be noted that, in the embodiments of this disclosure, except for the electrically isolated region between the first analog line Dl1 and the first fan-out signal line Fa1, the wiring structure of the fan-out region FA in the display area AA and the first metal layer in the normal display area are the same. Therefore, Figure 3 The structural diagram does not need to distinguish specific areas within the display area, but it is not the electrically isolated area mentioned above.
[0086] Reference Figure 3 and Figure 4 As shown, the display area AA of the display panel includes the fan-out area FA enclosed by a dashed frame and the normal display area outside the fan-out area FA.
[0087] Those skilled in the art should understand that the fan-out area FA, as part of the display area AA, has pixel electrodes arranged in an array with the same arrangement pattern as the normal display area.
[0088] It should be noted that the pixel electrodes described herein are not intended to limit the type of display device to which the display panel is applied. A pixel electrode refers to an electrode that drives a pixel unit. The display panel in the embodiments of this disclosure can be an organic light-emitting diode (OLED) display panel, a liquid crystal display (LCD) panel, or a micro light-emitting diode (Micro LED) display panel, as long as it is a display panel that can apply FIP technology.
[0089] Continue to refer to Figure 4 As shown, the display panel also includes multiple data signal lines Data, multiple first signal lines L1, multiple second data signal lines L2, and multiple first adapters Cn1 disposed on the substrate.
[0090] The data signal lines are arranged along a first direction (x-direction in this example) and extend along a second direction (y-direction in this example), with the first and second directions intersecting. The first signal line L1 is arranged along the first direction and extends along the second direction, while the second signal line L2 is arranged along the second direction and extends along the first direction. The data signal lines Data, L1, and the first adapter Cn1 are disposed on a first metal layer, and the second signal line L2 is disposed on a second metal layer different from the first metal layer.
[0091] In the specific examples in this article, the first direction is the x-direction and the second direction is the y-direction. For ease of description, the first direction will be described as the x-direction and the second direction as the y-direction in the specific examples below. However, those skilled in the art should understand that this disclosure is not limited to this, as long as the different directions intersect each other.
[0092] Continue to refer to Figure 4 As shown, the multiple first signal lines L1 include a first fan-out signal line Fa1 disposed in the fan-out area FA, a first analog line Dl1 disposed in the normal display area, and a first connecting line Dl3 disposed in the fan-out area FA connecting the first analog line Dl1. The first connecting line Dl3 is equivalent to an extension line extending the first analog line Dl1 into the fan-out area FA, that is, the first connecting line Dl3 is electrically connected to the first analog line Dl1. The first connecting line Dl3 and the first analog line Dl1 are virtual analog lines used to balance the number of traces in the display area AA. At the same time, they can be used to connect the low-level power signal VSS of the display panel or to connect the reset signal Vinit of the display panel. Connecting them in a mesh can reduce power consumption. The multiple second signal lines L2 include a second fan-out signal line Fa2 disposed in the fan-out area FA, a second analog line Dl2 disposed in the normal display area, and a second connecting line Dl4 disposed in the fan-out area FA connecting the second analog line Dl2. The second connecting line Dl4 is equivalent to extending the second analog line Dl2 into the fan-out area FA; that is, the second connecting line Dl4 is electrically connected to the second analog line Dl2. No actual signals are transmitted on the second connecting line Dl4 or the second analog line Dl2; they are only used to equalize the number of traces in the display area AA.
[0093] The first fan-out signal line Fa1 and the second fan-out line Fa2 are electrically connected in a one-to-one correspondence and are also electrically connected to a data signal line. In embodiments of this disclosure, the number of data signal lines Data is greater than the number of first fan-out signal lines Fa1.
[0094] It should be noted that, Figure 4 The example shows a first fan-out signal line Fa1 set every four data signal lines Data. The fan-out signal line length of the data signal line Data near the bezel area is smaller, and the first fan-out signal line Fa1 and the second fan-out signal line Fa2 are electrically connected to the data signal line Data near the bezel area. The data signal line Dat near the center area of the display area AA is not fanned out through the signal line of the fan-out area FA. However, this disclosure is not intended to limit the layout and fan-out method of the first fan-out signal line Fa1 and the second fan-out signal line Fa2 to... Figure 4The arrangement of the first fan-out signal line Fa1 and the second fan-out signal line Fa1, as well as the number of data signal lines Data between the two first signal lines L1, are not limited to this. Preferably, there are at least 4 data signal lines Data between adjacent first signal lines L1. The specific arrangement depends on the actual size of the display panel and the wiring method, which will not be elaborated on below.
[0095] Furthermore, when setting the first fan-out signal line Fa1, two or more first fan-out signal lines Fa1 can be set consecutively. That is, two or more first signal lines L1 can be set between two data signal lines Data. Additionally, it can be understood that when the position of the first fan-out signal line Fa1 changes, the positions of the first analog line Dl1 and the first connecting line Dl3 also change accordingly. When the layout and fan-out method of the first fan-out signal line Fa1 and the second fan-out signal line Fa2 change, the distance between adjacent second analog lines Dl2 and adjacent second connecting lines Dl4 also changes accordingly, which will not be elaborated further below.
[0096] Continue to refer to Figure 3 and Figure 4 As shown, the plurality of first transition sections Cn1 include a first transition section Cn located in the fan-out area FA and a first transition section H located in the normal display area.
[0097] Specifically, the first adapter Cn is electrically connected to the first fan-out signal line Fa1, as shown in the reference. Figure 4 As shown, when a data signal line Data needs to be fanned out via the first signal line L1 and the second signal line L2 in the fan-out area FA, one end of the second fan-out signal line Fa2 is electrically connected to the data signal line Data, and the other end is electrically connected to the first fan-out signal line Fa1 through a first adapter Cn that is electrically connected to the first fan-out signal line Fa1. Of course, since the second fan-out signal line Fa2 is located in a second metal layer that is different from the first metal layer, the second fan-out signal line Fa2 is electrically connected to the corresponding first adapter Cn through a via that penetrates the first metal layer.
[0098] On the other hand, the first transition portion H, located in the normal display area, is situated between the first analog line Dl1 and the second analog line Dl2, which intersect when projected onto the substrate. Optionally, the first analog line Dl1 and the second analog line Dl2 can be connected to a common electrode layer or a ground layer in the display panel. If the display panel is an LCD display panel, the grid-like first analog line Dl1 and the second analog line Dl2 can reduce the resistance of the common electrode layer itself, thereby reducing the voltage difference at different locations on the common electrode layer and further improving the display uniformity of the display panel. Optionally, if the display panel is an OLED display panel, the first analog line Dl1 and the second analog line Dl2 can also be connected to the high-voltage power supply signal Vdd or the low-voltage power supply signal Vss of the display panel, and power consumption can be reduced by connecting the grid-like first analog line Dl1 and the second analog line Dl2.
[0099] Specifically, in embodiments of this disclosure, the data signal line adjacent to the first signal line includes a first vertical portion and a first bent portion, the first bent portion partially surrounding the first transition portion, and the data signal line not adjacent to the first signal line includes a second vertical portion and a second bent portion, the second bent portion and the first bent portion being located in the same row along the first direction, and the second bent portion and the first bent portion having the same shape.
[0100] For a specific example, refer to Figure 3 As shown, the first bend D-1 is used to avoid the first transition section Cn, and the second bend D-2 is provided at a position on the same row along the first direction of the data signal line Data. For example, Figure 3 The data signal line Data1, marked in the middle, includes a first bend D-1 that avoids to the left; the data signal line Data2 includes a first bend D-1 that avoids to the right; the data signal line Data3, which is not adjacent to the first fan-out signal line Fa1, includes a second bend D-2 that avoids to the left at the same row position; and the data signal line Data4, at the same horizontal position, includes a second bend D-2 that avoids to the right.
[0101] This setting ensures that the routing shape and tilt of the data signal lines (Data) without FIP traces are consistent with the routing shape and tilt of the data signal lines (Data) with FIP traces at the corresponding positions. This improves the routing density and shape consistency of the data signal lines (Data) below the pixels in the display area AA, avoids streaks, and enhances display uniformity.
[0102] Considering that the second signal line L2 is located in a second metal layer different from the first metal layer, and since the widths of the first signal line L1 and the second signal line L2 are relatively small, the overlap area at the intersection of the second signal line L2 and the first signal line L1 in the orthogonal projection direction perpendicular to the substrate is relatively small, making it inconvenient to drill holes. Therefore, when the first signal line L1 and the second signal line L2 are electrically connected, it is best to also provide a transition portion in the second metal layer.
[0103] In this case, in order to improve the consistency of the wiring pattern of the display area AA in the metal layer, multiple first redundancy parts are set in the second metal layer.
[0104] Optionally, the display panel further includes: a plurality of first redundant portions and second transition portions disposed in a second metal layer, wherein the second metal layer is different from the first metal layer, the orthographic projection of the second transition portion on the substrate overlaps with the orthographic projection of the first transition portion on the substrate, and is electrically connected to the first transition portion through a via extending to the first transition portion, and the orthographic projection of the first redundant portion on the substrate falls within the area surrounded by the orthographic projection of the second bent portion on the substrate. Optionally, the first redundant portion is electrically connected to a second signal line.
[0105] Based on this Figures 5 to 7 Another specific example is shown, in which, Figure 5 To illustrate a schematic structural diagram of the stacked first and second metal layers, Figure 6 Show Figure 5 The structure of the first metal layer in the middle, Figure 7 Show Figure 5 The structure of the second metal layer in the middle.
[0106] Reference Figure 5 As shown, the display panel includes multiple first redundant parts Dm1 and second transition parts Cn2 disposed in the second metal layer.
[0107] In this example, the orthographic projection of the second transition portion Cn2 on the substrate overlaps with the orthographic projection of the first transition portion Cn1 on the substrate, and the figure shows that the orthographic projection of one of the first transition portion Cn1 and the second transition portion Cn2 on the substrate is covered by the orthographic projection of the other on the substrate. However, those skilled in the art will understand that as long as there is overlap, electrical connection between the two can be achieved by providing a through-hole in the overlapping area. More preferably, when the coverage relationship is as shown in this example, the metal content in the metal layer can be reduced, and the light transmittance of the display panel can be improved.
[0108] In addition, by Figure 5 It can be seen that the orthographic projection of the first redundant part Dm1 on the substrate falls within the area surrounded by the orthographic projection of the second bent part D-2 on the substrate.
[0109] Reference Figure 6 As shown, the relationship between the first transition portion Cn1 and the first bending portion D-1 is illustrated. It can be seen that the first transition portion Cn1 is located within the area surrounded by the orthographic projections of the two first bending portions D-1 on the substrate, and this area is indicated by a solid line frame in the figure. Furthermore, in this example, a high-level signal line VDD is also provided in the first metal layer.
[0110] Reference Figure 7 As shown, the second adapter Cn2 is electrically connected to the second signal line L2, and the first redundancy part Dm1 is electrically connected to the second signal line L2. Furthermore, in this example, a reset signal line Vinit2 and a power adapter providing a high-level signal VDD are also provided in the second metal layer, indicating that adapter structures providing high-level power signals are provided in both metal layers.
[0111] Optionally, refer to Figure 7 As shown, the display panel further includes a power transfer section disposed in the second metal layer. The power transfer section includes a first power transfer section VDD-1 near the first redundancy section Dm1 and a second power transfer section VDD-2 near the second transfer section Cn2. The orthogonal projection area of the first power transfer section VDD-1 on the substrate is smaller than the orthogonal projection area of the second power transfer section VDD-2 on the substrate.
[0112] This configuration allows for efficient use of layout space based on the arrangement of the second transition section Cn2 and the first redundant section Dm1.
[0113] Optionally, refer to Figure 7 As shown, the orthographic projection of the second power adapter VDD-2 on the substrate overlaps with the orthographic projections of the first signal line L1 and the two data signal lines Data adjacent to the first signal line L1 on the substrate. The orthographic projection of the first power adapter VDD-1 on the substrate overlaps with the orthographic projections of the two data signal lines Data that are not adjacent to the first signal line L1 on the substrate.
[0114] This setting, utilizing the projection relationship, allows for the prevention of crosstalk between lines.
[0115] Optionally, continue to combine Figure 5 and Figure 7As shown, the display panel further includes a data transfer section disposed in the second metal layer. The data transfer section includes a first data transfer section Da1 and a second data transfer section Da2. The orthographic projection of the first data transfer section Da1 on the substrate overlaps with the orthographic projection of the first bending section D-1 on the substrate. The orthographic projection of the second data transfer section Da2 on the substrate overlaps with the orthographic projection of the second bending section D-2 on the substrate. In the x-direction, the distance between adjacent first data transfer sections Da1 is greater than the distance between adjacent second data transfer sections Da2.
[0116] It should be noted that the metal layer containing the first and second signal lines is not limited to... Figure 5 As shown, this disclosure is not intended to limit the specific types of signal lines provided in the first and second metal layers, but rather to be determined according to actual needs.
[0117] It should also be noted that the second signal line L2 can also be located on the gate layer, or it can be located on other signal transition layers, such as the SD3 layer, as long as it is on a different layer from the data signal line Data and the first signal line L1. Through the above configuration, the uniformity of the metal pattern in the second metal layer of the display area is improved by utilizing the first redundancy unit, avoiding blemishes and improving display uniformity.
[0118] In another optional embodiment, the display panel, in addition to including the first redundancy portion Dm1 described above, further includes a second redundancy portion. That is, the display panel further includes: a plurality of second redundancy portions disposed in the first metal layer, wherein the orthographic projection of the second redundancy portion on the substrate falls within the orthographic projection of the first redundancy portion on the substrate, or the orthographic projection of the second redundancy portion on the substrate covers the orthographic projection of the first redundancy portion on the substrate, and wherein the second redundancy portion is electrically isolated from the data signal lines.
[0119] Specific reference Figures 8 to 10 As shown, where Figure 8 To illustrate the schematic structure of the stacked first and second metal layers, Figure 9 Show Figure 8 The structure of the first metal layer in the middle, Figure 10 Show Figure 8 The structure of the second metal layer in the middle.
[0120] Reference Figure 8 As shown, this example is similar to Figure 5 The difference in the example shown is that, in addition to the first redundant part Dm1 and the second transition part Cn2, the display panel includes a plurality of second redundant parts Dm2 disposed in the first metal layer.
[0121] In this example, the orthographic projection of the second redundant portion Dm2 onto the substrate falls within the orthographic projection of the first redundant portion Dm1 onto the substrate, or the orthographic projection of the second redundant portion Dm2 onto the substrate covers the orthographic projection of the first redundant portion Dm1 onto the substrate. That is, in this example, as long as a second redundant portion Dm2 with an area greater than or equal to, or less than or equal to, the orthographic projection position of the first redundant portion Dm1 is provided, the layout consistency of the metal pattern in the first metal layer can be improved. Also, more preferably, the orthographic projection area of the second redundant portion Dm2 onto the substrate is smaller than the orthographic projection area of the second transition portion Cn2 onto the substrate, and when the coverage relationship is as shown in this example, the metal content in the metal layer can be reduced, thereby improving the light transmittance of the display panel.
[0122] In addition, by Figure 8 It can be seen that the orthographic projection of the second redundant part Dm2 on the substrate falls within the area surrounded by the orthographic projection of the second bent part D-2 on the substrate.
[0123] Reference Figure 9 As shown, Figure 9 The relationship between the first transition portion Cn1 and the first bending portion D-1, and the relationship between the second redundant portion Dm2 and the second bending portion D-2 are further illustrated. It can be seen that the first transition portion Cn1 is located within the area surrounded by the orthographic projections of the two first bending portions D-1 on the substrate, and the second redundant portion Dm2 is located within the area surrounded by the orthographic projections of the two second bending portions D-2 on the substrate. Furthermore, the second redundant portion Dm2 is electrically isolated from the data signal line Data. The surrounding area is shown in solid lines in the figure. In other words, the second redundant portion Dm2 is floating. In addition, in this example, a high-level signal line VDD is also provided in the first metal layer.
[0124] Further optional, refer to Figure 9 As shown, considering the limitations of line width and line spacing at high PPI, the projected area of the second redundant part Dm2 on the substrate is smaller than the projected area of the first transition part Cn1 on the substrate.
[0125] Reference Figure 10 As shown, the second adapter Cn2 is electrically connected to the second signal line L2, and the first redundancy part Dm1 is electrically connected to the second signal line L2. Furthermore, in this example, a reset signal line Vinit2 and a power adapter providing a high-level signal VDD are also provided in the second metal layer, indicating that adapter structures providing high-level power signals are provided in both metal layers.
[0126] Optionally, refer to Figure 10As shown, the display panel further includes a power transfer section disposed in the second metal layer. The power transfer section includes a first power transfer section VDD-1 near the first redundancy section Dm1 and a second power transfer section VDD-2 near the second transfer section Cn2. The orthogonal projection area of the first power transfer section VDD-1 on the substrate is smaller than the orthogonal projection area of the second power transfer section VDD-2 on the substrate.
[0127] This configuration allows for efficient use of layout space based on the arrangement of the second transition section Cn2 and the first redundant section Dm1.
[0128] Optionally, refer to Figure 10 As shown, the orthographic projection of the second power adapter VDD-2 on the substrate overlaps with the orthographic projections of the first signal line L1 and the two data signal lines Data adjacent to the first signal line L1 on the substrate. The orthographic projection of the first power adapter VDD-1 on the substrate overlaps with the orthographic projections of the two data signal lines Data that are not adjacent to the first signal line L1 on the substrate.
[0129] This setting, utilizing the projection relationship, allows for the prevention of crosstalk between lines.
[0130] Optionally, continue to combine Figure 8 and Figure 10 As shown, the display panel further includes a data transfer section disposed in the second metal layer. The data transfer section includes a first data transfer section Da1 and a second data transfer section Da2. The orthographic projection of the first data transfer section Da1 on the substrate overlaps with the orthographic projection of the first bending section D-1 on the substrate. The orthographic projection of the second data transfer section Da2 on the substrate overlaps with the orthographic projection of the second bending section D-2 on the substrate. In the x-direction, the distance between adjacent first data transfer sections Da1 is greater than the distance between adjacent second data transfer sections Da2.
[0131] It should also be noted that the metal layer containing the first and second signal lines is not limited to... Figure 5 As shown, this disclosure is not intended to limit the specific types of signal lines provided in the first and second metal layers, but rather to be determined according to actual needs.
[0132] In addition, the second signal line L2 can also be located on the gate layer, or it can be located on other signal transition layers, such as the SD3 layer, as long as it is on a different layer from the data signal line Data and the first signal line L1.
[0133] By using the above settings, the consistency of the metal patterns of the first and second metal layers in the display area is improved, avoiding blemishes and improving display uniformity.
[0134] Figures 11 to 13 Another alternative embodiment is shown, wherein Figure 11 To illustrate the schematic structure of the stacked first and second metal layers, Figure 12 Show Figure 11 The structure of the first metal layer in the middle, Figure 13 Show Figure 11 The structure of the second metal layer in the middle.
[0135] Reference Figure 11 As shown, this example is similar to Figure 8 The difference in the example shown is that the display panel does not include, for example, Figure 8 Instead of the second redundancy Dm2 shown, it is replaced by the third redundancy Dm3.
[0136] In this example, refer to Figure 11 and Figure 12 As shown, the orthographic projection of the third redundant part Dm3 onto the substrate covers the orthographic projection of the first redundant part Dm1 onto the substrate, and the third redundant part Dm3 is electrically connected to one of the adjacent data signal lines Data. By setting the third redundant part Dm3 to be electrically connected to the data signal line Data, it is possible to maintain the consistency of the metal pattern of the first metal layer in the display panel while preventing signal floating. Because of the electrical connection method of the third redundant part Dm3, its projected area can be set to be larger than the area of the orthographic projection of the first redundant part Dm1 onto the substrate, thereby maintaining as much consistency as possible with the pattern of the first transition part Cn1 while preventing signal floating, thus improving display uniformity.
[0137] Of course, refer to Figure 13 The reset signal line Vinit2 and the power supply adapter that provides a high-level signal VDD are also shown in the second metal layer. It can be seen that the adapter structure that provides a high-level power signal is provided in both metal layers.
[0138] Optionally, refer to Figure 13 As shown, the display panel further includes a power transfer section disposed in the second metal layer. The power transfer section includes a first power transfer section VDD-1 near the first redundancy section Dm1 and a second power transfer section VDD-2 near the second transfer section Cn2. The orthogonal projection area of the first power transfer section VDD-1 on the substrate is smaller than the orthogonal projection area of the second power transfer section VDD-2 on the substrate.
[0139] This configuration allows for efficient use of layout space based on the arrangement of the second transition section Cn2 and the first redundant section Dm1.
[0140] Optionally, refer to Figure 13As shown, the orthographic projection of the second power adapter VDD-2 on the substrate overlaps with the orthographic projections of the first signal line L1 and the two data signal lines Data adjacent to the first signal line L1 on the substrate. The orthographic projection of the first power adapter VDD-1 on the substrate overlaps with the orthographic projections of the two data signal lines Data that are not adjacent to the first signal line L1 on the substrate.
[0141] This setting, utilizing the projection relationship, allows for the prevention of crosstalk between lines.
[0142] Optionally, continue to combine Figure 11 and Figure 13 As shown, the display panel further includes a data transfer section disposed in the second metal layer. The data transfer section includes a first data transfer section Da1 and a second data transfer section Da2. The orthographic projection of the first data transfer section Da1 on the substrate overlaps with the orthographic projection of the first bending section D-1 on the substrate. The orthographic projection of the second data transfer section Da2 on the substrate overlaps with the orthographic projection of the second bending section D-2 on the substrate. In the x-direction, the distance between adjacent first data transfer sections Da1 is greater than the distance between adjacent second data transfer sections Da2.
[0143] Alternatively, the distance between the second transition section Cn2 and the two adjacent first data transition sections Da1 is approximately equal, while the distance between the first redundant section Dm1 and the two adjacent second data transition sections Da2 is not equal.
[0144] It should also be noted that the metal layer containing the first and second signal lines is not limited to... Figure 5 As shown, this disclosure is not intended to limit the specific types of signal lines provided in the first and second metal layers, but rather to be determined according to actual needs.
[0145] In some other alternative embodiments, reference continues to be made to... Figure 4 As shown, considering that a first fan-out signal line Fa1 is set only after multiple data signal lines are spaced apart, and the second fan-out signal lines Fa2 also have a certain distance in the y direction, the intersection of the orthographic projections of the first fan-out signal line Fa1 and the second fan-out signal line Fa2 on the substrate without the first transition part Cn, the intersection of the extension line of the first fan-out signal line Fa1 and the orthographic projection of the second fan-out signal line Fa2 on the substrate, and the intersection of the extension line of the second fan-out signal line Fa2 and the orthographic projection of the first fan-out signal line Fa1 on the substrate, are inconsistent with the metal pattern of other areas of the display area due to the lack of the first transition part Cn, thus resulting in a pattern.
[0146] Considering this, refer to Figure 4As shown, the display panel further includes: a plurality of first dummy transition sections, each first dummy transition section Cd disposed on the first metal layer and located in the fan-out region FA. In the first direction, a first dummy transition section Cd is electrically connected to a position on the same horizontal line as a first transition section Cn but not connected to the first transition section Cn. Simultaneously, a data signal line adjacent to the first dummy transition section Cd has a third bend at the position of the first dummy transition section to avoid the first dummy transition section Cd. The third bend of this data signal line can be referenced... Figure 3 The first bend in the data signal line Data around the first transition section Cn.
[0147] Further optionally, considering the inconsistency of the second metal layer in the fan-out region FA caused by the lack of metal pattern at the corresponding position in the fan-out region FA, the display substrate further includes: a plurality of second dummy transition portions (not shown) located in the fan-out region FA and disposed in the second metal layer, wherein the orthographic projection of the second dummy transition portion on the substrate overlaps with the orthographic projection of the first dummy transition portion Cd on the substrate, and the second dummy transition portion is electrically isolated from the first dummy transition portion Cd.
[0148] In some alternative embodiments, considering that only a portion of the data signal lines Data need to be fanned out via the fan-out line formed by the electrical connection of the first and second fan-out signal lines, there may be one or more rows of pixel electrodes between adjacent second signal lines L2. The positions of the data signal lines Data corresponding to these intermediate row pixel electrodes are neither provided with a first transition portion Cn nor with a dummy transition portion Cd. To ensure that the metal wiring in these areas is consistent with other areas, refer to... Figure 14 As shown, dummy winding structures are set in these areas. The winding structures are shown in the area enclosed by the elliptical dashed box in the figure. Unlike the areas corresponding to the second and fourth row pixel electrode rows, the first and third rows, which do not have any transition parts, have dummy winding structures.
[0149] Specifically, the display area includes: an array of pixel electrodes, and multiple data signal lines including bends. The bends include a first bend on a data signal line adjacent to the first signal line and a second bend on a data signal line not adjacent to the first signal line. One row of bends along the first direction corresponds to one row of pixel electrodes. For other rows of pixel electrodes that do not correspond to the row of bends, their data signal lines have a first dummy bend at a position corresponding to the first bend and a second dummy bend at a position corresponding to the second bend. The first dummy bend of the same data signal line has the same shape as the first bend, and the second dummy bend of the same data signal line has the same shape as the second bend.
[0150] Alternatively, instead of setting up a dummy winding section at the location of all data signal lines where no transition section is set up, a dummy winding section is set up at N intervals for the pixel electrodes of other rows where no transition section is set up.
[0151] That is, the display area includes: pixel electrodes arranged in an array, one row of the bent portion along the first direction corresponds to one row of the pixel electrodes, and other rows of pixel electrodes not corresponding to the row of the bent portion are arranged every N rows. A data signal line is provided with a first dummy bent portion at a position corresponding to the first bent portion and a second dummy bent portion at a position corresponding to the second bent portion, where N is an integer greater than or equal to 2. The first dummy bent portion of the same data signal line has the same shape as the first bent portion, and the second dummy bent portion of the same data signal line has the same shape as the second bent portion.
[0152] For example, the first dummy bend and the second dummy bend can be set in odd rows and not set in even rows, or the first dummy bend and the second dummy bend can be set in even rows and not set in odd rows.
[0153] That is, for the pixel electrodes in other rows that do not correspond to the bend in the first row, the data signal lines of the pixel electrodes in odd-numbered rows have a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend; for the pixel electrodes in even-numbered rows, the data signal lines have a first vertical portion at the position corresponding to the first bend and a second vertical portion at the position corresponding to the second bend, or...
[0154] For pixel electrodes in other rows that do not correspond to the bend in the first row, the data signal lines of the other rows in even-numbered rows have a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend. For pixel electrodes in other rows in odd-numbered rows, the data signal lines have a first vertical portion at the position corresponding to the first bend and a second vertical portion at the position corresponding to the second bend.
[0155] Of course, it should be noted that, Figure 14 The transition structure shown in the second and fourth rows is merely illustrative; the arrangement of this dummy bend can be similar to... Figure 3 , Figure 5 , Figure 8 ,as well as Figure 11 The structures of any one embodiment can be combined to obtain better visualization effects.
[0156] In another optional embodiment, to further improve display uniformity, the pixel circuits and data signal lines are both configured as mirror structures.
[0157] Specifically, the display panel further includes: a pixel circuit for driving the pixel electrode, wherein the orthographic projection of the pixel circuit corresponding to each pixel electrode on the substrate is a mirror structure symmetrical with respect to the central axis of the pixel circuit extending along the second direction, and two adjacent data signal lines are mirror structures of each other.
[0158] Based on the same inventive concept, embodiments of the present invention also provide a display device, including the display panel described above in the embodiments of the present invention. The principle by which this display device solves the problem is similar to that of the aforementioned display panel; therefore, the implementation of this display device can refer to the implementation of the aforementioned display panel, and the repeated parts will not be described again here.
[0159] In practical implementation, the display device can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator. Other essential components of the display device are those that should be understood by those skilled in the art, and will not be described further here, nor should they be construed as limiting this disclosure.
[0160] This invention addresses existing problems by providing a display panel and display device. It offers multiple first transition sections, with some sections connecting first and second fan-out signal lines, and others connecting first and second analog lines. Data signal lines adjacent to the first transition sections form first bends to avoid them, while data signal lines not adjacent to the first transition sections form second bends in the same row. This improves the consistency of trace density and shape in the display area, enhances the consistency of ambient light reflectivity, prevents streaks, improves display uniformity, and enhances display performance, thus demonstrating broad application prospects.
[0161] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all the implementation methods here. All obvious variations or modifications derived from the technical solutions of the present invention are still within the protection scope of the present invention.
Claims
1. A display panel, characterized in that, The display panel includes a fan-out area and a normal display area located outside the fan-out area. The display panel also includes: Substrate; Multiple data signal lines are located in the display area. The data signal lines are arranged along a first direction and extend along a second direction, and the first direction and the second direction intersect. A plurality of first signal lines, the first signal lines being arranged along a first direction and extending along a second direction, the portion of the first signal lines located in the fan-out area forming a first fan-out signal line, and the first signal lines located in the normal display area forming a first analog line; and Multiple second signal lines are arranged along a second direction and extend along a first direction. A portion of the second signal lines located in the fan-out area forms a second fan-out signal line, and the second signal lines located in the normal display area form a second analog line. The second fan-out signal lines are connected to the first fan-out signal lines. Multiple first adapters are provided. The first adapter in the fan-out area is electrically connected to the first fan-out signal line. The first adapter in the normal display area is located between the first analog line and the second analog line that intersect on the substrate by orthographic projection. Both the first adapter and the first signal line are disposed in the first metal layer. The data signal line adjacent to the first signal line includes a first vertical portion and a first bent portion, the first bent portion partially surrounding the first transition portion. The data signal line not adjacent to the first signal line includes a second vertical portion and a second bent portion, the second bent portion and the first bent portion being located in the same row along the first direction. The second bend and the first bend have the same shape.
2. The display panel according to claim 1, characterized in that, Also includes: Multiple first redundancy portions and second transition portions are disposed in a second metal layer, the second metal layer being different from the first metal layer. The orthographic projection of the second adapter on the substrate overlaps with the orthographic projection of the first adapter on the substrate, and is electrically connected to the first adapter through a through-hole extending to the first adapter. The orthographic projection of the first redundant portion on the substrate falls within the area surrounded by the orthographic projection of the second bent portion on the substrate.
3. The display panel according to claim 2, characterized in that, The first redundant part is electrically connected to the second signal line.
4. The display panel according to claim 2, characterized in that, Also includes: Multiple second redundancy units are disposed in the first metal layer. Wherein, the orthographic projection of the second redundant portion on the substrate falls within the orthographic projection of the first redundant portion on the substrate, or the orthographic projection of the second redundant portion on the substrate covers the orthographic projection of the first redundant portion on the substrate, and The second redundancy unit is electrically isolated from the data signal line.
5. The display panel according to claim 2, characterized in that, Also includes: Multiple third redundancy units are disposed in the first metal layer. Wherein, the orthographic projection of the third redundant part on the substrate covers the orthographic projection of the first redundant part on the substrate, and The third redundancy unit is electrically connected to one of the adjacent data signal lines.
6. The display panel according to claim 4, characterized in that, The projected area of the second redundant part on the substrate is smaller than the projected area of the first adapter part on the substrate.
7. The display panel according to claim 2, characterized in that, Also includes: A power transfer section is disposed in the second metal layer, the power transfer section including a first power transfer section near the first redundancy section and a second power transfer section near the second transfer section. The projected area of the first power adapter on the substrate is smaller than the projected area of the second power adapter on the substrate.
8. The display panel according to claim 7, characterized in that, The orthographic projection of the second power adapter on the substrate overlaps with the orthographic projections of the first signal line and the two data signal lines adjacent to the first signal line on the substrate. The orthographic projection of the first power adapter on the substrate overlaps with the orthographic projections of the two data signal lines not adjacent to the first signal line on the substrate.
9. The display panel according to claim 1, characterized in that, Also includes: A data switching section is disposed in a second metal layer, the data switching section including a first data switching section and a second data switching section, wherein the second metal layer is different from the first metal layer. The orthographic projection of the first data transfer unit on the substrate overlaps with the orthographic projection of the first bending unit on the substrate, and the orthographic projection of the second data transfer unit on the substrate overlaps with the orthographic projection of the second bending unit on the substrate. In the first direction, the distance between adjacent first data transfer units is greater than the distance between adjacent second data transfer units.
10. The display panel according to claim 5, characterized in that, A data transfer unit disposed in the second metal layer, the data transfer unit including a first data transfer unit and a second data transfer unit. The orthographic projection of the first data transfer unit on the substrate overlaps with the orthographic projection of the first bending unit on the substrate, and the orthographic projection of the second data transfer unit on the substrate overlaps with the orthographic projection of the second bending unit on the substrate. The distance between the second switching section and the two adjacent first data switching sections is approximately equal, while the distance between the first redundant section and the two adjacent second data switching sections is not equal.
11. The display panel according to claim 1, characterized in that, The display area includes: pixel electrodes arranged in an array; the plurality of data signal lines include bent portions, the bent portions including a first bent portion on the data signal line adjacent to the first signal line and a second bent portion on the data signal line not adjacent to the first signal line. The bend in one row along the first direction corresponds to a row of pixel electrodes. For pixel electrodes in other rows that do not correspond to the bend in the first row, their data signal lines are provided with a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend. The first dummy bend of the same data signal line has the same shape as the first bend, and the second dummy bend of the same data signal line has the same shape as the second bend.
12. The display panel according to claim 1, characterized in that, The display area includes: pixel electrodes arranged in an array; the plurality of data signal lines include bent portions, the bent portions including a first bent portion on the data signal line adjacent to the first signal line and a second bent portion on the data signal line not adjacent to the first signal line. A row of the bent portions along the first direction corresponds to a row of the pixel electrodes. For pixel electrodes in rows not corresponding to the first bend, every N rows, a first dummy bend is provided at the position corresponding to the first bend, and a second dummy bend is provided at the position corresponding to the second bend, where N is an integer greater than or equal to 2. The first dummy bend of the same data signal line has the same shape as the first bend, and the second dummy bend of the same data signal line has the same shape as the second bend.
13. The display panel according to claim 12, characterized in that, For pixel electrodes in other rows that do not correspond to the bend in the first row, the data signal lines of the other rows in odd-numbered rows have a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend. For pixel electrodes in other rows in even-numbered rows, the data signal lines have a first vertical portion at the position corresponding to the first bend and a second vertical portion at the position corresponding to the second bend. For pixel electrodes in other rows that do not correspond to the bend in the first row, the data signal lines of the other rows in even-numbered rows have a first dummy bend at the position corresponding to the first bend and a second dummy bend at the position corresponding to the second bend. For pixel electrodes in other rows in odd-numbered rows, the data signal lines have a first vertical portion at the position corresponding to the first bend and a second vertical portion at the position corresponding to the second bend.
14. The display panel according to claim 1, characterized in that, The display area includes an array of pixel electrodes, and the display panel further includes a pixel circuit for driving the pixel electrodes. The orthographic projection of the pixel circuit corresponding to each pixel electrode on the substrate is a mirror image structure that is symmetrical with respect to the central axis of the pixel circuit extending along the second direction. The two adjacent data signal lines are mirror images of each other.
15. The display panel according to claim 1, characterized in that, There are at least four data signal lines between adjacent first signal lines.
16. A display device, characterized in that, The display panel includes any one of claims 1-15.