Display substrate, preparation method thereof and display device

Abstract

The invention provides a display substrate, a preparation method thereof and a display device. The display substrate comprises a substrate body and a light-emitting device layer arranged on the substrate body. The light-emitting device layer comprises a first electrode layer, a first pixel defining layer, a light-emitting function layer and a second electrode layer which are stacked on the substrate so as to form a plurality of light-emitting devices. The first electrode layer comprises first electrodes of the light-emitting devices and partition structures spaced from the first electrodes, the partition structures are located between every two adjacent light-emitting devices, and each partition structure comprises a first partition part, a second partition part and a third partition part which are arranged in a stacked mode in the direction perpendicular to the substrate; the third partition portion is provided with a first protruding portion exceeding the second partition portion in the direction facing the adjacent light-emitting device. The light-emitting functional layer comprises a plurality of sub-functional layers, and at least one of the sub-functional layers is disconnected at the position where the partition structure is located.

Description

Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a display substrate, a method for preparing the same, and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) displays have become a research hotspot due to their advantages such as thinness, wide color gamut, fast response speed, and high resolution. As OLED displays are used more widely, the demands for their display performance are also increasing.

[0003] OLED display devices consist of multiple OLED devices. Some of the high charge mobility layers in these OLED devices are common, which can easily generate lateral leakage current, causing crosstalk between adjacent sub-pixels and thus affecting the display effect. Summary of the Invention

[0004] This disclosure provides a display substrate and its fabrication method, as well as a display device, through some embodiments to improve the crosstalk problem between adjacent sub-pixels.

[0005] In a first aspect, some embodiments of this disclosure provide a display substrate, including: a substrate and a light-emitting device layer disposed on the substrate. The light-emitting device layer includes a first electrode layer, a first pixel defining layer, a light-emitting functional layer, and a second electrode layer stacked on the substrate to form a plurality of light-emitting devices. The first electrode layer includes a first electrode of the light-emitting device and a partition structure spaced apart from the first electrode. The partition structure is located between adjacent light-emitting devices. The partition structure includes a first partition portion, a second partition portion, and a third partition portion stacked along a direction perpendicular to the substrate. The third partition portion has a first protrusion extending beyond the second partition portion in a direction toward an adjacent light-emitting device. The first pixel defining layer has a plurality of first openings and a plurality of second openings. The plurality of first openings define the light-emitting area of ​​the light-emitting device. The orthographic projection of the partition structure onto the substrate is within the orthographic projection range of the second openings onto the substrate. The light-emitting functional layer includes a plurality of sub-functional layers, at least one of which is disconnected at the location of the partition structure.

[0006] In some embodiments, the display substrate further includes: a driving circuit layer and a planarization layer located between the driving circuit layer and the first electrode layer. The planarization layer includes: a main body portion and a first support portion disposed on the main body portion on a side opposite to the substrate. A stepped structure is formed between the first support portion and the main body portion. A first partition portion is located on the side of the first support portion opposite to the substrate, and its orthographic projection on the substrate at least partially overlaps with the orthographic projection of the first support portion on the substrate. The first partition portion has a second protrusion extending beyond the first support portion in a direction toward an adjacent light-emitting device, and the second protrusion has a gap with the main body portion in a direction perpendicular to the substrate.

[0007] In some embodiments, the planarization layer further includes: a second support portion disposed on the side of the main body away from the substrate, the first support portion and the second support portion extending beyond the main body in a direction perpendicular to the substrate, the first electrode being located on the side of the second support portion away from the substrate, and its orthographic projection on the substrate at least partially overlapping with the orthographic projection of the second support portion on the substrate, and the first electrode having a third protrusion extending beyond the second support portion in a direction toward the adjacent partition structure.

[0008] In some embodiments, the display substrate further includes: a first power signal line and a second power signal line, located on the side of the first electrode layer near the substrate, wherein the first power signal line transmits a first power supply voltage that is less than the second power supply voltage transmitted by the second power signal line, the isolation structure has conductive properties, and the isolation structure is electrically connected to the first power signal line.

[0009] In some embodiments, the display substrate further includes: a metal trace layer on which the first power signal line is disposed, located on the side of the first electrode layer near the substrate; and a passivation layer located on the side of the metal trace layer near the first electrode layer, wherein the isolation structure is electrically connected to the first power signal line through a via penetrating the passivation layer.

[0010] In some embodiments, the display substrate further includes a second pixel defining layer located on the side of the first pixel defining layer near the substrate, the material of the second pixel defining layer comprising an inorganic insulating material. The second pixel defining layer conformally covers the partition structure, the orthographic projection of the partition structure onto the substrate falling within the orthographic projection range of the second pixel defining layer onto the substrate. The second pixel defining layer has a plurality of third openings, the orthographic projections of the third openings onto the substrate at least partially overlapping the orthographic projections of the first openings onto the substrate to expose at least a portion of the area of ​​the first electrode. In some embodiments, along a direction perpendicular to the substrate, the thickness of the second pixel defining layer is less than half the thickness of the second partition portion and less than the width of the first protrusion in the direction toward the adjacent light-emitting device.

[0011] In some embodiments, the material of the first pixel defining layer includes an organic material. In some embodiments, the slope angle of the side of the first pixel defining layer near the second opening is 20° to 30°, and the distance from the top of the side to the center of the second opening is greater than the distance from the bottom of the side to the center of the second opening.

[0012] In some embodiments, the first electrode is a multilayer composite structure, and the partition structure has the same number of film layers and material as the first electrode.

[0013] In some embodiments, the first electrode and the partition structure each include: a stacked metal electrode layer and a protective electrode layer. The metal electrode layer includes at least a stacked first sub-layer and a second sub-layer. The protective electrode layer is located on the side of the second sub-layer opposite to the first sub-layer. The first sub-layer is made of a first metal, and the second sub-layer is made of a second metal. The first partition portion of the partition structure includes the first sub-layer, the second partition portion includes the second sub-layer, and the third partition portion includes the protective electrode layer.

[0014] In some embodiments, the metal electrode layer further includes a third sub-layer stacked between the second sub-layer and the protective electrode layer, and the third partition portion further includes the third sub-layer, the material of which includes the first metal.

[0015] In some embodiments, the protective electrode layer in the first electrode is located on the side of the metal electrode layer away from the substrate and covers the side of the metal electrode layer; the protective electrode layer in the partition structure is located on the side of the metal electrode layer away from the substrate and its edge is flush with the edge of the third partition portion.

[0016] In some embodiments, the plurality of sub-functional layers include a charge generation layer and a first light-emitting layer and a second light-emitting layer stacked on both sides of the charge generation layer, wherein the charge generation layer is disconnected at the location of the partition structure.

[0017] Secondly, some embodiments of this disclosure provide a display device including the display substrate described in the first aspect above.

[0018] Thirdly, some embodiments of this disclosure provide a method for fabricating a display substrate, comprising: providing a backplane, the backplane including a substrate and a driving circuit layer disposed on the substrate; forming a first electrode layer on the backplane, the first electrode layer including: a first electrode for each light-emitting device and a partition structure spaced apart from the first electrode, the partition structure being located between two adjacent light-emitting devices, including a first partition portion, a second partition portion and a third partition portion stacked along a direction perpendicular to the substrate, the third partition portion having a first protrusion extending beyond the second partition portion in a direction toward the adjacent light-emitting device; forming a first pixel defining layer on the first electrode layer, the first pixel defining layer having a plurality of first openings and a plurality of second openings, the first openings exposing at least a portion of the first electrode, the partition structure being projected onto the substrate within the projection range of the second openings onto the substrate; forming a light-emitting functional layer on the first pixel defining layer, the light-emitting functional layer including: a plurality of sub-functional layers, at least one of the plurality of sub-functional layers being disconnected at the location of the partition structure; and forming a second electrode layer on the light-emitting functional layer.

[0019] In some embodiments, the backplane further includes a planarization layer located on the side of the driving circuit layer facing away from the substrate. Forming a first electrode layer on the backplane includes: forming an electrode material layer on the planarization layer; etching the electrode material layer to form a partition structure pattern and a first electrode pattern, wherein the partition structure pattern includes: a first partition layer, a second partition layer, and a third partition layer sequentially stacked on the planarization layer; and etching a portion of the planarization layer to form a first support portion on the planarization layer, wherein the first partition layer has a second protrusion extending beyond the first support portion in a direction toward an adjacent light-emitting device, and the second protrusion has a gap with the planarization layer in a direction perpendicular to the substrate. Forming a first pixel defining layer on the first electrode layer includes: forming an organic material layer on the first electrode layer; forming the plurality of first openings and the plurality of second openings and removing a portion of the second partition layer by photolithography and development of the organic material layer to form the first protrusion.

[0020] The display substrate provided in some embodiments of this disclosure provides a partition structure on the same layer as the first electrode between adjacent light-emitting devices. The third partition portion of the partition structure has a first protrusion that extends beyond the second partition portion in the direction toward the adjacent light-emitting device. That is, the second partition portion is recessed compared to the third partition portion. This allows the partition structure to form an undercut structure on the side toward the adjacent light-emitting device, thereby effectively isolating at least one sub-functional layer in the light-emitting functional layer formed on the partition structure. This is beneficial for intercepting laterally transmitted carriers and reducing crosstalk between adjacent sub-pixels.

[0021] The above description is merely an overview of the technical solutions provided by the embodiments of this disclosure. In order to better understand the technical means of the embodiments of this disclosure and to implement them in accordance with the contents of the specification, and to make the above and other objects, features and advantages of the embodiments of this disclosure more apparent and understandable, specific implementation methods of the embodiments of this disclosure are described below. Attached Figure Description

[0022] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0023] Figure 1 A plan view of a display substrate according to some embodiments of the present disclosure is shown;

[0024] Figure 2A A schematic diagram of the structure of a display substrate according to some embodiments of the present disclosure is shown;

[0025] Figure 2B It shows Figure 2A Enlarged view of region A1 in the middle;

[0026] Figure 2C It shows Figure 2A Microscopic image of the partition structure in the image;

[0027] Figure 2D A schematic diagram of the structure of the first electrode according to some embodiments of this disclosure is shown;

[0028] Figure 2E It shows Figure 2A The partition effect diagram of the partition structure in the middle;

[0029] Figure 3 A plan view of a partition structure according to some embodiments of the present disclosure is shown;

[0030] Figure 4A Schematic diagrams of the structure of display substrates according to other embodiments of the present disclosure are shown;

[0031] Figure 4B It shows Figure 4A Enlarged view of region A2 in the middle;

[0032] Figure 5A A schematic diagram of the structure of a display substrate according to some embodiments of the present disclosure is shown;

[0033] Figure 5B It shows Figure 5A Enlarged view of area A3 in the middle;

[0034] Figure 6A A schematic diagram of the structure of a display substrate according to some embodiments of the present disclosure is shown;

[0035] Figure 6B It shows Figure 6A Enlarged view of area A4 in the middle;

[0036] Figure 7A A schematic diagram of the structure of a display substrate according to other embodiments of the present disclosure is shown;

[0037] Figure 7B It shows Figure 7A Enlarged view of area A5 in the middle;

[0038] Figure 8A A schematic diagram of the structure of a display substrate according to other embodiments of the present disclosure is shown;

[0039] Figure 8B It shows Figure 8A Enlarged view of area A6 in the middle;

[0040] Figure 9A A schematic diagram of the structure of a display substrate according to other embodiments of the present disclosure is shown;

[0041] Figure 9B It shows Figure 9A Enlarged view of area A7 in the middle;

[0042] Figure 10A A schematic diagram of the structure of a display substrate according to other embodiments of the present disclosure is shown;

[0043] Figure 10B It shows Figure 10A Enlarged view of area A8 in the middle;

[0044] Figure 11A A schematic diagram of the structure of a display substrate according to other embodiments of the present disclosure is shown;

[0045] Figure 11B It shows Figure 11A Enlarged view of area A9 in the middle;

[0046] Figure 12A schematic diagram of the structure of a display substrate according to some embodiments of the present disclosure is shown;

[0047] Figure 13 A flowchart illustrating a method for fabricating a display substrate according to some embodiments of the present disclosure is shown;

[0048] Figure 14 A partial process flow diagram of a display substrate according to some embodiments of the present disclosure is shown;

[0049] Figure 15A A micrograph of the undercut structure formed between the first partition and the planarization layer is shown.

[0050] Figure 15B A micrograph of the ITO / Ti / Al / Ti barrier structure formed after partial Al was etched away by development is shown;

[0051] Figure 16 A schematic diagram of the structure of a display device according to some embodiments of the present disclosure is shown. Detailed Implementation

[0052] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. It should be noted that the term "a plurality of" as used herein includes two or more cases.

[0053] As used herein, “about,” “approximately,” or “approximately” includes the stated value and the average value within an acceptable range of deviation from the given value, wherein the acceptable range of deviation is determined by a person skilled in the art taking into account the measurement under discussion and the error associated with the measurement of the given quantity (i.e., the limitations of the measurement system).

[0054] As used herein, “parallel,” “perpendicular,” and “equal” include the described situation and situations that are similar to the described situation, within an acceptable range of deviation, which is determined by those skilled in the art taking into account the measurement under discussion and the error associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, “parallel” includes absolute parallelism and approximate parallelism, where an acceptable range of deviation for approximate parallelism may be, for example, within 5°; “perpendicular” includes absolute perpendicularity and approximate perpendicularity, where an acceptable range of deviation for approximate perpendicularity may also be, for example, within 5°; “equal” includes absolute equality and approximate equality, where an acceptable range of deviation for approximate equality may be, for example, a difference between the two equals being less than or equal to 5% of either one.

[0055] It should be understood that when a layer or element is referred to as being on another layer or substrate, it can mean that the layer or element is directly on the other layer or substrate, or that there is an intermediate layer between the layer or element and the other layer or substrate. In the embodiments of this disclosure, "same layer" refers to the relationship between multiple film layers formed from the same material after undergoing the same step (e.g., a patterning process).

[0056] Display devices employing a dual-layer OLED (tandem EL) design have been widely adopted due to their advantages such as long lifespan, low power consumption, and high brightness. In this type of display, the OLED light-emitting device has two light-emitting layers, with a charge-generating layer (CGL) positioned between them to generate charge carriers and inject them into both light-emitting layers, thereby enhancing brightness. However, for high-resolution display products, the high charge mobility of the charge-generating layer, coupled with the interconnected common film layers in the organic light-emitting functional layers of adjacent sub-pixels, can easily lead to laterally transported charge carriers, causing crosstalk between adjacent sub-pixels and affecting display performance.

[0057] Therefore, some embodiments of this disclosure provide a display substrate that, by providing a partition structure in the same layer as the first electrode between adjacent light-emitting devices, achieves the isolation of the high charge mobility film layer in the EL layer, which is beneficial for stopping the lateral transport of charge carriers and reducing crosstalk between adjacent sub-pixels. The display substrate provided by the embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0058] Figure 1 A plan view of a display substrate according to some embodiments of the present disclosure is shown. For example... Figure 1As shown, the display substrate 10 includes a display area AA and a non-display area SA. The non-display area SA is located on at least one side of the display area AA. For example, the non-display area SA may be located on one side of the display area AA, or it may be located on multiple sides of the display area AA, such as the non-display area SA surrounding the outer side of the display area AA. It should be noted that... Figure 1 The shapes of the display area and non-display area of ​​the display substrate shown are for illustrative purposes only and are not intended to be limiting. The actual shapes should be determined according to the needs of the display product.

[0059] The display area AA can include multiple pixels P arranged in an array. For example... Figure 1 As shown, the display area AA is provided with a plurality of pixels P arranged in an array in a first direction and a second direction. For example, the first direction can be... Figure 1 The X-axis represents the second direction, which can be represented by the X-axis. Figure 1 The Y-axis is represented in the diagram. For example, multiple pixels P can be arranged in M ​​rows and N columns, where M and N are integers greater than or equal to 2. Figure 1 Only a few pixels P are shown as an example of arrangement; ellipses indicate the remaining pixels not drawn. The first direction X is the row direction of pixels, and the second direction Y is the column direction of pixels. The first direction X and the second direction Y intersect each other, or are perpendicular to each other.

[0060] For example, each pixel P may include multiple sub-pixels, and each sub-pixel may include a light-emitting device and a pixel driving circuit for driving the light-emitting device. Each sub-pixel can display a single color, such as a red sub-pixel displaying red, a green sub-pixel displaying green, and a blue sub-pixel displaying blue. The brightness (grayscale) of different colored sub-pixels within each pixel can be adjusted, and multiple colors can be displayed through color combination and superposition, thereby achieving full-color display.

[0061] It should be noted that the types, number, and arrangement of subpixels included in each pixel P can be set according to the actual needs of the product. For example, each pixel P may include: two green subpixels, one blue subpixel, and one red subpixel. For example, the shapes of the above subpixels can be a single shape or a combination of multiple shapes such as circles, ovals, triangles, quadrilaterals, rhombuses, pentagons, and hexagons.

[0062] Figure 2A A schematic diagram of the structure of the display substrate 10 according to some embodiments of the present disclosure is shown. Figure 2B It shows Figure 2A Enlarged view of region A1 in the middle. Figure 2C It shows Figure 2A Micrograph of the partition structure in the image. Figure 2D A schematic diagram of the structure of the first electrode according to some embodiments of this disclosure is shown. Figure 2E It shows Figure 2AThe partition effect diagram of the partition structure in the image. Figure 2A As shown, the display substrate 10 includes a substrate 100 and a light-emitting device layer disposed on the substrate 100.

[0063] For example, the substrate 100 can be a flexible substrate. This flexible substrate may include, for example, a PI (Polyimide) substrate, a PET (Polyethylene Terephthalate) substrate, or a PEN (Polyethylene Naphthalate Dimethyl Acid Glycol Ester) substrate. In this case, the display substrate 10 described above can be a flexible display substrate.

[0064] For example, the substrate 100 can be a rigid substrate. This rigid substrate may include, for example, a glass substrate, an ultra-thin glass (UTG) substrate, a PMMA (polymethyl methacrylate) substrate, or a silicon substrate. In this case, the display substrate 10 described above can be a rigid display substrate.

[0065] It should be noted that the substrate 100 can be a single-layer structure or a multi-layer structure. For example, the substrate 100 may include at least one flexible substrate and at least one buffer layer, with the flexible substrate and the buffer layer being stacked alternately.

[0066] The light-emitting device layer includes a first electrode layer 130, a first pixel defining layer 141, a light-emitting functional layer 150, and a second electrode layer 160 stacked on the substrate 100 to form a plurality of light-emitting devices.

[0067] The first electrode layer 130 includes a first electrode 131 of a light-emitting device and a partition structure 132 spaced apart from the first electrode 131. The partition structure 132 is located between adjacent light-emitting devices. "Adjacent light-emitting devices" means that there are no other light-emitting devices between two light-emitting devices. The light-emitting functional layer 150 includes a plurality of sub-functional layers, at least one of which is disconnected at the location of the partition structure 132.

[0068] like Figure 2B and Figure 2C As shown, the partition structure 132 may include a first partition portion 201, a second partition portion 202 and a third partition portion 203 stacked in a direction perpendicular to the substrate 100. The third partition portion 203 has a first protrusion that extends beyond the second partition portion 202 in the direction toward the adjacent light-emitting device.

[0069] In other words, the second partition portion 202 of the partition structure 132 is recessed compared to the third partition portion 203, so that the partition structure 132 forms an undercut structure on the side facing the adjacent light-emitting device. This allows at least one sub-functional layer of the light-emitting functional layer 150 subsequently formed on the partition structure 132 to be disconnected, which is beneficial for intercepting the laterally transmitted carriers and reducing crosstalk between adjacent sub-pixels.

[0070] For example, in order to ensure the stability of the undercut structure, the width d of the first protrusion in the direction toward the adjacent light-emitting device, that is, the inward distance of the second partition 202 relative to the third partition 203, can be 0.3 micrometers to 0.5 micrometers, such as 0.3 micrometers, 0.4 micrometers or 0.5 micrometers, etc., determined according to the actual product needs and process conditions. This disclosure will not list them one by one.

[0071] It should be noted that the partition structure 132 and the first electrode 131 are on the same layer. For example, the pattern of the partition structure 132 and the pattern of the first electrode 131 can be formed by the same patterning process and the same etching process.

[0072] In some embodiments, to form a partition structure 132 on the same layer as the first electrode 131, the first electrode 131 is a multilayer composite structure. The partition structure 132 contains the same number of film layers and materials as the first electrode 131. In some examples, the first electrode 131 may include metallic materials such as magnesium (Mg), silver (Ag), copper (Cu), aluminum (Al), titanium (Ti), and molybdenum (Mo). In other examples, the first electrode 131 may also include alloys of the above metals, such as aluminum-neodymium alloy (AlNd) or molybdenum-niobium alloy (MoNb). In still other examples, the first electrode 131 may also be a stacked structure formed of the above metals and a transparent conductive material. The transparent conductive material may be, for example, any one of transparent conductive oxide thin film materials such as ITO (Indium tin oxide) and IZO (Indium zinc oxide).

[0073] In some embodiments, the first electrode 131 may include a stacked metal electrode layer 1300 and a protective electrode layer 1304. Correspondingly, the partition structure 132 also includes a stacked metal electrode layer 1300 and a protective electrode layer 1304. Figure 2DAs shown, the protective electrode layer 1304 in the first electrode 131 is located on the side of the metal electrode layer 1300 facing away from the substrate 100, and covers the side of the metal electrode layer 1300. This prevents the metal electrode layer 1300 in the first electrode 131 from being corroded, which could lead to display abnormalities. The protective electrode layer 1304 in the partition structure 132 is also located on the side of the metal electrode layer 1300 facing away from the substrate 100, and its edge is flush with the edge of the third partition portion 203, as shown. Figure 2B As shown. The term "flush" here should be interpreted broadly, including both completely flush and approximately flush, meaning that it is considered flush within an acceptable error range. Since after forming the partition structure pattern, it is necessary to further etch part of the metal film layer of the partition structure pattern from the side so that the second partition portion 202 in the final partition structure 132 is recessed compared to the third partition portion 203, unlike the first electrode 131, the side of the metal electrode layer 1300 in the partition structure 132 is not covered by the protective electrode layer 1304.

[0074] The aforementioned metal electrode layer 1300 includes at least a first sub-layer 1301 and a second sub-layer 1302 stacked together, with a protective electrode layer 1304 located on the side of the second sub-layer 1302 facing away from the first sub-layer 1301. In this case, the first partition portion 201 in the partition structure 132 includes the first sub-layer 1301, the second partition portion 202 includes the second sub-layer 1302, and the third partition portion 203 includes the protective electrode layer 1304. The material of the first sub-layer 1301 includes a first metal, and the material of the second sub-layer 1302 includes a second metal. This allows for selective etching of only the second metal, without etching the first metal or the protective electrode layer 1304, resulting in the third partition portion 203 of the partition structure 132 having a first protrusion extending beyond the second partition portion 202 in the direction toward the adjacent light-emitting device.

[0075] For example, when the metal electrode layer 1300 includes a first sublayer 1301 and a second sublayer 1302, the first metal can be molybdenum and the second metal can be aluminum. Taking the material of the protective electrode layer 1304 as an example, which includes ITO, the first electrode 131 and the partition structure 132 can be a stacked composite structure of Mo / Al / ITO.

[0076] In some embodiments, in addition to the first sublayer 1301 and the second sublayer 1302, the metal electrode layer 1300 further includes a third sublayer 1303, which is stacked between the second sublayer 1302 and the protective electrode layer 1304. In this case, the third partition portion 203 may include the third sublayer 1303 and the protective electrode layer 1304. The material of the third sublayer 1303 may include the first metal.

[0077] For example, when the metal electrode layer 1300 includes a first sublayer 1301, a second sublayer 1302, and a third sublayer 1303, the first metal can be titanium, the second metal can be aluminum, and taking the material of the protective electrode layer 1304 as an example, which includes ITO, the first electrode 131 and the partition structure 132 can be a Ti / Al / Ti / ITO stacked composite structure.

[0078] Figure 2B The illustrated embodiment uses a Ti / Al / Ti / ITO multilayer composite structure for the first electrode 131 and the partition structure 132. In some examples, the thickness of the bottom Ti layer in the first electrode 131 and the partition structure 132 is a first thickness t1, the thickness of the Al layer is a second thickness t2, and the thickness of the top Ti layer is a third thickness t3. The bottom Ti layer is closer to the substrate 100 than the top Ti layer. For example, the second thickness t2 can be greater than the third thickness t3, and the first thickness t1 and the third thickness t3 can be the same, so that an undercut structure is formed on the side of the partition structure 132.

[0079] For example, the first thickness t1 and the third thickness t3 can be between 300 angstroms and 1000 angstroms, such as 300 angstroms, 500 angstroms, 800 angstroms, or 1000 angstroms. The second thickness t2 can be between 500 angstroms and 3000 angstroms, such as 500 angstroms, 1000 angstroms, 1500 angstroms, or 2000 angstroms. The thickness t4 of the ITO layer can be between 100 angstroms and 1000 angstroms, such as 100 angstroms, 200 angstroms, 500 angstroms, 800 angstroms, or 1000 angstroms. This is beneficial for ensuring the characteristics of the first electrode 131 while forming an undercut structure on the side of the partition structure 132.

[0080] The first pixel defining layer 141 has a plurality of first openings K1 and a plurality of second openings K2. The first openings K1 and the second openings K2 are spaced apart. The plurality of first openings K1 are used to define the light-emitting area of ​​the light-emitting device. For example, each first opening K1 can expose at least a portion of the first electrode 131 of a light-emitting device, thereby defining the light-emitting area of ​​a light-emitting device. The orthographic projection of the partition structure 132 onto the substrate 100 is within the orthographic projection range of the second openings K2 onto the substrate 100.

[0081] In some embodiments, the material of the first pixel defining layer 141 may include an organic material. This allows the first pixel defining layer 141 to be fabricated using a material photolithography process, during which the intermediate metal layer (such as aluminum) of the partition structure pattern can be further etched, thereby forming an undercut structure on the side of the partition structure 132, which simplifies the process. Furthermore, compared to inorganic pixel defining layers, organic pixel defining layers have better bending performance and are more suitable for flexible product designs.

[0082] For example, the first electrode 131 and the corresponding stacked metal pattern (such as a Ti / Al / Ti stacked structure pattern) can be formed in the same patterning and etching process, and an electrode protective layer can be formed on the stacked metal pattern. The electrode protective layer covers the side of the stacked metal pattern corresponding to the first electrode 131 and is flush with the edge of the stacked metal pattern corresponding to the isolation structure, thus exposing the side of the stacked metal pattern corresponding to the isolation structure. Then, an organic material layer is coated on the electrode protective layer, and the organic material layer is exposed and developed using a mask to form the first pixel defining layer 141. During development, a portion of Al can be etched away from the side of the stacked metal pattern corresponding to the isolation structure, causing the middle Al layer to shrink inward relative to the top Ti and the edge of the electrode protective layer, thus forming an undercut structure.

[0083] In some embodiments, the side of the first pixel defining layer 141 near the second opening K2 is inclined relative to the direction perpendicular to the substrate 100, and the distance from the top of this side to the center of the second opening K2 is greater than the distance from the bottom of this side to the center of the second opening K2. In some examples, the slope angle α of the side of the first pixel defining layer 141 near the second opening K2 can be 20° to 30°, for example, 20°, 25° or 30°, etc., determined according to the needs of the actual product and the process conditions, and will not be listed in detail in this disclosure. This helps to reduce the risk of the second electrode being punctured due to the increased thickness of the first electrode 131, and reduces the phenomenon of cracks appearing at the overlap of the first pixel defining layer 141 and the first electrode 131.

[0084] like Figure 2A As shown, the first pixel defining layer 141 fills a portion of the gap between the first electrode 131 and the partition structure 132, which helps prevent the first electrode 131 and the partition structure 132 from being too close and short-circuiting. The side of the first pixel defining layer 141 near the second opening K2 faces the side of the partition structure 132, and a gap is provided between them, so that at least one sub-functional layer in the light-emitting functional layer 150 can be formed from the gap to the side of the partition structure 132, thereby breaking at the undercut structure on the side. Figure 2E As shown, the isolation structure 132 can effectively isolate the charge generation layer (CGL) with high charge mobility in the light-emitting functional layer 150, without isolating the second electrode layer 160.

[0085] Figure 3 A plan view of a partition structure 132 according to some embodiments of the present disclosure is shown. Figure 2A For along Figure 3 The cross-sectional view of line AA in the diagram. It should be noted that... Figure 3This is merely one example of the partition structure 132 provided in some embodiments of this disclosure; other suitable planar layout designs may also be adopted for the partition structure 132.

[0086] like Figure 3 As shown, the aforementioned plurality of sub-pixels includes a first color sub-pixel p1, a second color sub-pixel p2, and a third color sub-pixel p3. The first color sub-pixel p1 includes a first light-emitting device capable of emitting light of the first color, the second color sub-pixel p2 includes a second light-emitting device capable of emitting light of the second color, and the third color sub-pixel p3 includes a third light-emitting device capable of emitting light of the third color. For example, the first color is red, the second color is green, and the third color is blue. Of course, embodiments of this disclosure include, but are not limited to, these. It should be noted that... Figure 3 The shapes and sizes of the first color sub-pixel p1, the second color sub-pixel p2, and the third color sub-pixel p3 shown are for illustrative purposes only. The layout can be designed according to actual needs, and this disclosure does not impose any restrictions on them.

[0087] The partition structure 132 includes multiple annular partition substructures, each annular partition substructure being arranged around one or more of the first light-emitting device, the second light-emitting device, and the third light-emitting device. Figure 3 The illustrated embodiment uses annular partition structures surrounding the first, second, and third light-emitting devices as an example. This facilitates better interception of carriers transversely transported between adjacent light-emitting devices. For example, the partition structure 132 can be a mesh structure, with the orthographic projection of the mesh lines onto the substrate 100 located in the spacing region between each light-emitting device, and the light-emitting regions of each light-emitting device exposed at the mesh openings.

[0088] In other embodiments, the annular barrier substructure surrounding one or more of the first, second, and third light-emitting devices may have notches to further ensure that the second electrode layer is not broken, thereby facilitating the transmission of signals from the second electrode, such as cathode signals. It should be noted that although the annular barrier substructure has the aforementioned notches, the relatively small size of the notches significantly increases the resistance of sub-functional layers with high charge mobility (such as charge generation layers) in the light-emitting functional layer 150 at the notch location, effectively hindering the passage of laterally transported charge carriers and thus effectively avoiding crosstalk between adjacent sub-pixels. Furthermore, since the conductivity of the second electrode layer is greater than the conductivity of each sub-functional layer included in the light-emitting functional layer 150, and multiple light-emitting devices share the second electrode layer, resulting in multiple conductive channels, even if the size of the notches is relatively small, it will not hinder signal transmission on the second electrode layer.

[0089] In some embodiments, the display substrate 10 further includes a driving circuit layer located between the substrate 100 and the first electrode layer 130, and is configured to form a pixel driving circuit for each sub-pixel. For example, the pixel driving circuit may include multiple electronic components such as transistors and capacitors. For instance, each pixel driving circuit may include three transistors and one capacitor, constituting a 3T1C (i.e., one driving transistor, two switching transistors, and one capacitor). It may also include more than three transistors and at least one capacitor, such as a 4T1C (i.e., one driving transistor, three switching transistors, and one capacitor), a 5T1C (i.e., one driving transistor, four switching transistors, and one capacitor), or a 7T1C (i.e., one driving transistor, six switching transistors, and one capacitor), etc. The transistors may be thin-film transistors (TFTs), metal oxide semiconductors (MOS), or other switching devices with similar characteristics.

[0090] It is understood that a transistor may include a control electrode, a first electrode, and a second electrode. The control electrode is the gate of the transistor, the first electrode is one of the source and drain of the transistor, and the second electrode is the other of the source and drain of the transistor. Since in some exemplary embodiments the source and drain of a transistor may be structurally symmetrical, they may be structurally indistinguishable. Therefore, the source of the transistor is referred to as either the first electrode or the second electrode.

[0091] In some embodiments, each transistor in the pixel driving circuit can be an N-type transistor and / or a P-type transistor, for example, all of them can be P-type low-temperature polysilicon transistors. In this case, the driving circuit layer may include an active layer, a first gate metal layer, a second gate metal layer, a source / drain metal layer, and an insulating film layer located between these functional layers. The active layer is made of low-temperature polysilicon. The corresponding wiring of the pixel driving circuit can be completed through the first gate metal layer, the second gate metal layer, and the source / drain metal layer.

[0092] In other embodiments, some transistors in the pixel driving circuit are P-type low-temperature polysilicon transistors (LTPS), and some are N-type oxide transistors (Oxide transistors). In this case, the driving circuit layer includes two active layers: one is an LPS active layer to form the channel of the P-type LPS transistor, and the other is an Oxide active layer to form the channel of the N-type Oxide transistor. Furthermore, in addition to the first and second gate metal layers, the driving circuit layer typically also includes a third gate metal layer, through which the gate driving signal lines and related traces of the Oxide transistors are routed.

[0093] For example, in Figure 2A and 2BIn the illustrated embodiment, the driving circuit layer may include: a first source / drain metal layer 102, a first active layer ACT1, a first gate metal layer 108, a second gate metal layer 110, a second active layer ACT2, a third gate metal layer 114, a second source / drain metal layer 116, and a third source / drain metal layer 118 sequentially stacked on the substrate 100. For example, the driving circuit layer may further include: a connection metal layer 112, which includes connection blocks to achieve electrical connections between the electronic components included in the pixel driving circuit. For example, this can be achieved through... Figure 2A The connection block in the middle realizes the electrical connection between the P-type low-temperature polysilicon transistor and the N-type oxide transistor.

[0094] Of course, in addition to the functional film layers mentioned above, the driving circuit layer also includes an insulating film layer disposed between these functional film layers. For example... Figure 2A As shown, the driving circuit layer may further include a first gate dielectric layer 105 located between the first active layer ACT1 and the first gate metal layer 108, a second gate dielectric layer 107 located between the first gate metal layer 108 and the second gate metal layer 110, a first interlayer insulating layer 109 and a second buffer layer 111 located between the second gate metal layer 110 and the second active layer ACT2, a third gate dielectric layer 113 located between the second active layer ACT2 and the third gate metal layer 114, a second interlayer insulating layer 115 located between the third gate metal layer 114 and the second source / drain metal layer 116, and a first passivation layer 117 located between the second source / drain metal layer 116 and the third source / drain metal layer 118.

[0095] like Figure 2A As shown, the display substrate 10 may further include a planarization layer 120 located between the driving circuit layer and the first electrode layer 130, which serves to planarize the first electrode 131. For example, the material of the planarization layer 120 may be an organic material, such as any one or a combination of resin, acrylic or polyethylene terephthalate, polyimide, polyamide, polycarbonate, epoxy resin, etc.

[0096] like Figure 2A As shown, the display substrate 10 may further include a second passivation layer 121, located between the planarization layer 120 and the first electrode layer 130, which serves to prevent over-etching and block moisture from eroding the underlying metal film layer.

[0097] like Figure 2A As shown, the display substrate 10 may further include a light shield (LS) 104, which may be disposed below the channel of the low-temperature polysilicon transistor to reduce the impact of light on transistor performance. In some examples, the material of the light shield 104 may be a metallic material, and some signal transduction can be achieved through the light shield 104.

[0098] like Figure 2A As shown, the display substrate 10 may further include a barrier layer 101 and a first buffer layer 103. The first source / drain metal layer 102 is disposed on one side of the substrate 100, the barrier layer 101 is located on the side of the first source / drain metal layer 102 facing away from the substrate 100, the light-shielding layer 104 is located on the side of the barrier layer 101 facing away from the first source / drain metal layer 102, and the first buffer layer 103 is located between the light-shielding layer 104 and the first active layer ACT1.

[0099] Figure 4A A schematic diagram of the structure of the display substrate 10 according to other embodiments of this disclosure is shown. Figure 4B It shows Figure 4A A magnified view of region A2 in the middle. (See attached image.) Figure 4A and Figure 4B In some other embodiments of this disclosure, the surface of the first electrode layer 130 near the substrate 100 can contact the planarization layer 120 located between the driving circuit layer and the first electrode layer 130, that is, it is not necessary to provide the second passivation layer 121 between the first electrode layer 130 and the planarization layer 120.

[0100] like Figure 4A and Figure 4B As shown, the planarization layer 120 may include a main body 1201 and a first support portion 1202 disposed on the side of the main body 1201 facing away from the substrate 100. A stepped structure is formed between the first support portion 1202 and the main body 1201, that is, the first support portion 1202 is a protruding structure relative to at least a portion of the main body 1201 to which it is connected. For example, the main body 1201 and the first support portion 1202 may be an integral structure.

[0101] The first partition portion 201 is located on the side of the first support portion 1202 away from the substrate 100, and its orthographic projection on the substrate 100 at least partially overlaps with the orthographic projection of the first support portion 1202 on the substrate 100. For example, the surface of the first partition portion 201 near the substrate 100 may contact the surface of the first support portion 1202 away from the substrate 100.

[0102] The first partition portion 201 has a second protrusion extending beyond the first support portion 1202 in the direction toward the adjacent light-emitting device. The second protrusion has a gap 1204 between itself and the main body portion 1201 in the direction perpendicular to the substrate 100. In other words, while the second partition portion 202 is recessed compared to the third partition portion 203, the planarization layer 120 is recessed compared to the first partition portion 201, resulting in a double undercut structure on the side of the partition structure 132 facing the adjacent light-emitting device, which improves the partitioning effect of the partition structure 132.

[0103] For example, the orthographic projection of the first support portion 1202 on the substrate 100 is located within the orthographic projection range of the surface of the first partition portion 201 on the side closest to the substrate 100 on the substrate 100.

[0104] For example, in order to achieve a better partitioning effect, the step height of the above-mentioned stepped structure, that is, the gap distance between the second protrusion and the main body 1201 in the direction perpendicular to the substrate 100, can be 0.2 micrometers to 0.5 micrometers, such as 0.2 micrometers, 0.3 micrometers, 0.4 micrometers or 0.5 micrometers, etc., which can be determined according to the actual product needs and process conditions. This disclosure will not list them one by one.

[0105] There are several ways to form an undercut structure between the first partition 201 and the planarization layer 120. Three methods are mainly listed below for explanation. In actual implementation, other applicable methods can also be used, and this disclosure does not limit this. The first method: When using a dry etching process to etch the first electrode pattern and the isolation structure pattern, during the dry etching process, a portion of the planarization layer 120 can be etched away by controlling the etching parameters, thereby forming an undercut structure between the first partition 201 and the planarization layer 120, and between the first electrode 131 and the planarization layer 120. The second method: After completing the pattern etching of the first electrode layer 130, the planarization layer 120 can also be etched separately, forming an undercut structure between the first partition 201 and the planarization layer 120, and between the first electrode 131 and the planarization layer 120. The third method involves etching away a portion of the planarization layer 120 around the first partition portion 201 of the partition structure 132 separately after completing the pattern etching of the first electrode layer 130. This is done by forming a groove on the planarization layer 120, making the planarization layer 120 concave relative to the edge of the first partition portion 201, thereby forming an undercut structure only between the first partition portion 201 of the partition structure 132 and the planarization layer 120.

[0106] It should be noted that, when the first or second method is adopted, a portion of the planarization layer 120 area not covered by the first electrode pattern and the isolation structure pattern will be etched away, and an undercut structure will be formed between the first partition 201 and the planarization layer 120 and between the first electrode 131 and the planarization layer 120.

[0107] At this time, in addition to the first support portion 1202, the planarization layer 120 may also include: a second support portion 1203 disposed on the side of the main body portion 1201 facing away from the substrate 100, such as Figure 4A As shown. The second support portion 1203 and the first support portion 1202 are spaced apart. The first support portion 1202 and the second support portion 1203 extend beyond the main body portion 1201 in a direction perpendicular to the substrate 100, forming a stepped structure with the main body portion 1201. For example, the surface of the first support portion 1202 facing away from the substrate 100 is a first surface, the surface of the second support portion 1203 facing away from the substrate 100 is a second surface, and the surface of the main body portion 1201 facing away from the substrate 100 is a third surface. The distance between the first surface and the second surface and the substrate 100 is greater than the distance between the third surface and the substrate 100, that is, there is a step between the first surface and the second surface and the third surface.

[0108] The first electrode 131 is located on the side of the second support portion 1203 facing away from the substrate 100, and its orthographic projection on the substrate 100 at least partially overlaps with the orthographic projection of the second support portion 1203 on the substrate 100. For example, the surface of the first electrode 131 near the substrate 100 may contact the second support portion 1203. For example, the orthographic projection of the second support portion 1203 on the substrate 100 may be located within the range of the orthographic projection of the first electrode 131 on the substrate 100.

[0109] In some embodiments, the first electrode 131 also has a third protrusion extending beyond the second support portion 1203 in the direction toward the adjacent partition structure 132. It should be noted that the gap formed by the presence of the third protrusion can be filled by the subsequent organic first pixel defining layer 141 covering the first electrode layer 130 to ensure the flatness of the first electrode 131, thereby avoiding affecting the light-emitting performance of the light-emitting device.

[0110] When using the third method described above, only a portion of the planar layer 120 area corresponding to the edge of the isolation structure pattern is etched away, thereby forming an undercut structure between the first partition 201 and the planar layer 120. For example, Figure 5A A schematic diagram of the structure of the display substrate 10 according to some embodiments of the present disclosure is shown. Figure 5B It shows Figure 5A A magnified view of region A3 in the image. (See image below.) Figure 5A and 5B As shown, a groove 300 is provided on the surface of the planarization layer 120 facing away from the substrate 100, and the groove 300 is located directly opposite the side of the isolation structure. The first support portion 1202 is located between the grooves 300 on both sides of the isolation structure and is used to support the isolation structure. The orthographic projection of the edge of the first partition portion 201 on the substrate 100 is within the orthographic projection range of the groove 300 on the substrate 100, so that the first partition portion 201 has a second protrusion extending beyond the first support portion 1202 in the direction toward the adjacent light-emitting device.

[0111] By providing the aforementioned groove 300, a gap is created between the second protrusion and the main body 1201 in a direction perpendicular to the substrate 100, which is the gap between the side of the second protrusion closest to the substrate 100 and the bottom surface of the groove 300. In other words, the depth of the groove 300 in the direction perpendicular to the substrate 100 is the gap distance between the second protrusion and the main body 1201.

[0112] For example, the groove 300 has a first side and a second side disposed opposite to each other. The first side is covered by the partition structure 132, and the second side is not covered by the partition structure 132. That is, the orthographic projection of the first side on the substrate 100 is within the orthographic projection of the partition structure 132 on the substrate 100, and the orthographic projection of the second side on the substrate 100 is outside the orthographic projection of the partition structure 132 on the substrate 100.

[0113] For example, the bottom end of the side of the first pixel defining layer 141 near the second opening K2 can be flush with the second side. For example, the orthographic projection of the groove 300 of the planarization layer 120 onto the substrate 100 can be located within the orthographic projection range of the lower port of the second opening K2 onto the substrate 100. Here, the lower port is the opening that is relatively closer to the substrate 100, and the area of ​​the lower port is smaller than the area of ​​the upper port.

[0114] In some embodiments, the display substrate 10 may further include a first power signal line VSS and a second power signal line VDD (not shown in the figure), located on the side of the first electrode layer 130 near the substrate 100. The first power supply voltage transmitted by the first power signal line is less than the second power supply voltage transmitted by the second power signal line. The isolation structure 132 has conductive properties and is electrically connected to the first power signal line. Thus, in addition to the physical isolation function of the isolation structure 132 itself, by electrically connecting the conductive isolation structure 132 to the first power signal line VSS, the isolation structure 132 can be kept in a low voltage state, thereby guiding away the residual lateral carriers in the light-emitting functional layer 150. This is equivalent to achieving both physical isolation and electrical isolation through the undercut structure of the isolation structure 132 itself, which is beneficial for further reducing crosstalk between adjacent sub-pixels.

[0115] For example, the display substrate 10 further includes a metal trace layer on which the first power signal line VSS is disposed, located on the side of the first electrode layer 130 near the substrate 100. The display substrate 10 also includes a passivation layer located on the side of the metal trace layer near the first electrode layer 130. The passivation layer can protect the metal trace layer from corrosion. The isolation structure 132 can be electrically connected to the first power signal line VSS through a via penetrating the passivation layer.

[0116] Figure 6A A schematic diagram of the structure of the display substrate 10 according to some embodiments of the present disclosure is shown. Figure 6B It shows Figure 6A A magnified view of area A4. (See attached image.) Figure 6A and Figure 6B ,exist Figure 2A and Figure 2B Based on the corresponding embodiment, the metal trace layer with the first power signal line VSS can be a second source / drain metal layer 116, and the passivation layer located on the side of the metal trace layer near the first electrode layer 130 can include a first passivation layer 117 and a second passivation layer 121. The isolation structure 132 can be electrically connected to the first power signal line VSS located in the second source / drain metal layer 116 through a via that sequentially penetrates the second passivation layer 121, the planarization layer 120, and the first passivation layer 117.

[0117] Figure 7A A schematic diagram of the structure of the display substrate 10 according to other embodiments of this disclosure is shown. Figure 7B It shows Figure 7A A magnified view of area A5 in the middle. (See attached image.) Figure 7A and Figure 7B ,exist Figure 4A and Figure 4BBased on the corresponding embodiment, the metal trace layer with the first power signal line VSS can be a second source / drain metal layer 116, and the passivation layer located on the side of the metal trace layer near the first electrode layer 130 can include a first passivation layer 117. The isolation structure 132 can be electrically connected to the first power signal line VSS located in the second source / drain metal layer 116 through a via that sequentially penetrates the planarization layer 120 and the first passivation layer 117.

[0118] In some embodiments, the display substrate 10 may further include a second pixel defining layer 142 located on the side of the first pixel defining layer 141 closer to the substrate 100. The orthographic projection of the partition structure 132 on the substrate 100 lies within the orthographic projection range of the second pixel defining layer 142 on the substrate 100. The material of the second pixel defining layer 142 includes an inorganic insulating material, such as silicon nitride or silicon oxide. The second pixel defining layer 142 conformally covers the partition structure 132, that is, it wraps around the side surface of the partition structure 132 and the surface facing away from the substrate 100, which can play an insulating protection role, thereby further improving the blocking effect of the partition structure 132 on laterally transported charge carriers.

[0119] The second pixel defining layer 142 is stacked with the first pixel defining layer 141. In addition to providing insulation between the partition structure 132 and the light-emitting functional layer 150, it also needs to cooperate with the first pixel defining layer 141 to define the light-emitting area of ​​the light-emitting device. The second pixel defining layer 142 has a plurality of third openings K3. The orthographic projection of the third openings K3 on the substrate 100 at least partially overlaps with the orthographic projection of the first openings K1 on the substrate 100 to expose at least a portion of the area of ​​the first electrode 131.

[0120] Figure 8A A schematic diagram of the structure of the display substrate 10 according to other embodiments of this disclosure is shown. Figure 8B It shows Figure 8A Enlarged view of area A6 in the middle; Figure 9A A schematic diagram of the structure of the display substrate 10 according to other embodiments of this disclosure is shown. Figure 9B It shows Figure 9A A magnified view of area A7 in the middle. (See attached image.) Figure 8A and Figure 8B ,exist Figure 2A and Figure 2B Based on the corresponding embodiment, the display substrate 10 further includes the second pixel defining layer 142 described above. At the second opening K2 of the first pixel defining layer 141, the first pixel defining layer 141 conformally covers the side surface of the first isolation portion and the surface not covered by the second isolation portion, the side surface of the second isolation portion, and the side surface and surface (including the upper and lower surfaces) of the third isolation portion that are not in contact with the second isolation portion.

[0121] To ensure the isolation effect of the partition structure 132 on at least one sub-functional layer in the light-emitting functional layer 150, the thickness of the second pixel defining layer 142 needs to be reasonably designed. For example, along the direction perpendicular to the substrate 100, the thickness of the second pixel defining layer 142 is less than half the thickness of the second partition portion 202 and less than the width of the first protrusion in the direction toward the adjacent light-emitting device, so that while the partition structure 132 conformally covers the second pixel defining layer 142 on its side, it still retains an undercut structure that can isolate at least one sub-functional layer in the light-emitting functional layer 150.

[0122] See Figure 9A and Figure 9B ,exist Figure 4A and Figure 4B Based on the corresponding embodiment, the display substrate 10 further includes the aforementioned second pixel defining layer 142. At the second opening K2 of the first pixel defining layer 141, the second pixel defining layer 142 conformally covers the main body portion 1201 exposed from the second opening K2, the side surface of the first support portion 1202, the surface of the first isolation portion that does not contact the first support portion 1202 and the second isolation portion, the side surface of the second isolation portion, and the side surface and surface (including upper and lower surfaces) of the third isolation portion that do not contact the second isolation portion.

[0123] For example, in order to ensure that the double undercut structure formed on the side of the partition structure 132 can still play the role of partitioning at least one sub-functional layer in the light-emitting functional layer 150, the thickness of the second pixel defining layer 142 is also less than the width of the second protrusion in the direction toward the adjacent light-emitting device, and less than half of the gap distance between the second protrusion and the main body 1201.

[0124] Figure 10A A schematic diagram of the structure of the display substrate 10 according to other embodiments of this disclosure is shown. Figure 10B It shows Figure 10A Enlarged view of area A8 in the middle; Figure 11A A schematic diagram of the structure of the display substrate 10 according to other embodiments of this disclosure is shown. Figure 11B It shows Figure 11A A magnified view of area A9 in the middle. (See attached image.) Figure 10A and Figure 10B ,exist Figure 6A and Figure 6B Based on the illustrated embodiment, the display substrate 10 further includes the aforementioned second pixel defining layer 142 to further enhance the partitioning effect of the partition structure 132. The specific structure of the second pixel defining layer 142 can be found in [reference needed]. Figure 8A and Figure 8B The relevant descriptions of the corresponding embodiments are not repeated here. See also Figure 11A and Figure 11B ,exist Figure 7A and Figure 7B Based on the illustrated embodiment, the display substrate 10 further includes the aforementioned second pixel defining layer 142 to further enhance the partitioning effect of the partition structure 132. The specific structure of the second pixel defining layer 142 can be found in [reference needed]. Figure 9A and Figure 9B The relevant descriptions of the corresponding embodiments will not be repeated here.

[0125] Figure 12 A schematic diagram of the structure of a display substrate 10 according to some embodiments of the present disclosure is shown. See also... Figure 12 The light-emitting functional layer 150 covers the first pixel defining layer 141, the first electrode 131 exposed from the first opening K1 of the first pixel defining layer 141, and the partition structure 132 exposed from the second opening K2.

[0126] For example, the multiple sub-functional layers of the light-emitting functional layer 150 may include: a charge-generating layer 152 and a first light-emitting layer 151 and a second light-emitting layer 153 stacked on both sides of the charge-generating layer 152. The charge-generating layer 152 is broken at the location of the partition structure 132. It should be noted that the charge-generating layer 152 in the light-emitting functional layer 150 is a discontinuous structure or a non-integral structure at the broken position.

[0127] For example, the first light-emitting layer 151 is located on the side of the charge-generating layer 152 that is close to the substrate 100, and the second light-emitting layer 153 is located on the side of the charge-generating layer 152 that is away from the substrate 100.

[0128] It should be noted that the light-emitting functional layer 150 may also include other sub-functional layers (not shown in the figure) besides the charge generation layer 152, the first light-emitting layer 151 and the second light-emitting layer 153, such as a hole injection layer, a hole transport layer, an electron injection layer and an electron transport layer.

[0129] like Figure 12 As shown, the second electrode layer 160 is located on the side of the light-emitting functional layer 150 facing away from the substrate 100. The second electrode layer 160 includes a second electrode for each light-emitting device. For example, the second electrodes of adjacent light-emitting devices can be connected together to facilitate the application of signals to the second electrodes. One of the first electrode 131 and the second electrode serves as the anode of the light-emitting device, and the other serves as the cathode. For example, the first electrode 131 is the anode of the light-emitting device, and the second electrode is the cathode of the light-emitting device.

[0130] For example, the second electrode can be any one or more of magnesium (Mg), silver (Ag), and aluminum (Al), or an alloy made of any one or more of the above metals, or a transparent conductive material such as ITO, or a multilayer composite structure of metal and transparent conductive material.

[0131] In some embodiments, the display substrate 10 may further include a capping layer (CPL) located on the side of the second electrode layer 160 away from the substrate 100, which is beneficial to improving the light extraction efficiency of the light-emitting device.

[0132] In some embodiments, the display substrate 10 may further include an encapsulation layer 170 located on the side of the encapsulation layer opposite to the substrate 100, such as... Figure 12 As shown. The encapsulation layer 170 is used to encapsulate the light-emitting device, preventing water and oxygen from corroding and damaging the device.

[0133] For example, the encapsulation layer 170 may include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer stacked sequentially. The first and third encapsulation layers can be inorganic encapsulation layers, for example, they can be inorganic materials such as nitrides, oxides, oxynitrides, nitrates, carbides, or any combination thereof, and the fabrication process can be chemical vapor deposition (CVD). The second encapsulation layer can be an organic encapsulation layer, for example, it can be organic materials such as acrylic fibers, hexamethyldisiloxane, polyacrylates, polycarbonates, and polystyrene, and the fabrication process can be inkjet printing (IJP).

[0134] Figure 13 A flowchart illustrating a method for fabricating a display substrate 10 according to some embodiments of the present disclosure is shown. This fabrication method is used to fabricate the display substrate 10 provided in the above embodiments. Figure 13 As shown, the preparation method may include the following steps:

[0135] Step S101: Provide a backplane, the backplane including a substrate and a driving circuit layer disposed on the substrate;

[0136] Step S102: A first electrode layer is formed on the back plate. The first electrode layer includes: a first electrode of each light-emitting device and a partition structure spaced apart from the first electrode. The partition structure is located between two adjacent light-emitting devices and includes a first partition portion, a second partition portion and a third partition portion stacked in a direction perpendicular to the substrate. The third partition portion has a first protrusion that extends beyond the second partition portion in the direction toward the adjacent light-emitting device.

[0137] Step S103: A first pixel defining layer is formed on the first electrode layer. The first pixel defining layer has a plurality of first openings and a plurality of second openings. The first openings expose at least a portion of the area of ​​the first electrode. The orthographic projection of the partition structure on the substrate is located within the orthographic projection range of the second openings on the substrate.

[0138] Step S104: A light-emitting functional layer is formed on the first pixel defining layer. The light-emitting functional layer includes: a plurality of sub-functional layers, at least one of which is disconnected at the location of the partition structure.

[0139] Step S105: A second electrode layer is formed on the light-emitting functional layer.

[0140] Figure 14 A partial process flow diagram of a display substrate according to some embodiments of this disclosure is shown. See also... Figure 14 For step S102 above, an electrode material layer 400 can be formed on the backplate first. For example, as... Figure 14 As shown in Figure (a), the electrode material layer 400 may include a first Ti layer 401, an Al layer 402, and a second Ti layer 403 stacked sequentially, forming a Ti / Al / Ti composite material layer. Then, the electrode material layer 400 is etched to form a partition structure pattern 420 and a first electrode pattern 410, as shown... Figure 14 As shown in Figure (b), the partition structure pattern 420 includes a first partition layer 421, a second partition layer 422, and a third partition layer 433 stacked sequentially. In this case, both the partition structure pattern 420 and the first electrode pattern 410 are Ti / Al / Ti stacked structures, with the first and third partition layers made of Ti and the second partition layer made of Al.

[0141] In some embodiments, the backplate provided in step S101 further includes a planarization layer located on the side of the driving circuit layer facing away from the substrate, to ensure the flatness of the first electrode as much as possible. To form Figure 4B or Figure 5BIn the corresponding embodiment, a partition structure with a double undercut structure is provided to improve the partitioning effect. In step S102, an electrode material layer 400 can be formed on the planarization layer 120, i.e., the electrode material layer 400 is in contact with the planarization layer 120. In addition to etching the electrode material layer 400 to form the partition structure pattern 420 and the first electrode pattern 410, a portion of the planarization layer 120 also needs to be etched to form a first support portion 1202 on the planarization layer 120. The first partition layer 421 has a second protrusion extending beyond the first support portion 1202 in the direction toward the adjacent light-emitting device, and the second protrusion has a gap with the planarization layer 120 in the direction perpendicular to the substrate. It should be noted that the first partition layer 421 is the first partition portion 201 of the final partition structure 132, which forms an undercut structure with the etched planarization layer 120. Figure 15A A micrograph of the undercut structure formed between the first partition 201 and the planarization layer 120 is shown.

[0142] There are various methods to etch a partially planarized layer. In some embodiments, when the electrode material layer 400 is a Ti / Al / Ti metal stack, the electrode material layer 400 can be etched using a dry etching process to form a partition structure pattern 420 and a first electrode pattern 410. During this process, the etching extends down to the underlying planarized layer 120, forming a first support portion 1202 and a second support portion 1203, as shown below. Figure 14 As shown in Figure (b). Of course, in other embodiments, after obtaining the partition structure pattern 420 and the first electrode pattern 410, a portion of the planarization layer 120 can be etched separately to form at least the aforementioned first support portion 1202 on the planarization layer 120, thereby obtaining a partition structure with a double undercut structure. In actual implementation, the method can be determined according to the needs of the actual product and the process conditions; this disclosure does not impose any limitations on this.

[0143] Furthermore, to protect the first electrode pattern, a protective material layer, such as an ITO thin film, can be formed on the partition structure pattern 420 and the first electrode pattern 410. Then, the protective material layer is etched, retaining the protective material on the side surfaces of the first electrode pattern and the surface facing away from the substrate, as well as the protective material on the surface facing away from the substrate of the partition structure pattern, while removing the protective material at other locations (including the side surfaces of the partition structure pattern), thus forming a protective electrode layer 1304. Figure 14 As shown in Figure (c). Next, a portion of the second partition layer 422 in the partition structure pattern 420 can be removed to form a partition structure 132 having the first partition portion 201, the second partition portion 202, and the third partition portion 203 described above.

[0144] Further, a first pixel defining layer is formed. In some embodiments, to simplify the process, the first pixel defining layer 141 can be made of an organic material, so that a portion of the second partition layer 422 can be removed while developing the first pixel defining layer 140, resulting in the second partition portion 202 of the final partition structure 132. In this case, the process of forming the first pixel defining layer on the first electrode layer can include: forming an organic material layer on the first electrode layer; forming a plurality of first openings K1 and a plurality of second openings K2 by photolithography and development of the organic material layer, i.e., forming the first pixel defining layer 141; and, during the development of the organic material layer, a portion of the second partition layer 422 can be removed to form the first protrusion of the partition structure 132, such as... Figure 14 As shown in Figure (d) in the diagram. Figure 15B A micrograph of the ITO / Ti / Al / Ti barrier structure formed after partial Al was etched away by development is shown.

[0145] in addition, Figure 16 A schematic diagram of the structure of a display device according to some embodiments of the present disclosure is shown. For example... Figure 16 As shown, the display device 1000 includes the display substrate 10 provided in any of the embodiments described above. Because the display substrate 10 provides a partition structure on the same layer as the first electrode between the light-emitting devices of adjacent sub-pixels, at least one sub-functional layer (such as a charge generation layer) in the light-emitting functional layer is disconnected at the location of the partition structure. This helps to reduce the lateral transport of charge carriers between adjacent sub-pixels and reduce crosstalk between adjacent sub-pixels. Therefore, the display device 1000 including this display substrate 10 can also reduce crosstalk between adjacent sub-pixels, thereby achieving higher display quality.

[0146] For example, the display device 1000 can be any electronic product or component with display function, such as an augmented reality (AR) device, a virtual reality (VR) device, a wearable device, a display screen, a mobile phone, a laptop computer, a tablet computer, a television set, or a digital photo frame. Of course, the display device 1000 provided in this disclosure is not limited to the types listed above.

[0147] The above description does not provide detailed technical specifications regarding the layout of each layer of the product. However, those skilled in the art should understand that layers and regions of the desired shape can be formed using various technical means. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0148] It should be noted that the accompanying drawings of the embodiments disclosed herein only relate to the structures involved in the embodiments of this disclosure; other structures can be referred to with conventional designs. Where there is no conflict, the embodiments of this disclosure and the features described therein can be combined with each other to obtain new embodiments.

[0149] Although some embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make further changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.

Claims

1. A display substrate, characterized in that, include: A substrate and a light-emitting device layer disposed on the substrate, the light-emitting device layer comprising a first electrode layer, a first pixel defining layer, a light-emitting functional layer, and a second electrode layer stacked on the substrate to form a plurality of light-emitting devices, wherein... The first electrode layer includes a first electrode of the light-emitting device and a partition structure spaced apart from the first electrode. The partition structure is located between adjacent light-emitting devices. The partition structure includes a first partition portion, a second partition portion, and a third partition portion stacked in a direction perpendicular to the substrate. The third partition portion has a first protrusion that extends beyond the second partition portion in the direction toward the adjacent light-emitting device. The first pixel defining layer has a plurality of first openings and a plurality of second openings. The plurality of first openings are used to define the light-emitting area of ​​the light-emitting device. The partition structure is projected onto the substrate and is located within the projection range of the second opening onto the substrate. The light-emitting functional layer includes multiple sub-functional layers, at least one of which is disconnected at the location of the partition structure.

2. The display substrate according to claim 1, characterized in that, Also includes: A driving circuit layer and a planarization layer located between the driving circuit layer and the first electrode layer; The planarization layer includes: a main body portion and a first support portion disposed on the side of the main body portion away from the substrate, the first support portion forming a stepped structure with the main body portion, the first partition portion being located on the side of the first support portion away from the substrate, and the orthographic projection of the first support portion on the substrate at least partially overlapping the orthographic projection of the first support portion on the substrate, the first partition portion having a second protrusion extending beyond the first support portion in a direction toward the adjacent light-emitting device, the second protrusion having a gap with the main body portion in a direction perpendicular to the substrate.

3. The display substrate according to claim 2, characterized in that, The planarization layer further includes: a second support portion disposed on the side of the main body away from the substrate, the first support portion and the second support portion extending beyond the main body in a direction perpendicular to the substrate, the first electrode being located on the side of the second support portion away from the substrate, and the orthographic projection of the first electrode onto the substrate at least partially overlapping the orthographic projection of the second support portion onto the substrate, the first electrode having a third protrusion extending beyond the second support portion in a direction toward the adjacent partition structure.

4. The display substrate according to any one of claims 1-3, characterized in that, Also includes: A first power signal line and a second power signal line are located on the side of the first electrode layer closer to the substrate. The first power supply voltage transmitted by the first power signal line is less than the second power supply voltage transmitted by the second power signal line. The isolation structure has conductive properties and is electrically connected to the first power signal line.

5. The display substrate according to claim 4, characterized in that, Also includes: The metal trace layer containing the first power signal line is located on the side of the first electrode layer closer to the substrate. as well as A passivation layer is located on the side of the metal trace layer near the first electrode layer, and the isolation structure is electrically connected to the first power signal line through a via penetrating the passivation layer.

6. The display substrate according to any one of claims 1-3, characterized in that, Also includes: The second pixel defining layer is located on the side of the first pixel defining layer closer to the substrate, and the material of the second pixel defining layer includes: inorganic insulating material; The second pixel defining layer conformally covers the partition structure, and the orthographic projection of the partition structure on the substrate lies within the orthographic projection range of the second pixel defining layer on the substrate. The second pixel defining layer has a plurality of third openings, the orthographic projection of the third openings on the substrate at least partially overlapping the orthographic projection of the first openings on the substrate, so as to expose at least a portion of the area of ​​the first electrode; Along a direction perpendicular to the substrate, the thickness of the second pixel defining layer is less than half the thickness of the second partition portion and less than the width of the first protrusion in the direction toward the adjacent light-emitting device.

7. The display substrate according to any one of claims 1-3, characterized in that, The material of the first pixel defining layer includes organic materials; the slope angle of the side of the first pixel defining layer near the second opening is 20° to 30°, and the distance from the top of the side to the center of the second opening is greater than the distance from the bottom of the side to the center of the second opening.

8. The display substrate according to any one of claims 1-3, characterized in that, The first electrode is a multilayer composite structure, and the partition structure has the same number of film layers and materials as the first electrode.

9. The display substrate according to any one of claims 1-3, characterized in that, The first electrode and the partition structure respectively include: a stacked metal electrode layer and a protective electrode layer. The metal electrode layer includes at least a stacked first sub-layer and a second sub-layer. The protective electrode layer is located on the side of the second sub-layer opposite to the first sub-layer. The material of the first sub-layer includes a first metal, and the material of the second sub-layer includes a second metal. The first partition portion of the partition structure includes a first sub-layer, the second partition portion includes a second sub-layer, and the third partition portion includes the protective electrode layer.

10. The display substrate according to claim 9, characterized in that, The metal electrode layer further includes a third sub-layer, which is stacked between the second sub-layer and the protective electrode layer. The third partition portion also includes the third sub-layer, and the material of the third sub-layer includes the first metal.

11. The display substrate according to claim 9, characterized in that, The protective electrode layer in the first electrode is located on the side of the metal electrode layer away from the substrate and covers the side of the metal electrode layer; the protective electrode layer in the partition structure is located on the side of the metal electrode layer away from the substrate and its edge is flush with the edge of the third partition portion.

12. The display substrate according to any one of claims 1-3, characterized in that, The plurality of sub-functional layers include a charge generation layer and a first light-emitting layer and a second light-emitting layer stacked on both sides of the charge generation layer, wherein the charge generation layer is disconnected at the location of the partition structure.

13. A display device, characterized in that, The display substrate includes any one of claims 1-12.

14. A method for preparing a display substrate, characterized in that, include: A backplane is provided, the backplane including a substrate and a driving circuit layer disposed on the substrate; A first electrode layer is formed on the back plate. The first electrode layer includes a first electrode of a light-emitting device and a partition structure spaced apart from the first electrode. The partition structure is located between two adjacent light-emitting devices and includes a first partition portion, a second partition portion, and a third partition portion stacked in a direction perpendicular to the substrate. The third partition portion has a first protrusion that extends beyond the second partition portion in the direction toward the adjacent light-emitting device. A first pixel defining layer is formed on the first electrode layer. The first pixel defining layer has a plurality of first openings and a plurality of second openings. The first openings expose at least a portion of the first electrode. The partition structure is orthographically projected onto the substrate and lies within the orthographic projection range of the second openings onto the substrate. A light-emitting functional layer is formed on the first pixel defining layer, the light-emitting functional layer comprising: a plurality of sub-functional layers, at least one of the plurality of sub-functional layers being disconnected at the location of the partition structure; A second electrode layer is formed on the light-emitting functional layer.

15. The method according to claim 14, characterized in that, The backplate further includes: a planarization layer located on the side of the driving circuit layer opposite to the substrate, and a first electrode layer is formed on the backplate, including: An electrode material layer is formed on the planar layer; The electrode material layer is etched to form a partition structure pattern and a first electrode pattern, wherein the partition structure pattern includes a first partition layer, a second partition layer, and a third partition layer sequentially stacked on the planarization layer; and A portion of the planarization layer is etched to form a first support portion on the planarization layer, and the first partition layer has a second protrusion extending beyond the first support portion in a direction toward the adjacent light-emitting device, the second protrusion having a gap with the planarization layer in a direction perpendicular to the substrate. Forming a first pixel defining layer on the first electrode layer includes: An organic material layer is formed on the first electrode layer; The first protrusion is formed by photolithography and development of the organic material layer, forming the plurality of first openings and the plurality of second openings, and by removing part of the second partition layer.

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