MMC fault current rise rate calculation method and related device

By decomposing the MMC fault current rise rate into AC and DC components for calculation, the accuracy problem of MMC fault current rise rate assessment is solved, enabling fast and accurate fault current rise rate assessment and improving the safety and system stability of MMC equipment.

CN120971846APending Publication Date: 2025-11-18ELECTRIC POWER RES INST CHINA SOUTHERN POWER GRID CO LTD
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Patent Information

Application Number
CN202511102925.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-07
Publication Date
2025-11-18

AI Technical Summary

Technical Problem

Existing technologies struggle to quickly and accurately assess the rate of rise of fault current in modular multilevel converters (MMCs), resulting in large errors in simulation modeling accuracy and an inability to effectively evaluate the suitability of the inductance values ​​of the bridge arm reactors, thus affecting equipment safety and system stability.

Method used

The fault current rise rate of the MMC is calculated separately for AC and DC components. By calculating the vector sum of the AC and DC components, the fault current rise rate can be quickly determined, providing a reference for selecting the inductance value of the bridge arm reactor.

Benefits of technology

It enables rapid and accurate assessment of fault current rise rate, improves the safety and system stability of MMC equipment, is suitable for symmetrical or asymmetrical operation modes, and has good engineering applicability.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses an MMC fault current rise rate calculation method and a related device, and the method considers an AC rise component determined by an AC output parameter and a DC rise component determined by a DC side operation parameter, and can comprehensively reflect the fault response characteristics of an MMC under different working conditions. A final fault current rise rate is calculated through superposition of an alternating current component and a direct current component, traditional simulation dependence is avoided, and rapid calculation and protection setting in a project are facilitated; according to the calculation method provided by the invention, the rise rate is directly calculated based on measurable operation parameters and known equipment parameters, simulation modeling or waveform fitting is not needed, and the real-time performance and applicability of fault analysis are improved; the method provided by the invention does not depend on a specific control strategy, is suitable for an MMC structure in a symmetric or asymmetric operation mode, and has good universality and engineering generalization performance.
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Description

Technical Field

[0001] This invention pertains to MMC fault control technology, and particularly relates to a method and device for calculating the rise rate of MMC fault current. Background Technology

[0002] Modular multilevel converters (MMCs) are widely used in high-voltage direct current (HVDC), flexible alternating current transmission (FACTS), and renewable energy grid integration due to their excellent output voltage quality, high modularity, and good scalability. MMCs exhibit zero damping and zero inertia, resulting in extremely rapid response. However, in the event of a fault, this rapid response characteristic leads to a rapid rise in fault current, causing overcurrent and overheating of the equipment, potentially resulting in damage or even system shutdown, with significant consequences. Therefore, to ensure the safe and stable operation of the power system and improve the absorption capacity of renewable energy, overcurrent limiting of MMCs is necessary.

[0003] Currently, overcurrent limiting in MMC is generally achieved by installing inductors (generally referred to as bridge arm reactors) in the three-phase bridge arms of the converter to limit the rise of fault current. When selecting the inductance value of the bridge arm reactor, a preliminary inductance value is usually selected based on the design experience of flexible DC. Then, a simulation model is built based on the system parameters for simulation. The rise rate of the bridge arm current is observed through simulation, and the current rise rate is calculated based on the simulation results. The appropriateness of the selected inductance value of the bridge arm reactor is then checked. If it is not appropriate, repeated trials are conducted until the control protection and equipment overcurrent capacity requirements are met.

[0004] The above-mentioned parameter trial-and-error method requires modeling and simulation to calculate the fault current rise rate, which makes it difficult to quickly and accurately assess the fault current rise rate. There is a lack of effective methods for assessing the current rise rate, and it basically relies on simulation results. When there are large errors in the accuracy of simulation modeling, it is impossible to assess the accuracy of simulation results. In addition, the fault current rise rate of different bridge arm reactors is also different, and it is necessary to repeatedly try to determine whether the inductance value of the bridge arm reactor is appropriate. Summary of the Invention

[0005] Based on this, the present invention aims to propose a method and related device for calculating the fault current rise rate of MMC, which divides the fault current rise rate of MMC into AC part and DC part for separate calculation, thereby quickly calculating the fault current rise rate of MMC and solving the problem of difficult parameter selection.

[0006] In a first aspect, the present invention provides a method for calculating the rise rate of MMC fault current, comprising:

[0007] The AC component of the fault current rise rate is calculated based on the power of the MMC and the AC side system operating parameters of the system in which the MMC is located.

[0008] Calculate the DC component of the fault current rise rate based on the DC side operating parameters of the MMC;

[0009] The fault current rise rate of the MMC is obtained by superimposing the AC and DC components of the fault current rise rate.

[0010] Furthermore, the AC component of the fault current rise rate is calculated as follows:

[0011] Calculate the apparent capacity of the MMC based on its active and reactive power.

[0012] Calculate the current value of the MMC based on its apparent capacitance and the AC voltage of the system.

[0013] The AC component of the fault current rise rate is calculated based on the current value of MMC and the system frequency.

[0014] Furthermore, the AC component of the fault current rise rate calculated based on the MMC current value and system frequency includes:

[0015] ,

[0016] in, The AC component representing the rate of rise of the fault current. This indicates the peak value of the AC side phase current of the MMC. Indicates the system frequency.

[0017] Furthermore, the DC component of the fault current rise rate is calculated based on the DC-side operating parameters of the MMC, including:

[0018] The DC component of the fault current rise rate is calculated based on the DC-side voltage and bridge arm inductance of the MMC as follows:

[0019] ,

[0020] in, The DC component representing the rate of rise of the fault current. This represents the DC-side voltage of the MMC. This indicates the inductance value of the bridge arm reactor.

[0021] Furthermore, the fault current rise rate of the MMC is calculated by superimposing the AC and DC components of the fault current rise rate, including:

[0022] The fault current rise rate of the MMC is obtained by vector summing the AC and DC components of the fault current rise rate.

[0023] Furthermore, the calculation of the fault current rise rate of the MMC by superimposing the AC and DC components of the fault current rise rate also includes:

[0024] Considering the safe operating range of the MMC, the AC and DC components of the fault current rise rate are algebraically summed to obtain the maximum value of the fault current rise rate.

[0025] Furthermore, the maximum value of the fault current rise rate is calculated as follows:

[0026] ,

[0027] in, This represents the maximum rate of increase of the fault current. The AC component representing the rate of rise of the fault current. The DC component representing the rate of rise of the fault current.

[0028] In a second aspect, the present invention provides an MMC fault current rise rate calculation device, comprising:

[0029] The AC component calculation module for the rate of rise of fault current is used to calculate the AC component of the rate of rise of fault current based on the power of the MMC and the AC side system operating parameters of the system in which the MMC is located.

[0030] The DC component calculation module for the rate of rise of fault current is used to calculate the DC component of the rate of rise of fault current based on the DC side operating parameters of the MMC.

[0031] The component superposition calculation module is used to superimpose the AC and DC components of the fault current rise rate to obtain the fault current rise rate of the MMC.

[0032] Thirdly, the present invention provides an electronic device including a memory storing computer-executable instructions and a processor, wherein when the computer-executable instructions are executed by the processor, the device performs the steps of the MMC fault current rise rate calculation method provided in the first aspect.

[0033] Fourthly, the present invention provides a readable storage medium storing a computer-executable program that, when executed, implements the various steps of the MMC fault current rise rate calculation method provided in the first aspect.

[0034] Compared with the prior art, the present invention has the following beneficial effects:

[0035] This invention proposes a method and related device for calculating the fault current rise rate of an MMC (Multi-Converter Capacitor). It innovatively proposes a calculation method for the fault current rise rate of an MMC, establishing mathematical expression models for the fault current rise rate from both the AC and DC sides, considering the AC rise component determined by AC output parameters and the DC rise component determined by DC side operating parameters, thus comprehensively reflecting the fault response characteristics of the MMC under different operating conditions. By superimposing the AC and DC components to calculate the final fault current rise rate, it avoids reliance on traditional simulations, facilitating rapid calculation and protection setting in engineering. The calculation method proposed in this invention directly calculates the rise rate based on measurable operating parameters and known equipment parameters, without the need for simulation modeling or waveform fitting, improving the real-time performance and applicability of fault analysis. Further embodiments also provide quantitative references for verifying the electrical strength of MMC converter valves, setting IGBT overcurrent protection, selecting DC circuit breakers, and determining the inductance value of bridge arm reactors by calculating the maximum value of the fault current rise rate, thereby improving the operational safety and reliability of the system. The method proposed in this invention does not depend on specific control strategies and is applicable to MMC structures in symmetrical or asymmetrical operating modes, exhibiting good versatility and engineering applicability. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0037] Figure 1 A flowchart illustrating the implementation of the MMC fault current rise rate calculation method provided in this embodiment of the invention;

[0038] Figure 2 This is a schematic diagram of the structure of the MMC fault current rise rate calculation device provided in an embodiment of the present invention;

[0039] Figure 3 This is an electronic device architecture diagram provided for an embodiment of the present invention. Detailed Implementation

[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] In both photovoltaic and wind power fields, as well as in the field of MMC flexible DC transmission, based on years of engineering application practice and experience accumulation, under the premise that the AC side voltage, DC side voltage, and converter capacity are determined, the requirements of the control and protection system are also basically fixed. The parameters and equipment models in the MMC are also basically fixed, and the empirical values ​​for the inductance values ​​of its arm reactors can basically meet the parameter design requirements. At this time, the issue of the arm current rise rate is basically not a concern. However, if the voltage capacity of a certain project is different from the fixed voltage capacity level, the parameters such as the arm reactors still need to be selected according to the above-mentioned trial and error method. Therefore, the following embodiments of this invention propose a mathematical calculation model for the MMC fault current rise rate, providing a theoretical reference for fault simulation results. At the same time, it can quickly determine the variation range of the simulated fault current rise rate, thereby limiting the range of inductance values ​​of the arm reactors according to protection requirements and reducing the difficulty of parameter selection.

[0042] See Figure 1 One embodiment of the present invention provides a method for calculating the rise rate of MMC fault current, comprising the following steps:

[0043] Step S110. Calculate the AC component of the fault current rise rate based on the power of the MMC and the AC side system operating parameters of the system where the MMC is located.

[0044] This step assesses the AC component of the MMC fault current rise rate, mainly considering the typical characteristics of the AC grid to which the converter is connected and the converter's rated power output capacity, specifically based on the MMC's power and the AC side system operating parameters of the system in which the MMC is located.

[0045] Specifically, when an AC-side short-circuit fault occurs in the MMC, the converter's AC output current will rise rapidly. The rate of increase is related to the system's power supply energy driving capability, which is essentially reflected in the converter's equivalent maximum current output capability to the AC grid. In the initial stage of the fault, the current waveform can be approximated as a sine wave rapidly rising from zero. Its initial slope is determined by the derivative of the current waveform near t=0, i.e.:

[0046]

[0047] Therefore, the rate of increase of this part depends on the MMC output current and the system frequency.

[0048] The output current of the MMC is related to the apparent capacity of the MMC and the AC voltage of the system. The apparent capacity reflects its "current carrying capacity", and the voltage is given by the external power grid.

[0049] Based on the above derivation, the AC component of the fault current rise rate is calculated as follows:

[0050] Step S111. Calculate the apparent capacity of the MMC based on its active and reactive power:

[0051]

[0052] in, Indicates apparent capacity. Indicates active power. This indicates reactive power.

[0053] When the power value is taken as the rated value, the maximum apparent capacity can be calculated.

[0054] Step S112. Calculate the current value of the MMC based on the apparent capacitance of the MMC and the AC voltage of the system:

[0055]

[0056] in, This indicates the peak value of the AC side phase current of the MMC. This represents the AC voltage of the system.

[0057] Step S113. Calculate the AC component of the fault current rise rate based on the MMC current value and system frequency:

[0058]

[0059] in, The AC component representing the rate of rise of the fault current. Indicates the system frequency.

[0060] Step S120. Calculate the DC component of the fault current rise rate based on the DC side operating parameters of the MMC.

[0061] This step analyzes the DC-side topology of the MMC, identifies the key physical parameters that drive the rise of the DC-side fault current, and establishes a calculation model for its rise rate.

[0062] Specifically, in typical fault scenarios such as inter-pole short circuit, polar-to-ground short circuit, or module failure, the bridge arm structure of the MMC forms a loop of voltage source series inductor. In this type of loop, the DC bus voltage is directly applied to the equivalent inductance of the bridge arm reactor as a fault voltage source, driving the fault current to rise linearly and rapidly. Its instantaneous rate of rise can be expressed as:

[0063]

[0064] Since the left and right bridge arms share the fault voltage (symmetrical structure), each bridge arm bears approximately half of the voltage, so the rate of rise is approximately:

[0065]

[0066] in, The DC component representing the rate of rise of the fault current. This represents the DC-side voltage of the MMC. This indicates the inductance value of the bridge arm reactor.

[0067] Step S130. The fault current rise rate of the MMC is obtained by superimposing the AC and DC components of the fault current rise rate.

[0068] In this step, to facilitate the rapid assessment of the fault current rise rate and the setting of protection thresholds in engineering practice, the AC component and the DC component are superimposed to obtain the total fault current rise rate index.

[0069] Since the AC and DC components are usually not aligned in physical direction, the former acts on a sinusoidal superposition while the latter acts on the DC-side equivalent inductive circuit. Strictly speaking, they should be vector synthesis.

[0070] Furthermore, considering the safe operating range of the MMC equipment under actual working conditions, the maximum value of the fault current rise rate needs to be considered. Therefore, the maximum value of the fault current rise rate is calculated as the algebraic sum of the AC and DC components, i.e., the maximum value of the fault current rise rate is:

[0071]

[0072] Based on the above calculation of the fault current rise rate, the setting range of the bridge arm reactor inductance value (or equivalent inductance) can be quickly determined. Specifically, assuming the maximum current carrying capacity of the MMC is known... The maximum allowable delay time for the control and protection is T. The following constraints are established for the MMC current:

[0073]

[0074] in, This is the maximum permissible operating current of the MMC under non-fault conditions, which can usually be found in the nameplate parameters of the MMC.

[0075] The maximum rate of increase of the fault current can be calculated by working backwards. Combining this with the aforementioned calculation steps, the inductance value of the bridge arm reactor can be calculated. The settable range allows for the limitation of the fault current rise rate within a safe range through parameter selection.

[0076] The disclosed method can be implemented using various types of devices. Therefore, the present invention also discloses an apparatus corresponding to the above method, and specific embodiments are given below for detailed description.

[0077] like Figure 2As shown, one embodiment of the present invention provides an MMC fault current rise rate calculation device, comprising:

[0078] The AC component calculation module 202 for the current rise rate is used to calculate the AC component of the fault current rise rate based on the power of the MMC and the AC side system operating parameters of the system where the MMC is located.

[0079] The DC component calculation module 204 for the current rise rate is used to calculate the DC component of the fault current rise rate based on the DC side operating parameters of the MMC.

[0080] The component superposition calculation module 206 is used to superimpose the AC component and DC component of the fault current rise rate to obtain the fault current rise rate of MMC.

[0081] The device provided in this application embodiment has the same implementation principle and technical effect as the aforementioned method embodiment. For the sake of brevity, any parts not mentioned in the device embodiment can be referred to the corresponding content in the aforementioned method embodiment.

[0082] The methods and related apparatuses mentioned in the above embodiments are described with reference to the method flowcharts and / or structural diagrams provided in the embodiments of this application. Specifically, each block of the method flowchart and / or structural diagram, as well as combinations of blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing device, generate instructions for implementing the process. Figure 1 A schematic diagram of one or more processes and / or structures. Figure 1 The computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 A schematic diagram of one or more processes and / or structures. Figure 1 The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 A process or multiple processes and / or structures illustrate the steps of the functions specified in one or more boxes.

[0083] The following embodiments illustrate the application of this method to a computer device. It is understood that the computer device can be any device with computing and processing capabilities, including but not limited to servers or personal laptops. In one embodiment, the computer device can be an application server, which can be a server used to run the application under test.

[0084] See Figure 3 This document illustrates a hardware block diagram of an electronic device intended to represent various forms of digital computers, such as laptops, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the present application described and / or claimed herein.

[0085] like Figure 3 As shown, the electronic device includes: at least one processor 1, at least one communication interface 2, at least one memory 3, and at least one communication bus 4;

[0086] In this embodiment of the application, the number of processor 1, communication interface 2, memory 3, and communication bus 4 is at least one, and processor 1, communication interface 2, and memory 3 communicate with each other through communication bus 4;

[0087] Processor 1 may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement embodiments of the present invention.

[0088] Memory 3 may include high-speed RAM, and may also include non-volatile memory, such as at least one disk storage device;

[0089] The memory stores a program, which the processor can call. The program is used to implement the various processing steps of the aforementioned MMC fault current rise rate calculation method.

[0090] This invention also provides a readable storage medium storing a computer program thereon, which, when executed by a processor, implements the various processing flows of the MMC fault current rise rate calculation method provided in any possible implementation of the above embodiments and / or in combination with the embodiments.

[0091] The invention has been described in particular detail above with respect to possible scenarios, and those skilled in the art will recognize that the invention can be practiced through other embodiments. Specific naming of components, capitalization of terms, attributes, data structures, or any other programming or structural aspects are not mandatory or important, and the mechanisms or features of implementing the invention may have different names, forms, or procedures. The system can be implemented through a combination of hardware and software (as described), entirely through hardware elements, or entirely through software elements. The specific division of functions among the various system components described herein is merely exemplary and not mandatory; rather, the functions performed by a single system component can be performed by multiple components, or the functions performed by multiple components can be performed by a single component.

[0092] Those skilled in the art should understand that the various steps of the disclosed methods can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. Optionally, they can be implemented using device-executable program code, which can then be stored in a storage device for execution by the computing device. Alternatively, they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Therefore, the embodiments disclosed in this invention are not limited to any specific hardware and software combination.

[0093] The programs (also referred to as programs, software, software applications, or code) executable by these computing devices include machine instructions of a programmable processor and can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. As used herein, the terms “machine-readable medium” and “computer-readable medium” refer to any computer program product, device, and / or apparatus (e.g., disk, optical disk, memory, programmable logic device (PLD)) used to provide machine instructions and / or data to a programmable processor, including machine-readable media that receive machine instructions as machine-readable signals. The term “machine-readable signal” refers to any signal used to provide machine instructions and / or data to a programmable processor.

[0094] Certain aspects of this invention include the process steps and instructions described herein in algorithmic form. It should be noted that the process steps and instructions of this invention can be implemented in software, firmware, and / or hardware, and when implemented in software, they can be downloaded, stored on various operating systems and operated from said platforms.

[0095] Those skilled in the art will understand that the structures shown in the figures are merely block diagrams of some structures related to the present application and do not constitute a limitation on the terminal device to which the present application is applied. Specific terminal devices may include more or fewer components than those shown in the figures, or combine certain components, or have different component arrangements.

[0096] In the description of this specification, the use of terms such as "one embodiment," "some embodiments," "example," "specific example," or "possible design," etc., refers to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0097] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method of calculating a fault current rise rate of an MMC, characterized by, The method comprises: calculating an AC component of the fault current rise rate according to the power of the MMC and the AC side system operation parameters of the system where the MMC is located; calculating a DC component of the fault current rise rate according to the DC side operation parameters of the MMC; superimposing the AC component and the DC component of the fault current rise rate to obtain the fault current rise rate of the MMC.

2. The method of claim 1, wherein, The AC component of the fault current rise rate is calculated as follows: calculating the apparent capacity of the MMC according to the active power and the reactive power of the MMC; calculating the current value of the MMC according to the apparent capacity of the MMC and the AC voltage of the system; calculating the AC component of the fault current rise rate based on the current value of the MMC and the system frequency.

3. The method of claim 2, wherein, The calculation of the AC component of the fault current rise rate based on the current value of the MMC and the system frequency comprises: , wherein, represents an AC component of the fault current rise rate, represents an AC side phase current peak value of the MMC, represents a system frequency.

4. The method of claim 1, wherein, The calculation of the DC component of the fault current rise rate according to the DC side operation parameters of the MMC comprises: The DC component of the fault current rise rate is calculated according to the DC side voltage of the MMC and the bridge arm reactance inductance value as follows: , wherein, represents a direct current component of the fault current rise rate, represents a direct current side voltage of the MMC, represents an inductance value of the bridge arm reactor.

5. The method of claim 1, wherein, The superimposition of the AC component and the DC component of the fault current rise rate to obtain the fault current rise rate of the MMC comprises: The vector sum of the AC component and the DC component of the fault current rise rate is calculated to obtain the fault current rise rate of the MMC.

6. The method of claim 5, wherein, The superimposition of the AC component and the DC component of the fault current rise rate to obtain the fault current rise rate of the MMC further comprises: The algebraic sum of the AC component and the DC component of the fault current rise rate is calculated to obtain the maximum value of the fault current rise rate, considering the safe operation range of the MMC.

7. The method of claim 6, wherein, The maximum value of the fault current rise rate is calculated as follows: , wherein, represents a maximum value of the rate of rise of fault current, represents an alternating component of the rate of rise of fault current, represents a direct current component of the rate of rise of fault current.

8. An MMC fault current rise rate calculation device characterized by comprising: The method comprises: a current rise rate AC component calculation module configured to calculate an AC component of the fault current rise rate according to the power of the MMC and the AC side system operation parameters of the system where the MMC is located; a current rise rate DC component calculation module configured to calculate a DC component of the fault current rise rate according to the DC side operation parameters of the MMC; a component superimposition calculation module configured to superimpose the AC component and the DC component of the fault current rise rate to obtain the fault current rise rate of the MMC.

9. An electronic device, comprising: The device comprises a memory storing computer executable instructions and a processor, and when the computer executable instructions are executed by the processor, the device performs the MMC fault current rise rate calculation method according to any one of claims 1-7.

10. A readable storage medium, characterized by, The computer executable program is stored, and when the program is executed, the MMC fault current rise rate calculation method according to any one of claims 1-7 can be realized.