Power button compatibility method, device, system and medium for domestic platform firmware

Abstract

The application relates to the technical field of computer firmware and hardware interface, in particular to a power button compatibility method, device and system of a domestic platform firmware and a medium, the method comprising the following steps: determining a preset communication pin combination, wherein the communication pin combination comprises at least one communication pin; determining a current hardware version identifier according to a pin level state of the communication pin combination read by the domestic platform firmware; obtaining a corresponding power button pin from a pre-stored pin configuration mapping table according to the current hardware version identifier, and writing the current hardware version identifier and the power button pin as hardware version information into a specified address area of a nonvolatile memory; reading the hardware version information stored in the specified address area in an ACPI table generation stage, and generating a power button function description recognizable by an operating system according to the hardware version information. The application aims to improve the power management compatibility of the domestic computing platform firmware.

Description

Technical Field

[0001] This application relates to the field of computer firmware and hardware interface technology, and in particular to a power button compatibility method, device, system and medium for a domestic platform firmware. Background Technology

[0002] With the rapid development of computer firmware and hardware interface technology, users have put forward more stringent requirements for the power management compatibility of domestic computing platform firmware.

[0003] In current computer hardware platform development practices, traditional firmware typically employs a deeply coupled implementation for power switch hardware initialization. However, this traditional approach has significant technical limitations. When the pin definitions of the power switch change due to circuit optimization, layout adjustments, or functional expansion in a hardware version, a separate firmware version must be developed for each hardware variant. This tightly coupled architecture not only leads to firmware code fragmentation, significantly increasing development and maintenance costs, but also, due to the high degree of visual similarity between different hardware versions, makes it highly susceptible to firmware mis-flashing incidents during production testing and end-user use. Version mismatches directly result in abnormal power control functions, severely impacting device reliability and user experience.

[0004] Therefore, improving the power management compatibility of domestic computing platform firmware is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] The main purpose of this application is to provide a power button compatible method, device, system and medium for domestic platform firmware, which aims to improve the transmission efficiency of high-speed data.

[0006] To achieve the above objectives, this application provides a power button compatibility method for domestic platform firmware. The power button compatibility method for domestic platform firmware includes: determining a preset communication pin combination, wherein the communication pin combination includes at least one communication pin.

[0007] The current hardware version identifier is determined based on the pin level status of the communication pin combination read from the firmware of the domestic platform.

[0008] Based on the current hardware version identifier, the corresponding power button pin is obtained from the pre-stored pin configuration mapping table, and the current hardware version identifier and the power button pin are written as hardware version information into the specified address area of ​​the non-volatile memory.

[0009] During the ACPI table generation phase, the hardware version information stored in the specified address area is read, and a power button function description that can be recognized by the operating system is generated based on the hardware version information.

[0010] In one embodiment, the step of determining the current hardware version identifier based on the pin level state of the communication pin combination read from the domestic platform firmware includes:

[0011] During the initialization phase of the domestic platform firmware, the communication pin combination is configured as an input mode, the pin level state of the communication pin combination is read, and the preset hardware version mapping table is traversed according to the binary encoding of the pin level state.

[0012] Once the binary target number matching the binary code is obtained by traversing the hardware version mapping table, the hardware version identifier of the binary target number is used as the current hardware version identifier.

[0013] In one embodiment, the preset hardware version mapping table includes a plurality of binary numbers arranged in ascending order, and the step of traversing the preset hardware version mapping table according to the binary encoding of the pin level state includes:

[0014] Determine the minimum and maximum binary numbers in the hardware version mapping table, take the binary interval from the minimum to the maximum binary number as the current traversal interval, and determine whether the binary code of the pin level state exceeds the middle binary number in the current traversal interval.

[0015] If the binary code exceeds the binary middle number, then the binary interval from the binary middle number to the binary maximum number is taken as the next current traversal interval, and the step of determining whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval is returned.

[0016] If the binary code does not exceed the binary middle number, then the binary interval from the smallest binary number to the binary middle number is taken as the next current traversal interval, and the step of determining whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval is returned.

[0017] When the current traversal interval converges to the binary target number, it is determined that the binary target number matches the binary code, and the binary target number is the same binary number as the binary code.

[0018] In one embodiment, the step of retrieving the corresponding power button pin from a pre-stored pin configuration mapping table based on the current hardware version identifier includes:

[0019] The target communication pin mapped to the current hardware version identifier is found in the pre-stored pin configuration mapping table, and the target communication pin is configured as the power button pin.

[0020] In one embodiment, prior to the step of reading the hardware version information stored in the designated address region during the ACPI table generation stage, the power button compatibility method of the domestic platform firmware includes:

[0021] During the device self-test phase of the domestic platform firmware, in response to the hardware self-test completion command, the preset ACPIGPIO node is initialized.

[0022] In one embodiment, the hardware version information includes the current hardware version identifier and the power button pin. The step of generating a power button function description recognizable by the operating system based on the hardware version information includes:

[0023] Based on the current hardware version identifier, ACPI is enabled to configure the hardware functions of the power button pin, generating a power button function description that the operating system can recognize.

[0024] In one embodiment, the power button compatibility method of the domestic platform firmware includes:

[0025] The hardware function configuration is set to configure the effective level mode, pull-up / pull-down mode, interrupt triggering mode, and response mode of the power button pin.

[0026] Furthermore, to achieve the above objectives, this application also provides a power button compatibility device for domestic platform firmware, the power button compatibility device for domestic platform firmware comprising:

[0027] A combination determination module is used to determine a preset communication pin combination, wherein the communication pin combination includes at least one communication pin;

[0028] The reading module is used to determine the current hardware version identifier based on the pin level status of the communication pin combination read from the firmware of the domestic platform;

[0029] The writing module is used to obtain the corresponding power button pin from the pre-stored pin configuration mapping table according to the current hardware version identifier, and write the current hardware version identifier and the power button pin as hardware version information into the specified address area of ​​the non-volatile memory.

[0030] The generation module is used to read the hardware version information stored in the specified address area during the ACPI table generation stage, and generate a power button function description that can be recognized by the operating system based on the hardware version information.

[0031] The power button compatibility device of the domestic platform firmware of this application implements the steps of the power button compatibility method of the domestic platform firmware of this application as described above during operation.

[0032] In addition, to achieve the above objectives, this application also provides a power button compatibility system for domestic platform firmware. The power button compatibility system for domestic platform firmware includes a memory, a processor, and a power button compatibility program for domestic platform firmware stored in the memory and executable on the processor. When the power button compatibility program for domestic platform firmware is executed by the processor, it implements the steps of the power button compatibility method for domestic platform firmware described above.

[0033] In addition, to achieve the above objectives, this application also provides a medium, which is a computer-readable storage medium, on which a power button compatibility program for a domestic platform firmware is stored. When the power button compatibility program for the domestic platform firmware is executed by a processor, it implements the steps of the above-described power button compatibility method for the domestic platform firmware.

[0034] This application provides a power button compatibility method for domestic platform firmware. By dynamically identifying the hardware version and adaptively configuring the power button pins, the power management compatibility of domestic platform firmware is significantly improved. Specifically, the current hardware version identifier can be automatically identified by reading the pin level state of the preset communication pin combination from the domestic platform firmware. Next, the power button pin corresponding to the current hardware version identifier is automatically matched from a pre-stored pin configuration mapping table. The power button pin corresponding to the current hardware version identifier is then persistently stored as hardware version information in a designated address area of ​​non-volatile memory. Finally, the hardware version information stored in the designated address area is read during the ACPI table generation stage. This enables a single domestic platform firmware to adapt to multiple hardware versions, solving the compatibility problem caused by the strong coupling between firmware and hardware in traditional solutions. It avoids redundant firmware development due to hardware changes, ensures the stability and reliability of power functions under different hardware versions, and guarantees operating system compatibility through a standardized ACPI interface, thereby significantly improving the power management compatibility of domestic computing platform firmware. Attached Figure Description

[0035] Figure 1 This is a flowchart of the first embodiment of the power button compatibility method for domestic platform firmware in this application;

[0036] Figure 2 This is a flowchart illustrating the implementation process of the power button compatibility method for domestic platform firmware in this application.

[0037] Figure 3 This is a flowchart illustrating the second embodiment of the power button compatibility method for domestic platform firmware in this application;

[0038] Figure 4This is a schematic diagram of the power button compatibility device for the domestic platform firmware involved in the embodiments of this application;

[0039] Figure 5 This is a schematic diagram of the power button compatibility system of the domestic platform firmware involved in the embodiments of this application.

[0040] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0041] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application.

[0042] With the rapid development of computer firmware and hardware interface technology, users have put forward more stringent requirements for the power management compatibility of domestic computing platform firmware.

[0043] In current computer hardware platform development practices, traditional firmware typically employs a deeply coupled implementation for power switch hardware initialization. However, this traditional approach has significant technical limitations. When the pin definitions of the power switch change due to circuit optimization, layout adjustments, or functional expansion in a hardware version, a separate firmware version must be developed for each hardware variant. This tightly coupled architecture not only leads to firmware code fragmentation, significantly increasing development and maintenance costs, but also, due to the high degree of visual similarity between different hardware versions, makes it highly susceptible to firmware mis-flashing incidents during production testing and end-user use. Version mismatches directly result in abnormal power control functions, severely impacting device reliability and user experience.

[0044] Therefore, improving the power management compatibility of domestic computing platform firmware is a technical problem that urgently needs to be solved.

[0045] To improve the power management compatibility of firmware for domestic computing platforms, this application provides a method, apparatus, system, and medium for power button compatibility of firmware for domestic platforms.

[0046] This application provides a method for ensuring power button compatibility in domestic platform firmware, referring to... Figure 1 As shown, Figure 1 This is a flowchart of the first embodiment of the power button compatibility method for domestic platform firmware in this application. The power button compatibility method for this domestic platform firmware includes:

[0047] Step S10: Determine a preset communication pin combination, wherein the communication pin combination includes at least one communication pin.

[0048] In this embodiment, by determining a preset communication pin combination, which includes at least one communication pin, a basic communication interface is provided for subsequent hardware version identification. Level state detection can be performed based on a clear pin configuration, thereby improving hardware compatibility and identification efficiency.

[0049] It should be noted that this communication pin is a GPIO (General Purpose Input / Output) pin.

[0050] In a specific embodiment, this application implements a flexible hardware version identification scheme by customizing the number of pins (n) in the communication pin combination. The number of pins has an exponential growth relationship with the number of distinguishable versions (2^n), so that an appropriate number of pins can be selected according to actual needs (e.g., 1 communication pin supports 2 hardware versions, 3 communication pins support 8 hardware versions). While ensuring the simplicity of hardware design, it not only meets the low-cost identification needs of a small number of versions, but also provides a scalable solution for multi-version systems.

[0051] For example, if the communication pin combination includes only one communication pin, the two hardware versions can be distinguished by detecting the high or low level state of that pin, where a high level corresponds to binary code "1" and a low level corresponds to binary code "0", thereby achieving simple and efficient hardware version identification. This is suitable for scenarios where only two versions need to be distinguished, while reducing the complexity and cost of hardware design.

[0052] If the communication pin combination includes three communication pins, then eight different level states can be combined using three-bit binary encoding (000 to 111), thereby accurately distinguishing eight hardware versions and achieving efficient identification of multiple hardware versions, while maintaining the simplicity and scalability of the hardware design.

[0053] Step S20: Determine the current hardware version identifier based on the pin level status of the communication pin combination read from the firmware of the domestic platform.

[0054] In this embodiment, refer to Figure 2 Assume the communication pin combination includes communication pins GPIO_A1, GPIO_A2, and GPIO_A3. After the domestic platform firmware completes initialization, the corresponding level values ​​of communication pins GPIO_A1, GPIO_A2, and GPIO_A3 are synchronously read through the domestic platform firmware to obtain the pin level state of this communication pin combination. Next, the current hardware version identifier is automatically identified based on the pin level state.

[0055] It should be noted that domestic platform firmware can be understood as firmware for a domestic computer platform, such as the Phytium platform, and the firmware can be UEFI (Unified Extensible Firmware Interface) firmware.

[0056] The communication pin combination consisting of communication pins GPIO_A1, GPIO_A2, and GPIO_A3 can be used Figure 2 The expression GPIOA[3:1] in the figure represents the first to third pins of the GPIOA port, that is: GPIOA[1] = GPIO_A1; GPIOA[2] = GPIO_A2; GPIOA[3] = GPIO_A3.

[0057] In a specific embodiment, the three communication pins support eight hardware versions, which can be hardware board A00, hardware board B00, hardware board C00, hardware board D00, hardware board E00, hardware board F00, hardware board G00, and hardware board H00. When GPIOA[3:1]=000, the current hardware version is identified as hardware board A00; when GPIOA[3:1]=001, the current hardware version is identified as hardware board B00; when GPIOA[3:1]=010, the current hardware version is identified as hardware board C00; when GPIOA[3:1]=011, the current hardware version is identified as hardware board D00; when GPIOA[3:1]=100, the current hardware version is identified as hardware board E00; when GPIOA[3:1]=101, the current hardware version is identified as hardware board F00; when GPIOA[3:1]=110, the current hardware version is identified as hardware board G00; when GPIOA[3:1]=111, the current hardware version is identified as hardware board H00.

[0058] Step S30: Obtain the corresponding power button pin from the pre-stored pin configuration mapping table based on the current hardware version identifier, and write the current hardware version identifier and the power button pin as hardware version information into the specified address area of ​​the non-volatile memory.

[0059] In this embodiment, the power button pin mapped to the current hardware version identifier is obtained from the pre-stored pin configuration mapping table, and the current hardware version identifier and the power button pin are written (i.e. burned) as hardware version information into the specified address area of ​​the non-volatile memory. This enables the domestic computer platform to quickly obtain the correct hardware configuration even after a restart, thereby improving the stability and startup efficiency of the domestic computer platform.

[0060] It should be noted that non-volatile memory can be used Figure 2 The “norflash” in the table indicates that each communication pin combination corresponds to a pin configuration mapping table. The pin configuration mapping table corresponding to the communication pin combination GPIOA[3:1] is shown in Table 1.

[0061]

[0062] Table 1

[0063] In a specific embodiment, refer to Figure 2 When the level state of GPIOA[3:1] is binary code "000", the above pin configuration mapping table is queried to determine that the current hardware version is hardware board A00, and the corresponding power button pin is automatically mapped to the communication pin GPIO0_A6. That is, the communication pin GPIO0_A6 is initialized as the power button pin, thereby realizing precise control of the power management of this version of hardware and ensuring that the operating system can correctly identify and operate the power button function.

[0064] When the level state of GPIOA[3:1] is binary code "001", the above pin configuration mapping table is queried to determine that the current hardware version is hardware board B00, and the corresponding power button pin is automatically mapped to the communication pin GPIO1_A6. That is, the communication pin GPIO1_A6 is initialized as the power button pin, thereby realizing precise control of the power management of this version of hardware and ensuring that the operating system can correctly identify and operate the power button function.

[0065] Step S40: During the ACPI table generation stage, read the hardware version information stored in the specified address area and generate a power button function description that the operating system can recognize based on the hardware version information.

[0066] In this embodiment, during the ACPI table generation stage, the hardware version information stored in the designated address area of ​​the non-volatile memory is read and a power button function description that can be recognized by the operating system is generated. This achieves seamless integration between the hardware configuration and the operating system, ensuring the correctness and consistency of the power management function, thereby improving the power management compatibility of the firmware of the domestic computing platform.

[0067] In summary, this application provides a power button compatibility method for domestic platform firmware. By dynamically identifying the hardware version and adaptively configuring the power button pins, it significantly improves the power management compatibility of domestic platform firmware. Specifically, the current hardware version identifier can be automatically identified by reading the pin level state of the preset communication pin combination from the domestic platform firmware. Next, the power button pin corresponding to the current hardware version identifier is automatically matched from the pre-stored pin configuration mapping table. The power button pin corresponding to the current hardware version identifier is then persistently stored as hardware version information in a designated address area of ​​non-volatile memory. Finally, the hardware version information stored in the designated address area is read during the ACPI table generation stage. This enables a single domestic platform firmware to adapt to multiple hardware versions, solving the compatibility problem caused by the strong coupling between firmware and hardware in traditional solutions. It avoids redundant firmware development due to hardware changes, ensures the stability and reliability of power functions under different hardware versions, and guarantees operating system compatibility through a standardized ACPI interface, thereby significantly improving the power management compatibility of domestic computing platform firmware.

[0068] Furthermore, based on the first embodiment of the power button compatibility method for domestic platform firmware of this application, a second embodiment of the power button compatibility method for domestic platform firmware of this application is proposed. In some feasible embodiments, refer to... Figure 3 The above step S20: Determine the current hardware version identifier based on the pin level status of the communication pin combination read by the domestic platform firmware, and may also include the following implementation steps S201 to S202.

[0069] Step S201: During the initialization phase of the domestic platform firmware, configure the communication pin combination as an input mode, read the pin level state of the communication pin combination, and traverse the preset hardware version mapping table according to the binary encoding of the pin level state.

[0070] In this embodiment, by configuring the communication pin combination as an input mode and reading the pin level state of the communication pin combination during the initialization stage of the domestic platform firmware, the automatic acquisition of the hardware version identification signal is realized. Then, the preset hardware version mapping table is traversed according to the binary encoding of the pin level state, providing a standardized data processing flow for accurate matching of the current hardware version identifier. This not only ensures the reliability of hardware identification but also improves the automation level of firmware initialization.

[0071] It should be noted that when the communication pin combination consists of communication pins GPIO_A1, GPIO_A2, and GPIO_A3, the preset hardware version mapping table is determined to be the pin configuration mapping table corresponding to GPIOA[3:1].

[0072] Step S202: After traversing the hardware version mapping table to obtain a binary target number that matches the binary code, use the hardware version identifier of the binary target number as the current hardware version identifier.

[0073] In this embodiment, after traversing the hardware version mapping table to obtain the binary target number that matches the binary code, the hardware version identifier of the binary target number is used as the current hardware version identifier. This realizes intelligent identification and automatic adaptation of hardware versions, enhances the compatibility of the domestic computing platform with different hardware versions, and lays a solid foundation for the correct configuration of subsequent power management and other functions.

[0074] Furthermore, in some other feasible embodiments, the preset hardware version mapping table includes a plurality of binary numbers arranged in ascending order. The above step 201, which traverses the preset hardware version mapping table according to the binary encoding of the pin level state, may also include the following implementation steps 2011 to 2014.

[0075] Step 2011: Determine the minimum and maximum binary numbers in the hardware version mapping table, take the binary interval from the minimum to the maximum binary number as the current traversal interval, and determine whether the binary code of the pin level state exceeds the intermediate binary number in the current traversal interval.

[0076] In this embodiment, the minimum and maximum binary numbers in the hardware version mapping table are determined, and the binary interval from the minimum to the maximum binary number is taken as the current traversal interval. It is then determined whether the binary code of the pin level state exceeds the middle binary number within the current traversal interval. In other words, this application establishes an efficient binary search mechanism by determining the binary interval of the hardware version mapping table and comparing the middle value, which significantly reduces the amount of traversal data and lays the foundation for quickly locating the target hardware version. At the same time, it ensures that the search process is always carried out within an effective range.

[0077] For example, taking the pin configuration mapping table corresponding to GPIOA[3:1] as an example, the smallest binary number in the hardware version mapping table is 000, the largest binary number in the hardware version mapping table is 111, the initial current traversal interval is [000, 111], and the binary middle number in [000, 111] can be 011 or 100.

[0078] Step 2012: If the binary code exceeds the binary intermediate number, then take the binary interval from the binary intermediate number to the binary maximum number as the next current traversal interval, and return to execute the step of determining whether the binary code of the pin level state exceeds the binary intermediate number in the current traversal interval.

[0079] In this embodiment, if the binary code exceeds the binary middle number, the binary interval from the binary middle number to the binary maximum number is taken as the next current traversal interval. The step of judging whether the binary code of the pin level state exceeds the binary middle number in the current traversal interval is returned. This can automatically narrow the traversal range to the binary interval from the binary middle number to the binary maximum number. The target value is quickly approximated by the iterative binary search method, which significantly improves the retrieval efficiency of the large-capacity hardware version mapping table and avoids the waste of resources by traversing the entire table.

[0080] Step 2013: If the binary code does not exceed the binary median, then take the binary interval from the smallest binary number to the binary median as the next current traversal interval, and return to execute the step of determining whether the binary code of the pin level state exceeds the binary median in the current traversal interval.

[0081] In this embodiment, if the binary code does not exceed the binary median, the binary interval from the smallest binary number to the binary median is taken as the next current traversal interval. The step of determining whether the binary code of the pin level state exceeds the binary median within the current traversal interval is returned. This allows the traversal range to be dynamically adjusted to the binary interval from the smallest binary number to the binary median, and the step of determining whether the binary code of the pin level state exceeds the binary median within the current traversal interval is recursively executed. This achieves efficient hardware version matching based on the binary search algorithm. This interval halving search strategy significantly improves the query efficiency of large-scale hardware version mapping tables while ensuring the accuracy of version identification.

[0082] Step 2014: Until the current traversal interval converges to the binary target number, determine that the binary target number matches the binary code, where the binary target number is the same binary number as the binary code.

[0083] In this embodiment, the binary target number is determined to match the binary code when the current traversal interval converges to the binary target number. The binary target number is the same binary number as the binary code, which significantly improves the query efficiency of the large-capacity hardware version mapping table. At the same time, the mathematical certainty of successive interval halving ensures the accuracy of version matching.

[0084] Furthermore, in some feasible embodiments, the above step S30: obtaining the corresponding power button pin from the pre-stored pin configuration mapping table based on the current hardware version identifier may also include the following implementation step 301.

[0085] Step 301: During the device self-test phase of the domestic platform firmware, in response to the hardware self-test completion command, the preset ACPI GPIO nodes are initialized.

[0086] In this embodiment, refer to Figure 2 During the device self-test phase of the domestic platform firmware, the system initializes the preset ACPI GPIO nodes by responding to the hardware self-test completion command, thus achieving early integration of hardware resources with the ACPI power management architecture. Specifically, firstly, firmware-level initialization ensures that the GPIO control nodes have full functionality before the operating system loads, eliminating the risk of power management failures due to timing issues; secondly, the use of ACPI standard interfaces for abstract configuration allows the same firmware code to adapt to the power management needs of different hardware platforms, significantly improving system compatibility; finally, key GPIO resources are incorporated into the ACPI management system, providing a standardized power control interface for the operating system, meeting the ACPI compliance requirements of modern systems, and laying the hardware control foundation for subsequent dynamic power management.

[0087] It should be noted that the equipment self-test phase refers to... Figure 2 The BIOS (Basic Input / Output System) stage device self-test, when a domestic computer platform boots up, can be understood as a hardware detection and initialization process executed by the UEFI firmware. The purpose is to ensure that critical hardware devices (such as CPU, memory, storage, graphics card, etc.) are working properly and to prepare for the subsequent loading of the operating system.

[0088] Furthermore, in some other feasible embodiments, the hardware version information is the current hardware version identifier and the power button pin. The above step S40: generating a power button function description that the operating system can recognize based on the hardware version information may also include the following implementation step 401.

[0089] Step 401: Enable ACPI to configure the hardware function of the power button pin according to the current hardware version identifier, and generate a power button function description that can be recognized by the operating system.

[0090] In this embodiment, refer to Figure 2After obtaining the current hardware version identifier from the hardware version information stored in the specified address area of ​​non-volatile memory, the system dynamically enables ACPI (Advanced Configuration and Power Interface) to configure the hardware function of the power button pin based on the current hardware version identifier. Specifically, if the current hardware version identifier is hardware board A00, ACPI is enabled to configure GPIO0_A6 as the power button function; if the current hardware version identifier is hardware board B00, ACPI is enabled to configure GPIO1_A6 as the power button function. This generates a standardized power button function description that the operating system can recognize, achieving seamless integration between hardware power management and the operating system power control module. This allows the operating system to accurately identify and uniformly manage the power button trigger events (such as power on, hibernation, forced shutdown, etc.), while ensuring the compatibility and configurability of the power button behavior under different hardware versions, thus improving the reliability and cross-platform adaptability of system power management.

[0091] It should be noted that ACPI is a standardized interface used for hardware configuration and power management communication between the operating system and firmware.

[0092] Furthermore, in some feasible embodiments, the power button compatibility method of the domestic platform firmware may include step A10.

[0093] Step A10: The hardware function configuration is set to configure the effective level mode, pull-up / pull-down mode, interrupt triggering mode, and response mode of the power button pin.

[0094] In this embodiment, by configuring the power button pin's effective level mode (high / low level trigger), pull-up / pull-down mode (to ensure signal stability), interrupt triggering method (edge / level trigger), and response mode (such as immediate shutdown or entering sleep), the hardware can accurately identify the physical operation of the power button and convert it into a standardized ACPI event. This ensures that the operating system can reliably respond to the power button's press action (such as power on, power off, sleep, etc.), while avoiding abnormal behavior caused by false triggering or signal jitter, thus improving the accuracy of power management and system stability.

[0095] In summary, this application provides a power button compatibility method for domestic platform firmware. By dynamically identifying the hardware version and adaptively configuring the power button pins, it significantly improves the power management compatibility of domestic platform firmware. Specifically, the current hardware version identifier can be automatically identified by reading the pin level state of the preset communication pin combination from the domestic platform firmware. Next, the power button pin corresponding to the current hardware version identifier is automatically matched from the pre-stored pin configuration mapping table. The power button pin corresponding to the current hardware version identifier is then persistently stored as hardware version information in a designated address area of ​​non-volatile memory. Finally, the hardware version information stored in the designated address area is read during the ACPI table generation stage. This enables a single domestic platform firmware to adapt to multiple hardware versions, solving the compatibility problem caused by the strong coupling between firmware and hardware in traditional solutions. It avoids redundant firmware development due to hardware changes, ensures the stability and reliability of power functions under different hardware versions, and guarantees operating system compatibility through a standardized ACPI interface, thereby significantly improving the power management compatibility of domestic computing platform firmware.

[0096] In addition, this application also provides a power button compatible device for domestic platform firmware, please refer to... Figure 4 , Figure 4 This is a schematic diagram of the power button compatibility device for domestic platform firmware involved in the embodiments of this application. The power button compatibility device for domestic platform firmware provided in this application includes:

[0097] The combination determination module H01 is used to determine a preset communication pin combination, wherein the communication pin combination includes at least one communication pin;

[0098] The reading module H02 is used to determine the current hardware version identifier based on the pin level status of the communication pin combination read from the firmware of the domestic platform;

[0099] The writing module H03 is used to obtain the corresponding power button pin from the pre-stored pin configuration mapping table according to the current hardware version identifier, and write the current hardware version identifier and the power button pin as hardware version information into the specified address area of ​​the non-volatile memory.

[0100] The generation module H04 is used to read the hardware version information stored in the specified address area during the ACPI table generation stage, and generate a power button function description that can be recognized by the operating system based on the hardware version information.

[0101] The power button compatibility device of the domestic platform firmware of this application implements the steps of the power button compatibility method of the domestic platform firmware of this application as described above during operation.

[0102] In addition, this application also provides a power button compatible system with domestic platform firmware. Please refer to... Figure 5 , Figure 5 This is a schematic diagram of the power button compatibility system for domestic platform firmware involved in the embodiments of this application. Specifically, the device in this embodiment may be a device for driving the power button compatibility method that locally runs domestic platform firmware.

[0103] This application provides a power button compatibility system for domestic platform firmware. The power button compatibility system for domestic platform firmware includes: at least one processor; and a memory communicatively connected to at least one processor; wherein the memory stores instructions executable by at least one processor, and the instructions are executed by at least one processor to enable at least one processor to execute the driving method of the power button compatibility method for domestic platform firmware in the above embodiment 2.

[0104] The following is for reference. Figure 5 This document illustrates a schematic diagram of a power button-compatible system suitable for implementing the domestic platform firmware of this application. The power button-compatible system for the domestic platform firmware in this application can include, but is not limited to, mobile terminals such as mobile phones, laptops, digital radio receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), PMPs (Portable Media Players), and in-vehicle terminals (e.g., in-vehicle navigation terminals), as well as fixed terminals such as digital TVs and desktop computers. Figure 5 The power button compatible system of the domestic platform firmware shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.

[0105] like Figure 5As shown, the power button compatible system of the domestic platform firmware may include a processing device 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 1002 or the program loaded from the storage device 1003 into the random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the power button compatible system of the domestic platform firmware. The processing device 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following devices can be connected to I / O interface 1006: input devices 1007 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tapes, hard disks, etc.; and communication devices 1009. Communication device 1009 allows the power button-compatible system of the domestic platform firmware to exchange data wirelessly or via wired communication with other devices. Although a power button-compatible system of the domestic platform firmware with various devices is shown in the figure, it should be understood that it is not required to implement or possess all the devices shown. More or fewer devices may be implemented alternatively.

[0106] Specifically, according to the embodiments disclosed in this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments disclosed in this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.

[0107] The power button compatibility system for domestic platform firmware provided in this application adopts the driving method of the power button compatibility method for domestic platform firmware in the above embodiments, which can solve the technical problem of low reliability of the power button compatibility system for domestic platform firmware. Compared with the prior art, the beneficial effects of the power button compatibility system for domestic platform firmware provided in this application are the same as the beneficial effects of the driving method of the power button compatibility method for domestic platform firmware provided in the above embodiments, and other technical features of the power button compatibility system for domestic platform firmware are the same as the features disclosed in the previous embodiment method, and will not be repeated here.

[0108] In addition, this application provides a computer-readable storage medium. Please refer to... Figure 5 , Figure 5 This is a schematic diagram of the structure of a computer-readable storage medium involved in the embodiments of this application. The computer-readable storage medium stores a driver program for a power button compatibility method for a domestic platform firmware. When the driver program for the power button compatibility method for the domestic platform firmware is executed by a processor, it implements the steps of the aforementioned driver method for the power button compatibility method for the domestic platform firmware.

[0109] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or system. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or system that includes that element.

[0110] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0111] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a computer-readable storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.

[0112] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A power button compatibility method for domestic platform firmware, characterized in that, The power button compatibility method of the domestic platform firmware includes: A preset communication pin combination is determined, wherein the communication pin combination includes at least one communication pin; During the initialization phase of the domestic platform firmware, the communication pin combination is configured as an input mode, the pin level state of the communication pin combination is read, and the preset hardware version mapping table is traversed according to the binary code of the pin level state; until a binary target number matching the binary code is obtained in the hardware version mapping table, the hardware version identifier of the binary target number is used as the current hardware version identifier. Based on the current hardware version identifier, the corresponding power button pin is obtained from the pre-stored pin configuration mapping table, and the current hardware version identifier and the power button pin are written as hardware version information into the specified address area of ​​the non-volatile memory. During the ACPI table generation stage, the hardware version information stored in the specified address area is read, and a power button function description recognizable by the operating system is generated based on the hardware version information; wherein, the preset hardware version mapping table includes multiple binary numbers arranged in ascending order, and the step of traversing the preset hardware version mapping table according to the binary encoding of the pin level state includes: The minimum and maximum binary numbers in the hardware version mapping table are determined. The binary interval from the minimum to the maximum binary number is taken as the current traversal interval, and it is determined whether the binary code of the pin level state exceeds the binary median number within the current traversal interval. If the binary code exceeds the binary median number, the binary interval from the binary median number to the maximum binary number is taken as the next current traversal interval, and the step of determining whether the binary code of the pin level state exceeds the binary median number within the current traversal interval is returned. If the binary code does not exceed the binary median number, the binary interval from the minimum to the binary median number is taken as the next current traversal interval, and the step of determining whether the binary code of the pin level state exceeds the binary median number within the current traversal interval is returned. This process continues until the current traversal interval converges to the target binary number, at which point it is determined that the target binary number matches the binary code, and the target binary number is the same binary number as the binary code.

2. The power button compatibility method for domestic platform firmware as described in claim 1, characterized in that, The step of retrieving the corresponding power button pin from the pre-stored pin configuration mapping table based on the current hardware version identifier includes: The target communication pin mapped to the current hardware version identifier is found in the pre-stored pin configuration mapping table, and the target communication pin is configured as the power button pin.

3. The power button compatibility method for domestic platform firmware as described in claim 1, characterized in that, Before the step of reading the hardware version information stored in the specified address area during the ACPI table generation stage, the power button compatibility method of the domestic platform firmware includes: During the device self-test phase of the domestic platform firmware, in response to the hardware self-test completion command, the preset ACPI GPIO nodes are initialized.

4. The power button compatibility method for domestic platform firmware as described in claim 1, characterized in that, The hardware version information includes the current hardware version identifier and the power button pinout. The step of generating a power button function description recognizable by the operating system based on the hardware version information includes: Based on the current hardware version identifier, ACPI is enabled to configure the hardware functions of the power button pin, generating a power button function description that the operating system can recognize.

5. The power button compatibility method for domestic platform firmware as described in claim 4, characterized in that, The power button compatibility method of the domestic platform firmware includes: The hardware function configuration is set to configure the effective level mode, pull-up / pull-down mode, interrupt triggering mode, and response mode of the power button pin.

6. A power button compatible device for a domestically produced platform firmware, characterized in that, The power button compatibility device of the domestic platform firmware includes: A combination determination module is used to determine a preset communication pin combination, wherein the communication pin combination includes at least one communication pin; A reading module is used to configure the communication pin combination as an input mode during the initialization phase of the domestic platform firmware, read the pin level state of the communication pin combination, and traverse a preset hardware version mapping table according to the binary encoding of the pin level state; until a binary target number matching the binary encoding is obtained in the hardware version mapping table, the hardware version identifier of the binary target number is used as the current hardware version identifier; wherein, the preset hardware version mapping table includes multiple binary numbers arranged in ascending order, and the step of traversing the preset hardware version mapping table according to the binary encoding of the pin level state includes: determining the minimum and maximum binary numbers in the hardware version mapping table, taking the binary interval from the minimum to the maximum binary number as the current traversal interval, and determining the binary encoding of the pin level state. The process involves determining whether the binary code exceeds the middle binary number within the current traversal interval. If the binary code exceeds the middle binary number, the binary interval from the middle binary number to the largest binary number is taken as the next current traversal interval, and the process returns to the step of determining whether the binary code of the pin level state exceeds the middle binary number within the current traversal interval. If the binary code does not exceed the middle binary number, the binary interval from the smallest binary number to the middle binary number is taken as the next current traversal interval, and the process returns to the step of determining whether the binary code of the pin level state exceeds the middle binary number within the current traversal interval. This process continues until the current traversal interval converges to the target binary number, at which point it is determined that the target binary number matches the binary code, and the target binary number is the same binary number as the binary code. The writing module is used to obtain the corresponding power button pin from the pre-stored pin configuration mapping table according to the current hardware version identifier, and write the current hardware version identifier and the power button pin as hardware version information into the specified address area of ​​the non-volatile memory. The generation module is used to read the hardware version information stored in the specified address area during the ACPI table generation stage, and generate a power button function description that can be recognized by the operating system based on the hardware version information.

7. A power button compatible system for a domestically developed platform firmware, characterized in that, The power button compatibility system of the domestic platform firmware includes a memory, a processor, and a power button compatibility program of the domestic platform firmware stored in the memory and executable on the processor. When the processor executes the power button compatibility program of the domestic platform firmware, it implements the steps of the power button compatibility method of the domestic platform firmware as described in any one of claims 1 to 5.

8. A medium, characterized in that, The medium is a computer-readable storage medium, on which a power button compatibility program for a domestic platform firmware is stored. When the power button compatibility program for the domestic platform firmware is executed by a processor, it implements the steps of the power button compatibility method for the domestic platform firmware as described in any one of claims 1 to 5.

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