Beidou anti-interference high-isolation radio frequency circuit

Abstract

The invention discloses a Beidou anti-interference high-isolation radio frequency circuit, and the method comprises the steps: firstly determining the isolation index of a radio frequency circuit, and planning the overall architecture, including antenna receiving, amplitude limiting filtering, low-noise amplification, down-conversion, intermediate-frequency filtering, and ADC sampling circuit design; selecting a four-channel down-conversion chip, determining an isolation parameter between channels, and arranging a channel pair with the farthest physical distance to be matched with an LC intermediate-frequency filter with a metal shielding shell; according to the PCB design, channels are distributed diagonally, a shielding division bar area is reserved, a closed shielding division bar bonding pad with the width larger than 2.0 mm is designed, and a continuous shielding layer is formed; after the components are welded, actually measuring the isolation degree between channels, if the isolation degree does not reach the standard, checking the grounding resistance of the shielding division bar and the out-of-band rejection characteristic of the filter, and optimizing the layout of a PCB (Printed Circuit Board); through the measures, the isolation degree between channels is remarkably improved, the weak signal receiving capability is enhanced, and the positioning reliability is improved.

Description

TECHNICAL FIELD

[0001] The application relates to the field of satellite navigation radio frequency technology, and in particular to a Beidou anti-interference high-isolation radio frequency circuit. BACKGROUND

[0002] In a satellite navigation system, the performance of a Beidou receiver is limited by the anti-interference capability of a radio frequency front-end circuit. A conventional multi-channel radio frequency circuit is easily affected by strong interference signal leakage due to insufficient channel isolation, resulting in a decline in satellite signal reception quality or even loss. Especially in a complex electromagnetic environment, co-frequency band interference or adjacent frequency interference can significantly reduce positioning reliability. Existing technologies mainly suppress interference through software algorithms, but there are still deficiencies in physical isolation design at the hardware level, such as compact channel layout leading to increased cross-talk or imperfect shielding measures causing electromagnetic leakage. In addition, the collaborative design of a metal shell filter and a PCB shielding layer lacks systematic optimization, making it difficult to meet the requirements of high isolation and low cost at the same time. SUMMARY

[0003] The application provides a Beidou anti-interference high-isolation radio frequency circuit, which solves the problem that in a common Beidou anti-interference radio frequency channel scheme, the isolation between Beidou channels is restricted by the performance of a chip, and the isolation can only reach about 70 dB.

[0004] The application provides a Beidou anti-interference high-isolation radio frequency circuit, which includes: S1, determining the isolation index that a Beidou signal anti-interference radio frequency circuit needs to achieve, and planning the overall architecture of the radio frequency circuit; S2, using a four-channel down-conversion integrated chip to determine the isolation parameters between the channels, and according to the isolation data, planning to use the channel pair with the farthest physical distance and selecting an LC intermediate frequency filter with a metal shielding shell; S3, laying out the circuits of the selected two radio frequency channels far apart on a PCB, reserving an area for laying shielding partitions around each functional circuit block and between the two channels; S4, designing mounting pads for shielding partitions with a width greater than 2.0 mm on the PCB, and forming a complete closed wall to isolate the sensitive parts of each channel; S5, welding all components on the PCB on which the shielding partitions are mounted, actually measuring the isolation between the channels, and verifying whether the isolation reaches the expected target; S6, if the test result does not reach the design index, performing problem troubleshooting, analyzing possible causes and taking corresponding optimization measures for adjustment until the isolation reaches the expected target.

[0005] Preferably, the overall architecture of the planned radio frequency circuit specifically includes: designing an antenna receiving circuit to ensure effective signal reception; designing limiting, filtering, and low-noise amplification circuits to preprocess the received signal; designing a down-conversion circuit, selecting the two channels furthest apart in the four-channel chip to improve the isolation between channels; and designing an intermediate frequency filtering circuit, using an intermediate frequency LC filter with a metal casing. Design an ADC sampling circuit to convert intermediate frequency signals into digital signals; select a four-channel downconverter integrated chip, determine the isolation parameters between channels according to the chip technical manual, and select the channel pairs with the greatest physical distance for layout.

[0006] Preferably, the specific steps for laying out the channels with the longest physical distance include: laying out the two selected RF channels at the two ends of the diagonal of the PCB according to the PCB size and isolation requirements; reserving a blank area with a width of not less than 2mm around each functional circuit block and between the two channels, and laying out copper foil or conductive adhesive shielding strips; laying out low-loss transmission lines at the antenna interface position, with the transmission line length controlled within 10mm and the loss controlled within 1dB.

[0007] Preferably, the specific steps of the shielding spacer design include: the shielding spacer is connected to the PCB ground plane through vias to form a continuous shielding layer, and the spacing between grounding vias is no more than 5mm; the ground of all functional circuit blocks is connected to the ground plane through short and thick traces; the shielding spacer mounting pads are designed as a continuous closed structure.

[0008] Preferably, the specific steps for measuring the isolation between channels include using a signal source to input a signal of a specific power into one channel, and using a spectrum analyzer to monitor the leakage power of the other channel; calculating the isolation as the difference between the input signal power and the leakage signal power; if the isolation does not meet the expected target, then sequentially checking the grounding resistance of the shielding strip, confirming the out-of-band suppression characteristics of the filter, and optimizing the PCB layout spacing.

[0009] Preferably, the specific steps of the optimization measures include: checking the grounding resistance of the shielding strip; if it exceeds 10mΩ, resoldering the vias to reduce the resistance; confirming the out-of-band rejection characteristics of the filter; if the rejection is less than 60dB@±20MHz, replacing the filter; and optimizing the PCB layout spacing by increasing the channel spacing.

[0010] One or more technical solutions provided in this application have at least the following technical effects or advantages: By optimizing the physical layout and shielding design of the four-channel BeiDou radio frequency circuit, adopting diagonally distributed channels, metal shielded filters, and continuous copper foil shielding layers, combined with the chip's inherent isolation and physical distance gain, the inter-channel isolation (>90dB) is significantly improved, effectively suppressing strong interference signal leakage. At the same time, through the coordinated design of low-noise amplifiers and high-selectivity filters, the reception capability of weak satellite signals is enhanced, and the overall anti-interference performance and positioning reliability of the BeiDou receiver are improved. Attached Figure Description

[0011] Figure 1 This is a schematic flowchart of a BeiDou anti-interference high isolation radio frequency circuit according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the radio frequency front-end signal processing flow of the four-channel Beidou satellite navigation (BDS B3 band) receiver of the present invention. Detailed Implementation

[0012] To facilitate understanding of the present invention, a more complete description of this application will be given below with reference to the accompanying drawings, which illustrate preferred embodiments of the invention. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to enable a more thorough and complete understanding of the disclosure of the present invention.

[0013] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains; the terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to limit the invention; the term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0014] Example 1: Figure 1 This is a flowchart illustrating a high-isolation radio frequency circuit for BeiDou anti-interference according to an embodiment of the present invention.

[0015] like Figure 1 As shown, a high-isolation radio frequency circuit for BeiDou anti-interference includes the following steps: S1 clarifies the isolation index that the anti-interference radio frequency circuit for BeiDou signals needs to achieve, and plans the overall architecture of the radio frequency circuit.

[0016] Among them, with Figure 2Taking the RF front-end signal processing flow of a four-channel BeiDou satellite navigation (BDS B3 band) receiver as an example: the antenna signal sequentially passes through protection (Limiter), filtering (BPF1), amplification (LNA1), precision filtering (SAW1), four-channel down-conversion (frequency conversion), intermediate frequency filtering (LC1), and digitization (ADC) before being output to the digital processing unit. Channel modules B3-1 to B3-4 represent four identical, independent, and parallel RF signal processing channels. Each channel is connected to an independent antenna unit. Digital signal processing algorithms are used to weight and combine the signals from each channel to suppress interference and enhance satellite signal direction. "B3" refers to the B3 band (center frequency 1268.52MHz) of the Chinese BeiDou satellite navigation system. This circuit is specifically designed for receiving BeiDou B3 band signals. The processing flow within a single channel (taking B3-1 as an example): The signal sequentially passes through a limiter (used to protect the circuit and prevent strong interference or radar signals received by the antenna from damaging the subsequent precision amplifier; it uses diodes to discharge or attenuate signal energy exceeding the threshold), a bandpass filter (BPF1, which initially filters out far-end interference and noise outside the frequency band, allowing only signals near the BeiDou B3 frequency band to pass), a low-noise amplifier (LNA1, which amplifies the weak signal received by the antenna while maintaining extremely low noise; its performance directly determines the system's signal-to-noise ratio), and a surface acoustic wave filter (SAW1, which further precisely filters out interference in adjacent frequency bands within the band, allowing only pure B3 signals to pass; its out-of-band suppression characteristics are better than BPF1) before entering the common processing section.

[0017] The common processing section is shared by four channels. The signals from the four channels are processed independently at the front end and then converged to the common downconverter module. The four-channel downconverter (4-Channel Down Converter): the core chip, mixes the high-frequency B3 radio frequency signals of the four channels with the local oscillator (LO) signal and converts them into low-frequency intermediate frequency (IF) signals for subsequent processing.

[0018] LO IN (Local Oscillator Input): Inputs the local oscillator signal generated externally or internally, providing a frequency reference for the four mixers. LOOUT (Local Oscillator Output): Outputs the local oscillator signal to other circuits requiring synchronization or to cascade more downconverters. IF1 - IF4 (Intermediate Frequency Output): The intermediate frequency signals output after downconversion from the four channels. Intermediate Frequency Processing and Digitization LC1 (LC Filter): Further filters the downconverted intermediate frequency signal, removing spurious signals and out-of-band noise generated during mixing, thus purifying the signal.

[0019] A four-channel analog-to-digital converter (ADC) synchronously samples the analog intermediate frequency signals of four channels into digital signals, completing the RF front-end tasks. The digital signals are then sent to a digital signal processor (DSP) or FPGA for processing such as anti-interference algorithms, demodulation, and positioning calculations.

[0020] S2 uses a four-channel downconverter integrated chip to determine the isolation parameters between its channels. Based on the isolation data, the channel pair with the greatest physical distance is planned to be used, and an LC intermediate frequency filter with a metal shielding shell is selected.

[0021] Specifically, by consulting the chip's technical datasheet, key metrics for inter-channel isolation should be obtained, with particular attention to typical and minimum values. Isolation is a measure of signal leakage, usually expressed in decibels (dB). Higher values ​​indicate less inter-channel interference. For example, if the datasheet specifies an inter-channel isolation of 90 dB, this value must be ensured to meet the system's anti-interference requirements.

[0022] Based on PCB layout experience, select the channel pairs with the greatest physical distance (such as channels 1 and 4 diagonally distributed). Increasing the physical distance reduces crosstalk between channels, and the improvement in isolation is logarithmically related to the distance. For example, if the isolation is 85dB at the original distance, doubling the channel spacing can increase the isolation by approximately 6dB, bringing the total isolation close to 91dB.

[0023] Filters with metal shielding housings are preferred to further suppress inter-channel electromagnetic interference. The metal housing shields external noise and prevents internal signals from leaking to other channels. During selection, the shielding effectiveness parameter should be considered to ensure it complements the chip's isolation. For example, if the chip isolation is 80dB, the filter needs to provide at least 10dB of additional shielding to achieve a total isolation of over 90dB.

[0024] Calculate the total isolation of the selected channel pair by combining the chip's inherent isolation, physical distance gain, and filter shielding effectiveness. For example, if the chip isolation is 85dB, the distance gain is 6dB, and the filter shielding effectiveness is 10dB, then the total isolation is the sum of these three (101dB). If this value is higher than the system requirement of 90dB, the selection is reasonable; otherwise, the channel spacing needs to be re-evaluated or a higher-performance device should be replaced.

[0025] Based on the calculation results, the final chip model, filter specifications, and PCB layout requirements are determined. For example, the channel spacing must not be less than 50mm, the filter must be metal-shielded, and the local oscillator signal traces must be isolated from other channels. Sufficient isolation margin (e.g., 5dB) is also reserved to compensate for performance degradation caused by process variations or environmental interference.

[0026] S3 involves placing the circuitry of the two selected RF channels far apart on the PCB, reserving an area around each functional circuit block and between the two channels for laying shielding strips.

[0027] After the selected two RF channels are laid out far apart on the PCB, circuit design should be carried out, including: designing an antenna receiving circuit to ensure effective signal reception; designing limiting, filtering, and low-noise amplification circuits to preprocess the received signal; designing a down-conversion circuit, selecting the two furthest channels 1 and 4 of the four-channel chip to improve the isolation between channels; designing an intermediate frequency (IF) filter circuit, using an IF LC filter with a metal casing; and designing an ADC sampling circuit to convert the IF signal into a digital signal.

[0028] Based on the PCB size and isolation requirements, the two selected RF channels (such as channel 1 and channel 4) are positioned at opposite ends of the PCB diagonal to maximize physical distance. For example, if the PCB size is 100mm × 100mm, channel 1 can be placed in the upper left corner and channel 4 in the lower right corner, achieving a spacing of approximately 140mm (diagonal length). Doubling the physical distance improves channel isolation by approximately 6dB, therefore ensuring sufficient spacing is a priority.

[0029] Around each functional circuit block (such as a limiter, filter, or amplifier) ​​and between two channels, leave a blank area with a width of at least 2mm for laying copper foil or conductive adhesive shielding strips. The shielding strips must be connected to the PCB ground plane via vias to form a continuous shielding layer. For example, lay a 2mm wide copper foil strip between channels 1 and 4, and drill a grounding via every 5mm to enhance the shielding effect.

[0030] Place low-loss transmission lines (such as microstrip lines) near the antenna interface to ensure efficient signal transmission to the limiter. The transmission line length should be as short as possible to reduce signal attenuation. For example, if the antenna interface is located in the upper right corner of the PCB, the transmission line can extend in a straight line along the PCB edge to the limiter, with a length controlled within 10mm and a loss controlled within 1dB.

[0031] Limiter: Located close to the antenna interface to prevent high-power interference from damaging subsequent circuitry. The limiter must have a fast response characteristic to suppress sudden strong signals. Filter: A bandpass filter with a center frequency of 1268.52MHz and a bandwidth of ±10MHz should be selected to filter out out-of-band interference. The filter must employ a high-selectivity design, with out-of-band rejection ≥60dB@±20MHz. Low-Noise Amplifier (LNA): A device with a noise figure (NF) ≤1.5dB and gain ≥20dB should be selected to improve the system signal-to-noise ratio. The LNA should be placed after the filter to prevent further noise amplification.

[0032] A four-channel downconverter chip is selected, with only channels 1 and 4 enabled. An internal mixer converts the 1268.52MHz RF signal to an intermediate frequency (e.g., 100MHz). The mixer must have low conversion loss (≤8dB) and high linearity to avoid signal distortion. The local oscillator signal requires precise frequency and phase control to ensure a stable intermediate frequency signal after mixing.

[0033] An LC intermediate frequency filter with a metal housing is used, with a center frequency of 100MHz and a bandwidth of ±5MHz, to further suppress mixing spurious signals. The metal housing provides additional shielding effectiveness (≥10dB), reducing inter-channel interference. The filter needs to be placed after the down-converter chip and close to the ADC sampling circuit to reduce signal path loss.

[0034] A four-channel ADC chip is selected to simultaneously sample the intermediate frequency (IF) signals from four channels. The sampling rate must be ≥200MS / s to meet the Nyquist criterion. The ADC must have a high effective bit depth (ENOB≥10bit) to ensure a dynamic range ≥62dB for capturing weak satellite signals. The ADC input must be matched to the output impedance of the IF filter to avoid signal reflection.

[0035] Copper foil is laid in the shielding spacer area and connected to the PCB ground plane through vias to form a continuous shielding layer. The spacing between grounding vias should be ≤5mm to reduce grounding impedance. The ground of all functional circuit blocks should be connected to the ground plane through short and thick traces to avoid ground loop interference. For example, the ground of the LNA should be directly connected to a nearby via and then extended to the main ground plane through copper foil. S4, Design the mounting pads for the shielding spacer on the PCB, ensuring that the width of the shielding spacer is greater than 2.0mm, forming a complete closed wall to isolate the sensitive parts of each channel.

[0036] S4 features mounting pads on the PCB with a width greater than 2.0mm for shielding spacers, forming a complete enclosed wall to isolate sensitive parts of each channel.

[0037] Specifically, based on the physical distribution of the RF channels on the PCB (such as channels 1 and 4 arranged diagonally), identify the sensitive circuit areas that need to be isolated, including core modules such as limiters, filters, and low-noise amplifiers, and mark their boundary ranges.

[0038] The mounting pads of the shielding spacer must be wider than 2.0 mm to ensure sufficient electromagnetic shielding coverage. The pads should be designed as a continuous closed structure (such as a rectangular ring) to avoid gaps or breaks and prevent electromagnetic leakage. A grounding via should be placed every 5 mm along the edge of the pad, with a recommended via diameter of 0.3-0.5 mm, to enhance the reliability of the connection between the shielding layer and the ground plane.

[0039] By connecting the shielding pads to the PCB ground plane through grounding vias to form a continuous copper foil shielding layer, the spacing between grounding vias needs to be strictly controlled. For every 5mm increase in spacing, the grounding impedance increases by about 1-2mΩ, and the total impedance needs to be controlled within 10mΩ to avoid a decrease in shielding effectiveness.

[0040] Check that the pad design completely surrounds the sensitive area to ensure there are no direct electromagnetic leakage paths. Verify the shielding effectiveness using electromagnetic simulation tools; the target isolation improvement should reach or exceed 5dB. If this is not met, adjust the pad width or via density.

[0041] S5 involves soldering all components onto the PCB with the shielding strip installed, measuring the isolation between channels, and verifying whether the isolation meets the expected target.

[0042] The expected target for isolation is >90dB.

[0043] Specifically, check that all component models and parameters match the design (such as filter frequency and LNA noise figure), and confirm that the shielding copper foil is intact and undamaged. Clean the PCB surface with alcohol to remove dust or flux residue to avoid poor contact during soldering.

[0044] First, solder the short, straight transmission line from the antenna interface to the limiter. Then, solder the limiter, filter, and LNA (receiver front end) in sequence. Next, desolder the frequency converter chip (only enable the target channel) and the intermediate frequency filter. Finally, solder the ADC and matching circuit. After soldering each module, use a multimeter to check the supply voltage (such as the LNA bias voltage) and use an oscilloscope to observe the signal waveform (such as the LNA output amplitude) to ensure there is no self-oscillation or abnormality.

[0045] Lay copper foil in the reserved area and fill all grounding vias with solder (spacing ≤ 5mm) to ensure a continuous and seamless shielding layer. The grounding resistance should be ≤ 10mΩ (the lower the resistance, the higher the shielding effectiveness, and the isolation is improved by about 3-5dB / 10mΩ reduction).

[0046] Place the PCB in a shielded box to reduce external interference. Input a -30dBm, 1268.52MHz signal to channel 1 using a signal generator, and monitor the leakage power of channel 4 with a spectrum analyzer (channel 4 input is turned off).

[0047] Isolation calculation method: Isolation = Input signal power (-30dBm) - Leakage signal power (e.g., -121dBm) = 91dB. Gradually increase the input power (to 0dBm) and record the leakage power; perform 3 tests at low power and take the average to avoid the influence of device nonlinearity.

[0048] If the average isolation is >90dB, the verification is successful; if it is insufficient (e.g., 85dB), check the following in order: check the grounding resistance of the shielding strip (if >10mΩ, resolder the vias); confirm the out-of-band suppression of the filter (if the suppression is less than 60dB@±20MHz, replace the filter); check the PCB layout spacing (if the channel spacing is <140mm, optimize the layout and increase the distance).

[0049] S6. If the test results do not meet the design specifications, troubleshoot the problem, analyze the possible causes, and take corresponding optimization measures to adjust until the isolation reaches the expected target.

[0050] The technical solutions described in the embodiments of this application have at least the following technical effects or advantages: By optimizing the physical layout and shielding design of the four-channel BeiDou radio frequency circuit, adopting diagonally distributed channels, metal shielded filters, and continuous copper foil shielding layers, combined with the chip's inherent isolation and physical distance gain, the inter-channel isolation (>90dB) is significantly improved, effectively suppressing strong interference signal leakage. At the same time, through the coordinated design of low-noise amplifiers and high-selectivity filters, the reception capability of weak satellite signals is enhanced, and the overall anti-interference performance and positioning reliability of the BeiDou receiver are improved.

[0051] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. For those skilled in the art, the present invention can have various modifications and variations. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A Beidou anti-interference high-isolation radio frequency circuit, characterized in that, The method comprises the following steps: S1, determine the isolation degree index that the anti-jamming radio frequency circuit of Beidou signal needs to achieve, and plan the overall architecture of the radio frequency circuit; S2, use a four-channel down-conversion integrated chip to determine the isolation degree parameters between the channels; according to the isolation degree data, plan to use the channel pair with the farthest physical distance, and select an LC intermediate frequency filter with a metal shielding shell; S3, layout the circuits of the selected two radio frequency channels far away on the PCB, and reserve an area for laying shielding partitions around each functional circuit block and between the two channels; S4, design a mounting pad for the shielding partition with a width greater than 2.0mm on the PCB, and form a complete closed wall to isolate the sensitive parts of each channel; S5, solder all components on the PCB where the shielding partition is installed, actually measure the isolation degree between the channels, and verify whether the isolation degree reaches the expected target; S6, if the test result does not reach the design index, troubleshoot the problem, analyze the possible causes and take corresponding optimization measures for adjustment until the isolation degree reaches the expected target.

2. The Beidou anti-jamming high-isolation radio frequency circuit of claim 1, wherein, The overall architecture of the radio frequency circuit comprises the following steps: design an antenna receiving circuit to ensure effective signal reception; design an amplitude limiting, filtering and low noise amplification circuit to preprocess the received signal; design a down-conversion circuit, select the two channels with the farthest distance in the four-channel chip to improve the isolation degree between the channels; design an intermediate frequency filter circuit, and adopt an intermediate frequency LC filter with a metal shell package; design an ADC sampling circuit to convert the intermediate frequency signal into a digital signal; select a four-channel down-conversion integrated chip, determine the isolation degree parameters between the channels according to the chip technical manual, and select the channel pair with the farthest physical distance for layout.

3. The Beidou anti-jamming high-isolation radio frequency circuit of claim 2, wherein, The specific steps of laying out the channel pair with the farthest physical distance comprise the following steps: according to the size of the PCB and the isolation requirement, layout the selected two radio frequency channels at the two ends of the diagonal line of the PCB; reserve a blank area with a width not less than 2mm around each functional circuit block and between the two channels, and lay copper foil or conductive adhesive shielding partitions; layout a low-loss transmission line at the position of the antenna interface, control the length of the transmission line within 10mm, and control the loss within 1dB.

4. The Beidou anti-jamming high-isolation radio frequency circuit of claim 1, wherein, The specific steps of the shielding partition design comprise the following steps: the shielding partition is connected to the PCB ground plane through a via to form a continuous shielding layer, and the distance between the ground vias is not greater than 5mm; the ground of all functional circuit blocks is connected to the ground plane through short and thick wires; the mounting pad of the shielding partition is designed as a continuous closed structure.

5. The Beidou anti-jamming high-isolation radio frequency circuit of claim 1, wherein, The specific steps of actually measuring the isolation degree between the channels comprise the following steps: use a signal source to input a signal with a specific power to one channel, and use a spectrum analyzer to monitor the leakage power of the other channel; calculate the isolation degree as the difference between the input signal power and the leakage signal power; if the isolation degree does not reach the expected target, check the grounding resistance of the shielding partition, confirm the out-of-band suppression characteristic of the filter, and optimize the layout distance of the PCB.

6. The Beidou anti-jamming high-isolation radio frequency circuit of claim 1, wherein, The specific steps of the optimization measures include: checking the shielding partition strip grounding resistance, if exceeding 10 mΩ, then re-soldering the via to reduce the resistance; confirming the filter out-of-band suppression characteristic, if the suppression is less than 60 dB@±20 MHz, then replacing the filter; optimizing the PCB layout spacing, expanding the channel spacing.

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