A multi-channel electrode selective stimulation system, method, and storage medium

By using a multi-channel electrode selective stimulation system, combined with a T-type resistor network digital-to-analog converter and operational amplifier, high precision and stability of multi-channel electrode stimulation are achieved, solving the problem of unstable voltage output in existing technologies and improving the system's response speed and operational flexibility.

CN121102719BActive Publication Date: 2026-02-27SHANGHAI SHINEYO MEDICAL (GRP) CO LTD +1
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Patent Information

Application Number
CN202511668184.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-11-14
Publication Date
2026-02-27
Estimated Expiration
2045-11-14

AI Technical Summary

Technical Problem

Existing multi-channel electrode stimulation systems struggle to achieve high-precision and stable output. They are affected by factors such as resistance matching errors, temperature drift, and load impedance changes, and lack closed-loop calibration and compensation mechanisms, resulting in insufficient output voltage accuracy and poor stability.

Method used

A multi-channel electrode selective stimulation system is adopted, including a control unit, a stimulation voltage control unit, an electrode selection latch unit, a pulse width control unit, and a logic control unit. Through a combination of a T-type resistor network digital-to-analog converter and an operational amplifier, high-precision, low-drift voltage output is achieved, and strict synchronization between electrode channel selection and pulse width control is ensured.

Benefits of technology

It achieves high precision, stability and reliability of multi-channel electrode stimulation, reduces the error accumulation of traditional voltage divider or open-loop regulation, improves response speed and operational flexibility, and meets the performance requirements of demanding application scenarios.

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Abstract

The application provides a multi-channel electrode selective stimulation system, method and storage medium, relates to the field of electronic information and control, and solves the technical problem that the existing multi-channel electrode stimulation system cannot meet the requirements of high precision, controllability and repeatability. The system comprises a control unit, a stimulation voltage adjusting unit, an electrode selection latch unit, a pulse width control unit, a logic control unit and an electrode channel selection unit; wherein the control unit is used for receiving control information and generating a control command; the stimulation voltage adjusting unit is used for realizing the output of voltage gears; the electrode selection latch unit is used for outputting corresponding channel codes; the pulse width control unit is used for adjusting the pulse width of the electric stimulation signal; the logic control unit is used for logically synchronizing the input signal and outputting an enable signal; and the electrode channel selection unit is used for receiving the enable signal and outputting a stimulation pulse signal. The application is used in the process of multi-channel electrode selective stimulation.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of electronic information and control, and particularly relates to a multi-channel electrode selective stimulation system, method and storage medium. BACKGROUND

[0002] With the development of electronic control technology and electrical stimulation technology, multi-channel electrode stimulation systems are widely used in experimental research and medical device control fields. Traditional multi-channel electrode stimulation systems generally use fixed voltage division or simple digital-to-analog conversion to adjust the output voltage. However, such schemes belong to an open-loop structure, which is susceptible to factors such as resistance matching error, temperature coefficient drift, reference voltage stability and load impedance variation, resulting in insufficient output voltage precision and poor stability. Among them, resistance tolerance and matching error will directly introduce static deviation, temperature drift and aging will cause voltage to drift with environmental changes, voltage division points are sensitive to load changes due to lack of buffering, the quantization error, linear error and reference source noise of DAC itself will also superimpose additional deviation, and the system lacks closed-loop calibration and compensation mechanism, so that the above-mentioned errors cannot be corrected in real time, ultimately leading to difficulty in achieving high-precision and stable output of stimulation voltage, limiting the performance of the device in high-demand application scenarios. Therefore, there is an urgent need for a system that can achieve stable and accurate electrical stimulation to solve the problems of the prior art. SUMMARY

[0003] The present application provides a multi-channel electrode selective stimulation system and method. The technical problem that the existing multi-channel electrode stimulation system is difficult to meet the high-precision and stable output of voltage is solved.

[0004] To achieve the above-mentioned purpose, the present application adopts the following technical solutions:

[0005] In a first aspect, this application provides a multi-channel electrode selective stimulation system, comprising: a control unit, a stimulation voltage control unit, an electrode selection latch unit, a pulse width control unit, a logic control unit, and an electrode channel selection unit; wherein, the control unit is used to receive electrode channel information, voltage level information, and pulse width information, and generate corresponding control commands; the control commands include: voltage level control commands, electrode channel control commands, and pulse width control commands; the stimulation voltage control unit is used to convert the received voltage level control commands into voltage level signals and voltage level timing signals and output them; the electrode selection latch unit is used to select a target electrode channel according to the electrode channel control commands and output the corresponding electrode channel code and electrode channel timing signal; the pulse width control unit is used to adjust the pulse width of the electrical stimulation signal according to the pulse width control commands and output a pulse width signal; the logic control unit is used to logically synchronize the voltage level timing signal, the electrode channel timing signal, and the pulse width signal, and output an enable signal; the electrode channel selection unit is used to receive the enable signal, the voltage level signal, and the electrode channel code, and control the target electrode to output a stimulation pulse signal.

[0006] In conjunction with the first aspect mentioned above, in one possible implementation, the control unit includes: a host computer control unit, used to receive electrode channel information, voltage level information, and pulse width information, and send control signals to the main processor unit; the main processor unit is used to receive and parse the control signals, and generate corresponding control commands.

[0007] In conjunction with the first aspect above, in one possible implementation, the stimulation voltage control unit includes: a voltage selection latch unit for receiving a voltage level signal output by the main processor and latching the voltage level signal; and a stimulation voltage adjustment unit for controlling the voltage output according to the latched voltage level signal.

[0008] In conjunction with the first aspect mentioned above, in one possible implementation, the stimulation voltage regulation unit includes: a T-type resistor network digital-to-analog converter for performing voltage level signal division processing to generate a corresponding voltage; and an operational amplifier for amplifying and stabilizing the output voltage of the T-type resistor network digital-to-analog converter to output a target voltage.

[0009] In conjunction with the first aspect above, in one possible implementation, a T-type resistor network digital-to-analog converter includes: multiple resistor elements connected in a T-shape; wherein one end of each resistor element is connected to a digital signal, the other end is grounded, and the intermediate node is used to output an analog signal; each resistor element is used to distribute the input voltage according to a preset ratio.

[0010] In a possible implementation manner of the first aspect, the electrode selection latch unit comprises: a latch configured to serve as a timing synchronizer and a delay controller of the signal, and configured to output an electrode channel code and an electrode channel timing signal under a predetermined timing.

[0011] In a possible implementation manner of the first aspect, the logic control unit comprises: a first AND gate logic and a second AND gate logic configured to perform different logic operation functions respectively; the logic control unit is configured to send an enable signal to the multiplexing analog switch when the voltage level timing signal, the electrode channel timing signal and the pulse width signal simultaneously satisfy a preset condition; the first AND gate logic is configured to combine a chip select signal and an address signal to enable the functional module; and the second AND gate logic is configured to logically combine the pulse width signal, the voltage level timing signal and the electrode channel timing signal to generate a strictly synchronized control timing signal.

[0012] In a possible implementation manner of the first aspect, the logic control unit comprises: a first AND gate logic and a second AND gate logic configured to perform different logic operation functions respectively; the logic control unit is configured to send an enable signal to the multiplexing analog switch when the voltage level timing signal, the electrode channel timing signal and the pulse width signal simultaneously satisfy a preset condition; the first AND gate logic is configured to combine a chip select signal and an address signal to enable the functional module; and the second AND gate logic is configured to logically combine the pulse width signal, the voltage level timing signal and the electrode channel timing signal to generate a strictly synchronized control timing signal.

[0013] In a possible implementation manner of the second aspect, the logic control unit is configured to perform synchronous logic operation on the voltage level timing signal, the electrode channel timing signal and the pulse width signal to generate an enable signal, and the logic control unit comprises:

[0014] The logic control unit is configured to receive the voltage level timing signal, the electrode channel timing signal and the pulse width signal, and generate an enable signal through the logic control unit when the voltage level timing signal, the electrode channel timing signal and the pulse width signal simultaneously satisfy a preset condition; and the logic control unit is configured to control the multiplexing analog switch based on the enable signal to output a stimulation pulse signal.

[0015] In a possible implementation manner of the second aspect, based on the voltage level control command, the stimulation voltage control unit outputs the target voltage, including: a voltage selection latch receiving the voltage level control command and latching a voltage level signal; based on the voltage level signal, controlling the on-off state of each resistance element in the T-type resistance network digital-to-analog converter to output the target voltage.

[0016] The application provides a multi-channel electrode selective stimulation system and method, which comprises a control unit, a stimulation voltage control unit, an electrode selection latch unit, a pulse width control unit, a logic control unit and an electrode channel selection unit, wherein the control unit is used for receiving electrode channel information, voltage level information and pulse width information, and generating corresponding control commands; the stimulation voltage control unit realizes high-precision and low-drift voltage output through a voltage selection latch and a T-type resistance network digital-to-analog converter, and further enhances voltage stability by an operational amplifier; the electrode selection latch unit and the logic control unit work cooperatively to realize strict synchronization of electrode channel selection and pulse width control, ensure accurate cooperation of multi-channel stimulation signals, realize high-precision, stability and reliability of multi-channel electrode stimulation, reduce error accumulation of traditional voltage division or open-loop regulation, improve response speed and operation flexibility, and solve the technical problem that the existing multi-channel electrode stimulation system is difficult to meet high-precision and stable voltage output.

[0017] It should be understood that the description of technical features, technical solutions, advantages or similar language in the present application does not imply that all features and advantages can be realized in any single embodiment. On the contrary, it can be understood that the description of a feature or advantage means that the specific technical feature, technical solution or advantage is included in at least one embodiment. Therefore, the description of technical features, technical solutions or advantages in the specification does not necessarily refer to the same embodiment. Further, the technical features, technical solutions and advantages described in the embodiments can be combined in any appropriate manner. Those skilled in the art will understand that the embodiments can be implemented without one or more specific technical features, technical solutions or advantages of the specific embodiments. In other embodiments, additional technical features and advantages can be identified in specific embodiments that do not embody all embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 A system architecture diagram of a multi-channel electrode selective stimulation system is provided for the embodiments of the application;

[0019] Figure 2 Another system architecture diagram of a multi-channel electrode selective stimulation system is provided for the embodiments of the application;

[0020] Figure 3Another system architecture diagram of a multi-channel electrode selective stimulation system provided by an embodiment of the present application;

[0021] Figure 4 A flowchart of a multi-channel electrode selective stimulation method provided by an embodiment of the present application;

[0022] Figure 5 Another flowchart of a multi-channel electrode selective stimulation method provided by an embodiment of the present application;

[0023] Figure 6 A hardware structure diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0024] In the description of the present application, unless otherwise specified, " / " means "or", for example, A / B can mean A or B. "And / or" in this document is only a description of the relationship between the associated objects, which means that there can be three relationships, for example, A and / or B, which can mean that A exists alone, A and B exist together, and B exists alone. In addition, "at least one" means one or more, and "multiple" means two or more. "First", "second", and the like do not limit the quantity and execution order, and "first", "second", and the like do not necessarily mean different.

[0025] It should be noted that in the present application, "exemplary" or "for example" means to serve as an example, illustration or description. Any embodiment or design scheme described as "exemplary" or "for example" in the present application should not be interpreted as more preferred or more advantageous than other embodiments or design schemes. Rather, the use of "exemplary" or "for example" is intended to present the relevant concept in a specific manner.

[0026] The multi-channel electrode selective stimulation method provided by the embodiments of the present application can be applied to the multi-channel electrode selective stimulation system as shown in Figure 1 Figure 1 ​As shown, the system comprises: a control unit, a stimulation voltage regulation unit, an electrode selection latch unit, a pulse width control unit, a logic control unit, and an electrode channel selection unit; wherein the control unit is configured to receive electrode channel information, voltage level information, and pulse width information, and generate corresponding control commands; the control commands comprise: voltage level control commands, electrode channel control commands, and pulse width control commands; the stimulation voltage regulation unit is configured to convert the received voltage level control commands into voltage level signals and voltage level timing signals and output them; the electrode selection latch unit is configured to select a target electrode channel according to the electrode channel control commands and output corresponding electrode channel codes and electrode channel timing signals; the pulse width control unit is configured to adjust the pulse width of the electrical stimulation signal according to the pulse width control commands and output pulse width signals; the logic control unit is configured to logically synchronize the voltage level timing signals, the electrode channel timing signals, and the pulse width signals, and output an enable signal; and the electrode channel selection unit is configured to receive the enable signal, the voltage level signals, and the electrode channel codes, and control the target electrode to output a stimulation pulse signal.

[0027] In a possible implementation, the control unit comprises: a host computer control unit configured to receive electrode channel information, voltage level information, and pulse width information, and send control signals to a main processor unit; and the main processor unit is configured to receive and analyze the control signals, and generate corresponding control commands.

[0028] In a possible implementation, the stimulation voltage control unit comprises: a voltage selection latch unit configured to receive voltage level signals output by the main processor, and latch the voltage level signals; and a stimulation voltage regulation unit configured to control the output of the voltage according to the latched voltage level signals.

[0029] In a possible implementation, the stimulation voltage regulation unit comprises: a T-type resistor network digital-to-analog converter configured to perform voltage division processing on the voltage level signals to generate corresponding voltages; and an operational amplifier configured to amplify and stabilize the output voltage of the T-type resistor network digital-to-analog converter to output a target voltage.

[0030] As an example, in the embodiments of the present application, Figure 2 A stimulation voltage control unit schematic diagram is provided for the embodiments of the present application, as shown in Figure 2As shown, the unit includes a voltage level selection latch, a T-type resistor network digital-to-analog converter (DAC) (consisting of resistors R1, R2, R3, R4), and an operational amplifier. The voltage level selection latch is used to select different voltage levels according to the control signal and latch the selected level information for subsequent signal processing. The output signal of the latch directly affects the working state of the subsequent circuit to achieve accurate voltage regulation. The T-type resistor network digital-to-analog converter (DAC) is composed of multiple resistance elements (R1, R2, R3, R4) connected in a specific manner, and its basic principle is to convert digital signals into analog signals through resistance voltage division. In this topology, four resistors R1, R2, R3, and R4 are used to form a voltage division network, and each resistor functions to distribute voltage in a certain proportion. The operational amplifier, as the core of the feedback amplification system, receives analog signals from the T-type resistor network digital-to-analog converter (DAC) and compares them with the reference voltage. Through the virtual short and virtual open characteristics of the operational amplifier, the voltage difference at the input end approaches zero, thereby achieving high-precision output regulation. The gain of the operational amplifier is set by external resistance configuration to accurately control the output voltage, enabling it to effectively amplify the input signal or adjust it to the target voltage. During operation, the output voltage of the operational amplifier is adjusted through a feedback mechanism based on the difference between the input signal and the reference voltage. The virtual short feature ensures that the voltage difference at the input end is almost zero, thereby maintaining the accuracy and stability of the output voltage. Regardless of power fluctuations or load changes, the operational amplifier can maintain stable voltage output, ensuring the accuracy and reliability of the stimulation signal. This implementation achieves efficient regulation of the stimulation voltage by precisely controlling the coordinated work of each module, ensuring fast response of the voltage level selection and accuracy of the signal processing, thereby improving the overall performance and reliability of the system.

[0031] In one possible implementation, the T-type resistor network digital-to-analog converter includes a plurality of resistance elements connected in a T-type structure, wherein one end of each resistance element is connected to a digital signal and the other end is grounded, and the middle node is used to output an analog signal; each resistance element is used to distribute the input voltage according to a predetermined proportion.

[0032] As an example, in the embodiments of the present application, as Figure 2As shown, the T-type resistance network digital-to-analog converter is connected by four resistors (R1, R2, R3, R4) in a T-type structure, one end of which is connected to the digital signal, the other end is grounded, and the middle node is used for outputting the analog signal. The role of each resistor is to distribute voltage in a certain proportion. The input digital signal controls the on-off state of each resistor through the latch, thereby adjusting the voltage distribution of each node of the resistance network. The control signal adopts binary coding form, and four control codes (0000 to 1111) correspond to 16 different state combinations, each of which corresponds to a specific gear. By switching the connection mode of the resistor, the output analog voltage is accurately adjusted. This topology accurately converts the input digital signal into the corresponding analog voltage by dynamically controlling the connection and disconnection of the resistor, thereby completing the efficient conversion of the digital signal to the analog signal. The output analog voltage is the weighted average of the input digital signal. Different resistance values of each resistor determine its voltage division ratio in the network, so each bit of the digital signal controls a different voltage component. By changing the combination of the digital signal, the output analog signal will exhibit different voltage values.

[0033] In a possible implementation, the electrode selection latch unit includes: a latch for serving as a timing synchronizer and a delay controller of a signal, outputting an electrode channel code and an electrode channel timing signal under a predetermined timing.

[0034] In a possible implementation, the logic control unit includes: a first AND gate logic and a second AND gate logic for performing different logic operation functions, respectively; an enable signal is sent to the multiplexing analog switch when the voltage gear timing signal, the electrode channel timing signal and the pulse width signal simultaneously meet the preset conditions; the first AND gate logic is used for the combination of the chip select signal and the address signal to enable the functional module; and the second AND gate logic is used for logically combining the pulse width signal, the voltage gear timing signal and the electrode channel timing signal to generate a strictly synchronized control timing signal.

[0035] As an example, in the embodiment of the present application, Figure 3 A multi-channel electrode selective stimulation system framework schematic diagram is provided in the embodiment of the present application, as shown in Figure 3As shown, the system controls multiple latches and logic circuits through the main processor unit to realize intelligent switching of electrode selection, voltage level selection, and pulse width control. Specifically, it includes: an upper computer control platform: responsible for selecting the required electrode channel and voltage level, and transmitting the corresponding control signal to the main processor. The platform provides a user-friendly interface to ensure real-time and accurate transmission of control signals. Main processor unit: receives control instructions from the upper computer, analyzes and generates corresponding control commands. The main processor unit is responsible for coordinating and controlling the voltage level latch, electrode selection latch, and pulse width control unit to ensure the coordination and accurate operation of the entire system. Voltage selection latch unit: receives the voltage level command from the upper computer and latches the corresponding voltage level. Stimulus voltage adjustment unit: accurately controls the switching of the resistance voltage divider matrix through the latch to achieve multi-level voltage selection, and combines the operational amplifier circuit to accurately amplify and adjust the output signal, thereby ensuring high-precision output of the target voltage. Electrode selection latch unit: this unit is used to select and encode the target electrode channel, and the latch unit feeds back the signal to the double AND gate logic control unit. The four independent output channels of the latch are combined through switches to form a four-bit binary electrode channel code, which is sent to a multiplexing analog switch to achieve precise electrode channel selection and switching. Pulse width control unit: adjusts the duration of the electrical stimulation signal according to the pulse width signal from the upper computer. Double AND gate logic control unit: synchronizes the voltage level, pulse width, and electrode channel selection signals, and outputs an enable signal to enable the electrode stimulation of a specific channel. Electrode channel selection unit: receives and responds to the enable signal from the AND gate control unit, and through a high-precision timing synchronization mechanism, accurately coordinates the voltage level, electrode channel selection, and pulse width control signals to ensure that each signal is synchronized and output according to the specification within the predetermined time window. With the precise control of the multiplexing analog switch, the electrode channel selection unit can efficiently decode the electrode channel selection information transmitted by the latch and convert it into the corresponding electrode on-off control signal, thereby realizing the accurate switching and selection of the target electrode. The connected target electrode outputs the required stimulation pulse signal through this switching process, ensuring that the amplitude, frequency, and pulse width of the output signal are consistent with the control requirements. The entire process strictly follows the preset timing and logic control rules to ensure high reliability and high precision of electrode channel switching. Especially in complex and dynamic electrical environments, the electrode channel selection unit can continuously maintain the excellent stability, consistency, and anti-interference ability of the system, ensuring that the stimulation pulse signal is stably and reliably output under harsh conditions, meeting the high-precision requirements of the system for electrode output signals.

[0036] The selective stimulation system based on the multi-channel electrode provided in the embodiments of the present application realizes accurate selection of the multi-channel electrode, high-precision voltage output, and strict logic synchronization of the stimulation signals of each channel through the cooperative work of the control unit, the stimulation voltage control unit, the electrode selection latch unit, the pulse width control unit and the logic control unit, thereby improving the precision, stability and repeatability of the system. The combination of the T-type resistance network digital-to-analog converter and the operational amplifier realizes fast response and high-precision output of the voltage gear, thereby ensuring the stability and reliability of the amplitude of the stimulation signal. The electrode selection latch and the logic control unit work cooperatively to realize strict timing synchronization of the electrode channel selection signal and the voltage gear and the pulse width signal, thereby ensuring the accurate consistency of the signals of each channel in the multi-channel stimulation process and avoiding the interference and errors caused by the multi-channel switching in the traditional system. In addition, the system supports flexible setting of the electrode channel, the voltage gear and the pulse width parameters through the host computer, and can meet the diversified needs of different experimental researches and industrial control scenes. The system and method provided in the embodiments of the present application can effectively improve the stability, controllability and anti-interference ability of the multi-channel electrode stimulation, and realize stable output of the high-precision electrical stimulation.

[0037] To solve the technical problem that the existing multi-channel electrode stimulation system is difficult to meet the requirements of high precision, controllability and repeatability, the embodiments of the present application provide a selective stimulation method based on a multi-channel electrode, which comprises the following steps: receiving a control instruction of a host computer control unit; the control instruction comprises electrode channel information, voltage gear information and pulse width information; a main processor unit analyzes the control instruction and generates a corresponding control command; the control command comprises a voltage gear control command, an electrode channel control command and a pulse width control command; based on the voltage gear control command, a stimulation voltage control unit outputs a target voltage and transmits a voltage gear timing signal to a logic control unit; based on the electrode channel control command, an electrode selection latch unit generates a code corresponding to the target electrode channel and transmits an electrode channel timing signal to the logic control unit; based on the pulse width control command, a pulse width control unit adjusts the duration of the stimulation signal and transmits a pulse width signal to the logic control unit; the logic control unit performs synchronous logic operation on the voltage gear timing signal, the electrode channel timing signal and the pulse width signal to generate an enable signal; based on the enable signal, the voltage gear signal and the electrode channel code, an electrode channel selection unit outputs a stimulation pulse signal.

[0038] Figure 4 The flowchart of the selective stimulation method based on the multi-channel electrode provided in the embodiments of the present application is shown in FIG. 1, which comprises the following steps: Figure 4

[0039] S401, receiving a control instruction of a host computer control unit.

[0040] ​The control instruction includes electrode channel selection information, voltage level information and pulse width control information. The host computer control instruction refers to a data sequence containing multi-channel electrode selection, voltage level and pulse width parameters sent by a computer or a control platform, and is used for guiding the system to output a target stimulation signal.

[0041] In a possible implementation, the control unit of the multi-channel electrode selective stimulation system receives the control instruction from the host computer through a serial port, a bus or a wireless communication mode, delivers the instruction to the main processor for analysis, outputs a corresponding control command, controls the on-off state of each resistance element in the T-type resistance network digital-to-analog converter based on the control command, and outputs a target voltage.

[0042] It should be noted that the received control instruction needs to be subjected to a verification mechanism to ensure data integrity and validity, and prevent communication errors from causing abnormal stimulation output.

[0043] S402, the main processor unit analyzes the control instruction and generates a corresponding control command.

[0044] The control command includes a voltage level control command, an electrode channel control command and a pulse width control command. The main processor is a core computing unit in the system, and is used for receiving and analyzing instructions and generating a command signal that can directly control each functional module.

[0045] In the embodiment of the application, after the main processor receives the host computer instruction, the electrode channel number, the voltage level code and the pulse width value are extracted through an internal analysis module and are converted into control signals recognizable by each functional module. The main processor can simultaneously manage the instruction analysis of multiple channels, and ensures the real-time performance and consistency of multi-channel operation.

[0046] S403, based on the voltage level control command, the stimulation voltage control unit outputs a target voltage and transmits a voltage level timing signal to the logic control unit.

[0047] The target voltage level is output through a T-type resistance network digital-to-analog converter and an operational amplifier. The stimulation voltage adjustment unit is used for converting the main processor control command into an accurate analog voltage output, which is used for driving the target electrode to generate a stimulation signal.

[0048] In a possible implementation, the voltage selection latch selects a corresponding resistance combination according to the control command, the T-type resistance network digital-to-analog converter converts a digital voltage level signal into an analog voltage, and the operational amplifier amplifies and stably outputs the analog voltage. The design of the adjustment unit can ensure that the voltage response speed is fast, the output is stable and the precision is high, so as to avoid electrode stimulation signal deviation.

[0049] As an example, 16 different voltage outputs can be achieved by four-bit binary control code, and the operational amplifier maintains the output voltage stability through the feedback mechanism.

[0050] S404, based on the electrode channel control command, the electrode selection latch unit generates the code corresponding to the target electrode channel, and transmits the electrode channel timing signal to the logic control unit.

[0051] In a possible implementation, the voltage level signal, the electrode channel signal, and the pulse width signal are received; when the voltage level signal, the electrode channel signal, and the pulse width signal meet the preset condition at the same time, the enable signal is generated by the logic control unit; and the multiplexing analog switch is controlled based on the enable signal to output the stimulation pulse signal.

[0052] As an example, in the embodiment of the present application, Figure 5 The electrode channel selection unit is shown in FIG. 1, and Figure 5 As shown, the latch control unit A and the latch control unit B not only undertake the traditional digital signal storage function, but also act as signal timing synchronizer and delay controller. The introduction of the latch ensures that the system can accurately control the synchronization and delay of the signal when selecting the electrode channel and the voltage level, thereby avoiding the electrode selection conflict caused by the mis-triggering or incorrect timing of the signal. Through the action of the latch, the system can stably and according to the predetermined timing output the control signal, ensuring that there is no inconsistency or conflict in the electrode selection process, and improving the reliability and accuracy of the circuit system. The double AND gate logic control unit A and the double AND gate logic control unit B perform different logic operation functions, and when the latch control unit A, the latch control unit B, and the pulse width signal meet the condition at the same time, they will simultaneously send the enable signal to the electrode channel multiplexing analog switch A and the electrode channel multiplexing analog switch B, ensuring that the control signal of the switch can be transmitted synchronously when the electrode channel needs to be selected, and avoiding the electrode selection conflict caused by the inconsistent timing or mis-triggering. The electrode channel multiplexing analog switch A and the electrode channel multiplexing analog switch B are respectively connected to the two ends of the target electrode, control and stimulate the on-off of the voltage, and realize the output of the stimulation pulse signal of the target electrode in combination with the electrode stimulation control mechanism. Through the synchronization control of the latch, the timing of the switch is ensured to be accurate, the signal conflict is avoided, and the accurate transmission of the electrode stimulation signal is ensured.

[0053] S405, based on the pulse width control command, the pulse width control unit adjusts the duration of the stimulation signal, and transmits the pulse width signal to the logic control unit.

[0054] In a possible implementation, the pulse width control unit generates a pulse signal with a corresponding width through a timing circuit or a digital PWM module according to the pulse width control command output by the main processor, and delivers the pulse signal to the logic control unit. The pulse width control precision directly affects the stability and repeatability of the electrode output stimulation signal, and therefore the control unit needs to ensure high-precision timing.

[0055] S406, the logic control unit performs synchronous logic operation on the voltage level timing signal, the electrode channel timing signal, and the pulse width signal to generate an enable signal.

[0056] In a possible implementation, the first AND gate logic is used for chip selection and address combination, and the second AND gate logic is used for strictly synchronizing the pulse width signal and the channel selection signal to output an enable signal of the multiplexing switch through logic operation. The logic control unit can be triggered when multiple signals meet the conditions at the same time, avoiding stimulation errors caused by signal advance or delay.

[0057] As an example, when the voltage level, electrode channel selection, and pulse width conditions are all met, the logic control unit outputs a high-level signal to turn on the multiplexing switch of the corresponding channel.

[0058] S407, based on the enable signal, the voltage level signal, and the electrode channel code, the electrode channel selection unit is controlled to output a stimulation pulse signal.

[0059] In a possible implementation, when the logic control unit outputs the enable signal, the multiplexing analog switch is turned on to deliver the stimulation voltage signal to the target electrode and output an electrical stimulation pulse according to the pulse width signal duration. The multiplexing switch needs to ensure high switching precision and low crosstalk to avoid signal interference or amplitude attenuation.

[0060] The embodiments of the application realize accurate control over the electrode channel, voltage level, and pulse width through host computer control, multi-channel instruction analysis, and control signal distribution. The stimulation voltage adjustment unit combines a T-type resistance network and an operational amplifier to ensure high-precision and fast-response voltage output. The electrode selection latch and the logic control unit ensure synchronization of channel selection and pulse width signals to avoid signal conflict or false triggering. The multiplexing switch reliably turns on to make the target electrode output stable stimulation pulses, improving the stability, controllability, and repeatability of the multi-channel electrode stimulation system, ensuring accurate and reliable output signals, and solving the technical problems that the existing multi-channel electrode stimulation system is difficult to meet the requirements of high precision, controllability, and repeatability.

[0061] The foregoing mainly describes the solutions of the embodiments of this application from the perspective of device implementation. It is understood that each device, such as a multi-channel electrode selective stimulation system, includes at least one of the hardware structures and software modules corresponding to each function in order to achieve the above-mentioned functions. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is implemented in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0062] This application embodiment can divide the multi-channel electrode selective stimulation system into functional units according to the above method example. For example, each function can be divided into separate functional units, or two or more functions can be integrated into one processing unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this application embodiment is illustrative and only represents one logical functional division; other division methods may be used in actual implementation.

[0063] This application also provides a hardware structure diagram of an electronic device (denoted as electronic device 60), see [link to diagram]. Figure 6 The electronic device 60 includes a processor 601, and optionally, a memory 602 connected to the processor 601.

[0064] In the first possible implementation, see Figure 6 The electronic device 60 also includes a transceiver 603. The processor 601, memory 602, and transceiver 603 are connected via a bus. The transceiver 603 is used to communicate with other devices or communication networks. Optionally, the transceiver 603 may include a transmitter and a receiver. The device in the transceiver 603 that implements the receiving function can be considered as a receiver, which is used to perform the receiving steps in the embodiments of this application. The device in the transceiver 603 that implements the transmitting function can be considered as a transmitter, which is used to perform the transmitting steps in the embodiments of this application.

[0065] Based on the first possible implementation method Figure 6 The structural diagram shown can be used to illustrate the structure of the electronic device involved in the above embodiments.

[0066] in, Figure 6The system chip in the electronic device can also be indicated. In this case, the actions performed by the electronic device can be implemented by the system chip, and the specific actions performed can refer to the above and will not be described here again.

[0067] In the implementation process, each step in the method provided by the embodiment can be completed by the integrated logic circuit of hardware in the processor or the instructions in the form of software. The steps of the method disclosed by the embodiment of the present application can be directly embodied as hardware processor execution completion, or executed by a combination of hardware and software modules in the processor.

[0068] The processor in the present application can include but is not limited to at least one of the following: a central processing unit (CPU), a microprocessor, a digital signal processor (DSP), a microcontroller unit (MCU), or various types of computing devices running software, each of which can include one or more cores for executing software instructions to perform operations or processing. The processor can be a separate semiconductor chip, or can be integrated with other circuits to form a semiconductor chip, for example, it can form a SoC (system on chip) with other circuits (such as coding and decoding circuits, hardware acceleration circuits, or various bus and interface circuits), or it can be integrated as an internal processor in an ASIC. The ASIC that integrates the processor can be packaged separately or can be packaged together with other circuits. In addition to including cores for executing software instructions to perform operations or processing, the processor can further include necessary hardware accelerators, such as field programmable gate arrays (FPGAs), PLDs (programmable logic devices), or logic circuits that implement special logic operations.

[0069] The memory in the embodiments of the present application can include at least one of the following types: read-only memory (ROM) or other types of static storage devices that can store static information and instructions, random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, and can also be electrically erasable programmable read-only memory (EEPROM). In some scenarios, the memory can also be a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), magnetic disk storage medium or other magnetic storage device, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and capable of being accessed by a computer, but not limited to this.

[0070] The embodiments of the present application also provide a computer readable storage medium including instructions, which, when executed on a computer, cause the computer to perform any of the above methods.

[0071] The embodiments of the present application also provide a computer program product including instructions, which, when executed on a computer, cause the computer to perform any of the above methods.

[0072] The embodiments of the present application also provide a chip, which includes a processor and an interface circuit, the interface circuit is coupled with the processor, the processor is used to run computer programs or instructions to implement the above method, and the interface circuit is used to communicate with other modules outside the chip.

[0073] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software programs, implementation can be, in whole or in part, in the form of a computer program product. This computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device containing one or more servers, data centers, etc., that can be integrated with the medium. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks (SSDs)).

[0074] Although this application has been described herein in conjunction with various embodiments, those skilled in the art, by reviewing the accompanying drawings, disclosure, and appended claims, will understand and implement other variations of the disclosed embodiments in carrying out the claimed application. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude multiple instances. A single processor or other unit can implement several functions listed in the claims. While different dependent claims may recite certain measures, this does not mean that these measures cannot be combined to produce good results.

[0075] Although this application has been described in conjunction with specific features and embodiments, it is obvious that various modifications and combinations can be made thereto without departing from the spirit and scope of this application. Accordingly, this specification and drawings are merely exemplary illustrations of this application as defined by the appended claims, and are considered to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from the spirit and scope of this application. Thus, if such modifications and modifications of this application fall within the scope of the claims of this application and their equivalents, this application is also intended to include such modifications and modifications.

Claims

1. A multi-channel electrode selective stimulation system, characterized in that, include: Control unit, stimulation voltage control unit, electrode selection latch unit, pulse width control unit, logic control unit, and electrode channel selection unit; The control unit is used to receive electrode channel information, voltage level information, and pulse width information, and generate corresponding control commands; the control commands include: voltage level control command, electrode channel control command, and pulse width control command. The stimulation voltage control unit is used to convert the received voltage level control command into a voltage level signal and a voltage level timing signal, and then output them; the stimulation voltage control unit includes: A voltage selection latch unit is used to receive the voltage level signal output by the main processor and latch the voltage level signal. The stimulation voltage regulation unit is used to control the voltage output according to the latched voltage level signal; The stimulation voltage adjustment unit includes: A T-type resistor network digital-to-analog converter is used to divide voltage level signals to generate corresponding voltages. An operational amplifier is used to amplify and stabilize the output voltage of the T-type resistor network digital-to-analog converter to output the target voltage. The electrode selection latch unit is used to select the target electrode channel according to the electrode channel control command and output the corresponding electrode channel code and electrode channel timing signal. The pulse width control unit is used to adjust the pulse width of the electrical stimulation signal according to the pulse width control command and output the pulse width signal; The logic control unit is used to logically synchronize the voltage level timing signal, electrode channel timing signal, and pulse width signal, and output an enable signal; the logic control unit includes: The first AND gate logic and the second AND gate logic are used to perform different logical operation functions respectively; when the voltage level timing signal, the electrode channel timing signal, and the pulse width signal simultaneously meet the preset conditions, an enable signal is sent to the multiplexed analog switch; the first AND gate logic is used to combine the chip select signal and the address signal to enable the functional module; the second AND gate logic is used to logically combine the pulse width signal, the voltage level timing signal, and the electrode channel timing signal to generate a strictly synchronized control timing signal. The electrode channel selection unit is used to receive the enable signal, voltage level signal and electrode channel code, and control the target electrode to output stimulation pulse signal.

2. The system according to claim 1, characterized in that, The control unit includes: The host computer control unit is used to receive electrode channel information, voltage level information and pulse width information, and send control signals to the main processor unit. The main processor unit is used to receive and parse the control signals and generate corresponding control commands.

3. The system according to claim 1, characterized in that, The T-type resistor network digital-to-analog converter includes: multiple resistor elements connected in a T-shape; wherein, one end of each resistor element is connected to a digital signal, the other end is grounded, and the intermediate node is used to output an analog signal; each resistor element is used to distribute the input voltage according to a preset ratio.

4. The system according to claim 1, characterized in that, The electrode selection latch unit includes: A latch is used as a timing synchronizer and delay controller for signals, outputting electrode channel codes and electrode channel timing signals at predetermined timings.

5. A multi-channel electrode selective stimulation method, applied to the system described in any one of claims 1-4, characterized in that, include: Receive control commands from the host computer control unit; the control commands include electrode channel information, voltage level information, and pulse width information. The main processor unit parses the control instructions and generates corresponding control commands; the control commands include: voltage level control commands, electrode channel control commands, and pulse width control commands; Based on the voltage level control command, the voltage control unit is stimulated to output the target voltage, and the voltage level timing signal is transmitted to the logic control unit; specifically, the voltage level signal is divided to generate the corresponding voltage. The voltage is amplified and stabilized to output the target voltage; The corresponding electrode channel code and electrode channel timing signal are output based on the target pressure; Based on the electrode channel control command, the electrode selection latch unit generates a code corresponding to the target electrode channel and transmits the electrode channel timing signal to the logic control unit; Based on the pulse width control command, the pulse width control unit adjusts the duration of the stimulation signal and transmits the pulse width signal to the logic control unit; The logic control unit performs synchronous logic operations on the voltage level timing signal, the electrode channel timing signal, and the pulse width signal to generate an enable signal; specifically: The first AND gate logic and the second AND gate logic perform different logic operation functions respectively; when the voltage level timing signal, the electrode channel timing signal and the pulse width signal simultaneously meet the preset conditions, an enable signal is sent to the multiplexed analog switch. Based on the enable signal, voltage level signal, and electrode channel encoding, the electrode channel selection unit is controlled to output a stimulation pulse signal.

6. The method according to claim 5, characterized in that, The logic control unit performs synchronous logic operations on the voltage level timing signal, the electrode channel timing signal, and the pulse width signal to generate an enable signal, including: Receives voltage level timing signals, electrode channel timing signals, and pulse width signals; When the voltage level timing signal, the electrode channel timing signal, and the pulse width signal simultaneously meet the preset conditions, an enable signal is generated by the logic control unit. Based on the enable signal, the multiplexed analog switch is controlled to output a stimulation pulse signal.

7. The method according to claim 5, characterized in that, The step of stimulating the voltage control unit to output the target voltage based on the voltage level control command includes: The voltage selection latch receives the voltage range control command and latches the voltage range signal; Based on the voltage level signal, the on / off state of each resistor element in the T-type resistor network digital-to-analog converter is controlled to output the target voltage.

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