A power frequency phasor calculation method, system, device and medium

Abstract

The application discloses a power frequency phasor calculation method, system, device and medium, and relates to the technical field of power system relay protection, and comprises the following steps: acquiring a one-cycle discrete sampling signal and a one-cycle sampling point number of a relay protection device; calculating a sampling time deviation time of each sampling point based on an actual sampling time of each sampling point and the one-cycle sampling point number; calculating a fixed-point compensation Fourier coefficient and an integral compensation coefficient respectively based on the one-cycle sampling point number and the sampling time deviation time; and calculating a power frequency phasor of the relay protection device based on the one-cycle discrete sampling signal, the fixed-point compensation Fourier coefficient and the integral compensation coefficient; wherein, a calculation formula of the power frequency phasor is the product summation of the one-cycle discrete sampling signal and the fixed-point compensation Fourier coefficient divided by the integral compensation coefficient. The application alleviates the technical problem that the existing technology has a large power frequency phasor calculation error due to uneven sampling beats.

Description

Technical Field

[0001] This invention relates to the field of power system relay protection technology, specifically to a power frequency phasor calculation method, system, equipment, and medium. Background Technology

[0002] Accurate and stable calculation of power frequency phasors is of great significance for relay protection. However, for longitudinal differential protection of double-ended or multi-ended lines, the sampling cycle needs to be adjusted in real time, resulting in non-uniform sampling, which in turn interferes with the accurate calculation of power frequency phasors. In scenarios such as multi-ended synchronization and frequency calculation, this may cause unacceptable calculation errors.

[0003] In power frequency phasor calculations, the data window width must be an integer multiple of the fundamental period, and the sampling interval must remain constant; otherwise, spectral leakage will occur. However, for longitudinal differential protection of dual- or multi-terminal lines, since data synchronization is required at each end while sampling at each end is independent, the sampling cycle needs to be adjusted in real time to achieve synchronization. This inevitably leads to the sampling interval needing real-time fine-tuning, no longer being fixed. This sampling timing jitter will adversely affect the calculation of grid frequency and phasors. In particular, for multi-terminal lines, the increased number of synchronizing ends further increases the relative synchronization error, requiring higher accuracy in power frequency phasor calculations. Furthermore, for protection systems requiring frequency calculation, such as low-frequency load shedding, the power frequency phasor calculation error caused by uneven sampling cycles has exceeded the acceptable range. Summary of the Invention

[0004] The purpose of this invention is to provide a method, system, device, and medium for calculating power frequency phasors in order to solve at least one of the above-mentioned technical problems.

[0005] In a first aspect, embodiments of the present invention provide a power frequency phasor calculation method, applied to a relay protection device in a power system; comprising: acquiring a one-cycle discrete sampling signal and a one-cycle sampling point of the relay protection device; calculating the sampling time deviation time of each sampling point based on the actual sampling time of each sampling point and the number of one-cycle sampling points; calculating the fixed-point compensation Fourier coefficient and the integral compensation coefficient based on the number of one-cycle sampling points and the sampling time deviation time; calculating the power frequency phasor of the relay protection device based on the one-cycle discrete sampling signal, the fixed-point compensation Fourier coefficient, and the integral compensation coefficient; wherein, the calculation formula for the power frequency phasor is the sum of the products of the one-cycle discrete sampling signal and the fixed-point compensation Fourier coefficient divided by the integral compensation coefficient.

[0006] Optionally, the sampling time deviation is the time deviation value of the actual sampling time based on the sampling time under uniform sampling.

[0007] Optionally, the formula for calculating the sampling time deviation includes:

[0008]

[0009] In the formula, Let T be the sampling time deviation of the k-th sampling point, where k is the sampling point number, T is the cycle time at power frequency, and N is the number of sampling points per cycle. This represents the actual sampling time of the k-th sampling point.

[0010] Optionally, the mathematical form of the fixed-point compensated Fourier coefficients includes:

[0011]

[0012] In the formula, j is the imaginary unit, and k is the sampling point number. The sampling time deviation time is the sampling time of the kth sampling point, and N is the number of sampling points of the cycle.

[0013] Optionally, the mathematical form of the integral compensation coefficient includes: .

[0014] Optionally, the calculation formula for the power frequency phasor includes:

[0015]

[0016] In the formula, y is the power frequency phasor. The value is the sampled value of the sampling point numbered k in the one-cycle discrete sampling signal.

[0017] Secondly, embodiments of the present invention also provide a power frequency phasor calculation system for implementing the power frequency phasor calculation method provided in the embodiments of the present invention; comprising: an acquisition module, a first calculation module, a second calculation module, and a third calculation module; wherein, the acquisition module is used to acquire a one-cycle discrete sampling signal and a one-cycle sampling point of the relay protection device; the first calculation module is used to calculate the sampling time deviation time of each sampling point based on the actual sampling time of each sampling point and the number of one-cycle sampling points; the second calculation module is used to calculate the fixed-point compensation Fourier coefficient and the integral compensation coefficient based on the number of one-cycle sampling points and the sampling time deviation time, respectively; the third calculation module is used to calculate the power frequency phasor of the relay protection device based on the one-cycle discrete sampling signal, the fixed-point compensation Fourier coefficient, and the integral compensation coefficient; wherein, the calculation formula of the power frequency phasor is the sum of the product of the one-cycle discrete sampling signal and the fixed-point compensation Fourier coefficient divided by the integral compensation coefficient.

[0018] Thirdly, embodiments of the present invention also provide an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method provided in the embodiments of the present invention.

[0019] Fourthly, embodiments of the present invention also provide a computer-readable storage medium storing computer instructions that, when executed by a processor, implement the method provided in the embodiments of the present invention.

[0020] This invention provides a method, system, device, and medium for calculating power frequency phasors. Addressing various non-uniform sampling scenarios, such as those caused by factors like the adjustment of sampling beats during the synchronization of independently sampled data at each end in line longitudinal differential protection, this invention introduces sampling time offset information and employs a fixed-point compensation method to construct an improved Fourier algorithm suitable for non-uniform sampling. This achieves accurate calculation of power frequency phasors under non-uniform sampling beat conditions, alleviating the technical problem of large calculation errors in power frequency phasors due to non-uniform sampling beats in existing technologies. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 A flowchart of a power frequency phasor calculation method provided in an embodiment of the present invention;

[0023] Figure 2 This is a schematic diagram of a power frequency phasor calculation system provided in an embodiment of the present invention. Detailed Implementation

[0024] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0025] Example 1

[0026] Figure 1 This is a flowchart of a power frequency phasor calculation method according to an embodiment of the present invention, which is applied to relay protection equipment in a power system. Figure 1As shown, the method specifically includes the following steps:

[0027] Step S102: Obtain the discrete sampling signal of one cycle and the number of sampling points of one cycle from the relay protection device.

[0028] Step S104: Calculate the sampling time deviation time for each sampling point based on the actual sampling time of each sampling point and the number of sampling points per cycle.

[0029] Step S106: Based on the number of sampling points per cycle and the sampling time deviation, calculate the fixed-point compensation Fourier coefficient and the integral compensation coefficient respectively.

[0030] Step S108: Calculate the power frequency phasor of the relay protection device based on the one-cycle discrete sampling signal, the fixed-point compensation Fourier coefficients, and the integral compensation coefficients.

[0031] The formula for calculating the power frequency phasor is the sum of the products of one cycle discrete sampled signal and the fixed-point compensated Fourier coefficients, divided by the integral compensation coefficient.

[0032] In this embodiment of the invention, the sampling time deviation time is the time deviation value of the actual sampling time based on the sampling time under uniform sampling.

[0033] Specifically, the sampling time under uniform sampling is kT / N, and the formula for calculating the sampling time deviation includes:

[0034]

[0035] In the formula, Let T be the sampling time deviation of the k-th sampling point, where k is the sampling point number, T is the cycle time at power frequency, and N is the number of sampling points per cycle. This represents the actual sampling time of the k-th sampling point.

[0036] Specifically, the mathematical form of the fixed-point compensated Fourier coefficients includes:

[0037]

[0038] The mathematical form of the integral compensation coefficient includes:

[0039]

[0040] In the formula, j is the imaginary unit, and k is the sampling point number. Let N be the sampling time deviation of the k-th sampling point, and N be the number of sampling points per cycle.

[0041] Specifically, the formulas for calculating power frequency phasors include:

[0042]

[0043] In the formula, y is the power frequency phasor. It represents the sampled value of the sampling point numbered k in a one-cycle discrete sampled signal.

[0044] The power frequency phasor calculation method provided in this invention has the following technical advantages compared with the prior art:

[0045] (1) Simultaneously supports accurate calculation of power frequency phasors under both uniform and non-uniform sampling conditions;

[0046] (2) It is also applicable to scenarios where the sampling beat changes in real time, and has high engineering application value;

[0047] (3) The method is easy to implement. Under uniform sampling, it has the same performance as the traditional power frequency quantity algorithm, while under non-uniform sampling, it can obtain more accurate calculation results. It is also applicable to sampling conditions where the sampling beat of each point is in a changing state.

[0048] Example 2

[0049] Figure 2 This is a schematic diagram of a power frequency phasor calculation system according to an embodiment of the present invention, used to implement the power frequency phasor calculation method provided in the embodiment of the present invention. Figure 2 As shown, the system includes: an acquisition module 10, a first calculation module 20, a second calculation module 30, and a third calculation module 40.

[0050] Specifically, the acquisition module 10 is used to acquire the discrete sampling signal of one cycle and the number of sampling points of one cycle of the relay protection device;

[0051] The first calculation module 20 is used to calculate the sampling time deviation time of each sampling point based on the actual sampling time of each sampling point and the number of sampling points in one cycle.

[0052] The second calculation module 30 is used to calculate the fixed-point compensation Fourier coefficient and the integral compensation coefficient based on the number of sampling points per cycle and the sampling time deviation time, respectively.

[0053] The third calculation module 40 is used to calculate the power frequency phasor of the relay protection device based on the one-cycle discrete sampling signal, the fixed-point compensation Fourier coefficient, and the integral compensation coefficient.

[0054] The formula for calculating the power frequency phasor is the sum of the products of one cycle discrete sampled signal and the fixed-point compensated Fourier coefficients, divided by the integral compensation coefficient.

[0055] The present invention also provides an electronic device, including: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method provided in the embodiments of the present invention.

[0056] The present invention also provides a computer-readable storage medium storing computer instructions that, when executed by a processor, implement the method provided in the embodiments of the present invention.

[0057] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0058] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A method for calculating power frequency phasors, characterized in that, Relay protection equipment used in power systems; including: Obtain the discrete sampling signal of one cycle and the number of sampling points of one cycle of the relay protection device; Based on the actual sampling time of each sampling point and the number of sampling points in one cycle, the sampling time deviation time of each sampling point is calculated; Based on the number of sampling points per cycle and the sampling time deviation, the fixed-point compensation Fourier coefficient and the integral compensation coefficient are calculated respectively. Based on the one-cycle discrete sampling signal, the fixed-point compensated Fourier coefficients, and the integral compensation coefficients, the power frequency phasor of the relay protection device is calculated; The formula for calculating the power frequency phasor is the sum of the product of the one-cycle discrete sampling signal and the fixed-point compensated Fourier coefficient, divided by the integral compensation coefficient. The mathematical form of the fixed-point compensated Fourier coefficients includes: In the formula, j is the imaginary unit, and k is the sampling point number. The sampling time deviation time of the kth sampling point, and N is the number of sampling points in one cycle; The mathematical form of the integral compensation coefficient includes: ; The calculation formula for the power frequency phasor includes: In the formula, y is the power frequency phasor. The value is the sampled value of the sampling point numbered k in the one-cycle discrete sampling signal.

2. The method according to claim 1, characterized in that: The sampling time deviation is the time deviation value of the actual sampling time, based on the sampling time under uniform sampling.

3. The method according to claim 1, characterized in that: The formula for calculating the sampling time deviation includes: In the formula, Let T be the sampling time deviation of the k-th sampling point, where k is the sampling point number, T is the cycle time at power frequency, and N is the number of sampling points per cycle. This represents the actual sampling time of the k-th sampling point.

4. A power frequency phasor calculation system, characterized in that, The method for calculating power frequency phasors according to any one of claims 1-3 includes: an acquisition module, a first calculation module, a second calculation module, and a third calculation module; wherein, The acquisition module is used to acquire the discrete sampling signal of one cycle and the number of sampling points of one cycle of the relay protection device; The first calculation module is used to calculate the sampling time deviation time of each sampling point based on the actual sampling time of each sampling point and the number of sampling points in one cycle; The second calculation module is used to calculate the fixed-point compensation Fourier coefficient and the integral compensation coefficient based on the number of sampling points per cycle and the sampling time deviation time, respectively. The third calculation module is used to calculate the power frequency phasor of the relay protection device based on the one-cycle discrete sampling signal, the fixed-point compensated Fourier coefficients and the integral compensation coefficients; The formula for calculating the power frequency phasor is the sum of the product of the one-cycle discrete sampling signal and the fixed-point compensated Fourier coefficient, divided by the integral compensation coefficient.

5. An electronic device, characterized in that, include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the method as claimed in any one of claims 1-3.

6. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the method as described in any one of claims 1-3.

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