Time management method and device, electronic equipment and computer readable storage medium

Abstract

The embodiment of the invention provides a time management method and device, electronic equipment and a computer readable storage medium. The method comprises the following steps: storing a first count value recorded by a high-speed timer in the storage device into a non-power-down shared memory of the storage device under the condition that the storage device enters a low-power-consumption mode, and starting a real-time timer in the storage device to carry out timing processing; controlling the real-time timer to stop timing and storing the recorded second count value into the non-power-down shared memory under the condition that the storage device is awakened from the low-power-consumption mode; and controlling the multi-core processor to read the first count value and the second count value from the non-power-down shared memory, and performing time management processing according to the first count value and the second count value. According to the scheme of the embodiment of the invention, time management can be carried out without depending on a host when the memory device enters the low-power-consumption mode, and accurate timing processing is realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory, in particular to a time management method and device, electronic equipment and computer readable storage medium. BACKGROUND

[0002] The embedded storage product encapsulates the controller and the NAND flash together, wherein the controller undertakes the functions of protocol analysis, NAND flash translation layer algorithm execution, power consumption adjustment, data decoding and error correction, and can also provide accurate timing function for special strategies of firmware; and the NAND flash actually undertakes the storage of user data and firmware. For the memory device, the accuracy of data writing time is particularly important, because the memory device is a passive device, if the memory device enters the low power consumption mode, the timing module will be closed, so that the purpose of precise timing cannot be achieved. SUMMARY

[0003] The present application aims at at least solving one of the technical problems existing in the prior art.

[0004] To this end, the present application proposes a time management method, which can perform time management without relying on the host when the memory device enters the low power consumption mode, and realize precise timing processing.

[0005] The present application also proposes a device applying the above-mentioned time management method.

[0006] The present application also proposes an electronic equipment applying the above-mentioned time management method.

[0007] The present application also proposes a computer readable storage medium applying the above-mentioned time management method.

[0008] According to the time management method of the first aspect of the present application, the method comprises:

[0009] In the case that the memory device enters the low power consumption mode, the first count value recorded by the high-speed timer in the memory device is stored into the non-power-off shared memory of the memory, and the real-time timer in the memory device is started to perform timing processing;

[0010] In the case that the memory device is woken up from the low power consumption mode, the real-time timer is controlled to stop timing and the recorded second count value is stored into the non-power-off shared memory;

[0011] The multi-core processor reads the first count value and the second count value from the non-power-off shared memory, and performs time management processing according to the first count value and the second count value.

[0012] According to some embodiments of the present application, in the case that the storage device enters the low power consumption mode for the first time, the method further comprises, before the real-time timer in the storage device starts the timing process, the following steps:

[0013] measuring the real-time frequency of the real-time timer in the storage device, and storing the obtained real-time frequency in the non-power-off shared memory.

[0014] According to some embodiments of the present application, the time management process according to the first count value and the second count value comprises:

[0015] calibrating the corresponding second count value according to the real-time frequency to obtain a first adjusted count value;

[0016] performing time conversion according to the first count value and the first adjusted count value.

[0017] According to some embodiments of the present application, the method further comprises:

[0018] the host issues a real-time time to the storage device, and controls the storage device to perform time management process based on the real-time time.

[0019] According to some embodiments of the present application, the control of the storage device to perform time management process based on the real-time time comprises:

[0020] in the case that the real-time time is an absolute time, marking a variable in the firmware of the storage device for maintaining absolute time as valid;

[0021] updating the variable in the firmware for maintaining absolute time, and controlling the storage device to perform data write operation based on absolute time.

[0022] According to some embodiments of the present application, the control of the storage device to perform time management process based on the real-time time comprises:

[0023] in the case that the real-time time is a relative time, marking a variable in the firmware of the storage device for maintaining absolute time as invalid;

[0024] calibrating the variable in the firmware for maintaining relative time based on relative time, and controlling the storage device to perform data write operation based on relative time.

[0025] According to some embodiments of the present application, the method further comprises:

[0026] In a case where the memory device performs a read / write operation, a time management process is performed based on the high-speed timer of the memory device.

[0027] According to the time management device of the second aspect of the present application, the device comprises:

[0028] The first processing unit is configured to, in a case where the memory device enters a low-power mode, store a first count value recorded by a high-speed timer in the memory device into a non-power-off shared memory of the memory, and enable a real-time timer in the memory device to start a timing process;

[0029] The second processing unit is configured to, in a case where the memory device is woken up from the low-power mode, control the real-time timer to stop timing and store a recorded second count value into the non-power-off shared memory;

[0030] The third processing unit is configured to control a multi-core processor to read the first count value and the second count value from the non-power-off shared memory, and perform a time management process according to the first count value and the second count value.

[0031] According to the electronic device of the third aspect of the present application, the device comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the time management method as described above when executing the computer program.

[0032] According to the computer readable storage medium of the fourth aspect of the present application, the computer readable storage medium stores computer executable instructions, and the computer executable instructions implement the time management method as described above when executed by a control processor.

[0033] The time management method according to the embodiments of the present application has at least the following beneficial effects: in the process of time management, in a case where the memory device enters a low-power mode, a first count value recorded by a high-speed timer in the memory device is stored into a non-power-off shared memory of the memory, and a real-time timer in the memory device is enabled to start a timing process; in a case where the memory device is woken up from the low-power mode, the real-time timer is controlled to stop timing and a recorded second count value is stored into the non-power-off shared memory; finally, a multi-core processor can be controlled to read the first count value and the second count value from the non-power-off shared memory, and perform a time management process according to the first count value and the second count value. Through the above technical solution, time management can be performed without relying on a host when the memory device enters a low-power mode, and precise timing processing can be achieved by relying on the high-speed timer and the real-time timer in the memory device.

[0034] Other features and advantages of the invention will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the description, claims, and drawings. Attached Figure Description

[0035] The accompanying drawings are provided to further understand the technical solutions of this disclosure and constitute a part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure.

[0036] Figure 1 This is a flowchart of a time management method provided in one embodiment of the present invention;

[0037] Figure 2 Is execution Figure 1 Sub-flowchart of time management methods prior to step S100;

[0038] Figure 3 yes Figure 1 Method sub-flowchart for step S300;

[0039] Figure 4 This is a flowchart of a time management method under host intervention provided in one embodiment of the present invention;

[0040] Figure 5 yes Figure 4 Method sub-flowchart for step S400;

[0041] Figure 6 yes Figure 4 Another method sub-flowchart for step S400;

[0042] Figure 7 This is a time management method for storage devices under host intervention provided in one embodiment of the present invention;

[0043] Figure 8 This is a flowchart of a high-speed timer priority method provided in one embodiment of the present invention;

[0044] Figure 9 This is an exemplary flowchart of a time management method provided in one embodiment of the present invention;

[0045] Figure 10 This is a schematic diagram of the structure of an electronic device provided in one embodiment of the present invention. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0047] In the description of this invention, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0048] In the description of this invention, unless otherwise explicitly defined, terms such as "set up," "install," and "connect" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0049] This invention provides a time management method, apparatus, electronic device, and computer-readable storage medium. The method includes: during time management, when the storage device enters a low-power mode, storing a first count value recorded by a high-speed timer in the storage device into the non-power-loss shared memory of the storage device, and starting a real-time timer in the storage device for timing processing; when the storage device is woken up from the low-power mode, controlling the real-time timer to stop timing and storing a second count value recorded into the non-power-loss shared memory; finally, controlling a multi-core processor to read the first and second count values ​​from the non-power-loss shared memory, and performing time management processing based on the first and second count values. Through the above technical solution, time management can be performed without relying on the host when the storage device enters a low-power mode, achieving accurate timing processing solely based on the high-speed timer and real-time timer in the storage device.

[0050] The embodiments of the present invention will be further described below with reference to the accompanying drawings.

[0051] like Figure 1 As shown, Figure 1 This is a flowchart of a time management method provided in an embodiment of the present invention. The method includes, but is not limited to, steps S100, S200, and S300:

[0052] Step S100: When the storage device enters a low-power mode, the first count value recorded by the high-speed timer in the storage device is stored in the non-power-down shared memory of the memory, and the real-time timer in the storage device is started to perform timing processing.

[0053] In step S200, in the case that the storage device is woken up from the low-power mode, the real-time timer is controlled to stop timing and the recorded second count value is stored into the non-power-off shared memory.

[0054] In step S300, the multi-core processor is controlled to read the first count value and the second count value from the non-power-off shared memory, and time management processing is performed according to the first count value and the second count value.

[0055] It should be noted that, in the process of time management, in the case that the storage device enters the low-power mode, the first count value recorded by the high-speed timer in the storage device is stored into the non-power-off shared memory of the storage, and the real-time timer in the storage device is started to perform timing processing; in the case that the storage device is woken up from the low-power mode, the real-time timer is controlled to stop timing and the recorded second count value is stored into the non-power-off shared memory; finally, the multi-core processor can be controlled to read the first count value and the second count value from the non-power-off shared memory, and time management processing is performed according to the first count value and the second count value. Through the above technical solution, accurate timing processing can be realized by relying on the high-speed timer and the real-time timer in the storage device without relying on the host when the storage device enters the low-power mode.

[0056] In some embodiments of the present application, the storage device can be an embedded MultiMedia Card (eMMC) or a Universal Flash Storage (UFS); the storage device can package the controller and the NAND flash memory into one body, the controller undertakes the functions of protocol analysis, NAND flash memory translation layer algorithm execution, power consumption adjustment, data decoding and error correction, and can also provide accurate timing function for special strategies of firmware; and the NAND flash memory actually undertakes the saving of user data and firmware.

[0057] It should be noted that, the storage device enters the low-power mode, that is, an energy-saving state entered by the storage device when it is not used or used less, and enters the sleep state by reducing the working frequency or shutting down part of the modules; in this case, the storage device can not only maintain the data integrity, but also significantly reduce the power consumption. In some embodiments of the present application, in the case that the storage device enters the low-power mode, the high-speed timer in the storage device also enters the shutdown state, at this time, the first count value recorded by the high-speed timer in the storage device can be transferred to the non-power-off shared memory of the storage device, and the real-time timer in the storage device is also controlled to start the timing operation, in order to prepare for the subsequent time measurement.

[0058] It should be noted that the non-power-off shared memory of the embodiment of the present application is the memory in which data will not be lost in the case of power-off, and the data in the memory can also be accessed by other processors; through the above setting, each processor of the multi-core processor can access the data in the non-power-off shared memory, so as to make good preparations for subsequent time synchronization operation of the multi-core processor.

[0059] It should be noted that in the case that the storage device is woken up from the low-power mode, the real-time timer will stop timing and will also store the recorded second count value into the non-power-off shared memory; since the high-speed timer in the storage device will perform timing operation in the case that the storage device is not in low power, and the real-time timer in the storage device will perform timing operation in the case that the storage device is in low power, the first count value and the second count value stored in the non-power-off shared memory can well record the time of the storage device in different states, so each processor in the multi-core processor can read the first count value and the second count value from the non-power-off shared memory, and then perform time conversion processing using the first count value and the second count value, thereby realizing time synchronization operation.

[0060] In addition, in an embodiment, as shown in Figure 2 in the case that the storage device enters the low-power mode for the first time, the first count value recorded by the high-speed timer in the storage device is stored into the non-power-off shared memory of the storage, and before the real-time timer in the storage device starts timing processing, the step S110 can be included but is not limited to.

[0061] In step S110, the real-time frequency of the real-time timer in the storage device is measured and processed, and the obtained real-time frequency is stored into the non-power-off shared memory.

[0062] In some embodiments of the present application, a double timer is used for time management processing, in which the accuracy and consistency of the high-speed timer are good because the high-speed timer has been calibrated; the real-time timer cannot be calibrated, so there are problems of large individual difference and large error; therefore, in order to solve the above problems, the clock of the real-time timer needs to be detected before the storage device enters the low-power mode for the first time, so as to determine the frequency of the real-time timer, and the frequency of the real-time timer can be used for subsequent time compensation operation, so as to improve the accuracy of time management.

[0063] It should be noted that the real-time frequency of the real-time timer in the storage device is measured and processed, and the measured real-time frequency can also be stored into the non-power-off shared memory, and the second count value measured by the real-time timer can be corrected based on the real-time frequency, so as to improve the accuracy of time management.

[0064] In addition, as shown in FIG. 4, the time management processing according to the first count value and the second count value can include, but is not limited to, steps S310-S320. Figure 3

[0065] In step S310, a first adjusted count value is obtained by calibrating the corresponding second count value according to the real-time frequency.

[0066] In step S320, time conversion processing is performed according to the first count value and the first adjusted count value.

[0067] It should be noted that, in the process of time management processing according to the first count value and the second count value, first, the first adjusted count value can be obtained by calibrating the corresponding second count value according to the real-time frequency; then, the current accurate time can be determined by performing time conversion processing on the first count value and the first adjusted count value, thereby realizing time management processing.

[0068] It should be noted that, before the storage device enters the low-power mode for the first time, the clock frequency of each real-time timer in the storage device needs to be detected to determine the real-time frequency of each real-time timer, and the detected real-time frequency is stored in the non-power-down shared memory; subsequently, when the storage device enters the low-power mode again, the clock frequency of the real-time timer does not need to be detected again, and the second count value detected by the real-time timer is directly compensated and calibrated by using the real-time frequency stored in the non-power-down shared memory, thereby saving the detection of the clock frequency and improving the efficiency of time management.

[0069] In addition, as shown in FIG. 4, the time management method can further include, but is not limited to, step S400. Figure 4

[0070] In step S400, the host device issues a real-time time to the storage device, and controls the storage device to perform time management processing based on the real-time time.

[0071] In some embodiments of the present application, when the host device can issue a real-time time to the storage device, the storage device will preferentially perform time management processing according to the real-time time issued by the host device, and temporarily does not need to rely on the internal high-speed timer and real-time timer; since the real-time time issued by the host device has high precision, the accuracy of time management can also be improved.

[0072] ​​It is worth noting that when the host does not support the real-time time issued to the storage device, the storage device relies on the internal high-speed timer and the real-time timer to cooperate with each other to complete the time management processing, and the reliability of the time management of the storage device is improved.

[0073] In addition, in an embodiment, as shown in Figure 5 the process of controlling the storage device to perform time management processing based on the real-time time can further include but is not limited to steps S410 and S420.

[0074] Step S410, in the case of absolute time of real-time time, the variable in the firmware of the storage device for maintaining absolute time is marked as valid;

[0075] Step S420, updating the variable in the firmware for maintaining absolute time, and controlling the storage device to perform data write operation based on absolute time.

[0076] It should be noted that in the process of controlling the storage device to perform time management processing based on the real-time time, first in the case of absolute time of real-time time, the variable in the firmware of the storage device for maintaining absolute time can be marked as valid; then the variable in the firmware for maintaining absolute time can be updated, and the storage device can be controlled to perform data write operation based on absolute time; through the above technical solution, stable and reliable time management processing can be realized in the case of absolute time of real-time time.

[0077] In addition, in an embodiment, as shown in Figure 6 the process of controlling the storage device to perform time management processing based on the real-time time can further include but is not limited to steps S430 and S440.

[0078] Step S430, in the case of relative time of real-time time, the variable in the firmware of the storage device for maintaining absolute time is marked as invalid;

[0079] Step S440, based on the relative time, the variable in the firmware for maintaining relative time is calibrated, and the storage device is controlled to perform data write operation based on the relative time.

[0080] It should be noted that, in the process of controlling the storage device to perform time management processing based on real time, first, in the case that the real time is relative time, the variable in the firmware of the storage device for maintaining absolute time can be marked as invalid; then, the variable in the firmware for maintaining relative time is calibrated based on the relative time, and the storage device can also be controlled to perform data write operation processing based on the relative time; through the above technical solution, stable and reliable time management processing can also be realized in the case that the real time is relative time.

[0081] In addition, in an embodiment, as shown in Figure 7 the time updating method inside the storage device under the intervention of the host is disclosed. In this embodiment, the storage device is UFS, the UFS is device, the HOST is host, the RTC is real-time timer, and the LU is logical unit in the UFS; wherein the HOST can update the real time of the Device through wPeriodRTCUpdate in the device descriptor and dSecondPassed in the attribute. Wherein wPeriodRTCUpdate is used to define the time reference (one is based on January 1, 2010 00:00, and the other is based on the last time dSecondPassed is updated to device) and the interval of the update of the HOST to the Device, and dSecondPassed indicates the number of seconds from the reference to the current (32 bits, a total of 136 years of time; if it is based on the last time the device is updated, the time of each update should be the time interval from the reset of the device to the current time), if the HOST supports this function, the Device can obtain accurate real time. Using the master-slave combined time management method, for example, with the help of the RTC related protocol of the UFS protocol, the HOST can issue the current real time to the device, if the Host issues the time to the device, the device preferentially uses the time issued by the host, otherwise uses the internal time management method.

[0082] It is worth noting that, using the master-slave combined time management method, when the Host powers on the storage device (device), if the Host supports the RTC function specified in the protocol, it will issue the reference time, the unit of the time period and how long it has been since the reference time to the device, the device should calibrate the time inside the firmware according to the time issued by the host (if the reference time type is absolute time, update the absolute time and the relative time; if the reference time type is relative time, only update the relative time). If the Host does not support the RTC function, it needs to completely rely on the internal time management mechanism.

[0083] In addition, in an embodiment, as shown in Figure 8 the time management method can further include, but is not limited to, step S500.

[0084] Step S500, in the case that the memory device performs read / write operation, time management processing is performed based on the high-speed timer of the memory device.

[0085] In some embodiments of the present application, in the case that the memory device performs read / write operation, time management processing can be performed based on the high-speed timer of the memory device. The high-speed timer provides accurate timing service when the firmware runs at high speed, which well guarantees the accuracy of time management. However, when the memory device enters low power consumption, the high-speed timer will be closed, and the real-time timer needs to be used for timing processing to maintain the timing function.

[0086] In addition, in an embodiment, as shown in Figure 9As shown, a specific embodiment of a time management method is disclosed. The internal time management mechanism needs to be specially handled for saving the high-speed timer count value during sleep and for timing compensation of the RTC timer during sleep. For example, the timer under the high-speed clock domain starts counting from 0 upwards, and generally, 2 32-bit registers are used to display the current count value (one is the low 32 bits, and one is the high 32 bits), when entering the low-power mode, both of the 2 count registers will be powered off and cleared to 0, at this time, software intervention is needed to save the values of the 2 registers. Generally, when the chip enters the low-power mode, in order to ensure that the product can quickly wake up from the low-power mode, a part of the code or variables will be saved in the non-power-off memory, and then the values of the 2 timers can be saved in the non-power-off variables during sleep. The register values of the high-speed timer will be powered off and cleared to 0 due to sleep, and the count value variable maintained by the software will continue to accumulate, and special attention needs to be paid to the fact that when the saved low-bit count value overflows, the software needs to manually carry over in the high-bit count value. The timer under the RTC clock domain also has a 32-bit register to display the current count value (because the clock frequency of the RTC timer is low, so one register can meet the timing requirement), and the timer starts counting from 0, when the chip enters the low-power mode, the RTC clock domain timer is started, and when the chip wakes up from the low-power mode, the timer is stopped, and the count value of the register during the low-power period is saved in a variable, the variable is also stored in the non-power-off memory, and the count value during the low-power period is continuously accumulated. The coordinated operation of the 2 timers can be completed in one CPU, and the count values for recording the count values during the running state and the sleep state are also saved in the data segment of one CPU, and then in the multi-core scenario, if other CPUs also want to obtain accurate relative time, the variable for saving the count value needs to be stored in the shared memory through the shared memory, and other CPUs can directly access the shared memory to obtain the saved count value. The 2 count values saved by the software need to be converted into a unified unit when used, for example, the count value x=y (us). However, generally, the RTC clock frequency inside the chip is low, the error is large and cannot be calibrated, at this time, in order to ensure the accuracy of the timing and the consistency between the chips, the RTC clock needs to be measured, and each chip measures the real RTC frequency, and the frequency is used to calculate the time counted during the low-power period. The measurement mechanism of the RTC clock is realized inside the chip, mainly by using a high-frequency clock counter to measure, and the measurement action of the RTC clock is relatively slow, so in order to solve this problem, the measurement action of the RTC clock is placed at the first sleep, and when waking up, the real RTC clock frequency is used to convert the time, and when sleeping again, the measurement is not needed.Through the technical solutions, the cooperation of the double timers in the sleep wake-up and the management method of the software for the count value can solve the accurate control of the time in the application scenario without the intervention of the HOST as much as possible; the shared memory is used to solve the time synchronization problem among the multiple cores; the RTC clock is calibrated in the sleep to solve the problem of the large time error among the individual memory devices caused by the inaccurate RTC clock.

[0087] In some embodiments of the present application, one embodiment of the present application further provides a time management apparatus, the apparatus comprising:

[0088] a first processing unit configured to, in a case where the memory device enters a low-power mode, store a first count value recorded by a high-speed timer in the memory device into a non-power-off shared memory of the memory, and enable a real-time timer in the memory device to start a timing process;

[0089] a second processing unit configured to, in a case where the memory device is woken up from the low-power mode, control the real-time timer to stop timing and store a recorded second count value into the non-power-off shared memory;

[0090] a third processing unit configured to control a multi-core processor to read the first count value and the second count value from the non-power-off shared memory, and perform a time management process according to the first count value and the second count value.

[0091] It is worth noting that the specific implementation of the time management apparatus is basically the same as the specific embodiments of the time management method described above, and will not be repeated here.

[0092] In some embodiments of the present application, as shown in Figure 10 one embodiment of the present application further provides an electronic device 700, comprising a memory 720, a processor 710, and a computer program stored in the memory 720 and executable on the processor 710, and the processor 710 implements the time management method in the above embodiments when executing the computer program.

[0093] In some embodiments of the present application, one embodiment of the present application further provides a computer readable storage medium, which stores computer executable instructions, and the computer executable instructions are executed by a processor or a controller, for example, by a processor in the above device embodiment, so that the above processor executes the time management method in the above embodiments.

[0094] As will be appreciated by one of ordinary skill in the art, all or some of the steps, systems, etc. in the above-disclosed methods can be embodied in software, firmware, hardware, and / or suitable combinations thereof. Some or all of the physical components can be implemented with software executed by a processor, such as a central processing unit, a digital signal processor, or microprocessor, or can be implemented as hardware, or as an integrated circuit, such as an application- specific integrated circuit. Such software can be distributed on computer readable media, which can comprise computer storage media (or non-transitory media), and communication media (or transitory media). As is well known to those of ordinary skill in the art, computer storage media includes all computer-readable media in which data, computer executable instructions, or other computer readable data is / are publicized, embodied, or otherwise accessed. Computer storage media does not include communication media unless the communication media facilitates access to computer readable data. By way of example, and not limitation, computer storage media can include random- access memory (RAM), read-only memory (ROM), EEPROM, flash memory, or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage, or other magnetic storage devices, or any other medium which can be used to store the desired information and which can be accessed by the computer. Further, as will be appreciated by one skilled in the art, computer storage media, computer readable media, and communications media can often be referenced together as computer program products. It is therefore to be understood that any such computer program products can be employed with the disclosed technology.

[0095] The above description is that of the preferred embodiments of the application. Various modifications and changes can be made thereto without departing from the spirit and scope of the application as set forth in the claims.

Claims

1. A time management method, characterized by, The method comprises: storing a first count value recorded by a high-speed timer in the storage device into a non-power-off shared memory of the storage in a case where the storage device enters a low-power mode, and enabling a real-time timer in the storage device to start a timing process; stopping the real-time timer and storing a recorded second count value into the non-power-off shared memory in a case where the storage device is woken up from the low-power mode; controlling a multi-core processor to read the first count value and the second count value from the non-power-off shared memory, and performing a time management process according to the first count value and the second count value.

2. The time management method according to claim 1, characterized in that, In a case where the storage device enters the low-power mode for the first time, before the storing of the first count value recorded by the high-speed timer in the storage device into the non-power-off shared memory of the storage and the enabling of the real-time timer in the storage device to start the timing process, the method further comprises: performing a measurement process on a real-time frequency of the real-time timer in the storage device, and storing the obtained real-time frequency into the non-power-off shared memory.

3. The time management method according to claim 2, characterized in that, The performing of the time management process according to the first count value and the second count value comprises: performing a calibration process on the corresponding second count value according to the real-time frequency to obtain a first adjusted count value; performing a time conversion process according to the first count value and the first adjusted count value.

4. The time management method according to claim 1, characterized by, The method further comprises: issuing, by a host, a real-time time to the storage device, and controlling the storage device to perform a time management process based on the real-time time.

5. The time management method according to claim 4, characterized in that, The controlling of the storage device to perform the time management process based on the real-time time comprises: in a case where the real-time time is an absolute time, marking a variable for maintaining the absolute time in a firmware of the storage device as valid; updating the variable for maintaining the absolute time in the firmware, and controlling the storage device to perform a data write operation based on the absolute time.

6. The time management method according to claim 4, characterized by, The controlling of the storage device to perform the time management process based on the real-time time comprises: in a case where the real-time time is a relative time, marking a variable for maintaining the absolute time in a firmware of the storage device as invalid; performing a calibration process on the variable for maintaining the relative time in the firmware based on the relative time, and controlling the storage device to perform a data write operation based on the relative time.

7. The time management method of claim 1, wherein, The method further comprises: performing a time management process based on the high-speed timer of the storage device in a case where the storage device performs a read-write operation.

8. A time management apparatus characterized by comprising: The apparatus comprises: a first processing unit configured to store a first count value recorded by a high-speed timer in the storage device into a non-power-off shared memory of the storage in a case where the storage device enters a low-power mode, and enable a real-time timer in the storage device to start a timing process; a second processing unit, configured to control the real-time timer to stop timing and store the recorded second count value into the non-power-off shared memory in case that the memory device is woken up from the low power consumption mode; a third processing unit, configured to control the multi-core processor to read the first count value and the second count value from the non-power-off shared memory, and perform time management processing according to the first count value and the second count value.

9. An electronic device, comprising: comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor implementing the time management method according to any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, the computer-readable storage medium storing computer-executable instructions, wherein, the computer executable instructions implementing the time management method according to any one of claims 1 to 7 when executed by the control processor.

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