A driving method for a parallel high grayscale LED display screen

Abstract

This invention belongs to the field of display screen driving technology. It provides a parallel high grayscale LED display screen driving method, comprising: real-time monitoring of the instantaneous current values ​​of all parallel driving channels; combining input future multi-frame image data to predict the current load value of each parallel channel in future frames, generating a load prediction map; extracting high-load channels from the load prediction map; and generating a load balancing allocation scheme that redistributes the pixel load of high-load channels to selected adjacent channels, with the optimization objective of minimizing the variance of current values ​​between the high-load channels and selected adjacent channels. By minimizing the regional current variance as the optimization objective and adhering to spatial constraints such as pixel integrity and geometric proximity, a pixel-level dynamic load allocation scheme is generated, thereby achieving a leap from simple current sharing to intelligent optimized allocation. While ensuring display continuity, it effectively mitigates the risk of local current concentration.

Description

Technical Field

[0001] This invention belongs to the field of display screen driving technology, specifically a parallel high grayscale LED display screen driving method. Background Technology

[0002] As a core device for modern information display, high grayscale LED displays are directly related to driving technology and display quality (such as brightness, uniformity, and refresh rate). Among various driving architectures, the parallel driving architecture is widely used in the high-end display field because it can independently control the grayscale of each pixel and is easy to achieve high refresh rate and accurate color performance.

[0003] However, as displays move towards higher resolution, higher brightness, and higher dynamic range (HDR), parallel drive architectures face challenges: power supply voltage fluctuations caused by instantaneous high current demands and deterioration of image uniformity.

[0004] Specifically, when displaying dynamic images, especially those containing large areas of high brightness, multiple parallel drive channels simultaneously require extremely large instantaneous current. Traditional centralized power supply solutions struggle to respond to such nanosecond-level, drastically changing current demands, resulting in significant voltage fluctuations (i.e., the IRDrop problem) on the power supply network (PDN). These fluctuations directly alter the effective voltage applied to the LED chips, causing their brightness to deviate from the expected value. Due to differences in line impedance and current load in different areas, the degree of voltage fluctuation varies, ultimately creating visual "bright spots" or "dark spots," severely damaging the uniformity of the display screen.

[0005] Therefore, the present invention provides a driving method for a parallel high grayscale LED display screen. Summary of the Invention

[0006] In order to overcome the shortcomings of the prior art, at least one technical problem raised in the background art is solved.

[0007] The technical solution adopted by this invention to solve its technical problem is: a parallel high grayscale LED display driving method, comprising:

[0008] Real-time monitoring of the instantaneous current values ​​of all parallel drive channels, combined with input future multi-frame image data, predicts the current load value of each parallel channel in future frames, and generates a load prediction map;

[0009] Extract the high-load channels from the load prediction map, and with the optimization objective of minimizing the variance of the current values ​​between the high-load channels and the selected adjacent channels after allocation, generate a load balancing allocation scheme that redistributes the pixel load of the high-load channels to the selected adjacent channels.

[0010] A feasibility assessment is conducted on the predicted current value after the load balancing allocation scheme, and a differentiated strategy is implemented based on the assessment results.

[0011] If the load balancing assessment is successful, then the load balancing allocation scheme will be executed.

[0012] If the assessment indicates that the equalization has failed, a spatiotemporal domain collaborative degradation process is executed, including sequential execution of time domain optimization. After the time domain optimization is executed, the total current demand for the next frame is predicted again. If the prediction results show that the total current demand still exceeds the maximum sustainable power supply capacity of the power system, a spatial domain optimization process is executed.

[0013] The beneficial effects of this invention are as follows:

[0014] This invention configures a local decoupled energy storage unit for each drive channel and establishes a current prediction model that includes its compensation capability. It quantifies hardware characteristics into calculation factors to participate in load prediction, thereby upgrading post-current monitoring to pre-accurate prediction and collaborative assessment of hardware capabilities, making the identification of potential overload risks more forward-looking and accurate.

[0015] This invention aims to minimize the variance of regional current and follows spatial constraints such as pixel integrity and geometric proximity to generate a pixel-level dynamic load allocation scheme. This achieves a leap from simple current sharing to intelligent optimization allocation, effectively mitigating the risk of local current concentration while ensuring display continuity.

[0016] When conventional load distribution schemes are not feasible, this invention sequentially initiates temporal domain optimization and spatial domain optimization. The two-level degradation mechanism constitutes a complete chain from timing adjustment to content adjustment, thereby maintaining stable display. For the first time, it achieves degradation without sacrificing image quality and with stability as the bottom line at the driving method level. Attached Figure Description

[0017] The invention will now be further described with reference to the accompanying drawings.

[0018] Figure 1 This is a flowchart of the steps of a parallel high grayscale LED display driving method according to the present invention;

[0019] Figure 2 This is a module architecture diagram of a parallel high grayscale LED display driving system according to the present invention. Detailed Implementation

[0020] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0021] Example 1

[0022] Please see Figure 1 As shown in the embodiment of the present invention, a parallel high grayscale LED display driving method addresses the power supply voltage fluctuations caused by the concentrated instantaneous current demand when displaying high dynamic range images in a parallel architecture, and the resulting degradation of display uniformity (i.e., bright spots / dark spots). It achieves systematic optimization by constructing a scheme integrating collaborative state perception prediction, dynamic load balancing allocation, and hierarchical degradation optimization. First, by predicting the future load of each channel, and then aiming to minimize the regional current variance, a pixel-level dynamic load redistribution scheme is generated under spatial constraints. When the scheme exceeds the hardware boundary, temporal domain optimization based on intelligent phase grouping and spatial domain optimization based on global tone mapping are sequentially initiated. Without sacrificing image integrity, this resolves instantaneous current peaks, improves the stability of the power network, and fundamentally optimizes the display non-uniformity phenomenon. The method includes the following steps:

[0023] Step S10: Monitor the instantaneous current values ​​of all parallel drive channels in real time, combine them with the input future multi-frame image data, predict the current load value of each parallel channel in the future frame, and generate a load prediction map.

[0024] Specifically, by integrating a current sampling circuit into each parallel drive channel or driver chip, the instantaneous current values ​​of all parallel drive channels are sampled and obtained in real time at a frequency higher than the pixel refresh rate.

[0025] Each parallel drive channel is equipped with a local decoupling energy storage unit (such as a large-capacity MLCC capacitor) with capacitance C, equivalent series resistance ESR, and the system's allowable small voltage fluctuation range ΔV. Calculate the compensation current capability I that this unit can provide during instantaneous peak periods.

[0026] The formula for calculating the compensation current capability I is: , where Δt is the typical current pulse duration, and the current compensation capability is used as a hardware compensation calculation factor in subsequent prediction;

[0027] A frame buffer is created to continuously receive and store raw image data from the video source input for the next N frames (e.g., N=2-5).

[0028] The buffered future frame image data is parsed, the gray value of each pixel is extracted, and the gray value of each pixel is converted into the theoretical current requirement value according to the pre-calibrated gray-current lookup table.

[0029] The grayscale-current lookup table is a pre-created data lookup table stored inside the driving system. Its core function is to map the grayscale value of an image pixel to the theoretical current value required to drive that pixel. This is usually completed during the factory debugging phase of the display screen. It includes: for a given driving channel, having the driving chip output a specific grayscale value (e.g., from 0 to 1023, increasing step by step); using precision instruments to measure the average current actually consumed by the parallel driving channel at each grayscale value; and recording this set of data (grayscale value, corresponding measured current value).

[0030] Repeat the above steps to establish a mapping relationship for all gray levels, which will eventually form a gray-current lookup table.

[0031] For any parallel driving channel, after obtaining the theoretical single-pixel current value of all pixels in the channel, these values ​​are linearly superimposed and summed to obtain the initial predicted current value of the channel in the Nth frame.

[0032] By introducing a hardware compensation calculation factor, the initial prediction value is corrected, and a more accurate collaborative prediction current value is generated.

[0033] The correction rule is as follows: multiply the compensation efficiency coefficient by the hardware compensation calculation factor to obtain the effective compensation current estimate of the local decoupled energy storage unit under the current operating conditions; subtract the effective compensation current estimate from the initial predicted current value to obtain a preliminary optimized prediction value.

[0034] To ensure the robustness of the prediction and avoid over-correction, the preliminary optimized prediction value is compared with the guaranteed prediction value obtained by multiplying the initial predicted current value by the guaranteed coefficient, and the larger of the two values ​​is selected as the final output co-predicted current value.

[0035] It should be noted that the compensation efficiency coefficient and the safety margin coefficient are derived from the calibration test of the actual physical characteristics of the local decoupled energy storage unit (such as equivalent series resistance, capacitance deviation and frequency response characteristics), as well as the safety margin requirements for the system to maintain stable operation under extreme conditions. Through systematic simulation analysis and experimental verification, their specific values ​​are finally determined. The aim is to ensure that the prediction model retains the necessary safety margin while actively utilizing the hardware compensation capability, and to prevent decision-making risks caused by overly optimistic estimation.

[0036] The core of the correction lies in fully considering the instantaneous compensation potential of local hardware units during the prediction phase, thereby obtaining a prediction result that is both proactive (fully utilizing hardware capabilities) and robust (with a safety margin), more realistically reflecting the expected load pressure of the system in future frames.

[0037] The calculated co-predicted current values ​​of all channels in a future keyframe (usually the next frame) are mapped to the physical layout information of the parallel drive channels to generate a load prediction map.

[0038] Step S10 provides a data foundation for subsequent efficient and robust load balancing by proactively predicting and collaboratively mitigating fundamental shifts in potential risks.

[0039] Step S20: Extract the high-load channel from the load prediction map, and generate a load balancing allocation scheme that redistributes the pixel load of the high-load channel to the selected adjacent channel with the optimization objective of minimizing the variance of the current value between the high-load channel and the selected adjacent channel.

[0040] Specifically, obtain the load prediction map and extract the parallel drive channels whose collaborative predicted current values ​​exceed the current threshold as high load channels;

[0041] The optimization objective is to minimize the variance of current values ​​between the high-load channel and its selected adjacent channels after load redistribution, thereby achieving load balancing within the region.

[0042] The constraint condition is that for any channel involved in the load redistribution scheme (including high-load channels and adjacent channels receiving allocation), the value obtained by subtracting the compensable current of the local decoupling energy storage unit from the predicted current value after allocation must be lower than the set absolute safety threshold, thereby ensuring that all decisions are within the absolute safety margin of the hardware system.

[0043] For any high-load channel, spatially determine the adjacent parallel drive channels, which serve as the domain channel set of the high-load channel;

[0044] Among them, the basis for determining spatial adjacency is the predefined physical layout and electrical connection topology of the display drive channels, including the nearest channels in the row and column directions;

[0045] Based on the neighborhood channel set, channels whose collaboratively predicted current values ​​are lower than a preset current threshold are extracted and used as a candidate set of available neighborhood channels.

[0046] This allows us to filter out neighboring channels that currently have low load and are capable of receiving additional load before including them in the subsequent optimization scope;

[0047] An optimization model is established with the goal of minimizing the variance of the current values ​​of all channels in the candidate set of target high-load channels and available neighboring channels after load allocation. The decision variable of the optimization problem is the amount of pixel load that needs to be transferred from the target high-load channel to each available neighboring channel.

[0048] The optimization process must adhere to the following space constraints:

[0049] The transferred pixel load must be allocated in units of complete, independently driveable pixels;

[0050] The physical location of the reassigned pixels must be spatially adjacent to or have an acceptable wiring path with the LED bead area controlled by the target receiving channel to ensure that the visual continuity of the display is not compromised.

[0051] The total predicted current value of any available neighbor channel after receiving allocation must not exceed its own safe current limit.

[0052] An optimization algorithm is used to solve the optimization objective. Under the premise of satisfying all spatial constraints, a set of optimal pixel load allocation is searched to minimize the optimization objective and output the optimal allocation scheme.

[0053] Optionally, the optimization algorithm employs a heuristic iterative load allocation algorithm, the process of which is as follows:

[0054] Create an empty load allocation scheme for the high-load channel, and sort the pixel loads that need to be transferred in descending order according to the theoretical current value to generate a queue of pixels to be transferred.

[0055] Starting from the head of the pixel queue to be transferred (i.e. the pixel with the highest current demand), find the optimal receiving channel for each pixel in turn;

[0056] Iterate through all available neighbor channel candidate sets and, based on spatial constraints (channel capacity constraints and geometric proximity constraints), select the feasible channel set that can receive pixels.

[0057] Calculate the variance of the current value in the target region (high-load channel and all feasible channels) under the temporary scheme formed by assigning the pixel to each channel in the set of feasible channels, and select the channel that minimizes the temporary variance as the final target channel of the pixel.

[0058] The pixel is formally assigned to the selected target channel and removed from the queue of pixels to be transferred. At the same time, the remaining capacity of the target channel is updated (current capacity minus the current value of the pixel).

[0059] Repeat the iterative allocation steps until the queue of pixels to be transferred is empty, or the current value of the high-load channel has dropped below the safe threshold, or no available neighboring channel can receive the remaining pixels, and output the load balancing allocation scheme generated by the iteration.

[0060] Step S20 achieves regional current balance through dynamic load redistribution, mitigating the risk of instantaneous high current in high-load channels and providing key support for stable display.

[0061] It has the following functions: identifying risk sources, extracting high-load channels that exceed the current threshold in the load prediction map, identifying the core area of ​​current overload, optimizing the regional current distribution, transferring the load with the goal of minimizing the current variance between high-load channels and adjacent channels, reducing local current concentration, ensuring allocation safety, screening available neighboring channels with low load, ensuring that load transfer does not exceed the hardware bearing limit, connecting subsequent processes, generating specific load balancing allocation schemes, and providing a clear execution basis for feasibility assessment.

[0062] Step S30: Conduct a feasibility assessment of the predicted current value after receiving the load balancing allocation scheme, and implement a differentiated strategy based on the assessment results;

[0063] Specifically, obtain the predicted current value of all feasible channels receiving allocation in the load balancing allocation scheme after allocation, and verify each feasible channel receiving allocation according to the constraints: whether the net value obtained after subtracting the available compensation current of the local decoupling energy storage unit from the predicted current value after allocation is lower than the absolute safety threshold.

[0064] If all available channels for receiving and allocation meet the above conditions (below the absolute security threshold), the equalization is considered successful.

[0065] If any available channel for receiving and allocating loads does not meet the above conditions, the load balancing is deemed unsuccessful, meaning that the load balancing scheme has exceeded the ultimate limit of the hardware capabilities.

[0066] Step S301: If the load balancing assessment is successful, then execute the load balancing allocation scheme;

[0067] Specifically, when the load balancing is successfully evaluated, the load balancing redistribution scheme is compiled into specific driver chip register configuration control instructions by the main controller. The control instructions are then sent to the corresponding driver chip and executed before the start of the next frame image display cycle, thus completing the dynamic spatial redistribution of pixel load.

[0068] Step S302: If the evaluation indicates that the equilibrium has failed, then the spatiotemporal domain collaborative degradation process is executed, including sequential execution of time domain optimization and spatial domain optimization;

[0069] Specifically, when the evaluation indicates that equilibrium has failed, time-domain optimization and spatial-domain optimization are performed sequentially.

[0070] Based on the physical location and predicted current value of the high-load channels, and in accordance with the principles of spatial dispersion and load balance, all high-load channels are dynamically divided into multiple phase groups.

[0071] Specifically, the grouping process is as follows:

[0072] Each high-load channel is treated as a node. Based on the physical layout coordinates of the channel, the Euclidean distance between any two nodes is calculated. Based on a distance threshold (e.g., 2-3 times the distance between adjacent channels), connecting edges are established between nodes to form an undirected graph representing the spatial distribution relationship of high-load channels.

[0073] Spatial dispersion and load balancing are defined as two optimization objectives;

[0074] Objective A (Spatial Dispersion): Maximize the spatial distance between members within a group. That is, high-load channels assigned to the same phase group should be physically dispersed to ensure that when high-load channels in the group are triggered simultaneously, current demand will not have a cumulative effect in local areas of the power network, thereby avoiding local voltage drops.

[0075] Objective B (load balancing): Minimize the difference in the sum of the total predicted current between each phase group, that is, the sum of the predicted current values ​​of the high-load channels contained in each phase group should be approximately equal, ensuring that the amplitudes of the multiple current peaks that are staggered are similar, which is conducive to the stable operation of the power supply system.

[0076] Based on the two optimization objectives mentioned above, a heuristic clustering algorithm (such as a constrained K-means variant or a graph clustering algorithm) is used for grouping, as follows:

[0077] The physical location set of all high-load channels, the predicted current value of each channel, and the number of groups K;

[0078] Randomly select K channels as the initial group centers;

[0079] For each high-load channel to be assigned, calculate the "cost" of assigning it to each group. The cost function is: normalize the reciprocal of the average distance between the high-load channel and the existing channels in the phase group and the current total predicted current value of the phase group, and then multiply the products to calculate the cost. The high-load channel will be assigned to the group with the lowest "cost".

[0080] After all channels have been assigned, the geometric center position and total predicted current value for each group are recalculated.

[0081] Repeat the iterative allocation steps until the grouping scheme no longer changes or the maximum number of iterations is reached;

[0082] After grouping, a final verification is performed: ensure that there are no physically adjacent channels within the same phase group. If there are, swap one of the channels with the farthest channel in the adjacent group to prioritize the principle of spatial dispersion.

[0083] The programmable clock management module in the system is activated, generating multiple pixel lighting clock signals with the same fundamental frequency but with fixed phase delays for the aforementioned phase groups.

[0084] The fixed delay time is determined by the system power supply recovery time constant and the current pulse width of the channel. It must be ensured that the fixed delay time is greater than or equal to the time required for the power network voltage to recover from a peak drop to a stable level, so as to ensure that the voltage fluctuation caused by the current pulse of the previous phase group has basically subsided before the next phase group is activated.

[0085] The driver chip receives the corresponding delayed clock signal according to its phase group, and strictly controls the sampling and lighting time of all pixels in the high-load channel according to this timing.

[0086] In this way, the large global current peak that was originally concentrated in time is decomposed into multiple smaller current peaks that are evenly distributed on the time axis and have significantly reduced amplitude, thereby achieving peak shaving and valley filling of the power network.

[0087] After performing time-domain optimization, the overall current demand for the next frame is predicted again. If the prediction results show that the overall current demand still exceeds the maximum sustainable power supply capacity of the power system, the spatial domain optimization process is executed.

[0088] The system pre-stores or dynamically generates multiple global tone mapping curves suitable for different scenarios. The core mathematical characteristics of the curves are: keeping the black level unchanged (output is 0 when the input is 0), maintaining the intermediate grayscale area linearly or approximately linearly, and performing smooth non-linear compression on the highlight part (e.g., the part where the input grayscale is greater than 50% of the full range).

[0089] Typical curve forms include gamma correction curves, S-shaped curves (such as the Sigmoid function), or piecewise linear functions.

[0090] Based on the grayscale histogram features of the current frame image (such as the proportion and distribution of bright pixels), select the mapping curve from the curve library that can most effectively reduce the total current while maintaining the best visual appearance.

[0091] In the final stage before the frame data is sent into the parallel drive channel, the selected global tone mapping curve is applied to perform full-frame, real-time grayscale value transformation on the original image data in the frame buffer.

[0092] Specifically, for each pixel in the image, its original grayscale value is used as input, and a new compressed grayscale value is obtained in real time through a hardware lookup table, and the new value is used to drive the corresponding LED pixel.

[0093] The hardware lookup table refers to a fixed data table pre-programmed into the driver chip or a dedicated storage unit in the LED display driver system. It stores the mapping relationship between the original grayscale value and the compressed grayscale value. When performing spatial domain optimization (such as global tone mapping), the driver hardware does not need to perform complex real-time calculations. Instead, it directly inputs the original grayscale value of each pixel as the address into the lookup table and instantly outputs the corresponding compressed new grayscale value to drive the LED beads. By utilizing the hardware parallel processing capability, it achieves extremely high-speed and low-latency conversion of the grayscale data of the entire frame of image, thereby ensuring the real-time performance of display processing while forcibly reducing the total current demand of the system.

[0094] This systematically and uniformly reduces the brightness and total current demand of the entire image, forcing it within the safe capacity of the power supply system.

[0095] Thanks to the adoption of a globally unified and smooth grayscale compression strategy, the brightness uniformity and grayscale consistency of the entire screen are strictly maintained, effectively avoiding new "bright spots" or "dark spots" caused by non-uniform brightness reduction. Visually, users perceive a coordinated and acceptable reduction in the brightness of the entire screen, thus prioritizing the stability and uniformity of the display under extreme load conditions.

[0096] Step S302, by constructing a two-level degradation system, has the following functions: Temporal domain optimization, through dynamic phase grouping algorithms (especially the product cost function) and precise delay configuration, resolves current peaks without sacrificing image quality, making it the preferred degradation solution; Spatial domain optimization, as the final safety valve, achieves absolute stability with minimal loss of visual experience through content-adaptive global tone mapping.

[0097] This implementation configures a local decoupled energy storage unit for each drive channel and establishes a current prediction model that includes its compensation capabilities. It quantifies hardware characteristics into calculation factors to participate in load prediction, thereby upgrading post-current monitoring to pre-emptive accurate prediction and collaborative assessment of hardware capabilities, making the identification of potential overload risks more forward-looking and accurate.

[0098] This embodiment takes minimizing the regional current variance as the optimization objective and follows spatial constraints such as pixel integrity and geometric proximity to generate a pixel-level dynamic load allocation scheme, thereby realizing the leap from simple current sharing to intelligent optimization allocation. While ensuring display continuity, it effectively resolves the risk of local current concentration.

[0099] In this embodiment, when conventional load distribution schemes are not feasible, temporal domain optimization and spatial domain optimization are initiated sequentially. The two-level degradation mechanism constitutes a complete chain from timing adjustment to content adjustment, thereby maintaining stable display. For the first time, degradation with no loss of image quality as the priority and stability as the bottom line has been achieved at the driving method level.

[0100] Example 2

[0101] Based on the same inventive concept as the parallel high grayscale LED display driving method in the foregoing embodiments, such as Figure 2 As shown, this application provides a parallel high grayscale LED display driving system, wherein the system specifically includes:

[0102] Load prediction module: Real-time monitoring of the instantaneous current value of all parallel drive channels, combined with the input future multi-frame image data, predicts the current load value of each parallel channel in the future frame, and generates a load prediction map;

[0103] Load distribution module: Extracts high-load channels from the load prediction map, and generates a load balancing distribution scheme that redistributes the pixel load of high-load channels to selected adjacent channels with the optimization objective of minimizing the variance of current values ​​between high-load channels and selected adjacent channels after distribution.

[0104] Load balancing assessment module: performs a feasibility assessment on the predicted current value after receiving the load in the load balancing allocation scheme, and executes differentiated strategies based on the assessment results;

[0105] Differentiated strategy execution module: If the load balancing is deemed successful, the load balancing allocation scheme is executed;

[0106] If the assessment indicates that the equilibrium has failed, a spatiotemporal domain collaborative degradation process is executed, which includes sequentially performing time domain optimization and spatial domain optimization.

[0107] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A driving method for a parallel high grayscale LED display screen, characterized in that: The method comprises the following steps: Real-time monitoring of the instantaneous current value of all parallel driving channels, combined with the input of future multi-frame image data, predicting the current load value of each parallel channel in the future frame, and generating a load prediction map; Extracting high-load channels from the load prediction map, minimizing the variance of the current values of the high-load channels and the selected adjacent channels after distribution as the optimization target, and generating a load balancing distribution scheme that reallocates the pixel load of the high-load channels to the selected adjacent channels; Performing feasibility evaluation on the predicted current values received in the load balancing distribution scheme, and executing differentiated strategies according to the evaluation results; If the evaluation is successful, the load balancing distribution scheme is executed; If the evaluation fails, a time and space domain collaborative degradation process is executed, including sequentially executing a time domain optimization, immediately after executing the time domain optimization, predicting the overall current demand of the next frame again, and if the prediction result shows that the total current demand still exceeds the maximum sustainable power supply capacity of the power supply system, a space domain optimization process is executed; The process of time domain optimization: Based on the physical location and predicted current value of the high-load channel, all high-load channels are dynamically divided into multiple phase groups according to the principles of spatial dispersion and load balancing; The programmable clock management module in the system is activated to generate multiple pixel lighting clock signals with the same basic frequency but with fixed phase delays for the divided phase groups; The fixed delay time must be greater than or equal to the time required for the power network voltage to recover to a stable level from a peak drop; The driving chip receives the corresponding delayed clock signal according to the phase group it belongs to, and controls the sampling and lighting time of all pixels in the high-load channel according to the timing; The process of space domain optimization: Dynamically generating multiple global tone mapping curves suitable for different scenarios to build a curve library; According to the gray histogram features of the current frame image, select the most effective mapping curve from the curve library that can reduce the total current while maintaining the best visual perception; Apply the selected global tone mapping curve in the last stage before the frame data is sent to the parallel driving channel; For each pixel in the image, the original gray value is taken as the input, and the new compressed gray value is obtained in real time through the hardware lookup table, and the corresponding LED pixel is driven with the new value.

2. The parallel high gray scale LED display screen driving method according to claim 1, characterized in that: The generation process of the load prediction map: Continuously receive and analyze the original image data of the next N frames, extract the gray value of each pixel, and convert the gray value of each pixel to the theoretical current demand value according to the pre-gray-current lookup table; For any one parallel driving channel, after obtaining the theoretical single-pixel current value of all pixels in the channel, linearly superimpose these values to obtain the initial predicted current value of the channel in the Nth frame; Introducing a hardware compensation calculation factor to modify the initial predicted value and generate a collaborative predicted current value; Map all the collaborative predicted current values of the parallel driving channels in the future frames obtained by calculation to the physical layout information to generate a load prediction map.

3. The driving method of the parallel high gray scale LED display screen according to claim 2, characterized in that: The process of modifying the initial predicted value: The compensation efficiency coefficient is multiplied by the hardware compensation calculation factor to obtain an effective compensation current estimation of the local decoupling energy storage unit under the current working condition, and the effective compensation current estimation is subtracted from the initial predicted current value to obtain a preliminary optimized predicted value; The preliminary optimized predicted value is compared with a bottom guarantee predicted value obtained by multiplying the initial predicted current value by a bottom guarantee coefficient, and the larger one of the two is selected as the final output cooperative predicted current value.

4. The parallel high gray scale LED display screen driving method according to claim 3, characterized in that: The generation process of the load balancing distribution scheme: Parallel driving channels whose cooperative predicted current values exceed the current threshold are extracted as high-load channels. An available neighbor channel candidate set is obtained, and the optimization objective is to minimize the current value variance of all channels in the available neighbor channel candidate set after load distribution; A heuristic iterative load allocation algorithm is used to solve the optimization objective, and under the premise of meeting all spatial constraints, a set of optimal pixel load distribution amounts is searched to minimize the optimization objective, and the optimal distribution scheme is output.

5. The parallel high gray scale LED display screen driving method according to claim 4, characterized in that: The acquisition process of the available neighbor channel candidate set: For any high-load channel, determine the adjacent parallel driving channels in space as the domain channel set of the high-load channel. Based on the domain channel set, extract channels whose cooperative predicted current values are lower than the preset current threshold as the available neighbor channel candidate set.

6. The parallel high gray scale LED display screen driving method according to claim 4, characterized in that: The spatial constraints include: The transferred pixel load must be allocated in complete and independently drivable pixel units; The re-distributed pixels must be adjacent in space or have acceptable wiring paths to the LED lamp bead area controlled by the target receiving channel to ensure that the visual coherence of the display screen is not damaged; The total predicted current value of any available neighbor channel after receiving the distribution must not exceed its own safe current upper limit.

7. The parallel high gray scale LED display screen driving method according to claim 1, characterized in that: The feasibility evaluation process: The predicted current values of all receiving distribution feasible channels after distribution in the load balancing distribution scheme are obtained, and each receiving distribution feasible channel is checked according to the constraint condition: whether the net value obtained by subtracting the available compensation current of the local decoupling energy storage unit from the predicted current value after distribution is lower than the absolute safety threshold; If all receiving distribution feasible channels meet the above condition, the balancing is successful; If any receiving distribution feasible channel does not meet the above condition, the balancing is unsuccessful.

8. The parallel high gray scale LED display screen driving method according to claim 1, characterized in that: The process of dividing into multiple phase groups: Each high-load channel is regarded as a node, the Euclidean distance between any two nodes is calculated according to the physical layout coordinates of the channels, and a connection edge is established between the nodes based on the distance threshold to form an undirected graph representing the spatial distribution relationship of the high-load channels; The spatial dispersion and load balancing are defined as two optimization objectives, including maximizing the spatial distance of the group members and minimizing the difference between the total predicted currents of the phase groups; Based on the above two optimization objectives, a heuristic clustering algorithm is used for grouping; After grouping, check to ensure that there is no physically adjacent channel in the same phase group, if there is, exchange one of them with the farthest channel in the adjacent group.

Images