Instruction optimization method and device, electronic equipment and readable medium

Abstract

The embodiment of the invention provides an instruction optimization method and device, electronic equipment and a readable medium, and relates to the technical field of computers, in the method, a symbol extension instruction in a to-be-optimized code serves as a to-be-optimized instruction. Acquiring a data dependency chain corresponding to a function to which the to-be-optimized instruction belongs as a target dependency chain; the data dependency chain is used for defining data dependency instructions of all variables in the function. And searching a source instruction corresponding to the source operand of the to-be-optimized instruction from the target dependency chain, and taking the source instruction as a source instruction of the to-be-optimized instruction. Under the condition that all the source instructions of the to-be-optimized instruction have symbol extension behaviors, determining the pre-extension data bits corresponding to all the source instructions, and determining the pre-extension data bits corresponding to the to-be-optimized instruction. And on the basis of the pre-extension data bits corresponding to the source instructions and the pre-extension data bits corresponding to the to-be-optimized instruction, the to-be-optimized instruction is simplified, and the generated symbol extension instruction is optimized.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to an instruction optimization method, apparatus, electronic device, and readable medium. Background Technology

[0002] During program processing, a compiler converts the program's source code into intermediate code, and then converts the intermediate code into executable assembly code.

[0003] In related technologies, some instructions in the source code have requirements on the number of bits in the operands, or require explicit type casting of the operands. Therefore, the generated intermediate code often includes sign extension instructions. Optimizing these generated sign extension instructions to improve program performance has become a pressing technical problem. Summary of the Invention

[0004] This invention provides an instruction optimization method, apparatus, electronic device, and readable medium that can solve the problem of how to optimize generated symbolic extension instructions.

[0005] To address the above problems, this invention discloses an instruction optimization method, the method comprising:

[0006] The symbol expansion instructions in the code to be optimized are treated as instructions to be optimized.

[0007] Obtain the data dependency chain corresponding to the function to which the instruction to be optimized belongs, and use it as the target dependency chain; the data dependency chain is used to define the instructions in the function to which each variable has a data dependency.

[0008] From the target dependency chain, find the source instruction corresponding to the source operand of the instruction to be optimized, and use it as the source instruction of the instruction to be optimized;

[0009] When all source instructions of the instruction to be optimized have sign extension behavior, determine the number of bits of data before extension for each source instruction, and determine the number of bits of data before extension for the instruction to be optimized.

[0010] The instruction to be optimized is simplified based on the number of bits of data before expansion corresponding to each of the source instructions and the number of bits of data before expansion corresponding to the instruction to be optimized.

[0011] On the other hand, embodiments of the present invention disclose an instruction optimization apparatus, the apparatus comprising:

[0012] The first processing module is used to treat the symbol expansion instructions in the code to be optimized as instructions to be optimized.

[0013] The acquisition module is used to acquire the data dependency chain corresponding to the function to which the instruction to be optimized belongs, as the target dependency chain; the data dependency chain is used to define the instructions in the function to which each variable has a data dependency.

[0014] The lookup module is used to find the source instruction corresponding to the source operand of the instruction to be optimized from the target dependency chain, and use it as the source instruction of the instruction to be optimized.

[0015] The determination module is used to determine the number of bits of data before expansion for each of the source instructions of the instruction to be optimized, and to determine the number of bits of data before expansion for the instruction to be optimized, when all the source instructions of the instruction to be optimized have sign expansion behavior.

[0016] The second processing module is used to simplify the instruction to be optimized based on the number of bits of data before expansion corresponding to each of the source instructions and the number of bits of data before expansion corresponding to the instruction to be optimized.

[0017] In another aspect, embodiments of the present invention disclose an electronic device, including: a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, the executable instruction causing the processor to execute the aforementioned method.

[0018] This invention also discloses a machine-readable medium storing instructions that, when executed by one or more processors, cause the processors to perform the methods described above.

[0019] The embodiments of this invention have the following advantages: The instruction optimization method provided by these embodiments uses the sign-extended instructions in the code to be optimized as the instructions to be optimized. It obtains the data dependency chain corresponding to the function to which the instruction to be optimized belongs, as the target dependency chain; the data dependency chain is used to define instructions in the function where variables have data dependencies. From the target dependency chain, it finds the source instructions corresponding to the source operands of the instruction to be optimized, as the source instructions of the instruction to be optimized. When all source instructions of the instruction to be optimized exhibit sign-extended behavior, it determines the number of bits of data before extension for each source instruction, and also determines the number of bits of data before extension for the instruction to be optimized. Based on the number of bits of data before extension for each source instruction and the number of bits of data before extension for the instruction to be optimized, the instruction to be optimized is simplified. Thus, by automatically simplifying the sign extension in the code to be optimized, the generated sign-extended instructions are optimized, which can reduce the number of sign-extended instructions in the code to a certain extent, thereby improving program performance. Attached Figure Description

[0020] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a flowchart of the steps of an instruction optimization method provided in an embodiment of the present invention;

[0022] Figure 2 This is a schematic diagram of a processing flow provided in an embodiment of the present invention;

[0023] Figure 3 This is a block diagram of an instruction optimization device provided in an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] The instruction optimization method provided in this invention can be applied to electronic devices, specifically to compilers within those devices. This method can identify and simplify symbolic expansion instructions. Due to hardware implementation limitations in certain architectures, some assembly instructions can only accept fixed-size operands. For example, some instructions require a specific number of operand bits, accepting only 64-bit data. Therefore, a type cast is required to ensure that fixed-size operands are provided for these instructions. Accordingly, the intermediate code generated by the compiler during compilation includes symbolic expansion instructions to sign-extend the source operands of these instructions. For example, in certain architectures, bitwise operations such as `slt[u]` and `and` do not distinguish between operation types but use the entire register as the source operand. Due to compiler limitations, when generating such instructions, the compiler cannot determine whether the source operand has been symbolically expanded. To ensure correct instruction execution, the compiler adds a symbolic expansion instruction before such instructions.

[0027] Due to the limitations of compilers, the generated intermediate code may contain a large number of symbol expansion instructions, which can lead to performance degradation. Therefore, this invention provides an instruction optimization method, which will be described in detail below.

[0028] Figure 1 This is a flowchart illustrating the steps of an instruction optimization method provided in an embodiment of the present invention, as follows: Figure 1 As shown, the instruction optimization method may include the following steps:

[0029] Step 101: Select the symbol extension instructions in the code to be optimized as the instructions to be optimized.

[0030] Step 102: Obtain the data dependency chain corresponding to the function to which the instruction to be optimized belongs, as the target dependency chain; the data dependency chain is used to define the instructions in the function where each variable has a data dependency.

[0031] Step 103: From the target dependency chain, find the source instruction corresponding to the source operand of the instruction to be optimized, and use it as the source instruction of the instruction to be optimized.

[0032] Step 104: If all the source instructions of the instruction to be optimized have sign extension behavior, determine the number of bits of data before extension for each source instruction, and determine the number of bits of data before extension for the instruction to be optimized.

[0033] Step 105: Simplify the instruction to be optimized based on the number of bits of data before expansion corresponding to each source instruction and the number of bits of data before expansion corresponding to the instruction to be optimized.

[0034] The sign extension instruction is used to perform sign extension, which refers to expanding data into a longer range while keeping the original value unchanged. During sign extension, the highest bit of the original value is filled with the extended high-order bits, and the original value is written to the low-order bits, thus increasing the value range. The code to be optimized can be the intermediate code obtained after the compiler converts the source code of any program. Intermediate code is a representation between source code and assembly code; because it has a higher level of abstraction, is not dependent on specific hardware platforms, and is more universal, it is used as the code to be optimized. The sign extension instructions in the code to be optimized are simplified, thereby achieving code optimization and allowing the optimized code to be reused on different hardware platforms. Specifically, the code to be optimized can include multiple instructions, which can be traversed. If the currently traversed instruction is a sign extension instruction, it is taken as the instruction to be optimized. For example, the source operand type, destination operand type, and instruction operation information of the instruction can be obtained. If both the source operand type and the destination operand type are register types, and the instruction operation information is a sign-extended opcode, the instruction is identified as a sign-extended instruction. If the instruction is not a sign-extended instruction, the process of traversing the next instruction begins, i.e., scanning the next instruction.

[0035] Instruction operation information is used to characterize the operation performed by the instruction, that is, to characterize the function / effect implemented by the instruction. Instruction operation information can be the instruction's opcode, with different opcodes representing different operations. The content of the bit field representing the opcode in the currently traversed instruction can be extracted to obtain the instruction's opcode, i.e., the instruction's instruction operation information. Then, the instruction format corresponding to the instruction's opcode is found. Specifically, the instruction format defined for the instruction's opcode can be found in the instruction manual as the instruction format corresponding to the instruction's opcode. The source operand type and destination operand type defined in the instruction format are determined as the source operand type and destination operand type of the instruction. Further, the instruction's opcode is compared with the opcodes in a first preset opcode set. If an opcode matching the instruction's opcode exists in the first preset opcode set, then the instruction operation information of the instruction is determined to be a sign-extended opcode. The first preset opcode set includes the opcodes of sign-extended instructions in the preset architecture (i.e., sign-extended opcodes). Furthermore, if both the source operand type and the destination operand type are registers, and the instruction operation information is a sign-extended opcode, then the instruction can be identified as a sign-extended instruction.

[0036] Alternatively, symbolic extension instructions can be searched for first in the code to be optimized. For any symbolic extension instruction found, it is treated as the instruction to be optimized and processed. The operation of searching for symbolic extension instructions can be performed synchronously with the operation of processing the instruction to be optimized; that is, after finding one symbolic extension instruction, the search for the next one continues immediately. Correspondingly, each found symbolic extension instruction is processed sequentially according to the order in which it was found. Alternatively, the operation of searching for symbolic extension instructions can be performed asynchronously with the operation of processing the symbolic extension instruction; that is, once a symbolic extension instruction is found, it is processed. After processing is completed, the search for the next symbolic extension instruction continues. This embodiment of the invention does not impose limitations on this approach.

[0037] The source operand of the instruction to be optimized refers to the register that provides the data before expansion during instruction execution. The source instruction provides the specific value to the source operand of the instruction to be optimized; that is, the source instruction is the instruction that provides specific data to the source operand of the instruction to be optimized, and the result of the source instruction is assigned to the source operand of the instruction to be optimized. The type of source instruction is not unique; for example, the source instruction can be an assignment instruction, an addition instruction, a multiplication instruction, a subtraction instruction, a division instruction, etc.

[0038] Furthermore, based on the instruction operation information of the source instructions, it can be determined whether the source instructions exhibit sign extension behavior. If all source instructions of the instruction to be optimized exhibit sign extension behavior, it indicates that the data before extension of the instruction to be optimized is data after sign extension. Therefore, based on the number of bits of the data before extension corresponding to each source instruction and the number of bits of the data before extension corresponding to the instruction to be optimized, it can be further identified whether the instruction to be optimized can be simplified into other types of instructions to reduce the number of sign extension instructions in the code.

[0039] In summary, the instruction optimization method provided in this embodiment of the invention uses the sign-extended instructions in the code to be optimized as the instructions to be optimized. It obtains the data dependency chain corresponding to the function to which the instruction to be optimized belongs, as the target dependency chain; the data dependency chain is used to define instructions in the function where variables have data dependencies. From the target dependency chain, it finds the source instructions corresponding to the source operands of the instruction to be optimized, as the source instructions of the instruction to be optimized. When all source instructions of the instruction to be optimized exhibit sign-extended behavior, it determines the number of bits of data before extension for each source instruction, and also determines the number of bits of data before extension for the instruction to be optimized. Based on the number of bits of data before extension for each source instruction and the number of bits of data before extension for the instruction to be optimized, the instruction to be optimized is simplified. Thus, by automatically simplifying the sign extension in the code to be optimized, the generated sign-extended instructions are optimized, which can reduce the number of sign-extended instructions in the code to a certain extent, thereby improving program performance.

[0040] Optionally, the step of obtaining the data dependency chain corresponding to the function to which the instruction to be optimized belongs in the embodiments of the present invention may specifically include:

[0041] Step 1021: For each variable in the function to which the instruction to be optimized belongs, the instruction that uses each variable is taken as the variable usage position of each variable, and the instruction that assigns a value to each variable is taken as the variable definition position of each variable.

[0042] Step 1022: Associate the variable definition location and variable usage location of each variable to obtain the target dependency chain.

[0043] The step of finding the source instruction corresponding to the source operand of the instruction to be optimized from the target dependency chain, and using it as the source instruction of the instruction to be optimized, may specifically include:

[0044] Step 1031: For any instruction to be optimized, compare the source register of the instruction to be optimized with each variable stored in the target dependency chain.

[0045] Step 1032: Determine the variable definition location corresponding to the variable that matches the source register as the source instruction.

[0046] In this embodiment of the invention, the code to be optimized may include multiple functions. A function is a logical unit within the code to be optimized, used to implement a specific function. A function may include multiple basic blocks, also called code basic blocks. A basic block is a linear code sequence, containing multiple instructions, which are executed sequentially. A data dependency analysis tool can be used to generate data dependency chains for the instructions to be optimized. This data dependency analysis tool is an analysis tool provided by the compiler, used to track the definition and usage of variables, assisting the compiler in various optimizations. Since this data dependency analysis tool is designed to build data dependency chains at the function level, in this embodiment of the invention, functions can be used as processing units. The instructions within a function are traversed, and after traversing one function, the next function is traversed, until all functions in the code to be optimized have been traversed, ending the entire processing flow.

[0047] For the currently traversed function, this function is the function to which the instruction to be optimized belongs. We can first generate the data dependency chain corresponding to this currently traversed function; this generated data dependency chain is the target dependency chain. For example, the compiler can run this data dependency analysis tool during the analysis phase, analyzing each instruction one by one starting from the function's entry block. For any variable in this function, if the instruction uses the variable, it indicates a data dependency between the variable and the instruction, and the instruction can be recorded as the variable's use (USE) position. If the instruction assigns a value to the variable, it indicates a data dependency between the variable and the instruction, and the instruction can be recorded as the variable's definition (DEF) position. Then, the definition and use positions of each variable are associated to form a DEF-USE chain. Specifically, a correspondence can be established between variables, variable DEF positions, and variable USE positions. This correspondence can be in the form of a doubly linked list. For example, variables, variable DEF positions, and variable USE positions can each be a column, with each row in the table representing a variable. Suppose we have three variables: variable a, variable b, and variable c. Variable a's USE position is instruction 4, and its DEF positions are instructions 1 and 7. Variable b's USE position is instruction 3, and its DEF position is instruction 2. Variable c's USE position is instruction 5, and its DEF position is instruction 6. We can then create a table with variables a, instructions 1, 7, and 4 as one row, variables b, instructions 2 and 3 as another row, and variables c, instructions 6 and 5 as yet another row. For each function in the code to be optimized, we can create a DEF-USE chain for each function following the above process to record the definition and usage of variables within the function.

[0048] In this context, variables are memory locations or registers that store data. The values ​​of variables can be read and modified during function execution. Source registers (i.e., source operands) represent the input to the instruction to be optimized. For example, the source register of an instruction to be optimized (i.e., the source register number defined in the instruction to be optimized) can represent the register that provides the data before expansion. Source registers are variables within the function. Therefore, after obtaining the target data dependency chain, the source instruction corresponding to the source register of each instruction to be optimized (i.e., each symbolic expansion instruction in the currently traversed function) can be found within it.

[0049] For any instruction to be optimized within the currently traversed function, its source register is compared with the variables stored in the target dependency chain. The DEF position of the variable that matches the source register is determined as the source instruction of the instruction to be optimized. For an instruction to be optimized, the multiple source instructions corresponding to it can be instructions in different data streams that assign values ​​to the source operands of the instruction to be optimized. For example, if the instruction to be optimized is instruction x1, when executing a function (e.g., function L1), if the condition for jumping to function L2 is not met, instruction x2 will eventually be executed, assigning values ​​to the source operands of instruction x1. If the condition for jumping to function L2 is met, instruction x3 in function L2 will eventually be executed, assigning values ​​to the source operands of instruction x1. Therefore, the instruction to be optimized x1 corresponds to two source instructions: x2 and x3.

[0050] In this embodiment of the invention, for each variable in the function to which the instruction to be optimized belongs, the instruction that uses each variable is taken as the variable usage location, and the instruction that assigns a value to each variable is taken as the variable definition location. The variable definition locations and variable usage locations are associated to obtain the target dependency chain, ensuring the accuracy of the generated target dependency chain. For any instruction to be optimized, the source register of the instruction to be optimized is compared with each variable stored in the target dependency chain. The variable definition location corresponding to the variable that matches the source register is determined as the source instruction. Thus, by searching through the target dependency chain, the source instruction of the instruction to be optimized can be obtained. This, to a certain extent, ensures the efficiency of obtaining the source instruction.

[0051] Optionally, in this embodiment of the invention, the source instructions of the instruction to be optimized can be traversed, and for each traversed source instruction, it can be determined whether the source instruction exhibits sign extension behavior. The operation of determining whether the source instruction exhibits sign extension behavior can be implemented through the following steps:

[0052] Step S31: If the instruction operation information of the source instruction represents a symbol extension operation, determine that the source instruction has symbol extension behavior.

[0053] Step S32: If the instruction operation information of the source instruction does not represent a sign extension operation, find the target source instruction corresponding to each source operand of the source instruction.

[0054] Step S33: Based on each of the target source instructions, determine whether the source instructions have symbol expansion behavior.

[0055] Specifically, the bit fields representing the opcode in the source instruction can be extracted to obtain the opcode of the source instruction. The opcode of the source instruction is then compared with the opcodes in a second preset opcode set. If an opcode in the second preset opcode set matches the opcode of the source instruction, it is determined that the instruction operation information of the source instruction represents a sign-extended operation. Otherwise, it is determined that the instruction operation information of the source instruction does not represent a sign-extended operation. The second preset opcode set includes the opcodes of sign-extended instructions in a preset architecture, as well as other instructions that sign-extend the operation result, such as addition instructions with sign-extended functionality. The second preset opcode set can be set based on the instruction manual of the preset architecture. For example, the opcodes of all sign-extended instructions defined in the instruction manual, as well as the opcodes of other instructions with sign-extended functionality, can be added to the second preset opcode set.

[0056] Furthermore, if the instruction operation information of the source instruction represents a symbolic extension operation, it indicates that the source instruction itself is also a symbolic extension instruction or has symbolic extension functionality. Therefore, it can be determined that the source instruction exhibits symbolic extension behavior.

[0057] If the instruction operation information of the source instruction does not indicate a sign extension operation, it can be determined that the source instruction itself is not a sign extension instruction or does not have sign extension functionality. However, the data passed from the source instruction to the instruction to be optimized may be sign-extended data. Therefore, in this case, the source instruction can also be considered to have sign extension behavior. Thus, further detection can be performed based on the target source instruction corresponding to each source operand of the source instruction.

[0058] Specifically, if the source instruction is a specified type instruction, then the target source instruction corresponding to the first source operand and the second source operand of the source instruction is searched. In this embodiment of the invention, the target source instruction is used to provide the specific value of the source operand of the source instruction. The specified type instruction can be an instruction in the preset architecture whose operation logic retains the sign extension characteristic. For example, the specified type instruction can be an OR instruction, etc. Taking the OR instruction as an example, the opcode of the source instruction can be compared with the opcodes in the third preset opcode set. If the opcode of the source instruction exists in the third preset opcode set, then it is determined that the instruction operation information of the source instruction represents an OR operation, and the source instruction is an OR operation instruction. The third preset opcode set includes the opcodes of OR instructions in the preset architecture. For example, the opcodes of all instructions defined in the instruction manual for performing OR operations can be added to the third preset opcode set. It should be noted that if the instruction operation information of the source instruction does not represent a sign extension operation (i.e., the source instruction itself is not a sign extension instruction, nor is it another instruction with sign extension function), and the source instruction is not an OR operation instruction, then it can be directly determined that the source instruction does not have sign extension behavior.

[0059] Furthermore, the target source instructions corresponding to the first source operand and the second source operand of the source instruction can be found from the data dependency chain. Specifically, the first source operand can be compared with each variable stored in the data dependency chain. The DEF position of the variable that matches the first source operand is determined as the target source instruction corresponding to the first source operand. The second source operand is then compared with each variable stored in the data dependency chain. The DEF position of the variable that matches the second source operand is determined as the target source instruction corresponding to the second source operand.

[0060] If the target source instructions corresponding to both the first and second source operands are used for sign expansion, it indicates that the data passed from the source instruction to the instruction to be optimized is sign-expanded data. Therefore, it can be determined that the source instruction exhibits sign expansion behavior. Otherwise, it is determined that the source instruction does not exhibit sign expansion behavior. If the instruction operation information of the target source instruction corresponding to the first source operand represents a sign expansion operation, and the instruction operation information of the target source instruction corresponding to the second source operand also represents a sign expansion operation, it is determined that the target source instructions corresponding to both the first and second source operands are used for sign expansion. Otherwise, it is determined that there are target source instructions that are not used for sign expansion. The determination of whether the instruction operation information of the target source instruction represents the implementation method of the sign expansion operation can be referred to the aforementioned determination of whether the instruction operation information of the source instruction represents the implementation method of the sign expansion operation, and will not be repeated here.

[0061] Optionally, in this embodiment of the invention, the step of determining the number of bits of data before expansion corresponding to each of the source instructions may specifically include:

[0062] Step 1041: Traverse the source instructions corresponding to the instruction to be optimized.

[0063] Step 1042: Obtain the functional description information of the source instruction currently being traversed; the functional description information is used to characterize the data size expanded by the source instruction.

[0064] Step 1043: Based on the functional description information, determine the number of bits of data before expansion corresponding to the source instruction.

[0065] In this embodiment of the invention, if the source instruction itself is a sign-extended instruction, or if the source instruction is not a sign-extended instruction but implicitly contains a sign-extended operation, or if the source instruction transmits sign-extended data to the instruction to be optimized, then the source instruction is considered to have sign-extended behavior. The functional description information can be pre-set by developers for each instruction supported by a preset architecture. For example, in the instruction manual of the preset architecture, the instruction opcode, instruction format, functional description information, etc., of each instruction are defined. The functional description information is used to characterize the function implemented by the instruction. Based on the functional description information, it can be identified whether the instruction is used for sign-extending and the sign-extending mode. The sign-extending mode is used to characterize how many bits of data are extended to how many bits. When the instruction is used for sign-extending, the functional description information defines the sign-extending mode. For example, the defined sign-extending mode can be: sign-extending from an X-bit mode to a Y-bit mode. The specific values ​​of X and Y can be determined by the instruction design. For example, the specific value of X can be 32, the specific value of Y can be 64, or the specific value of X can be 16, the specific value of Y can be 64, and so on.

[0066] For example, for the currently traversed source instruction, if the instruction operation information of the source instruction represents a sign extension operation, the functional description information of the source instruction can be obtained from the instruction manual. Then, the specific value of X is extracted from the functional description information to obtain the number of bits of data before extension corresponding to the source instruction. For example, key text conforming to the defined format of the sign extension pattern (e.g., the defined format could be: sign extension from an X-bit pattern to a Y-bit pattern) can be extracted from the functional description information using template matching. Then, the X contained in the key text is used as the number of bits of data before extension corresponding to the source instruction.

[0067] The instruction operation information of this source instruction does not represent a sign extension operation, but the source instruction is a specified type instruction, and the target source instructions corresponding to the first and second source operands of this source instruction are both used for sign extension. The pre-extension data bits of each target source instruction are obtained as the pre-extension data bit length corresponding to that source instruction. Specifically, the functional description information of the target source instruction can be obtained from the instruction manual. Then, through template matching, key text conforming to the defined format of the sign extension pattern is extracted from the functional description information of the target. Then, the 'X' contained in the key text is used as the pre-extension data bit length corresponding to that target source instruction.

[0068] Furthermore, after obtaining the number of bits of data before expansion corresponding to the source instruction, the next source instruction corresponding to the instruction to be optimized can be processed, that is, the number of bits of data before expansion corresponding to the next source instruction can be determined. If the number of bits of data before expansion corresponding to all source instructions corresponding to the instruction to be optimized is obtained, step 103 is executed.

[0069] In this embodiment of the invention, the source instructions corresponding to the instruction to be optimized are traversed. The functional description information of the currently traversed source instruction is obtained; the functional description information is used to characterize the size of the data to be expanded by the source instruction. Based on the functional description information, the number of bits of data before expansion corresponding to the source instruction can be determined. In this way, the number of bits of data before expansion can be obtained conveniently and accurately.

[0070] Since the code structure may change during the compiler optimization process, the intermediate representation stage may lose accurate type information. In this embodiment of the invention, the number of bits of data before expansion corresponding to the source instruction is determined based on the functional description information, which can ensure that the number of bits of data before expansion can be accurately identified.

[0071] Optionally, in this embodiment of the invention, the step of determining the number of bits of data before expansion corresponding to the instruction to be optimized may specifically include:

[0072] Step 1044: Detect the data type of the source operand of the instruction to be optimized.

[0073] Step 1045: Determine the number of data bits represented by the data type as the number of data bits before expansion corresponding to the instruction to be optimized.

[0074] In this embodiment of the invention, the bit field used to characterize the data type of the source operand in the instruction to be optimized can be extracted to obtain the data type of the source operand of the instruction to be optimized. Since the instruction to be optimized is a sign-extended instruction, the data type of the source operand of the instruction to be optimized can characterize the sign-extended mode of the instruction to be optimized, that is, characterize how many bits of the instruction to be optimized are sign-extended to how many bits.

[0075] Specifically, the number of bits represented by the data type of the source operand of the instruction to be optimized can be used as the number of bits of data before expansion for the instruction to be optimized. For example, the number of bits represented by the data type of the source operand of the instruction to be optimized can be found in a preset correspondence between data types and their represented bit widths. Specifically, the data type of the source operand of the instruction to be optimized can be compared with each data type in the correspondence. The number of bits of data corresponding to the matching data type is used as the number of bits of data before expansion for the instruction to be optimized. For example, if the data type of the source operand is char, then the number of bits of data before expansion for the instruction to be optimized can be determined to be 8. If the data type of the source operand is int, then the number of bits of data before expansion for the instruction to be optimized can be determined to be 32.

[0076] In this embodiment of the invention, only the data type of the source operand of the instruction to be optimized needs to be detected. Based on the number of data bits represented by the data type, the number of data bits before expansion corresponding to the instruction to be optimized can be obtained. In this way, the operation of obtaining the number of data bits before expansion can be simplified to a certain extent, thereby improving processing efficiency.

[0077] It should be noted that, in one implementation, the functional description information of the symbolic extension instruction can also be obtained. Based on the functional description information of the symbolic extension instruction, the number of bits of data before extension corresponding to the symbolic extension instruction is determined. The implementation method for determining the number of bits of data before extension corresponding to the symbolic extension instruction based on the functional description information of the symbolic extension instruction can refer to the aforementioned implementation method for determining the number of bits of data before extension corresponding to the source instruction based on the functional description information of the source instruction, and will not be repeated here.

[0078] In this embodiment of the invention, the step of determining the number of bits of data before expansion corresponding to each source instruction and the step of determining the number of bits of data before expansion corresponding to the instruction to be optimized can be performed in parallel. For example, the step of determining the number of bits of data before expansion corresponding to each source instruction can be performed simultaneously with the step of determining the number of bits of data before expansion corresponding to the instruction to be optimized. Alternatively, these two steps can be performed sequentially. For example, the step of determining the number of bits of data before expansion corresponding to each source instruction can be performed first, and then the step of determining the number of bits of data before expansion corresponding to the instruction to be optimized can be performed. Alternatively, the step of determining the number of bits of data before expansion corresponding to the instruction to be optimized can be performed first, and then the step of determining the number of bits of data before expansion corresponding to each source instruction can be performed. This embodiment of the invention does not limit this approach.

[0079] Optionally, in this embodiment of the invention, the step of simplifying the instruction to be optimized based on the number of bits of data before expansion corresponding to each of the source instructions and the number of bits of data before expansion corresponding to the instruction to be optimized may specifically include:

[0080] Step 1051: Determine the maximum value among the number of bits of data before expansion corresponding to each source instruction as the first bit.

[0081] Step 1052: Take the number of bits of data before expansion corresponding to the instruction to be optimized as the second bit. If the first bit is less than or equal to the second bit, convert the instruction to be optimized into a specified instruction. The complexity of the specified instruction is lower than that of the sign-extended instruction.

[0082] In this embodiment of the invention, when traversing the source instructions corresponding to the instruction to be optimized, after determining the number of bits of data before expansion corresponding to the source instruction, the number of bits of data before expansion corresponding to the source instruction can be recorded in a specified array. Exemplarily, the specified array can be an array created to store the number of bits of data before expansion, and this embodiment of the invention does not limit this. When the number of source instructions corresponding to the instruction to be optimized is 1, the value recorded in the specified array can be directly used as the first number. When the number of source instructions corresponding to the instruction to be optimized is greater than or equal to 2, multiple numbers of bits of data before expansion recorded in the specified array can be compared to determine the maximum value, which is used as the first number. Exemplarily, a variable (hereinafter referred to as the target variable for ease of description) can be created to store the current maximum value. The first value recorded in the specified array is assigned to the target variable. Then, the other values ​​recorded in the specified array are sequentially compared with the target variable. If the other value is greater than the target variable, the target variable is assigned the other value. After traversing the specified array, the value of the target variable is the maximum value recorded in the specified array. Let Nmax represent the maximum value, and Nmax can be used as the first number.

[0083] For example, suppose the instruction to be optimized corresponds to two source instructions: insn_def1 and insn_def2. The sign extension mode of insn_def1 is from 16-bit to 64-bit, and the sign extension mode of insn_def2 is from 32-bit to 64-bit. Therefore, the number of bits before extension for insn_def1 is 16, and the number of bits before extension for insn_def2 is 32. Accordingly, the maximum value of 32 can be chosen as the first bit.

[0084] For the source instruction, the low-order bits starting from a number of bits not less than the number of bits before the extension of the source instruction (i.e., the extended data) in the data provided for the instruction to be optimized include the complete original data of the source instruction. For example, for insn_def1, the low-order bits starting from the 16th bit in the extended data include the complete original data, and the value represented by the low-order bits starting from the 16th bit in the extended data is the same as the value represented by the original data of the source instruction. For insn_def2, the low-order bits starting from the 32nd bit in the extended data include the complete original data. When the sign extension mode is from a 16-bit sign extension to a 64-bit sign extension, the low-order bits starting from the 16th bit in the extended data include the complete original data; correspondingly, the low-order bits starting from the 32nd bit also include the complete original data. Therefore, the source instruction can also be considered as being from a 32-bit sign extension to a 64-bit sign extension. For extended data provided by different source instructions to the instruction to be optimized, the lower bits of the extended data, starting from bit Nmax, include the complete original data. Therefore, Nmax can be used as the first bit, which can be used to measure whether the original data truncated from the source register by the instruction to be optimized contains the complete value.

[0085] Specifically, the number of bits of the pre-expansion data corresponding to the instruction to be optimized represents the length of the pre-expansion data truncated from the source register by the instruction to be optimized. Using the number of bits of the pre-expansion data corresponding to the instruction to be optimized as the second bit, if the first bit is less than or equal to the second bit, it means that the pre-expansion data truncated from the source register will include the sign bit of the value currently stored in the source register. In this case, after the instruction to be optimized performs sign expansion again, the value obtained in the destination register will not change. Therefore, the instruction to be optimized can be considered a redundant instruction. In this case, the instruction to be optimized can be converted into a specified instruction with lower complexity. If the first bit is greater than the second bit, it means that the pre-expansion data truncated from the source register may not include the sign bit of the value currently stored in the source register. In this case, after the instruction to be optimized performs sign expansion again, the value obtained in the destination register may change compared to the original value in the source register. Therefore, in this case, the instruction to be optimized can be retained to ensure the accuracy of the value in the destination register.

[0086] In this embodiment of the invention, the maximum value among the number of bits of the pre-expansion data corresponding to each source instruction is determined as the first bit. The number of bits of the pre-expansion data corresponding to the instruction to be optimized is used as the second bit. Only when the first bit is less than or equal to the second bit is the instruction to be optimized converted into the specified instruction. This can, to some extent, avoid the problem of converting the instruction to be optimized into the specified instruction, which would affect the accuracy of the value in the destination register.

[0087] Optionally, in this embodiment of the invention, the specified instruction is a MOVE instruction, and the step of converting the instruction to be optimized into the specified instruction may specifically include:

[0088] Step 1052a: Obtain the source operand and destination operand of the instruction to be optimized.

[0089] Step 1052b: Write the source operand and the destination operand into a preset move instruction template to obtain the specified instruction.

[0090] In this embodiment of the invention, a move instruction template can be set based on a specified format defined for the MOVE instruction in a preset architecture. This move instruction template follows the specified format defined for the MOVE instruction in the preset architecture. For example, the move instruction template can be: the opcode of the MOVE instruction, a source register, and a destination register.

[0091] The bit fields representing the source operand in the instruction to be optimized can be extracted to obtain the source operand. The bit fields representing the destination operand in the instruction to be optimized can be extracted to obtain the destination operand. Both the extracted source and destination operands are essentially register numbers. The extracted source operand is then written into the bit fields representing the source operand in the move instruction template, and the extracted destination operand is written into the bit fields representing the destination operand in the move instruction template, resulting in a MOVE instruction. This MOVE instruction is the specified instruction mentioned above, i.e., the simplified instruction to be optimized.

[0092] In this embodiment of the invention, the actual number of bits in the registers is the same for both the source operand and the destination operand of the register type. In practical applications, after one expansion, the bit width of the resulting data is the same as the actual number of bits in the register; that is, sign expansion will expand the data to the same width as the register. For example, the actual number of bits in the registers can both be 64 bits or both be 32 bits. Taking a register with an actual number of 64 bits as an example, assuming an 8-bit signed number is to be expanded to a 16-bit signed number, the effective data in the source register is the lower 8 bits, and the effective data in the destination register is the lower 16 bits. After expansion, the higher 56 bits in the destination register can all be sign bits.

[0093] For example, assuming the register width is 64 bits, the source instructions corresponding to the instruction to be optimized include: source instruction 1 and source instruction 2. Source instruction 1's sign extension mode is from 8-bit to 16-bit. Source instruction 2's sign extension mode is from 32-bit to 64-bit. When executing source instruction 1, the lower 16 bits of the source register of the instruction to be optimized are valid data. In this case, bits 8 to 64 of the source register of the instruction to be optimized are all sign bits. When executing source instruction 2, all bits of the source register of the instruction to be optimized are valid data. Bits 32 to 64 of the source register of the instruction to be optimized are all sign bits. In this example, the first bit is 32, and for both source instruction 1 and source instruction 2, the lower bits starting from bit 32 include the complete unextended data.

[0094] When extending a 16-bit sign pattern to a 64-bit pattern, the values ​​at least the 16th bit are all sign bit values. Therefore, the values ​​starting from the 32nd bit and upwards, i.e., the values ​​at least the 32nd bit, are also sign bit values. Thus, this can also be considered as extending a 32-bit sign pattern to a 64-bit pattern.

[0095] Furthermore, if the first digit is less than or equal to the second digit, it means that the unextended data truncated from the source register will necessarily include the sign bit of the value currently stored in the source register; that is, the truncated value is the complete value. In this case, after executing the instruction to be optimized for sign extension, the value obtained in the destination register will not change, and the length of the data obtained in the destination register will be the same as the actual number of bits in the register. Subsequent instructions using this destination register as the source register can truncate data of the corresponding length from the destination register according to the data type of the source operand. Therefore, the instruction to be optimized can be converted into a MOVE instruction. By executing the MOVE instruction, the value obtained in the destination register will be the same size as the value in the source register and will not change. Moreover, in some instruction set architectures, when the MOVE instruction is executed, it will shift the valid data and also shift the other bits in the source register (excluding the valid data) to the destination register accordingly. In this way, the data obtained in the destination register will also be the same as the actual number of bits in the register. In some instruction set architectures, when the MOVE instruction is executed, it will set all bits in the destination register (excluding the valid data) to 0 by default. In this way, the data obtained in the destination register will also be the same as the actual number of bits in the register, achieving the same execution effect. Therefore, in this embodiment of the invention, converting the instruction to be optimized into a MOVE instruction can achieve the same instruction execution effect and ensure that the program can run normally.

[0096] In this embodiment of the invention, during the compilation process of the program's source code, the sign extension instructions in the IR instructions are simplified into the less complex MOVE instructions, reducing the number of sign extension instructions. Furthermore, since MOVE instructions are more likely to be eliminated by compiler optimization—for example, if a MOVE instruction moves a value from register a to register b, the compiler can modify the subsequently used register b to register a during optimization, thereby eliminating the MOVE instruction—the number of instructions in the final generated assembly code can be reduced to a certain extent, thus improving program performance.

[0097] Optionally, the step of treating the symbol extension instructions in the code to be optimized as the instructions to be optimized may specifically include:

[0098] Step 1011: For any function in the code to be optimized, traverse the instructions in the function.

[0099] Step 1013: If the instruction being traversed is a sign-extended instruction, then the instruction is identified as the instruction to be optimized.

[0100] Accordingly, the embodiments of the present invention also include the following steps:

[0101] Step S41: If the currently traversed instruction is not a sign extension instruction, the first bit is greater than the second bit, or there is a source instruction that does not have sign extension behavior, the next instruction will be traversed.

[0102] Step S42: After completing the traversal of all instructions in the function, begin traversing the instructions in the next function.

[0103] In this embodiment of the invention, functions can be used as processing units. The instructions within a function are traversed, and after traversing one function, the traversal continues to the next function until all functions of the code to be optimized have been traversed, at which point the entire instruction optimization process ends. For any function, the instructions within that function are traversed. If the currently traversed instruction is a sign-extended instruction, it is identified as the instruction to be optimized to determine if it can be simplified. If it is not a sign-extended instruction, the traversal of the next instruction begins directly. This traversal search avoids omissions.

[0104] Furthermore, for the instruction to be optimized, if the first digit is greater than the second digit, it indicates that the unextended data truncated from the source register may not contain the sign bit of the value currently stored in the source register; that is, the truncated value is not complete. In this case, after the instruction to be optimized performs sign extension again, the value obtained in the destination register may change compared to the original value in the source register. Therefore, in this situation, the sign extension instruction can be retained, and the iteration over the next instruction can begin.

[0105] Furthermore, if the source instructions of the instruction to be optimized contain source instructions that do not exhibit sign extension, then the instruction to be optimized can be considered unsuitable for simplification, as simplification might lead to program errors. Therefore, in this case, the sign extension instruction can be retained, and the iteration over the next instruction can begin.

[0106] Figure 2 This is a schematic diagram of a processing flow provided by an embodiment of the present invention, such as... Figure 2 As shown, for any function, after starting the traversal, it can be determined whether the currently traversed instruction is a sign-extended instruction. If so, this instruction is treated as the instruction to be optimized, and its source instruction is located. It is then determined whether all source instructions of the instruction to be optimized exhibit sign-extended behavior. If so, the maximum value among the number of bits of data before extension for each source instruction is determined as the first bit, and the number of bits of data before extension for the instruction to be optimized is determined as the second bit. It is then determined whether the first bit is less than or equal to the second bit. If so, the instruction to be optimized is converted to a MOVE instruction. If not, it is determined whether there are any untraversed instructions. If none exist, the process ends. If they exist, the traversal of the next instruction begins. In this way, by simplifying sign-extended instructions, program performance can be improved.

[0107] It should be noted that the preset architecture supported by this electronic device meets preset conditions, which may include: support for symbol extension instructions. This avoids unnecessary instruction optimization when the intermediate code generated by the compiler does not contain symbol extension instructions. In this embodiment of the invention, the instruction optimization method can be targeted at the compiler optimization domain, and the implementation code of the instruction optimization method can be integrated into the compiler to optimize the compiler. The optimized compiler can execute the instruction optimization method, detecting and simplifying symbol extension instructions in the code to be optimized during the compilation stage, thereby optimizing the intermediate code and improving subsequent code execution performance and efficiency.

[0108] Reference Figure 3 The diagram illustrates a block diagram of an instruction optimization apparatus provided in an embodiment of the present invention, such as... Figure 3 As shown, the instruction optimization device may specifically include:

[0109] The first processing module 201 is used to treat the symbol extension instructions in the code to be optimized as instructions to be optimized.

[0110] The acquisition module 202 is used to acquire the data dependency chain corresponding to the function to which the instruction to be optimized belongs, as the target dependency chain; the data dependency chain is used to define the instructions in the function to which each variable has a data dependency.

[0111] The lookup module 203 is used to find the source instruction corresponding to the source operand of the instruction to be optimized from the target dependency chain, and use it as the source instruction of the instruction to be optimized.

[0112] The determining module 204 is used to determine the number of bits of data before expansion for each of the source instructions of the instruction to be optimized, and to determine the number of bits of data before expansion for the instruction to be optimized, when all the source instructions of the instruction to be optimized have sign extension behavior.

[0113] The second processing module 205 is used to simplify the instruction to be optimized based on the number of bits of data before expansion corresponding to each of the source instructions and the number of bits of data before expansion corresponding to the instruction to be optimized.

[0114] Optionally, the acquisition module 202 is specifically used for:

[0115] For each variable in the function to which the instruction to be optimized belongs, the instruction that uses each variable will be used as the variable usage position of each variable, and the instruction that assigns a value to each variable will be used as the variable definition position of each variable;

[0116] The target dependency chain is obtained by associating the variable definition location and the variable usage location of each variable;

[0117] The search module 203 is specifically used for:

[0118] For any instruction to be optimized, the source register of the instruction to be optimized is compared with each variable stored in the target dependency chain; the variable definition position corresponding to the variable that matches the source register is determined as the source instruction.

[0119] Optionally, the second processing module 205 is specifically used for:

[0120] The maximum value among the number of bits of data before expansion corresponding to each of the aforementioned source instructions is determined as the first bit;

[0121] The number of bits of data before expansion corresponding to the instruction to be optimized is taken as the second bit. If the first bit is less than or equal to the second bit, the instruction to be optimized is converted into a specified instruction. The complexity of the specified instruction is lower than that of the sign-extended instruction.

[0122] Optionally, the specified instruction is a movement instruction, and the second processing module 205 is further configured to:

[0123] Obtain the source operands and destination operands of the instruction to be optimized;

[0124] The source operand and the destination operand are written into a preset movement instruction template to obtain the specified instruction.

[0125] Optionally, the first processing module 201 is specifically used for:

[0126] For any function in the code to be optimized, traverse the instructions in the function;

[0127] If the instruction being traversed is a sign-extended instruction, then the instruction is identified as the instruction to be optimized.

[0128] The device further includes: a third processing module, configured to start traversing the next instruction if the currently traversed instruction is not a sign-extended instruction, the first bit is greater than the second bit, or there is a source instruction that does not have sign-extended behavior;

[0129] The fourth processing module is used to begin iterating over the instructions in the next function after completing the traversal of all instructions in the function.

[0130] Optionally, the determining module 204 is specifically used for:

[0131] The source instructions corresponding to the instruction to be optimized are traversed;

[0132] Obtain the functional description information of the source instruction currently being traversed; the functional description information is used to characterize the size of the data expanded by the source instruction;

[0133] Based on the functional description information, determine the number of bits of data before expansion corresponding to the source instruction.

[0134] Optionally, the determining module 204 is specifically used for:

[0135] Detect the data type of the source operands of the instruction to be optimized;

[0136] The number of data bits represented by the data type is determined as the number of data bits before expansion corresponding to the instruction to be optimized.

[0137] In summary, the instruction optimization apparatus provided in this embodiment of the invention uses the sign-extended instructions in the code to be optimized as the instructions to be optimized. The data dependency chain corresponding to the function to which the instruction to be optimized belongs is obtained as the target dependency chain; the data dependency chain is used to define instructions in the function where variables have data dependencies. From the target dependency chain, the source instructions corresponding to the source operands of the instruction to be optimized are found and used as the source instructions of the instruction to be optimized. When all source instructions of the instruction to be optimized exhibit sign-extended behavior, the number of bits of data before extension for each source instruction is determined, and the number of bits of data before extension for the instruction to be optimized is also determined. Based on the number of bits of data before extension for each source instruction and the number of bits of data before extension for the instruction to be optimized, the instruction to be optimized is simplified. Thus, by automatically simplifying the sign extension in the code to be optimized, the generated sign-extended instructions are optimized, which can reduce the number of sign-extended instructions in the code to a certain extent, thereby improving program performance.

[0138] Reference Figure 4 This is a schematic diagram of the structure of the electronic device provided in an embodiment of the present invention. For example... Figure 4 As shown, the electronic device includes: a processor, a memory, a communication interface, and a communication bus.

[0139] The processor, the memory, and the communication interface communicate with each other via the communication bus; the memory stores at least one executable instruction, which causes the processor to execute the instruction optimization method of the aforementioned embodiments. The executable instructions can form a program.

[0140] This invention provides a machine-readable medium storing instructions that, when executed by one or more processors, enable the processors to perform the instruction optimization method described in the foregoing embodiments. The machine-readable medium may be one or more processors.

[0141] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0142] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0143] It should be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.

[0144] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0145] These computer program instructions may also be stored in a computer-readable storage medium capable of directing a computer or other programmable data processing terminal device to operate in a predictive manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0146] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0147] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0148] Finally, it should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0149] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0150] The foregoing has provided a detailed description of an instruction optimization method, an instruction optimization device, an electronic device, and a readable medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. An instruction optimization method, characterized in that, The method includes: The symbol expansion instructions in the code to be optimized are treated as instructions to be optimized. Obtain the data dependency chain corresponding to the function to which the instruction to be optimized belongs, and use it as the target dependency chain; the data dependency chain is used to define the instructions in the function to which each variable has a data dependency. From the target dependency chain, find the source instruction corresponding to the source operand of the instruction to be optimized, and use it as the source instruction of the instruction to be optimized; When all source instructions of the instruction to be optimized have sign extension behavior, determine the number of bits of data before extension for each source instruction, and determine the number of bits of data before extension for the instruction to be optimized. The instruction to be optimized is simplified based on the number of bits of data before expansion corresponding to each of the source instructions and the number of bits of data before expansion corresponding to the instruction to be optimized.

2. The method according to claim 1, characterized in that, The step of obtaining the data dependency chain corresponding to the function to which the instruction to be optimized belongs, as the target dependency chain, includes: For each variable in the function to which the instruction to be optimized belongs, the instruction that uses each variable will be used as the variable usage position of each variable, and the instruction that assigns a value to each variable will be used as the variable definition position of each variable; The target dependency chain is obtained by associating the variable definition location and the variable usage location of each variable; The step of finding the source instruction corresponding to the source operand of the instruction to be optimized from the target dependency chain and using it as the source instruction of the instruction to be optimized includes: for any instruction to be optimized, comparing the source register of the instruction to be optimized with each variable stored in the target dependency chain; and determining the variable definition position corresponding to the variable that matches the source register as the source instruction.

3. The method according to claim 1, characterized in that, The simplification of the instruction to be optimized based on the number of bits of data before expansion corresponding to each of the source instructions and the number of bits of data before expansion corresponding to the instruction to be optimized includes: The maximum value among the number of bits of data before expansion corresponding to each of the aforementioned source instructions is determined as the first bit; The number of bits of data before expansion corresponding to the instruction to be optimized is taken as the second bit. If the first bit is less than or equal to the second bit, the instruction to be optimized is converted into a specified instruction. The complexity of the specified instruction is lower than that of the sign-extended instruction.

4. The method according to claim 3, characterized in that, The specified instruction is a movement instruction, and the step of converting the instruction to be optimized into the specified instruction includes: Obtain the source operands and destination operands of the instruction to be optimized; The source operand and the destination operand are written into a preset movement instruction template to obtain the specified instruction.

5. The method according to claim 3, characterized in that, The step of treating the symbol extension instructions in the code to be optimized as the instructions to be optimized includes: For any function in the code to be optimized, traverse the instructions in the function; If the instruction being traversed is a sign-extended instruction, then the instruction is identified as the instruction to be optimized. The method further includes: if the currently traversed instruction is not a sign-extended instruction, the first bit is greater than the second bit, or there is a source instruction that does not have sign-extended behavior, then the next instruction will be traversed. After completing the traversal of all instructions in the function, the traversal of instructions in the next function begins.

6. The method according to claim 1, characterized in that, Determining the number of bits of data before expansion corresponding to each of the aforementioned source instructions includes: The source instructions corresponding to the instruction to be optimized are traversed; Obtain the functional description information of the source instruction currently being traversed; the functional description information is used to characterize the size of the data expanded by the source instruction; Based on the functional description information, determine the number of bits of data before expansion corresponding to the source instruction.

7. The method according to claim 3, characterized in that, Determining the number of bits of data before expansion corresponding to the instruction to be optimized includes: Detect the data type of the source operands of the instruction to be optimized; The number of data bits represented by the data type is determined as the number of data bits before expansion corresponding to the instruction to be optimized.

8. An instruction optimization apparatus, characterized in that, The device includes: The first processing module is used to treat the symbol expansion instructions in the code to be optimized as instructions to be optimized. The acquisition module is used to acquire the data dependency chain corresponding to the function to which the instruction to be optimized belongs, as the target dependency chain; the data dependency chain is used to define the instructions in the function to which each variable has a data dependency. The lookup module is used to find the source instruction corresponding to the source operand of the instruction to be optimized from the target dependency chain, and use it as the source instruction of the instruction to be optimized. The determination module is used to determine the number of bits of data before expansion for each of the source instructions of the instruction to be optimized, and to determine the number of bits of data before expansion for the instruction to be optimized, when all the source instructions of the instruction to be optimized have sign expansion behavior. The second processing module is used to simplify the instruction to be optimized based on the number of bits of data before expansion corresponding to each of the source instructions and the number of bits of data before expansion corresponding to the instruction to be optimized.

9. An electronic device, characterized in that, include: The processor, memory, communication interface, and communication bus are provided, wherein the processor, memory, and communication interface communicate with each other via the communication bus. The memory is used to store executable instructions that cause the processor to perform the method as described in any one of claims 1 to 7.

10. A machine-readable medium, characterized in that, It stores instructions that, when executed by one or more processors, cause the processors to perform the method as described in any one of claims 1 to 7.

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