An application compatibility dynamic adaptation method and system across CPU architectures of different manufacturers

Abstract

The application relates to a cross-production CPU architecture application compatibility dynamic adaptation method and system, which comprises the following steps: S1: acquiring a unified portrait object; S2: based on the unified portrait object, using a strategy learning model to generate an adaptation plan; S3: in the intermediate representation stage, the system preferentially loads an IR (Intermediate Representation) of an application; if not, a binary promotion tool chain is used to recover a control flow and a data flow from a native instruction set, to generate a verifiable IR, and a code large model is introduced to generate a multi-version candidate IR segment, and finally a verified IR package is formed; S4: combining a vector width, an execution port and a cache parameter of a target processor, an optimal compilation configuration is obtained through a limited search; and S5: according to the optimal compilation configuration, a compilation construction drawing is provided for final code generation and adaptation implementation, hot and cold paths are dynamically distinguished, and a compilation mode most suitable for the two is adopted. The application effectively improves the application compatibility dynamic adaptation efficiency and reliability.

Description

Technical Field

[0001] This invention relates to the field of compatibility adaptation, and in particular to a method and system for dynamic application compatibility adaptation of multinational CPU architectures. Background Technology

[0002] With the rapid development of domestic CPU technology, domestic processor architectures, represented by Loongson Arch, Phytium ARM, Zhaoxin x86, and Hygon x86, have gradually formed a diversified landscape. However, the existing software ecosystem is mainly developed and optimized for Intel x86 and ARM architectures, resulting in serious compatibility issues between applications across different CPU architectures. Traditional solutions include static recompilation, binary translation, and virtualization technology, but these methods all have significant drawbacks: static recompilation requires source code and is costly; binary translation suffers from severe performance loss; and virtualization technology incurs huge resource overhead. More importantly, these traditional methods lack intelligent adaptive capabilities, cannot dynamically optimize compatibility strategies based on different operating environments and application characteristics, and cannot learn from historical experience to continuously improve. Summary of the Invention

[0003] To address the aforementioned issues, the present invention aims to provide a method and system for dynamic adaptation of application compatibility with multinational CPU architectures, effectively improving the efficiency and reliability of dynamic adaptation of application compatibility.

[0004] To achieve the above objectives, the present invention adopts the following technical solution:

[0005] A method for dynamic application compatibility adaptation of cross-border CPU architectures includes the following steps:

[0006] S1: Obtain the application package AppPkg to be run, the runtime environment Env, and the unified profile object Profile;

[0007] S2: Based on the unified profile object, the policy learning model is used to generate an adaptation plan from the profile.

[0008] S3: Based on the adaptation plan, during the intermediate representation construction phase, the system prioritizes loading the application's built-in IR; if not, it uses a binary lifting toolchain to restore control and data flow from the native instruction set, generates a verifiable IR, and introduces a large code model to generate multiple versions of candidate IR fragments, ultimately forming a verified IR package;

[0009] S4: Extract features from the verified IR packets, and combine them with the target processor's vector width, execution port, and cache parameters to obtain the optimal compilation configuration through a constrained search;

[0010] S5: Based on the optimal compilation configuration, it provides a compilation roadmap for the final code generation and adaptation implementation, dynamically distinguishes between hot and cold paths, and adopts the compilation method most suitable for both.

[0011] Furthermore, obtain the application package (AppPkg) to be run, the runtime environment (Env), and the unified profile object (Profile), as detailed below:

[0012] First, it receives the application package AppPkg to be run, including the native binary executable file, intermediate representation code, and container image; at the same time, it obtains detailed information about the runtime environment Env, including CPU hardware characteristics, operating system characteristics, and container characteristics.

[0013] After obtaining the basic data, the deep feature extraction stage is entered, which not only collects static configuration parameters, but also obtains micro-architectural characteristics through dynamic detection.

[0014] Finally, the multi-dimensional feature data is merged into a unified profile object.

[0015] Furthermore, the policy learning model adopts a multi-level hybrid decision architecture based on deep Q-networks, integrating reinforcement learning, Bayesian inference, and constraint optimization, and combining dual deep Q-networks and duel network structures to handle high-dimensional state spaces and complex action spaces.

[0016] Furthermore, the policy learning model is as follows:

[0017] The state representation St is defined as the vectorized encoding of the Profile object:

[0018] St=[shw,sos,sapp,shist]

[0019] Where shw represents the hardware feature vector, including CPU architecture encoding, instruction set support bitmask, and cache hierarchy parameters; sos represents the operating system feature vector, including kernel version, system call support, and ABI specification; sapp represents the application feature vector, including code complexity, memory access pattern, and computational intensity; and shist represents the historical experience vector, obtained through similarity retrieval.

[0020] State preprocessing employs a hierarchical encoding strategy; firstly, local normalization is performed on each subdomain, and then information from different domains is fused through an attention mechanism.

[0021] ;

[0022] Where Q is the query matrix; K is the key matrix; V is the value matrix; dk is the dimension of the key; softmax is the normalization function; and the superscript T indicates transpose.

[0023] The state encoder fnc adopts a Transformer architecture, which can capture long-distance dependencies between features. It also integrates an uncertainty estimation module and uses Monte Carlo Dropout technology to quantify the uncertainty of prediction.

[0024] ;

[0025] in, This represents the prediction result of the t-th dropout sample, where μ(s) is the average predicted value and T is the number of dropout samples. The variance of the model's predicted values ​​for input s;

[0026] Action space A is modeled as a hierarchical composite action space containing six main decision dimensions: IR construction strategy a ir Compiler optimization strategy a comp System call adaptation strategy a sys Instruction translation strategy a inst Runtime configuration strategy a rt Monitoring strategy a mon The complete action is represented as:

[0027] ;

[0028] Each sub-action space employs a hybrid discrete-continuous representation;

[0029] The policy network πθ(a|s) adopts an Actor-Critic architecture, where the Actor network is responsible for action generation and the Critic network is responsible for value evaluation. The Actor network uses a hierarchical decoder structure.

[0030] ;

[0031] Where, π θ (a|s) is the global policy function; a=(a (1) ,...,a (i) ,...,a (6) () indicates a compound action, consisting of 6 sub-decisions; Given the policy of the i-th sub-action, output the distribution of the i-th action given all previous actions and states s;

[0032] Each sub-policy network employs a hybrid output layer, handling both discrete and continuous actions simultaneously:

[0033] ;

[0034] in, represents the output distribution of sub-action i; ⊙ represents the Hadamard product, used to fuse discrete and continuous parameters; tanh represents the normalized output of the continuous parameters; W d ,b d These represent the weights and biases of the discrete decision branches, respectively; W c ,b c , respectively, represent the weights and biases of the continuous decision branches; h(i) represents the intermediate hidden state of sub-action i;

[0035] The Critic network employs a duel network architecture to estimate the state value V(s) and action advantage A(s,a) respectively:

[0036] ;

[0037] Where Q(s,a) represents the overall value assessment of taking action a from state s; V(s) is the value function determined solely by state ss, representing the average effect of irrelevant actions in state s; A(s,a) is the dominance function; |A| is the size of the action space; This represents the summation of the advantage function over all optional actions, used for normalization to eliminate ambiguity.

[0038] Furthermore, the multi-objective reward function used in the policy learning model is defined as:

[0039] To minimize expected risk and compilation / runtime overhead, and maximize performance and compatibility, a multi-objective reward function R(s,a) is defined:

[0040] ;

[0041] Where Perf(s,a) represents the performance gain; Cost(s,a) represents the compilation time, memory overhead, and monitoring instrumentation overhead; Risk(s,a) represents the rollback probability; and α, β, and γ are weighting coefficients.

[0042] Penalty SLO As a hard constraint:

[0043] ;

[0044] Where k is the index of different Service Level Objectives (SLO) metrics; η k The penalty weight coefficient for the k-th SLO indicator; Let be the predicted value of the k-th performance index after taking action a in state s; This represents the maximum allowed value for the k-th SLO indicator; max(0,...) indicates that a penalty is only applied after exceeding the constraint, otherwise it is 0.

[0045] Final multi-objective reward function :

[0046] ;

[0047] To handle multi-objective optimization, the system employs the Pareto front approximation method, maintaining a set of non-dominated solutions Pareto(S):

[0048] ;

[0049] in This indicates that s′ is not inferior to s on all objectives and is strictly superior to s on at least one objective; S is the candidate solution set;

[0050] The decision fusion mechanism combines reinforcement learning strategies and rule-based expert systems, where the rule system R = {r1, r2, ..., r...} i ′...,r n Coding domain expert knowledge:

[0051] ;

[0052] in As a prerequisite, ψ i ′(a) represents the recommended action constraint, c i ′∈[0,1] represents the confidence level;

[0053] The final strategy is generated through weighted fusion:

[0054] ;

[0055] Where, π final (a|s) The final strategy distribution used for decision-making; π RL (a|s) represents the policy distribution obtained by the agent through reinforcement learning; π rule (a|s) represents the policy distribution inferred from the rule system; λ is the weight parameter.

[0056] Policy optimization employs the PPO algorithm, combined with empirical replay and priority sampling:

[0057] ;

[0058] Among them, L PPO (θ) is the loss function of PPO; r t (θ) represents the ratio of the current strategy to the old strategy; The dominant function; To truncate the policy ratio and prevent excessive policy changes; This is a preset constant; Let be the expectation over all time steps t;

[0059] The final adaptation plan is in structured YAML format.

[0060] Furthermore, during the intermediate representation construction phase, the system prioritizes loading the application's built-in IR; if not, it utilizes a binary lifting toolchain to restore control flow and data flow from the native instruction set, generating a verifiable IR. Specifically, based on the adaptation plan, the system first performs source adjudication upon entering the intermediate representation phase. If AppPkg has its own IR, it loads it first and completes integrity verification; if no built-in IR is provided, binary lifting is performed from the native instruction set according to the lifting strategy and target ABI specified in the plan: instructions are converted into semantically equivalent intermediate operations through the architecture semantic library, control flow graphs and data flow are restored, and global state and thread-local storage are explicitly parameterized, ultimately obtaining a structurally complete basic IR.

[0061] Furthermore, a large code model is introduced to generate multiple versions of candidate IR fragments, ultimately forming a validated IR package, as follows:

[0062] Run a gap detector on the basic IR to locate four types of high-risk points, including uncertain calling conventions, alignment and overflow risks, memory aliases and escape ambiguity, and platform-specific calls;

[0063] For each gap, a completion request package with context is constructed and handed over to the code big model to generate multiple versions of candidate IR fragments, along with model confidence and hypothesis descriptions;

[0064] Then, multi-layer constraint verification is performed, which involves stack frame alignment based on the target ABI verification form; alignment assertions or backoff paths are inserted for vector memory access; range analysis and symbolic execution verification annotations are used; and TBAA and pointer analysis are used to shrink the alias set.

[0065] Equivalence checks are performed on native binary and completed IRs through symbolic execution, abstract interpretation, and differential testing; numerical error constraints are imposed on paths involving floating points, and those that do not meet the constraints are automatically downgraded or switched to a conservative implementation; the verified fragments are integrated into module-level IRs, the dominator tree and the circular forest are reconstructed, and a verifiable IRBundle is produced.

[0066] Furthermore, features are extracted from the validated IR packets, and combined with the target processor's vector width, execution port, and cache parameters, the optimal compilation configuration is obtained through a constrained search, as follows:

[0067] Read modules / functions from validated IR packages and construct a program graph with basic blocks as nodes and control and data dependencies as edges. Extract key compilation features for each node and loop structure;

[0068] By fusing program characteristics with target processor profiles, a searchable but constrained configuration space is formed;

[0069] Perform a constrained search of model guidance and rule pruning on the feasible set to obtain the optimal compilation configuration.

[0070] Furthermore, a constrained search involving model guidance and rule pruning is performed on the feasible set to obtain the optimal compilation configuration, specifically as follows: A hierarchical strategy is adopted, firstly, the optimization level and vectorization strategy are globally selected, then the hot spot cyclic search is performed on the pass order and register allocation preference, and heuristic pruning is combined to perform pruning operations; for each candidate, its throughput and risk indicators are evaluated, and the Top-K are retained for lightweight trial compilation and micro-benchmark measurement to form a closed-loop calibration. If the observation violates the constraints, it automatically falls back to the suboptimal safe solution; finally, the optimal compilation configuration list is output.

[0071] A dynamic adaptation system for application compatibility of multinational CPU architectures includes a processor, a memory, and a computer program stored in the memory. When the processor executes the computer program, it specifically performs the steps in the dynamic adaptation method for application compatibility of multinational CPU architectures as described above.

[0072] The present invention has the following beneficial effects:

[0073] 1. This invention uses a unified profile and policy learning model to meticulously capture details of each layer of the application and runtime environment, achieving end-to-end fully automated analysis and adaptation planning. In the IR generation stage, it prioritizes the protection of native semantics. Through verifiable IR packages and multi-version candidate generation, combined with AI completion and multi-layer equivalence verification, it effectively solves the compatibility problems caused by binary-level semantic gaps and architectural differences. Relying on dynamic feature detection, strict type / call constraints and constraint reasoning, it can prevent hidden ABI violations, platform call mismatches, numerical error drift and other risks, maximizing the running security and semantic consistency of the original program on heterogeneous CPU platforms.

[0074] 2. Based on the extraction of key program features and deep perception of hardware profiles, this invention can dynamically adapt to the instruction assignment, port / cache resources, concurrency capabilities and register hierarchy of different CPUs, avoiding performance bottlenecks caused by manual configuration. Combined with hot / cold path division, the hot zone adopts a high-order JIT and high-performance compilation strategy, while the cold zone prioritizes compilation latency and resource saving, achieving an organic unity of high concurrency load, short startup time and peak performance, and fully releasing the best computing performance of heterogeneous hardware. Attached Figure Description

[0075] Figure 1 This is a flowchart of the method of the present invention. Detailed Implementation

[0076] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:

[0077] refer to Figure 1 In this embodiment, a method for dynamic adaptation of application compatibility across domestic and international CPU architectures is provided, including the following steps:

[0078] S1: Obtain the application package AppPkg to be run (including local binary / IR / bytecode / container image), the runtime environment Env (CPU, OS, container / virtualization layer), and obtain the unified profile object Profile;

[0079] S2: Based on the unified profile object, the policy learning model is used to generate an adaptation plan from the profile.

[0080] S3: Based on the adaptation plan, during the intermediate representation construction phase, the system prioritizes loading the application's built-in IR; if not, it uses a binary lifting toolchain to restore control and data flow from the native instruction set, generating a verifiable IR. To address the unrecoverable semantic gaps in decompilation, a large code model is introduced to generate multiple versions of candidate IR fragments. Constraint checks and equivalence checks are performed on calling conventions, alignment, overflow, and memory alias relationships, ultimately forming a verified IR package, including the original fragment, AI completion, and verification report.

[0081] S4: Extract basic block graphs, loop nesting depths, memory access strides and reuse distances, branch entropy, and vectorization reachability features from verified IR packets. Combine these features with the target processor's vector width, execution ports, and cache parameters to obtain the optimal compilation configuration through constrained search. This includes optimization level, pass order, vectorization strategy, register allocation preferences, and linking optimization options. Confidence and expected benefits are then provided.

[0082] S5: Based on the optimal compilation configuration, it provides a compilation roadmap for the final code generation and adaptation implementation, dynamically distinguishes between hot and cold paths and adopts the compilation method most suitable for both (using optimized JIT-driven recompilation for predicted hotspots and baseline AOT for cold paths).

[0083] In this embodiment, the application package AppPkg to be run, the runtime environment Env, and the unified profile object Profile are obtained, as follows:

[0084] First, the system receives the application package AppPkg to be run, including native binary executable files (ELF, PE, Mach-O format), intermediate representation code (LLVM IR, Java bytecode, .NET IL), and container images (Docker, OCI format). For each input format, the system uses a dedicated parser for preliminary processing. The binary file parser uses tools such as binutils, objdump, and readelf to extract metadata such as segment information, symbol tables, dependency library lists, and relocation records; the bytecode parser uses tools such as javap and ildasm to analyze class structure, method signatures, and constant pool information; the container image parser uses tools such as skopeo and crane to extract image layers, base image information, runtime configuration, etc.

[0085] At the same time, obtain detailed information about the runtime environment (Env), including CPU hardware characteristics (obtain architecture type, instruction set extensions, cache configuration, and NUMA topology through / proc / cpuinfo, CPUID command, and lscpu command), operating system characteristics (obtain kernel version, distribution information, and glibc version through uname, lsb_release, and / etc / os-release), and container characteristics (detect container runtime, virtualization type, and resource limit configuration through docker info and systemd-detect-virt).

[0086] After obtaining the basic data, the deep feature extraction stage begins. This stage not only collects static configuration parameters but also dynamically probes to obtain micro-architectural characteristics: Key metrics such as instruction throughput, cache hit rate, and branch prediction accuracy are measured using performance counters (perf, Intel VTune, ARM Streamline); the actual performance characteristics, memory bandwidth, and latency characteristics of SIMD instructions are probed using micro-benchmark programs; the impact patterns of NUMA topology on memory access performance are analyzed; and more complex static analysis is required for application feature extraction: binary programs are disassembled using reverse engineering tools such as Ghidra, IDA Pro, and Radare2 to construct control flow graphs (CFGs) and call graphs, identifying function boundaries, loop structures, and recursion patterns; memory access patterns, data dependencies, and potential parallelization opportunities are identified through data flow analysis; architecture-related code snippets are detected, such as inline assembly, specific instruction sequences (e.g., CPUID, RDTSC), memory alignment requirements, and atomic operation usage patterns; and external dependencies are analyzed, including dynamic link libraries, system call usage, network I / O patterns, and file system access characteristics. For high-level language applications, language-specific analysis is also required: Java applications need to analyze bytecode hot methods, GC pressure, and thread models; .NET applications need to analyze the IL code type system and exception handling mechanisms; Python applications need to analyze module dependencies and C extension usage. System feature extraction focuses on the usage patterns of operating system interfaces: using tools such as strace and ltrace to trace system call sequences and identify different load characteristics such as I / O intensive, compute intensive, and memory intensive operations; analyzing inter-process communication modes (pipes, shared memory, message queues), network communication protocols, and file system access patterns; and detecting the usage of privileged operations, security-sensitive operations, and resource-intensive operations.

[0087] Finally, the multi-dimensional feature data is merged into a unified profile object.

[0088] In this embodiment, the policy learning model adopts a multi-level hybrid decision architecture based on deep Q-networks, integrating reinforcement learning, Bayesian inference, and constraint optimization, and combining dual deep Q-networks and duel network structures to handle high-dimensional state spaces and complex action spaces.

[0089] In this embodiment, the policy learning model is as follows:

[0090] The state representation St is defined as the vectorized encoding of the Profile object:

[0091] St=[shw,sos,sapp,shist]

[0092] Where shw represents the hardware feature vector, including CPU architecture encoding, instruction set support bitmask, and cache hierarchy parameters; sos represents the operating system feature vector, including kernel version, system call support, and ABI specification; sapp represents the application feature vector, including code complexity, memory access pattern, and computational intensity; and shist represents the historical experience vector, obtained through similarity retrieval.

[0093] State preprocessing employs a hierarchical encoding strategy; firstly, local normalization is performed on each subdomain, and then information from different domains is fused through an attention mechanism.

[0094] ;

[0095] Where Q is the query matrix; K is the key matrix; V is the value matrix; dk is the dimension of the key; softmax is the normalization function; and the superscript T indicates transpose.

[0096] The state encoder fnc adopts a Transformer architecture, which can capture long-distance dependencies between features. It also integrates an uncertainty estimation module and uses Monte Carlo Dropout technology to quantify the uncertainty of prediction.

[0097] ;

[0098] in, This represents the prediction result of the t-th dropout sample, where μ(s) is the average predicted value and T is the number of dropout samples. The variance of the model's predicted values ​​for input s;

[0099] Action space A is modeled as a hierarchical composite action space containing six main decision dimensions: IR construction strategy a ir Compiler optimization strategy a comp System call adaptation strategy a sys Instruction translation strategy a inst Runtime configuration strategy a rt Monitoring strategy a mon The complete action is represented as:

[0100] ;

[0101] Each sub-action space employs a hybrid discrete-continuous representation; for example, compiler optimization strategies involve discrete optimization level selection and continuous parameter configuration:

[0102] ;

[0103] Where opt_level∈{O0,O1,O2,O3,custom} This represents the normalized value of a specific optimization parameter;

[0104] The policy network πθ(a|s) adopts an Actor-Critic architecture, where the Actor network is responsible for action generation and the Critic network is responsible for value evaluation. The Actor network uses a hierarchical decoder structure.

[0105] ;

[0106] Where, π θ (a|s) is the global policy function; a=(a (1) ,...,a (i) ,...,a (6) ) indicates a compound action, which consists of 6 sub-decisions (such as IR, compiler optimization, Syscall adaptation, etc.); Given the policy of the i-th sub-action, output the distribution of the i-th action given all previous actions and states s;

[0107] Each sub-policy network employs a hybrid output layer, handling both discrete and continuous actions simultaneously:

[0108] ;

[0109] in, represents the output distribution of sub-action i; ⊙ represents the Hadamard product, used to fuse discrete and continuous parameters; tanh represents the normalized output of the continuous parameters; W d ,b d These represent the weights and biases of the discrete decision branches, respectively; W c ,b c , respectively, represent the weights and biases of the continuous decision branches; h(i) represents the intermediate hidden state of sub-action i;

[0110] The Critic network employs a duel network architecture to estimate the state value V(s) and action advantage A(s,a) respectively:

[0111] ;

[0112] Where Q(s,a) represents the overall value assessment of taking action a from state s; V(s) is the value function determined solely by state ss, representing the average effect of irrelevant actions in state s; A(s,a) is the dominance function; |A| is the size of the action space; This represents the summation of the advantage function over all optional actions, used for normalization to eliminate ambiguity.

[0113] In this embodiment, the multi-objective reward function used by the policy learning model is defined as:

[0114] To minimize expected risk and compilation / runtime overhead, and maximize performance and compatibility, a multi-objective reward function R(s,a) is defined:

[0115] ;

[0116] Where Perf(s,a) represents the performance gains (increased throughput, reduced latency, normalized to [0,1]); Cost(s,a) represents the compilation time, memory overhead, and monitoring instrumentation overhead; Risk(s,a) represents the rollback probability; and α, β, and γ are weighting coefficients.

[0117] Penalty SLO As a hard constraint:

[0118] ;

[0119] Where k is an index of different service level target SLO metrics (such as latency, memory usage, crash rate, etc.); η k The penalty weight coefficient for the k-th SLO indicator; Let be the predicted value of the k-th performance index after taking action a in state s; This represents the maximum allowed value (constraint value, upper limit) for the k-th SLO indicator; max(0,...) indicates that a penalty is only applied after exceeding the constraint, otherwise it is 0;

[0120] Final multi-objective reward function :

[0121] ;

[0122] To handle multi-objective optimization, the system employs the Pareto front approximation method, maintaining a set of non-dominated solutions Pareto(S):

[0123] ;

[0124] in This indicates that s′ is not inferior to s on all objectives and is strictly superior to s on at least one objective; S is the candidate solution set;

[0125] The decision fusion mechanism combines reinforcement learning strategies and rule-based expert systems, where the rule system R = {r1, r2, ..., r...} i ′...,r n Coding domain expert knowledge:

[0126] ;

[0127] in As a prerequisite, ψ i ′(a) represents the recommended action constraint, ci ′∈[0,1] represents the confidence level;

[0128] The final strategy is generated through weighted fusion:

[0129] ;

[0130] Where, π final (a|s) The final strategy distribution used for decision-making; π RL (a|s) represents the policy distribution obtained by the agent through reinforcement learning; π rule (a|s) represents the policy distribution inferred from the rule system; λ is the weight parameter.

[0131] Policy optimization employs the PPO algorithm, combined with empirical replay and priority sampling:

[0132] ;

[0133] Among them, L PPO (θ) is the loss function for PPO (Proximity Policy Optimization); r t (θ) represents the ratio of the current strategy to the old strategy; The advantage function measures the actual improvement effect of the action and can be estimated using methods such as GAE. To truncate the policy ratio and prevent excessive policy changes; This is a preset constant; Let be the expectation over all time steps t;

[0134] The final adaptation plan is in structured YAML format.

[0135] In this embodiment, during the intermediate representation construction phase, the system prioritizes loading the application's built-in IR; if not, it uses a binary lifting toolchain to restore the control flow and data flow from the native instruction set to generate a verifiable IR, as follows: Based on the adaptation plan, the system first performs source adjudication upon entering the intermediate representation phase. If AppPkg has its own IR (such as LLVM IR / MLIR, Java bytecode, .NET IL, etc.), it prioritizes loading it and completes integrity verification (target triple, datalayout, symbols and debugging information, instruction legality); if there is no built-in IR, binary lifting is performed from the native instruction set according to the lifting strategy and target ABI specified in the plan: instructions are converted into semantically equivalent intermediate operations through the architecture semantic library, the control flow graph (sequence, direct / indirect jumps, exception edges) and data flow (SSA pruning, liveness, reachability pruning) are restored, and the global state and thread-local storage are explicitly parameterized to finally obtain a structurally complete basic IR.

[0136] In this embodiment, a large code model is introduced to generate multiple versions of candidate IR fragments, ultimately forming a verified IR package, as detailed below:

[0137] Run a gap detector on the basic IR to locate four types of high-risk points, including uncertain calling conventions, alignment and overflow risks, memory aliases and escape ambiguity, and platform-specific calls;

[0138] For each gap, a completion request package with context (local CFG / DFG, known type and alias boundary, ABI contract, non-violation constraint) is constructed and handed over to the code big model to generate multiple versions of candidate IR fragments (conservative equivalence, vectorization ready, platform primitive simulation, numerical approximation, etc.), and model confidence and hypothesis description are attached.

[0139] Then, multi-layer constraint verification is performed, which involves stack frame alignment based on the target ABI verification form; alignment assertions or backoff paths are inserted for vector memory access; range analysis and symbolic execution verification annotations are used; and TBAA and pointer analysis are used to shrink the alias set.

[0140] Equivalence checks are performed on native binary and completed IRs through symbolic execution, abstract interpretation, and differential testing. Numerical error constraints are imposed on paths involving floating points; those that do not meet the constraints are automatically downgraded or switched to a conservative implementation. Verified fragments are integrated into module-level IRs, and the dominator tree and recurrent forest are reconstructed to produce a verifiable IRBundle: {modules, verified_fragments, fallbacks, abi_shims, constraints, proofs, provenance, debug}. A verification report (coverage, failed test cases, protection / barrier injection points, error upper bounds) and quality score / confidence are generated. This "verified IR package" serves as the sole trusted input to downstream S4, providing a stable and traceable data foundation for feature extraction and graph neural network performance prediction.

[0141] In this embodiment, features are extracted from verified IR packets, and combined with the target processor's vector width, execution port, and cache parameters, the optimal compilation configuration is obtained through a constrained search, as follows:

[0142] Read modules / functions from validated IR packages and construct a program graph with basic blocks as nodes and control and data dependencies as edges. Extract key compilation features for each node and loop structure.

[0143] By fusing program characteristics with target processor profiles, a searchable but constrained configuration space is formed;

[0144] Hardware profile: Vector width (e.g., 128 / 256 / 512-bit), SIMD instruction family, execution ports and throughput table, register file size, L1 / L2 / L3 cache capacity, bandwidth and latency, TLB size, prefetcher characteristics.

[0145] Feasible domain constraints: The search space is tailored based on ABI / security rules and hardware limitations, such as register pressure limits, port bandwidth limits, cache working set not exceeding level capacity, vector length must be a multiple of the hardware VLEN, and hot loops must satisfy no cross-iteration true dependencies and alignment repairability. This yields a feasible set of A_feasible = {compile level, pass order, vectorization strategy, RA preference, LTO options}, and static cost upper bounds (port saturation, memory access bandwidth bounds, I-cache risk) are generated as priors for each candidate configuration.

[0146] Perform a constrained search of model guidance and rule pruning on the feasible set to obtain the optimal compilation configuration.

[0147] In this embodiment, a constrained search involving model guidance and rule pruning is performed on the feasible set to obtain the optimal compilation configuration, specifically as follows: A hierarchical strategy is adopted. First, the optimization level and vectorization strategy are globally selected. Then, the pass order and register allocation preferences are searched for hot spots in a loop. Heuristic pruning is combined to perform pruning operations (e.g., reducing aggressive vectorization for paths with high branch entropy, and prioritizing cache-friendly optimization for shorter RDs). For each candidate, its throughput and risk indicators are evaluated, and the Top-K are retained for lightweight trial compilation and micro-benchmark measurement to form a closed-loop calibration. If the observation violates the constraints (register overflow, bandwidth overrun, cache jitter), it automatically falls back to the suboptimal safe solution. Finally, the optimal compilation configuration list is output, including the optimization level, pass order (e.g., mem2reg → loop-simplify → licm → slp-vectorizer → gvn → dce → machine-scheduler), vector length and mask / alignment strategy, register allocator and overflow cost weight, LTO / ThinLTO. The switch, along with confidence levels and expected benefits (increased throughput, reduced latency, and reduced code size), provides a direct blueprint for the subsequent implementation of JIT / AOT.

[0148] In this embodiment, a compilation pipeline for the target architecture is generated based on the optimal compilation configuration list. This pipeline details each key compilation parameter: optimization level (e.g., -O3), specified pass order (e.g., memory boosting, loop optimization, vectorization, dead code elimination, scheduling), vector length and type (e.g., 256-bit AVX2 or 128-bit NEON), register allocator type and parameters (e.g., overflow weight, retention rules), link-time optimization (e.g., LTO / ThinLTO), cross-file inlining, and feature switches. In addition, the pipeline also indicates platform constraints (ABI compatibility, TLS and exception handling models, system call adaptation requirements), and performance priority levels for code blocks, providing a foundation for subsequent hot / cold path compilation scheduling. The entire compilation pipeline unfolds according to this pipeline template, ensuring that all key parameters and optimization strategies can be traced, reviewed, and automatically refactored during actual implementation.

[0149] By utilizing static analysis (such as code execution count estimation, loop nesting depth, and call graph) and runtime sampling (such as real-time profiling and counting instrumentation), the system dynamically classifies functions / basic blocks into hot paths and cold paths. Hot paths typically include the main loop, frequently called core operators, and bottleneck modules; cold paths consist of infrequent code branches, initialization / cleanup logic, and exception handling. For hot paths, the system prioritizes a highly optimized JIT recompilation strategy: while ensuring parallelism / vectorization, cache friendliness, and predictive branching, it can dynamically make local extreme adjustments based on current hardware parameters (such as fine-tuning Block Fusion based on L1 size and hardware concatenating loops based on vector registers) to maximize local throughput and minimize latency. For cold paths, a baseline AOT strategy is adopted, favoring low compilation latency and small size, avoiding aggressive optimizations, and only performing compatibility and basic safety checks, thereby reducing cold start overhead and memory usage.

[0150] When the compiled output based on the construction drawings is deployed, the system automatically generates a corresponding adaptation layer and calibration mechanism. For parts such as system calls, memory access alignment, SIMD / FPU instruction usage, and incompatible platform characteristics, the adaptation layer performs parameter marshaling, return value normalization and error code compatibility, as well as instruction-level translation and constraint injection. During the deployment and operation phase, the system continuously collects statistics on the actual hits of hot / cold paths and the actual performance of the compiled output (such as sampling timing, anomaly frequency, and cache miss rate), compares the expected benefits, adaptively adjusts the hot zone compilation threshold, and feeds new trends back to upstream configuration search. "Hot zones" that do not meet the standards or deviate from the standards can automatically trigger recompilation or configuration switching, ensuring a dynamic balance between overall compatibility, peak performance, and cold start experience. The entire process forms a traceable "adaptation closed loop" with precise hot-cold path division of labor, feedback-driven, and continuous self-optimization.

[0151] In this embodiment, a dynamic adaptation system for application compatibility of multinational CPU architecture is also provided, including a processor, a memory, and a computer program stored in the memory. When the processor executes the computer program, it specifically performs the steps in the dynamic adaptation method for application compatibility of multinational CPU architecture described above.

[0152] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0153] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0154] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0155] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0156] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any other way. Any person skilled in the art may make changes or modifications to the above-disclosed technical content to create equivalent embodiments. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the protection scope of the present invention.

Claims

1. A method for dynamic application compatibility adaptation of cross-border CPU architectures, characterized in that, Includes the following steps: S1: Obtain the application package AppPkg to be run, the runtime environment Env, and the unified profile object Profile; S2: Based on the unified profile object, the policy learning model is used to generate an adaptation plan from the profile. S3: Based on the adaptation plan, during the intermediate representation construction phase, the system prioritizes loading the application's built-in IR; If not, the binary lifting toolchain is used to restore the control and data flow from the native instruction set, generate a verifiable IR, and introduce a large code model to generate multiple versions of candidate IR fragments, ultimately forming a verified IR package; S4: Extract features from the verified IR packets, and combine them with the target processor's vector width, execution port, and cache parameters to obtain the optimal compilation configuration through a constrained search; S5: Based on the optimal compilation configuration, it provides a compilation roadmap for the final code generation and adaptation implementation, dynamically distinguishes between hot and cold paths and adopts the compilation method most suitable for both; The policy learning model adopts a multi-level hybrid decision architecture based on deep Q-networks, integrating reinforcement learning, Bayesian inference and constraint optimization, and combining dual deep Q-networks and duel network structures to handle high-dimensional state spaces and complex action spaces. The process involves extracting features from verified IR packets, combining them with the target processor's vector width, execution port, and cache parameters, and then using a constrained search to obtain the optimal compilation configuration, as detailed below: Read modules / functions from verified IR packages and construct a program graph with basic blocks as nodes and control and data dependencies as edges; extract key compilation features for each node and loop structure; By fusing program characteristics with target processor profiles, a searchable but constrained configuration space is formed; Perform a constrained search of model guidance and rule pruning on the feasible set to obtain the optimal compilation configuration.

2. The application compatibility dynamic adaptation method for cross-border CPU architectures according to claim 1, characterized in that, The steps of obtaining the application package AppPkg, the runtime environment Env, and the unified profile object Profile are as follows: First, it receives the application package AppPkg to be run, including the native binary executable file, intermediate representation code, and container image; at the same time, it obtains detailed information about the runtime environment Env, including CPU hardware characteristics, operating system characteristics, and container characteristics. After obtaining the basic data, the deep feature extraction stage is entered, which not only collects static configuration parameters, but also obtains micro-architectural characteristics through dynamic detection. Finally, the multi-dimensional feature data is merged into a unified profile object.

3. The application compatibility dynamic adaptation method for cross-border CPU architectures according to claim 1, characterized in that, The policy learning model is as follows: The state representation St is defined as the vectorized encoding of the Profile object: St=[shw,sos,sapp,shist] Where shw represents the hardware feature vector, including CPU architecture encoding, instruction set support bitmask, and cache hierarchy parameters; sos represents the operating system feature vector, including kernel version, system call support, and ABI specification; sapp represents the application feature vector, including code complexity, memory access pattern, and computational intensity; and shist represents the historical experience vector, obtained through similarity retrieval. State preprocessing employs a hierarchical encoding strategy; firstly, local normalization is performed on each subdomain, and then information from different domains is fused through an attention mechanism. ； Where Q is the query matrix; K is the key matrix; V is the value matrix; d k is the dimension of the key; softmax is the normalization function; the superscript T indicates transpose; The state encoder fnc adopts a Transformer architecture, which can capture long-distance dependencies between features. It also integrates an uncertainty estimation module and uses Monte Carlo Dropout technology to quantify the uncertainty of prediction. ； in, This represents the prediction result of the t-th dropout sample, where μ(s) is the average predicted value and T is the number of dropout samples. The variance of the model's predicted values ​​for input s; Action space A is modeled as a hierarchical composite action space containing six decision dimensions: IR construction strategy a ir Compiler optimization strategy a comp System call adaptation strategy a sys Instruction translation strategy a inst Runtime configuration strategy a rt Monitoring strategy a mon The complete action is represented as: ； Each sub-action space employs a hybrid discrete-continuous representation; Policy Network π θ (a|s) adopts an Actor-Critic architecture, where the Actor network is responsible for action generation and the Critic network is responsible for value evaluation. The Actor network uses a hierarchical decoder structure. ； Where, π θ (a|s) is the global policy function; a=(a (1) ,...,a (i) ,...,a (6) () indicates a compound action, consisting of 6 sub-decisions; Given the policy of the i-th sub-action, output the distribution of the i-th action given all previous actions and states s; Each sub-policy network employs a hybrid output layer, handling both discrete and continuous actions simultaneously: ； in, represents the output distribution of sub-action i; ⊙ represents the Hadamard product, used to fuse discrete and continuous parameters; tanh represents the normalized output of the continuous parameters; W d ,b d These represent the weights and biases of the discrete decision branches, respectively; W c ,b c These represent the weights and biases of the continuous decision branches, respectively; h (i) This represents the intermediate hidden state of sub-action i; The Critic network employs a duel network architecture to estimate the state value V(s) and action advantage A(s,a) respectively: ； Where Q(s,a) represents the overall value assessment of taking action a from state s; V(s) is the value function determined solely by state ss, representing the average effect of irrelevant actions in state s; A(s,a) is the dominance function; |A| is the size of the action space; This represents the summation of the advantage function over all optional actions, used for normalization to eliminate ambiguity.

4. The application compatibility dynamic adaptation method for cross-border CPU architectures according to claim 3, characterized in that, The multi-objective reward function used in the policy learning model is defined as follows: To minimize expected risk and compilation / runtime overhead, and maximize performance and compatibility, a multi-objective reward function R(s,a) is defined: R(s,a)=α·Perf(s,a) - β·Cost(s,a) - γ·Risk(s,a); Where Perf(s,a) is the performance gain; Cost(s,a) is the compilation time, memory overhead, or monitoring instrumentation overhead; Risk(s,a) is the rollback probability; and α, β, and γ are weighting coefficients. Penalty SLO As a hard constraint: ； Where k is the index of different Service Level Objectives (SLO) metrics; η k The penalty weight coefficient for the k-th SLO indicator; Let be the predicted value of the k-th performance index after taking action a in state s; This represents the maximum allowed value for the k-th SLO indicator; max(0,...) indicates that a penalty is only applied after exceeding the constraint, otherwise it is 0. Final multi-objective reward function : ； To handle multi-objective optimization, the system employs the Pareto front approximation method, maintaining a set of non-dominated solutions Pareto(S): ； in This indicates that s′ is not inferior to s on all objectives and is strictly superior to s on at least one objective; S is the candidate solution set; The decision fusion mechanism combines reinforcement learning strategies and rule-based expert systems, where the rule system R = {r1, r2, ..., r...} i ′...,r n Coding domain expert knowledge: ; Where φ i ′(s) is a prerequisite, ψ i ′(a) represents the recommended action constraint, c i ′∈[0,1] represents the confidence level; The final strategy is generated through weighted fusion: ； Where, π final (a|s) The final strategy distribution used for decision-making; π RL (a|s) represents the policy distribution obtained by the agent through reinforcement learning; π rule (a|s) represents the policy distribution inferred from the rule system; λ is the weight parameter. Policy optimization employs the PPO algorithm, combined with empirical replay and priority sampling: ; Among them, L PPO (θ) is the loss function of PPO; r t (θ) represents the ratio of the current strategy to the old strategy; The dominant function; To truncate the policy ratio and prevent excessive policy changes; This is a preset constant; Let be the expectation over all time steps t; The final adaptation plan is in structured YAML format.

5. The application compatibility dynamic adaptation method for cross-border CPU architectures according to claim 1, characterized in that, During the intermediate representation construction phase, the system prioritizes loading the application's built-in IR. If not, it uses a binary lifting toolchain to restore the control flow and data flow from the native instruction set to generate a verifiable IR. Specifically, based on the adaptation plan, the system first performs source adjudication upon entering the intermediate representation phase. If AppPkg has its own IR, it loads it first and completes integrity verification. If no built-in IR is provided, binary lifting is performed from the native instruction set according to the lifting strategy and target ABI specified in the plan. This involves converting instructions into semantically equivalent intermediate operations using an architecture semantic library, restoring the control flow graph and data flow, explicitly parameterizing the global state and thread-local storage, and finally obtaining a structurally complete basic IR.

6. The application compatibility dynamic adaptation method for cross-border CPU architectures according to claim 5, characterized in that, The introduction of a large code model generates multiple versions of candidate IR fragments, ultimately forming a verified IR package, as detailed below: Run a gap detector on the basic IR to locate four types of high-risk points, including uncertain calling conventions, alignment and overflow risks, memory aliases and escape ambiguity, and platform-specific calls; For each gap, a completion request package with context is constructed and handed over to the code big model to generate multiple versions of candidate IR fragments, along with model confidence and hypothesis descriptions; Then, multi-layer constraint verification is performed, and stack frame alignment is performed based on the target ABI verification form. Insert alignment assertions or fallback paths for vector memory accesses; perform check annotations with range analysis and symbolic execution; shrink alias sets using TBAA and pointer analysis; Equivalence checks are performed on native binary and completed IRs through symbolic execution, abstract interpretation, and differential testing; numerical error constraints are imposed on paths involving floating points, and those that do not meet the constraints are automatically downgraded or switched to a conservative implementation; the verified fragments are integrated into module-level IRs, the dominator tree and the circular forest are reconstructed, and a verifiable IRBundle is produced.

7. The application compatibility dynamic adaptation method for cross-border CPU architectures according to claim 1, characterized in that, The process of performing a model-guided and rule-based pruning constrained search on the feasible set to obtain the optimal compilation configuration is as follows: A hierarchical strategy is adopted, firstly, the optimization level and vectorization strategy are globally selected, then the hot spot cyclic search passes the order and register allocation preferences, and heuristic pruning is combined to perform pruning operations; for each candidate, its throughput and risk indicators are evaluated, and the Top-K are retained for lightweight trial compilation and micro-benchmark measurement to form a closed-loop calibration. If the observation violates the constraints, it automatically falls back to the suboptimal safe solution; finally, the optimal compilation configuration list is output.

8. A dynamic adaptation system for application compatibility of multinational CPU architectures, characterized in that, It includes a processor, a memory, and a computer program stored in the memory. When the processor executes the computer program, it specifically performs the steps in the application compatibility dynamic adaptation method for a multinational CPU architecture as described in any one of claims 1-7.

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