FPGA-based dual-homing PON protection heartbeat monitoring system

Abstract

The application discloses a kind of dual-homing PON protection heartbeat monitoring systems based on FPGA, the monitoring system is on two OLT equipment of composition dual-homing pair, respectively configure FPGA chip, the FPGA chip is set to connect the PON MAC chip, switching chip and CPU of OLT equipment, and is configured to form heartbeat monitoring and switching interaction monitoring and processing to the OLT equipment of composition dual-homing pair.This scheme keeps and monitors heartbeat and switching interaction message between dual-homing pair by FPGA chip, perceives heartbeat state in time and accurately by fast parallel operation, and can initiate switching quickly after receiving switching request, without the intervention of CPU, increase the timeliness and accuracy of heartbeat perception, PON switching, improve the convergence speed and efficiency of dual-homing PON protection function.

Description

Technical Field

[0001] This invention relates to software system technology, specifically to dual-homed cross-device redundancy protection switching technology based on PON protection and FPGA heartbeat and interactive monitoring technology in software systems. Background Technology

[0002] Definitions:

[0003] PON: Passive Optical Network;

[0004] ONU: Passive Optical Network Terminal;

[0005] OLT: Passive Optical Network Central Office;

[0006] FPGA: Field Programmable Gate Array.

[0007] In Passive Optical Network (PON) systems, optical link protection switching mechanisms can be employed to improve network reliability and security. GPON systems can use two methods for optical link protection switching: automatic switching, triggered by fault detection such as signal loss, frame loss, or signal degradation (BER degradation to a predefined threshold); and forced switching, triggered by management events such as fiber rerouting, fiber replacement, or manual command switching.

[0008] The current PON protection function has been extended to dual-homed PON protection between OLT devices. By establishing a link through the uplink ports of two OLTs, and setting a PON protection port on each OLT, protection of the OLT device itself and the uplink link can be added on the basis of basic PON protection function to protect the optical link below the PON port.

[0009] In a typical dual-homing protection system, the OLT's CPU needs to process the heartbeat and switching interaction messages between the two devices, as well as handle the synchronization and management information of the PON protection group and other services. When there are many ONUs and the service flow is complex, the OLT's processing of heartbeat messages will be affected by the number of messages and the CPU's processing capacity, resulting in a failure to respond in a timely manner. This can lead to problems such as false switching of the PON protection group, slow switching, and ONU terminal disconnection. Summary of the Invention

[0010] To address the limitations of existing PON protection functions in OLT equipment, the present invention aims to provide an FPGA-based dual-homing PON protection heartbeat monitoring system. This system enables rapid and accurate monitoring of the heartbeat between dual-homing pairs, and provides quick convergence and response to heartbeat cessation caused by OLT faults, uplink faults, and other issues. It can also quickly respond to proactive switching interaction requests.

[0011] To achieve the above objectives, the present invention provides a dual-homing PON protection heartbeat monitoring system based on FPGA. The monitoring system configures FPGA chips on the two OLT devices that form a dual-homing pair. The FPGA chips are configured to connect the PON MAC chip, switching chip and CPU of the OLT devices and are configured to form a heartbeat monitoring and switching interactive monitoring and processing system for the OLT devices that form a dual-homing pair.

[0012] Furthermore, the FPGA chip is configured to establish a connection with the PON MAC chip in the local OLT device via GPIO pins, and to establish a connection with the CPU of the local OLT device via a bus.

[0013] Furthermore, the FPGA chip is configured to control the switching state of the PON port light emitter via GPIO pins, control the switching of the PON port operating mode via GPIO pins, and confirm the PON port light receiving status via GPIO pins.

[0014] Furthermore, the switching chip is configured to directly transmit the captured heartbeat and switchover switching messages in the dual-homing protocol to the FPGA chip for processing; the FPGA chip is configured to automatically interact with the switching chip in the local OLT device to send heartbeat and switchover interaction messages, and thereby monitor the heartbeat status and switchover interaction requests between the dual-homing pair OLT devices.

[0015] Furthermore, the FPGA chip is configured to notify the CPU in the local OLT device via the bus when it detects a change in the heartbeat status between the dual-homing pairs of OLT devices. The CPU then performs synchronization management actions for the PON protection group related to the dual-homing pairs based on the status and configuration of the local OLT device.

[0016] Furthermore, the CPU receives heartbeat status change information from the FPGA chip via the bus. The CPU records the heartbeat connection establishment and disconnection status of the dual-homing pair. When establishing a heartbeat, the CPU determines whether a PON protection group configuration already exists within the dual-homing pair. If it does, it performs initial working state negotiation and simultaneously initializes and synchronizes the PON protection group configuration and status.

[0017] Furthermore, the FPGA chip is configured to detect when the heartbeat between the two OLT devices in a dual-homing pair is interrupted;

[0018] The FPGA chip in each of the two OLT devices will first check whether the protection group port within the dual-homed pair receives light to determine the operating status of the ONU:

[0019] If no light is received, it is confirmed that the PON port of the other end is in standby working state. The FPGA chip in the local OLT device controls the GPIO pin to turn on the corresponding local PON port to emit light, and the FPGA chip switches the corresponding local PON port to the master working mode.

[0020] If light is received, the current PON port light emission and working status remain unchanged, and both OLTs adopt this working mechanism simultaneously.

[0021] Furthermore, the FPGA chip is configured to, upon detecting a switchover request from the peer OLT device within a dual-homed pair, check whether the master / standby status of the corresponding PON protection group recorded in the local chip is different from the master / standby status after the peer requests a local switchover. If the master / standby status is different, the FPGA chip changes the light emission status of the corresponding PON port to the status requested by the peer OLT through the GPIO pin, thereby changing the working state of the PON port and re-recording the master / standby status of this PON protection group in the FPGA.

[0022] Furthermore, in the case of active switching initiated through command line configuration or MIB configuration, the monitoring system sends a switching configuration request from the CPU in the local device to the local FPGA chip. The FPGA chip adjusts the local PON port's light emission and working status according to the local PON protection group status and sends a switching request to the peer OLT device.

[0023] The FPGA-based dual-homed PON protection heartbeat monitoring system provided by this invention maintains and monitors the heartbeat and switching interaction messages between dual-homed pairs through an FPGA chip. Through rapid parallel operation, it can promptly and accurately sense the heartbeat status and quickly initiate switching upon receiving a switching request without CPU intervention. This increases the timeliness and accuracy of heartbeat sensing and PON switching, and improves the convergence speed and efficiency of dual-homed PON protection function.

[0024] Furthermore, the solution provided by this invention enables OLT devices to complete heartbeat monitoring and switching interactions between dual-homed pairs through FPGA hardware. This allows for rapid detection of heartbeat status changes and switching interactions even when the OLT CPU is busy, resulting in a rapid response. This improves the convergence speed and service response speed of the PON protection group, and enhances network security and stability. Attached Figure Description

[0025] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0026] Figure 1 This is the physical topology diagram of the dual-homed PON protection group in this embodiment of the invention;

[0027] Figure 2This is a diagram of the internal FPGA logic of the OLT in an example of the present invention;

[0028] Figure 3 This is a flowchart of the dual-homing PON protection method in the implementation of this invention;

[0029] Figure 4 This is a flowchart of the heartbeat change processing using an FPGA chip in an embodiment of the present invention;

[0030] Figure 5 This is a flowchart illustrating the switching interaction process of the FPGA chip in the implementation of this invention. Detailed Implementation

[0031] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below with reference to specific illustrations.

[0032] To address the problems and limitations of dual-homed PON protection functions, this invention presents an FPGA-based dual-homed PON protection heartbeat monitoring system. This system uses FPGA chip hardware to monitor the heartbeat and switching interactions between dual-homed OLT devices, effectively enhancing the security and reliability of optical networks, thereby improving the stability and convergence speed of PON protection groups and facilitating the implementation of dual-homed PON protection functions.

[0033] Specifically, this dual-homing PON protection heartbeat monitoring system configures FPGA chips on the two OLT devices that form a dual-homing pair. The FPGA chips are configured to connect to the PON MAC chip, switching chip, and CPU of the OLT devices and are configured to perform internal heartbeat and switchover monitoring, so as to form heartbeat monitoring and switchover interactive monitoring and processing for the two OLT devices that form a dual-homing pair.

[0034] The implementation process of the FPGA-based dual-homed PON protection system provided by this invention will be described in detail below.

[0035] The dual-homing PON protection system based on FPGA proposed in this invention is specifically implemented on two OLT devices configured as a dual-homing pair.

[0036] See Figure 1 This is the physical topology diagram of the dual-homed PON protection group in this example.

[0037] Based on the diagram, when two OLT devices form a dual-homing pair, they create a dual-homing group between one OLT device and the other OLT device through the inter-OLT uplink network.

[0038] In this example, OLT devices that need to form a dual-homing pair (as shown in the figure, OLT device A and OLT device B) are equipped with corresponding FPGA chips. At the same time, the OLT devices can communicate with each other through the uplink port, and the devices are not affected by the actual distance.

[0039] Meanwhile, the downstream passive optical network terminal (ONU) is connected to a PON MAC port on a dual-homed group OLT device (such as OLT device A and OLT device B) via a 2:N splitter.

[0040] As further explanation, in practical applications, one OLT device can form multiple dual-homing pairs with other OLT devices as needed. On each dual-homing pair, multiple sets of dual-homing PON protection switching groups can be created. At the same time, an FPGA chip in each OLT device can monitor the heartbeat and switching interaction information of multiple dual-homing pairs in parallel.

[0041] Based on this, see Figure 2 The FPGA chip 10 installed in each OLT device is configured to connect to the PON MAC chip 20, switching chip 30 and CPU 40 in the OLT device, and is configured to perform internal heartbeat and switchover monitoring, so as to form heartbeat monitoring and switchover interactive monitoring and processing for OLT devices that form a dual-homing pair.

[0042] Specifically, the FPGA chip 10 is connected to the CPU 40 of the local OLT device via the local bus, connected to the switching chip of the local OLT device via an Ethernet link, and connected to the PON MAC chip 20 of the local OLT device via GPIO pins.

[0043] Among them, the PON MAC chip 20 is connected to the CPU 40 through the PCIE bus and is responsible for the normal operation of the PON port and ONU user interaction. When the main and backup working status of the PON protection group port changes or the PON port detects that the optical link port with the ONU is closed, it reports the relevant working status and optical link status change notification to the CPU 40, and the CPU 40 completes other related management of the protection group.

[0044] As an example, after the PON MAC chip 20 reports the ONU online status change notification to the CPU 40, the CPU 40 changes the local online status of the ONU and synchronizes the new adjusted online status of the ONU with the peer OLT of the dual-homed pair. After reporting the PON port primary and backup working status change notification, the CPU 40 adjusts the PON port primary and backup working status and the online status of the ONU under the PON port, and synchronizes the PON port primary and backup working status and the new ONU online status with the peer OLT of the dual-homed pair.

[0045] In conjunction with this, the CPU 40 is configured to send dual-homing pairs, PON protection group configurations, and PON protection group switching requests to the FPGA chip 10 via the bus.

[0046] Furthermore, CPU 40 is also responsible for the management of PON protection groups, including PON port and ONU terminal configuration synchronization, status synchronization, and working status negotiation of primary and backup ports.

[0047] As a further explanation, the CPU 40 can perform configuration and status synchronization in real time, and can also perform initialization synchronization after receiving a notification from the FPGA chip after the dual-homed pair establishes a heartbeat.

[0048] The switching chip 30 is configured to communicate with the peer OLT of the dual-homed pair. Specifically, it establishes a corresponding physical communication link with the peer OLT and then completes the communication with the peer OLT based on the physical communication link.

[0049] Based on this, the FPGA chip 10 is configured to forward and receive heartbeat and switchover interaction messages through the switching chip 30, and monitor the heartbeat and switchover interaction status between the dual-homed OLT devices based on the received heartbeat and switchover interaction messages. The FPGA chip 10 further notifies the CPU 40 of changes in the status of the dual-homed OLT devices via the bus.

[0050] The FPGA chip 10 can control the switching state of the PON port light emitter of the PON MAC chip through the GPIO pin, and control the switching of the working state (i.e. working mode) of the PON port of the PON MAC chip through the GPIO pin.

[0051] The FPGA chip 10 is also configured to connect to the Signal Detect pin of the PON port optical module via a GPIO pin. The Signal Detect signal is configured to indicate to the PON MAC chip that light is being received. It is active high. When the ONU is working normally online, a high-level signal will appear at the beginning of each uplink burst time slot and will decrease to a low level at the end. The FPGA simultaneously captures this signal. When the GPIO pin shows a continuous and stable level change, it indicates that the optical module has received a signal from the ONU, indicating that the PON port of the PON MAC chip is receiving light. This is how the current light reception status of the PON port of the PON MAC chip is obtained.

[0052] When the FPGA-based dual-homing PON protection system formed by the above configuration scheme is deployed and running, when dual-homing pairs and dual-homing PON protection groups are created and actively initiated for switching, the CPU 40 of the OLT device that has changed will send the configuration to the FPGA chip.

[0053] Specifically, when creating a dual-homing pair or dual-homing PON protection group on the OLT device, the configuration sent by the CPU 40 to the FPGA chip 10 includes the peer address, port number and key of the dual-homing pair, and the PON port information corresponding to the PON protection group.

[0054] After the configuration is completed, the FPGA chip 10 will be configured to automatically interact with the switching chip 30 in the local OLT device to send heartbeat and switching interaction messages; at the same time, when the switching chip 30 captures the heartbeat and switching switching messages in the dual-homing protocol from the Ethernet port connected to the dual-homing peer, it will directly transmit them to the FPGA chip 10 configured in the local OLT device for processing.

[0055] Furthermore, when the FPGA chip 10 detects a change in the heartbeat status between the dual-homed OLT devices based on the heartbeat message transmitted by the switching chip 30, it will simultaneously notify the CPU 40 in the local OLT device via the bus. The CPU 40 will then perform synchronization management actions for the PON protection group related to the dual-homed pair based on the status and configuration of the local OLT device. At the same time, the FPGA chip continues to monitor the dual-homed pair until the relevant configuration of the dual-homed pair is deleted. The FPGA chip will continue to maintain a listening state when the heartbeat is disconnected. This allows for timely restoration of communication and status monitoring of the dual-homed pair when the physical link between the two OLT devices is restored or when the other end is configured with a dual-homed pair, thereby ensuring the rapid establishment or restoration of the protection group.

[0056] As further explanation, in the specific implementation, after receiving the heartbeat status change information notified by the FPGA chip 10 via the bus, the CPU40 will record the heartbeat establishment or disconnection status of the dual-homing pair. When establishing a heartbeat, the CPU will determine whether the PON protection group configuration already exists within the dual-homing pair. If it does, it will perform initial working state negotiation and simultaneously perform initialization and synchronization of the PON protection group configuration and status to prevent the PON protection group configuration from being earlier than the link establishment, which would lead to asynchronous protection group status.

[0057] Furthermore, after the FPGA chip 10 detects a heartbeat disconnection between the dual-homed OLT devices based on the heartbeat message transmitted by the switching chip 30, the FPGA chip 10 in each of the two OLT devices will first check whether the protection group port within the dual-homed pair receives light. If no light is received, it is determined that the PON port at the other end is in standby mode. The FPGA chip in the local OLT device controls the GPIO pin to turn on the corresponding local PON port to emit light, and the FPGA chip switches the corresponding local PON port to the primary working mode. Otherwise (i.e., light is received), the current PON port's light emission and working state remain unchanged. Both OLTs adopt this working mechanism simultaneously to ensure that the PON protection group within the configured dual-homed pair is in normal primary working state only at one end after the heartbeat link is disconnected, thus protecting the user's normal service.

[0058] At the same time, the FPGA chip 10 is also configured to continue listening to the heartbeat of the peer OLT device even when the heartbeat is disconnected, until the dual-homing configuration is deleted. This allows the communication and status monitoring of the dual-homing pair to be restored in a timely manner when the physical link between the two OLT devices is restored, or when the peer is configured with a dual-homing pair, thereby ensuring the rapid establishment or restoration of the protection group.

[0059] Furthermore, after the FPGA chip 10 detects the switching request of the peer OLT device within the dual-homed pair according to the switching interaction message transmitted by the switching chip 30, the FPGA chip 10 will check whether the master / standby status of the corresponding PON protection group recorded in the local chip is different from the master / standby status after the peer requests local switching. If the master / standby status is different, the FPGA chip will change the light emission status of the corresponding PON port to the status requested by the peer OLT through the GPIO pin, thereby changing the working status of the PON port, and re-record the master / standby status of this PON protection group in the FPGA chip.

[0060] As a further explanation, when a local user wishes to initiate a proactive switchover of the PON protection group via command-line configuration, MIB configuration, or other methods, the CPU in the local device sends a switchover configuration request to the local FPGA chip. Upon receiving the request, the local FPGA chip adjusts the local PON port's illumination and operating status according to the local PON protection group status, and sends a switchover request to the peer OLT device, requesting the peer to adjust the PON protection group status to a different operating status than the local one. After receiving the request, the peer obtains the desired primary / backup operating status from the request information and performs the corresponding status adjustment.

[0061] The following example illustrates the specific operation process of the FPGA-based dual-homing PON protection system solution developed in this invention.

[0062] When this FPGA-based dual-homed PON protection system is deployed and run, an FPGA chip capable of providing heartbeat functionality is configured in the OLT equipment involved. The specific configuration scheme is as described above and will not be repeated here.

[0063] Based on this, see Figure 3 On OLT devices that require the creation of dual-homing pairs, the dual-homing pair and PON protection group configurations are set according to the device information. The configured information includes the peer communication address, peer communication port, and peer dual-homing pair key. The relevant configurations are simultaneously sent from the CPU to the PON MAC address chip and the FPGA chip.

[0064] See further Figure 4 After completing the configuration of the dual-homing pair and PON protection group, the FPGA chip in the OLT device sends messages through the switching chip to attempt to establish a connection with the address configured in the dual-homing group and listen for the heartbeat and switching information of the peer of the dual-homing pair.

[0065] When a heartbeat is established with the peer, if a change in the heartbeat status is detected, the FPGA chip will notify the CPU in the OLT device through the local bus. The CPU will then initiate the corresponding dual-homed PON protection group management action, such as synchronizing ONU status, synchronizing configuration, and PON protection group auto-negotiation.

[0066] When the FPGA chip detects that the heartbeat of the dual-homed pair has been interrupted, it will perform light reception detection on the relevant PON ports of the PON protection group within the dual-homed pair one by one within a reasonable time:

[0067] If light is received through the PON port, confirming that the ONU is working normally, the local system will remain unchanged.

[0068] If it is found that the PON port is not receiving light, it is determined that the other end is not in the primary working state. The local side will actively turn on the PON port to emit light and adjust the working state of the PON port to the primary working state to ensure the normal service requirements of the ONU terminal under the PON port.

[0069] See further Figure 5 After completing the dual-homing pair and PON protection group configuration, the FPGA chip will process the switching interaction request. When the received switching interaction request comes from the local CPU, it checks the local PON port's working state switching adjustment method:

[0070] If the local PON port switches from the primary state to the standby state, then directly turn off the local PON port's light and adjust the PON port's working state to standby.

[0071] If the local PON port is switching from standby to primary mode, in order to prevent both ends from illuminating simultaneously, a request to switch the other end to standby mode needs to be sent first. After the other end completes the switch, a reply indicating that the switch is complete is sent, and the local PON port will turn on the light and adjust the PON port to primary mode.

[0072] When a switchover request is received from the peer, the FPGA chip checks whether its local state matches the request:

[0073] If the states are already consistent, no local switch operation will be performed;

[0074] If the states are inconsistent, switch the local light emission and PON port working states as requested, and then reply to the other end with the local switching result.

[0075] Combination Figure 3 As shown, when the dual-homing pair configuration is not deleted, the FPGA chip will continue to attempt to monitor the heartbeat for dual-homing pairs that have lost their heartbeat, so that the PON protection function can be restored after the fault is recovered.

[0076] Furthermore, when the dual-homing PON protection function is no longer needed and the configuration is deleted, the relevant configurations of the FPGA chip and the PON MAC chip will be deleted simultaneously, and the FPGA chip will stop monitoring the heartbeat of the dual-homing pair.

[0077] As can be seen from the above examples, the present invention integrates an FPGA chip into the OLT, which is specifically used for monitoring the OLT heartbeat and switching interactions between dual-homed pairs. The FPGA chip can operate in parallel with low latency, enabling timely and accurate monitoring of the heartbeats of multiple dual-homed pairs, rapid response to switching interactions, and is unaffected by CPU operation. This increases network security and stability, improves the convergence speed and efficiency of dual-homed PON protection functions, and reduces the complexity of implementing dual-homed PON protection functions.

[0078] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. A dual-homed PON protection heartbeat monitoring system based on FPGA, characterized in that, The monitoring system configures FPGA chips on the two OLT devices forming a dual-homing pair. The FPGA chips are configured to connect to the PON MAC chip, switching chip, and CPU of the OLT devices, and are configured to perform heartbeat monitoring and switchover interaction monitoring and processing for the OLT devices forming the dual-homing pair. The switching chip is configured to directly transmit the captured heartbeat and switchover exchange messages in the dual-homing protocol to the FPGA chip for processing. The FPGA chip is configured to automatically interact with the switching chip in the local OLT device to send heartbeat and switchover interaction messages, and monitor the heartbeat status and switchover interaction requests between the dual-homing pair OLT devices accordingly.

2. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 1, characterized in that, The FPGA chip is configured to connect to the PON MAC chip in the local OLT device via GPIO pins and to the CPU of the local OLT device via a bus.

3. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 2, characterized in that, The FPGA chip is configured to control the switching state of the PON port light emitter via GPIO pins, control the switching of the PON port operating mode via GPIO pins, and confirm the PON port light receiving status via GPIO pins.

4. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 1, characterized in that, The FPGA chip is configured to notify the CPU in the local OLT device via the bus when it detects a change in the heartbeat status between the dual-homing pairs of OLT devices. The CPU then performs synchronization management actions for the PON protection group related to the dual-homing pairs based on the status and configuration of the local OLT device.

5. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 4, characterized in that, The CPU receives heartbeat status change information from the FPGA chip via the bus. The CPU records the heartbeat connection establishment and disconnection status of the dual-homing pair. When establishing a heartbeat, it determines whether a PON protection group configuration already exists within the dual-homing pair. If it does, it performs initial working state negotiation and simultaneously initializes and synchronizes the PON protection group configuration and status.

6. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 4, characterized in that, The FPGA chip is configured such that, after detecting a heartbeat disconnection between the two OLT devices in a dual-homing pair, the FPGA chip in each of the two OLT devices will first check whether there is light received at the protection group port within the dual-homing pair to determine the operating status of the ONU: If no light is received, it is confirmed that the PON port of the other end is in standby working state. The FPGA chip in the local OLT device controls the GPIO pin to turn on the corresponding local PON port to emit light, and the FPGA chip switches the corresponding local PON port to the master working mode. If light is received, the current PON port light emission and working status remain unchanged, and both OLTs adopt this working mechanism simultaneously.

7. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 1, characterized in that, After receiving a PON protection group switching request from the peer OLT device within a dual-homed pair, the FPGA chip checks whether the master / standby status of the corresponding PON protection group recorded in its local chip is different from the master / standby status after the peer requests a local switching. If the master / standby status is different, the FPGA chip changes the light emission status of the corresponding PON port to the status requested by the peer OLT through the GPIO pin, thereby changing the working status of the PON port and re-recording the master / standby status of this PON protection group in the FPGA.

8. The FPGA-based dual-homing PON protection heartbeat monitoring system according to claim 1, characterized in that, In the event of an active switchover initiated via command-line configuration or MIB configuration, the monitoring system sends a switchover configuration request from the CPU in the local device to the local FPGA chip. The FPGA chip adjusts the local PON port's illumination and operating status based on the local PON protection group status and sends a switchover request to the peer OLT device.

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