A method for processing reworked heterojunction solar cells with differentiated textured surface structure and its application.

Abstract

This invention relates to the field of battery technology, and more particularly to a method for processing reworked heterojunction solar cells with differentiated textured surface structures and its application. The processing method employs a five-step process (S1-S5): first, the back side of the reworked cell undergoes controlled textured circular etching, increasing reflectivity by 0.5%-5%; then, a back mask layer is deposited; finally, alkaline texturing is performed only on the front side to rebuild the pyramid structure; and finally, the mask is removed. This method avoids retexturing the entire wafer, significantly reducing wafer weight and breakage rate. While preserving the passivation-friendly microstructure on the back side, it optimizes long-wavelength reflection and maintains efficient light trapping on the front side, improving short-circuit current and conversion efficiency. The process is fully compatible with existing production lines, combining optical performance, interface quality, and economic efficiency, providing a mass-producible solution for the high-value recycling of defective HJT wafers.

Description

Technical Field

[0001] This invention relates to the field of battery technology, and in particular to a method for processing reworked heterojunction solar cells with differentiated textured surface structures and its application. Background Technology

[0002] Heterojunction (HJT) solar cells have become one of the important technologies in the photovoltaic field due to their high conversion efficiency, low temperature coefficient, and good bifacial power generation performance. A typical HJT cell structure usually includes the sequential deposition of an intrinsic amorphous silicon passivation layer, a doped amorphous silicon layer, and a transparent conductive oxide (TCO) electrode layer on the front and back sides of a crystalline silicon substrate. In actual production, due to process fluctuations, film defects, or contamination, some silicon wafers may fail to meet quality standards and require rework to recover the silicon substrate, thereby reducing manufacturing costs.

[0003] Traditional rework methods typically involve etching the entire wafer with strong acids or alkalis to remove the surface functional layer and retexturize it. However, this method has significant drawbacks. Excessive etching can lead to excessive weight reduction, decreased mechanical strength, and even fragmentation of the silicon wafer. For front-side structures with an already formed pyramidal texture, direct alkaline retexturing can cause abnormal reflectivity and increased interfacial recombination due to uneven microstructures remaining on the back side, severely impacting the photoelectric performance of the reworked cell. Especially for HJT rework wafers with a near-polished back structure (i.e., a nearly polished back side but retaining micron-level textured features), the differentiated texture of the near-polished back surface undoubtedly requires more etching than conventional texturing. The back-side morphology is extremely sensitive to subsequent passivation and contact characteristics, making rework even more difficult. Summary of the Invention

[0004] This application aims to address the technical challenge of existing heterojunction solar cell rework processes that cannot simultaneously achieve efficient light capture on the front side and preservation of passivation-compatible microstructure on the back side. Traditional whole-wafer strong acid / base etching rework methods lack selectivity, easily leading to excessive wafer thinning, increased fragmentation rate, and uncontrollable damage to the back side microstructure while rebuilding the front pyramid texture, resulting in abnormal reflectivity and intensified interface recombination. This is particularly unsuitable for HJT rework wafers with differentiated front and back texture requirements. To address this, this application proposes a step-by-step, selective processing strategy. Through controllable textured circular etching, back side mask protection, and front side directional texturing, it achieves the synergistic restoration of the low-reflectivity pyramid texture on the front side and the highly passivation-compatible microstructure on the back side. This significantly improves the photoelectric conversion performance and yield of the reworked cells while ensuring wafer weight reduction and controllable fragmentation rate.

[0005] To achieve the above objectives, the main technical solutions adopted by the present invention include:

[0006] In a first aspect, this application provides a method for processing reworked heterojunction solar cells with differentiated textured surface structures, comprising the following steps:

[0007] Step S1: Perform a textured, circular etching process on the heterojunction rework sheet, wherein the circular etching increases the back surface reflectivity by 0.5%-5% compared to the rework sheet before circular etching;

[0008] Step S2: Clean the rework piece from step S1;

[0009] Step S3: Deposit a mask layer on the back side of the reworked wafer from step S2;

[0010] Step S4: Apply alkaline napping to the front side of the rework piece from step S3 to obtain a pyramid napped surface.

[0011] Step S5: Remove the mask layer deposited on the back of the rework wafer and clean the rework wafer.

[0012] The process also includes step S6, which involves sequentially depositing an intrinsic amorphous silicon passivation layer, depositing a doped amorphous silicon layer, coating a transparent conductive oxide (TCO) film, screen printing, and sintering the rework wafer obtained in step S5 to complete the fabrication of a heterojunction solar cell.

[0013] First, a controlled texturing and rounding etching process is used to gently refine the back side of the rework wafer. While removing residual amorphous silicon functional layers, the original pyramid structure is moderately rounded, increasing the back side reflectivity by 0.5%-5%, thereby optimizing the reflection and utilization of long-wavelength light. Then, through selective protection of the back side mask layer, it is ensured that subsequent alkaline texturing on the front side only affects the front side, reconstructing the low-reflectivity pyramid textured surface without damaging the optimized back side microstructure. This strategy avoids the risks of excessive etching, silicon wafer thinning, and fragmentation caused by traditional whole-wafer strong acid / strong alkali rework. While significantly reducing rework losses, it achieves a differentiated reconstruction of the compatible morphology of efficient light trapping on the front side and high passivation on the back side. Ultimately, the short-circuit current and conversion efficiency of the reworked cell are restored, providing a rework path for high-yield and low-cost manufacturing of HJT cells.

[0014] In a further embodiment, the heterojunction rework wafer originates from a process stage in which at least one of an intrinsic amorphous silicon passivation layer and a doped amorphous silicon layer has been deposited, and / or a transparent conductive oxide (TCO) layer has been deposited but has been completely removed before rework. The weight reduction of the silicon wafer during the entire rework process does not exceed 0.4g, and the total breakage rate is less than 5%.

[0015] This application controls the intensity and time of textured circular etching to effectively remove interface contaminants and excessively thick / defective films while strictly limiting excessive etching of the silicon substrate, ensuring that the weight reduction of a single silicon wafer does not exceed 0.4g and the total breakage rate is controlled below 5% during the entire rework process.

[0016] In a further embodiment, the surface rounding etching in step S1 uses a mixture of hydrofluoric acid and rounding additive, with the hydrofluoric acid concentration being 1%-10% and the rounding additive concentration being 0.5%-10%, the reaction temperature being 20-40℃, and the processing time being 60-400 seconds.

[0017] In a further embodiment, when the reworked wafer contains only an intrinsic amorphous silicon passivation layer and no doped amorphous silicon layer, the textured circular etching in step S1 increases the back surface reflectivity by 0.5%-1.0% compared to before the circular etching. The circular etching uses a hydrofluoric acid concentration of 1%-3%, a circular additive concentration of 5%-10%, a reaction temperature of 20-25°C, and a processing time of 60-120 seconds.

[0018] In a further embodiment, when the reworked wafer contains an intrinsic amorphous silicon passivation layer and a doped amorphous silicon layer, and does not contain a TCO film layer, the textured circular etching in step S1 increases the back surface reflectivity by 1.0%-2.5% compared to before the circular etching. The circular etching uses a hydrofluoric acid concentration of 3%-6%, a circular additive concentration of 2%-5%, a reaction temperature of 25-30°C, and a processing time of 120-240 seconds.

[0019] In a further embodiment, when the reworked wafer originates from a TCO-deposited wafer that has undergone pretreatment to completely remove the TCO and has an excessively thick or contaminated amorphous silicon functional layer, the textured circular etching in step S1 increases the back surface reflectivity by 2.5%-5.0% compared to before the circular etching. The circular etching uses a hydrofluoric acid concentration of 6%-10%, a circular additive concentration of 0.5%-2%, a reaction temperature of 30-40°C, and a processing time of 240-400 seconds.

[0020] By adjusting the HF concentration, additive ratio, temperature, and time, the dissolution rate of the valleys in the pyramid structure of the silicon surface is controlled, achieving selective passivation trimming of the micron-level textured surface. This effectively removes residual amorphous silicon functional layers and interface contaminants while avoiding silicon loss or morphology damage caused by excessive etching. The process is further refined for silicon wafers in different rework states. When the rework wafer contains only an intrinsic amorphous silicon passivation layer, mild rounding is achieved, increasing the back reflectivity by only 0.5%-1.0%, maximizing the preservation of the original microstructure integrity. When the rework wafer contains both intrinsic and doped amorphous silicon layers, the HF concentration is appropriately increased and the processing time is extended to enhance the stripping ability of the doped layer. Simultaneously, additives are used to suppress anisotropic corrosion, increasing the back reflectivity and forming a more uniform, passivation-friendly micro-rounded morphology. In the third case, deep rounding is implemented, increasing the back reflectivity by 2.5%-5.0%, thereby completely removing stubborn contaminants and abnormally thickened amorphous silicon layers, smoothing the rough textured surface into a highly reflective, low-recombination, polished-like microstructure. The hierarchical control strategy ensures the effective removal of impurities and defects under different film layer systems, and also optimizes the back optical performance and interface passivation quality, laying the foundation for subsequent high-efficiency HJT cell reconstruction, and ensuring that silicon wafer weight reduction and breakage rate are always within a controllable range. This is the core of the invention.

[0021] In a further embodiment, a pre-cleaning step is included before step S1. The pre-cleaning uses a mixture of an alkaline solution and hydrogen peroxide. The alkaline solution contains sodium hydroxide or potassium hydroxide with a concentration of 0.01 wt% to 10 wt%, and the hydrogen peroxide has a concentration of 1 wt% to 15 wt%. The cleaning temperature is 50°C to 80°C, and the cleaning time is 120 s to 240 s.

[0022] In a further embodiment, a pre-cleaning step is included before step S1. The pre-cleaning uses a 1-2wt% hydrochloric acid aqueous solution containing 45-50ppm ozone, the cleaning temperature is 20-25℃, and the cleaning time is 200-240s.

[0023] This invention provides two preferred pre-cleaning schemes. One uses an alkaline solution to effectively decompose organic matter, particles, and some metallic impurities through strong oxidation and saponification, suitable for removing grease, photoresist residue, etc., introduced during the manufacturing process. The other utilizes the strong oxidizing properties of ozone and the complexing ability of hydrochloric acid to remove metal ions and thin oxide layers, while avoiding the potential corrosion of the silicon wafer microstructure by high-temperature alkaline washing. Both pre-cleaning paths can improve surface cleanliness without damaging the silicon substrate, ensuring sufficient and uniform contact between the subsequent HF-based spherical etching solution and the silicon surface and residual amorphous silicon layer, thereby improving spherical consistency and film peeling efficiency, ultimately ensuring controllable morphology and stable reflectivity of the back side of the rework wafer.

[0024] In a further embodiment, the cleaning process in step S2 is an ozone cleaning process, which includes immersing the rework piece in a solution containing 45-50 ppm ozone and 0.01-1% hydrochloric acid, and treating it at 15-25°C for 120-360 seconds.

[0025] Ozone can rapidly oxidize residual rounding additives, generating water-soluble small molecules, while low-concentration hydrochloric acid dissolves any metal ions or fluoride precipitates that may precipitate through complexation, inhibiting re-oxidation of the silicon surface. This cleaning process is carried out at near-room temperature, avoiding thermal disturbance or secondary corrosion of the already repaired textured surface structure due to high temperatures, ensuring both thorough cleaning and maintaining the integrity of the micro-rounded morphology on the back side.

[0026] In a further embodiment, the thickness of the back-side deposition mask layer is 20-300 nm, and the back-side mask layer is composed of one or more materials selected from silicon oxide, silicon nitride, or silicon oxynitride.

[0027] The processing method for reworked heterojunction solar cells with differentiated textured surface structures is applied in the recycling of reworked heterojunction solar cells to prepare high-efficiency thin-film HJT cells.

[0028] Beneficial effects

[0029] This application provides a method for processing reworked heterojunction solar cells with differentiated textured surfaces. In step S1, controlled textured circular etching is performed on the reworked cell to moderately increase the back-side reflectivity by 0.5%-5%, effectively removing residual amorphous silicon functional layers and optimizing the back-side microstructure. In step S3, a mask layer is deposited on the back-side, and in step S4, alkaline texturing is performed only on the front side to precisely construct a pyramidal textured surface with a reflectivity ≤11%, thereby achieving synergistic restoration of the differentiated textured surface structures on the front and back sides. This method avoids the problems of excessive etching, excessive silicon wafer weight reduction, and high fragmentation rate caused by traditional whole-wafer strong acid / strong alkali rework processes. While ensuring the mechanical strength of the silicon wafer, it significantly improves the short-circuit current and photoelectric conversion efficiency of the reworked cell. Furthermore, through selective protection and directional texturing strategies, the process flow is simplified, and the rework yield is improved, providing key technical support for the low-cost, high-reliability manufacturing of high-efficiency heterojunction solar cells. Detailed Implementation

[0030] The embodiments of this application will be described in further detail below with reference to the examples. The detailed description of the following embodiments is used to illustrate the principles of this application, but should not be used to limit the scope of this application. This application can be implemented in many different forms and is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

[0031] These embodiments are provided to make the application thorough and complete, and to fully express the scope of the application to those skilled in the art. It should be noted that, unless otherwise specifically stated, the relative arrangement of components and steps, material composition, numerical expressions, and values ​​illustrated in these embodiments should be interpreted as merely exemplary and not as limiting.

[0032] It should be noted that, in the description of this application, unless otherwise stated, "a plurality of" means two or more; the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicating orientation or positional relationship, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0033] Furthermore, the terms "first," "second," and similar terms used in this application do not indicate any order, quantity, or importance, but are merely used to distinguish different parts. "Vertical" is not strictly vertical, but within the permissible margin of error. "Parallel" is not strictly parallel, but within the permissible margin of error. Terms such as "including" or "contains" mean that the element preceding the word encompasses the element listed after it, and do not exclude the possibility of encompassing other elements as well.

[0034] All terms used in this application have the same meaning as understood by one of ordinary skill in the art to which this application pertains, unless otherwise specifically defined. It should also be understood that terms defined in general dictionaries should be interpreted as having meanings consistent with their meanings in the context of the relevant art, and not as idealized or highly formalized, unless expressly defined herein.

[0035] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, they should be considered part of the specification.

[0036] Compared to traditional rework processes, this solution significantly reduces silicon wafer weight and overall breakage rate, ensuring the mechanical integrity and production yield of thin-film heterojunction solar cells. By controlling the roundness of the back surface texture, the back reflectivity is moderately increased by 0.5%–5%, optimizing the reflection and utilization of long-wavelength light. While maintaining the efficient light-trapping capability of the front surface, it increases the short-circuit current and brings conversion efficiency gains. This method avoids the redundant steps of re-texturing the entire wafer, simplifies the rework process, and efficiently removes residual amorphous silicon functional layers while taking into account optical performance, passivation quality, and process economy. It provides a reliable and mass-producible technical path for the high-value recycling of defective heterojunction solar cells.

[0037] All parameters not mentioned in the text refer to conventional processes.

[0038] Unless otherwise stated, all solution concentrations in this article are expressed as a mass percentage.

[0039] The rounding additive is a commercially available rounding additive, preferably SIPSE-24 from Zhongke Pury, but other rounding additives are also acceptable.

[0040] The specific process for removing TCO membranes can be divided into four stages: pre-cleaning, main acid washing, multi-stage deionized water rinsing, and drying.

[0041] The first stage is the pre-cleaning stage, which involves treating the silicon wafer surface with a mixture of 1.0% sodium hydroxide solution and 5% hydrogen peroxide at 65°C for 120 seconds to remove organic contaminants and particulate impurities, providing a clean reaction interface for subsequent acid washing. After pre-cleaning, a rapid spray with deionized water is immediately required to prevent the formation of spots after the alkaline residue dries, and to prepare for the main acid washing step.

[0042] The second stage is the main acid washing stage. For aluminum-doped zinc oxide films, 7% dilute hydrochloric acid is usually used to treat them at 25°C for 100 seconds. The hydrochloric acid reacts with ZnO to generate soluble zinc chloride, thus achieving peeling. For indium tin oxide films, which are more difficult to dissolve, 2% hydrogen peroxide is added to the hydrochloric acid as an oxidizing agent, and the films are treated at 30°C for 180 seconds to enhance the solubility of In2O3 and SnO2 and promote the entry of metal ions into the solution.

[0043] The third stage is a multi-stage deionized water rinsing stage, which thoroughly removes residual acid and dissolved metal ions through spraying to prevent cross-contamination or defects in subsequent processes.

[0044] The fourth stage is the drying stage, which uses hot nitrogen purging to dry the silicon wafer without leaving any marks, ensuring that the surface is free of water stains and particle residue. The entire acid pickling process balances efficiency, selectivity, and cleanliness, completely removing the TCO film layer while maximizing the protection of the silicon wafer's unique textured surface structure. This provides a high-quality substrate for subsequent secondary texturing and recoating, making it suitable for the large-scale production needs of HJT cell rework.

[0045] The TCO layer can be removed using existing conventional techniques; regardless of the rework method used, all reworked wafers with a TCO layer must have it completely removed first.

[0046] The examples and comparative examples are all reworked pieces from the same batch on the same production line.

[0047] Rework typically occurs during the quality inspection stage after coating and before screen printing, primarily targeting silicon wafers whose performance is substandard due to defects in the thin film layer. When online testing of HJT cell semi-finished products reveals an open-circuit voltage below 720mV and a fill factor below 80%, the thin film layer is deemed substandard and rework is required. Alternatively, rework may be necessary due to internal factors such as oil contamination on the cell surface, excessive film thickness, or abnormal process control parameters. This invention applies to half-cell batteries obtained from laser-cut 210mm×210mm large-size silicon wafers, i.e., 105mm×210mm specifications, but is not limited to this size. This application is applicable to ultra-thin silicon wafers, such as those ≤100μm, for high-value recycling.

[0048] While specific embodiments of this application have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and are not intended to limit the scope of this application. Those skilled in the art should understand that modifications can be made to the above embodiments or equivalent substitutions can be made to some technical features without departing from the scope and spirit of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any manner.

[0049] Example 1 is a rework wafer containing only an intrinsic amorphous silicon passivation layer and no doped amorphous silicon layer.

[0050] Example 2 is a rework wafer containing an intrinsic amorphous silicon passivation layer and a doped amorphous silicon layer, but without TCO.

[0051] Example 3 is a rework wafer that has been deposited and completely removed from TCO, but the amorphous silicon layer is too thick (significantly exceeding the conventional thickness range of amorphous silicon layers at this process node, such as greater than 50, 60 or 70 nm).

[0052] Comparative Example 1 uses the original rework technology of the production line: regardless of whether the rework piece has a passivation layer and a doped layer, the same rework scheme is used in a unified manner - that is, after completely destroying the original surface structure, the texturing is carried out again.

[0053] Example 1

[0054] Step 1: Take the heterojunction rework wafer that has completed the deposition of intrinsic amorphous silicon passivation layer but has not deposited doped amorphous silicon layer and TCO layer, and clean it with a 1.5wt% hydrochloric acid aqueous solution containing 45ppm ozone at 22°C for 220 seconds to remove surface contaminants and impurities.

[0055] Step 2: Immerse the pre-cleaned rework wafer in a mixed etching solution consisting of 2% hydrofluoric acid and 8% SIPSE-24 from Koprue, a rounding additive, and treat at 23°C for 90 seconds. This treatment slightly rounds the valleys of the pyramidal textured surface on the back of the silicon wafer, increasing the back reflectivity by 0.8% compared to before the treatment.

[0056] Step 3: Using ozone cleaning process, immerse the reworked sheet in a mixed solution containing 48ppm ozone and 0.5% hydrochloric acid, and treat it at 20°C for 240 seconds to thoroughly remove residual additives and reaction byproducts.

[0057] Step 4: Preparation of the back mask layer. Silicon nitride with a refractive index of 1.8 and a thickness of 300 nm was deposited by PECVD as an alkali-resistant mask.

[0058] Step 5: Preparation of the front suede surface and removal and cleaning of the back mask layer. Cleaning is performed using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds. Polishing of the front suede surface is then done using a 2% sodium hydroxide solution at 70°C for 2 minutes. Next, a mixture of 1% sodium hydroxide and 10% hydrogen peroxide is used at 65°C for 240 seconds. Finally, a mixture of 1% sodium hydroxide and 0.5% conventional suede-forming additives is used at a reaction temperature of 8... The process involves cleaning at 0℃ for 520 seconds, followed by a cleaning process using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20℃ for 240 seconds. A circularization treatment (CP) is then performed, using a mixture of ozone, hydrochloric acid, and hydrofluoric acid to react and remove the silicon nitride mask. The ozone concentration is 50 ppm, the hydrofluoric acid concentration is 0.5%, and the hydrochloric acid concentration is 1%, at 20℃ for 90 seconds. Finally, a 10% hydrofluoric acid solution is used to remove the oxide layer at 25℃ for 120 seconds.

[0059] The subsequent HJT cell process in step 6 includes deposition of an intrinsic passivation layer of amorphous silicon, deposition of a doped amorphous silicon layer, TCO film coating, screen printing, and sintering.

[0060] In step S4, this invention utilizes the excellent chemical inertness of silicon nitride in an alkaline environment as a selective alkali-resistant protective layer, effectively preventing the subsequent alkaline texturing solution on the front side from eroding the optimized microstructure on the back side. In step S5, the front side undergoes gentle alkaline polishing to remove residual large-sized or irregular textured surfaces, followed by surface activation and homogenization treatment with an alkaline solution containing hydrogen peroxide. Finally, a pyramidal textured surface with uniform size and low reflectivity is reconstructed in a standard alkaline texturing system. The entire front texturing process is completely unaffected by the presence of the silicon nitride mask on the back side, achieving control over the differentiated structure between the front and back sides. After texturing, the selective etching capability of HF on silicon nitride is utilized, while ozone enhances reaction uniformity and suppresses side reactions, efficiently and cleanly stripping the back mask. Finally, a short-time HF treatment removes the thin layer of natural oxides formed during texturing and mask removal, exposing a clean and active silicon surface, providing an interface for the high-quality deposition of the subsequent amorphous silicon passivation layer. These steps fully utilize the company's existing production line technology and equipment configuration, requiring no additional dedicated equipment or complex modifications, thus reducing the technology adoption threshold and rework costs. This process is fully compatible with existing production lines, combining optical performance, interface quality, and economy, providing a mass-producible solution for the high-value recycling of defective HJT wafers.

[0061] Example 2

[0062] Step 1: Take the heterojunction rework wafer that has completed the deposition of the intrinsic amorphous silicon passivation layer and the n-type doped amorphous silicon layer, but has not yet deposited the TCO layer. Clean it with a mixture of 0.5wt% potassium hydroxide and 5wt% hydrogen peroxide at 65°C for 180 seconds to remove surface oxides and particles.

[0063] Step 2: Immerse the reworked sheet in a mixture of 4.4% hydrofluoric acid and 3.5% rounding additive, and react at 28°C for 180 seconds. This treatment moderately rounds the back surface, increasing the back reflectivity by 1.9% compared to before the treatment.

[0064] Step 3: Using ozone cleaning process, place the rework piece in a solution containing 46ppm ozone and 0.6% hydrochloric acid, and treat it at 22℃ for 300 seconds to effectively remove surface residues.

[0065] Step 4: Preparation of the back mask layer. Silicon nitride with a refractive index of 1.8 and a thickness of 300 nm was deposited by PECVD as an alkali-resistant mask.

[0066] Step 5: Preparation of the front suede surface and removal and cleaning of the back mask layer. Cleaning is performed using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds. Polishing of the front suede surface is then done using a 2% sodium hydroxide solution at 70°C for 2 minutes. Next, a mixture of 1% sodium hydroxide and 10% hydrogen peroxide is used at 65°C for 240 seconds. Finally, a mixture of 1% sodium hydroxide and 0.5% conventional suede-forming additives is used at a reaction temperature of 8... The process involves cleaning at 0℃ for 520 seconds, followed by a cleaning process using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20℃ for 240 seconds. A circularization treatment (CP) is then performed, using a mixture of ozone, hydrochloric acid, and hydrofluoric acid to react and remove the silicon nitride mask. The ozone concentration is 50 ppm, the hydrofluoric acid concentration is 0.5%, and the hydrochloric acid concentration is 1%, at 20℃ for 90 seconds. Finally, a 10% hydrofluoric acid solution is used to remove the oxide layer at 25℃ for 120 seconds.

[0067] The subsequent HJT cell process in step 6 includes deposition of an intrinsic passivation layer of amorphous silicon, deposition of a doped amorphous silicon layer, TCO film coating, screen printing, and sintering.

[0068] Example 3:

[0069] Step 1: Take rework wafers that have undergone TCO deposition but have had all TCO removed before rework, and where testing revealed excessive local thickness of the amorphous silicon layer. Clean the surface deeply using a 1.8wt% hydrochloric acid solution containing 48ppm ozone at 24°C for 230 seconds.

[0070] Step 2: Immerse the reworked sheet in a mixed etching solution consisting of 8% hydrofluoric acid and 1.2% rounding additive, and treat it at 35°C for 320 seconds. This powerful rounding treatment significantly smooths the textured surface of the back side, increasing the back side reflectivity by 3.7% compared to before treatment.

[0071] Step 3: Using ozone cleaning process, immerse the reworked piece in a solution containing 50ppm ozone and 0.3% hydrochloric acid, and treat it at 25℃ for 360 seconds to completely remove corrosion residue.

[0072] Step 4: Preparation of the back mask layer. Silicon nitride with a refractive index of 1.8 and a thickness of 300 nm was deposited by PECVD as an alkali-resistant mask.

[0073] Step 5: Preparation of the front suede surface and removal and cleaning of the back mask layer. Cleaning is performed using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds. Polishing of the front suede surface is then done using a 2% sodium hydroxide solution at 70°C for 2 minutes. Next, a mixture of 1% sodium hydroxide and 10% hydrogen peroxide is used at 65°C for 240 seconds. Finally, a mixture of 1% sodium hydroxide and 0.5% conventional suede-forming additives is used at a reaction temperature of 8... The process involves cleaning at 0℃ for 520 seconds, followed by a cleaning process using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20℃ for 240 seconds. A circularization treatment (CP) is then performed, using a mixture of ozone, hydrochloric acid, and hydrofluoric acid to react and remove the silicon nitride mask. The ozone concentration is 50 ppm, the hydrofluoric acid concentration is 0.5%, and the hydrochloric acid concentration is 1%, at 20℃ for 90 seconds. Finally, a 10% hydrofluoric acid solution is used to remove the oxide layer at 25℃ for 120 seconds.

[0074] The subsequent HJT cell process in step 6 includes deposition of an intrinsic passivation layer of amorphous silicon, deposition of a doped amorphous silicon layer, TCO film coating, screen printing, and sintering.

[0075] Comparative Example 1

[0076] If a TCO membrane is present, remove the TCO membrane first.

[0077] The rework process on the same production line involves first preparing the first textured surface, then preparing the mask layer, then preparing the second textured surface, then removing the mask layer and cleaning it to obtain a back-polished textured surface for subsequent HJT battery processes.

[0078] 1. Pre-cleaning of rework wafers to remove dirt: A mixture of 50ppm ozone and 1% hydrochloric acid at 20℃ for 240s is used for cleaning. Polishing to remove the texturing structure is then performed using 2% sodium hydroxide at 70℃ for 2 minutes. Next, a mixture of 1% sodium hydroxide and 10% hydrogen peroxide at 65℃ for 240s is used. Finally, a texturing additive of 1.25% sodium hydroxide and 0.5% TS53V01 is used at 83℃ for 520s. The pyramid size is 3-5 micrometers. Subsequent post-cleaning is then performed. The process primarily involves cleaning with a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds. Next, the pyramidal valleys are rounded using hydrofluoric acid and a rounding additive (SIPSE-24 from Zhongke Pury). This is achieved with 5% HF and 2% of the additive, treated for 230 seconds at 30°C. This is followed by cleaning with a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds to remove any additive residue. Finally, a 10% hydrofluoric acid solution is used to remove the oxide layer at 25°C for 120 seconds, thus removing the oxide layer from the silicon substrate surface.

[0079] 2. Preparation of single-sided mask layer: Silicon nitride with a refractive index of 1.8 and a thickness of 300 nm was deposited by PECVD as an alkali-resistant mask;

[0080] 3. Pre-clean the substrate from step 2 to remove contaminants using a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds; then polish the large textured surface on the front using a 2% sodium hydroxide solution at 70°C for 2 minutes; next, use a mixture of 1% sodium hydroxide and 10% hydrogen peroxide at 65°C for 240 seconds; then use 1% sodium hydroxide and 0.5% conventional texturing additives at 80°C for 520 seconds; finally, clean with a mixture of 50 ppm ozone and 1% hydrochloric acid at 20°C for 240 seconds; and finally perform circularization (CP) treatment. A mixture of ozone, hydrochloric acid, and hydrofluoric acid was used to react and remove the silicon nitride mask. The ozone concentration was 50 ppm, the hydrofluoric acid concentration was 0.5%, the hydrochloric acid concentration was 1%, the temperature was 20°C, and the time was 90 s. Finally, a 10% concentration of hydrofluoric acid was used to remove the oxide layer at 25°C for 120 s. The final result was a textured surface with a back surface reflectivity of 20% (as mentioned earlier, circular etching increases the back surface reflectivity by 0.5%–5% compared to the rework wafer before circular etching; the value is used for comparison. The rework wafer before circular etching here is a silicon wafer that has not undergone amorphous silicon intrinsic passivation layer deposition, doped amorphous silicon layer deposition, TCO film coating, screen printing, and sintering processes).

[0081] 4. Subsequent HJT battery process.

[0082] The core of Comparative Example 1 is that after removing the TCO film (if any), the original process flow used before the reworked piece became a defective product was completely re-executed, including texturing. That is, the first texturing surface was prepared, then the mask layer was deposited, then the second texturing surface was prepared, then the mask was removed and cleaned, and finally a back-polished texturing structure was obtained again (the back side was originally a back-polished morphology).

[0083] The reflectance of the front and back sides of the rework sheets after two different processing methods was tested using a D8 reflectance meter. The following electrical properties, total fragmentation rate of the rework sheets collected on the production line, and weight changes and weight reduction of the rework sheets before and after the texturing and cleaning process were obtained using an IV tester:

[0084] Table 1: Test Results Table.

[0085]

[0086] The reworked heterojunction solar cells processed using the rework method described in this invention show significant advantages over traditional rework methods in terms of key processes and electrical performance indicators. This invention effectively controls the degree of corrosion, significantly reducing silicon wafer weight loss during rework, thereby better maintaining the structural integrity of the wafer; correspondingly, the fragmentation rate is also greatly reduced, demonstrating process robustness and good adaptability to the trend of wafer thinning. The reflectivity of the textured front surface is comparable to that of traditional methods, indicating that the front light-harvesting capability is unaffected. However, this invention achieves a moderate increase in back surface reflectivity by controlling the back surface microstructure, reflecting superior long-wavelength light management capability. This optimization directly translates into higher short-circuit current output and, while maintaining stable open-circuit voltage and fill factor, brings about an overall improvement in conversion efficiency. Samples under different rework conditions can achieve good performance recovery using this method, demonstrating the good universality of this technology.

Claims

1. A method for processing reworked heterojunction solar cells with differentiated textured surface structures, characterized in that, Includes the following steps: Step S1: Perform a textured surface circular etching treatment on the heterojunction rework sheet. The textured surface circular etching uses a mixture of hydrofluoric acid and a circular etching additive. The concentration of hydrofluoric acid is 1%-10%, and the concentration of the circular etching additive is 0.5%-10%. The reaction temperature is 20-40℃, and the treatment time is 60-400 seconds. The circular etching increases the back surface reflectivity by 0.5%-5% compared to the rework sheet before circular etching. The heterojunction rework wafer originates from a process stage in which at least one of an intrinsic amorphous silicon passivation layer and a doped amorphous silicon layer has been deposited, and / or a transparent conductive oxide (TCO) layer has been deposited but has been completely removed before rework. Step S2: Clean the rework piece from step S1; Step S3: Deposit a mask layer on the back side of the reworked wafer from step S2; Step S4: Apply alkaline napping to the front side of the rework piece from step S3 to obtain a pyramid napped surface. Step S5: Remove the mask layer deposited on the back of the rework wafer and clean the rework wafer.

2. The processing method as described in claim 1, characterized in that, The weight reduction of silicon wafers during the entire rework process does not exceed 0.4g, and the total breakage rate is less than 5%.

3. The processing method as described in claim 1, characterized in that, When the reworked wafer contains only an intrinsic amorphous silicon passivation layer and no doped amorphous silicon layer, the textured circular etching in step S1 increases the back surface reflectivity by 0.5%-1.0% compared to before the circular etching. The circular etching uses a hydrofluoric acid concentration of 1%-3%, a circular additive concentration of 5%-10%, a reaction temperature of 20-25℃, and a processing time of 60-120 seconds.

4. The processing method as described in claim 1, characterized in that, When the reworked wafer contains an intrinsic amorphous silicon passivation layer and a doped amorphous silicon layer but does not contain a TCO film layer, the textured circular etching in step S1 increases the back surface reflectivity by 1.0%-2.5% compared to before the circular etching. The circular etching uses a hydrofluoric acid concentration of 3%-6%, a circular additive concentration of 2%-5%, a reaction temperature of 25-30℃, and a processing time of 120-240 seconds.

5. The processing method as described in claim 1, characterized in that, When the reworked wafer originates from a TCO deposit that has been completely removed through pretreatment and has an excessively thick or contaminated amorphous silicon functional layer, the textured circular etching in step S1 increases the back surface reflectivity by 2.5%-5.0% compared to before the circular etching. The circular etching uses a hydrofluoric acid concentration of 6%-10%, a circular additive concentration of 0.5%-2%, a reaction temperature of 30-40℃, and a processing time of 240-400 seconds.

6. The processing method as described in claim 1, characterized in that, The process includes a pre-cleaning step before step S1. The pre-cleaning uses a mixture of an alkaline solution and hydrogen peroxide. The alkaline solution contains sodium hydroxide or potassium hydroxide at a concentration of 0.01 wt% to 10 wt%, and the hydrogen peroxide at a concentration of 1 wt% to 15 wt%. The cleaning temperature is 50°C to 80°C, and the cleaning time is 120 s to 240 s. Alternatively, the pre-cleaning uses a 1-2 wt% hydrochloric acid aqueous solution containing 45-50 ppm ozone at a cleaning temperature of 20-25°C, and the cleaning time is 200-240 s.

7. The method for processing reworked sheets as described in claim 1, characterized in that, The cleaning process in step S2 is an ozone cleaning process, which includes immersing the reworked sheet in a solution containing 45-50 ppm ozone and 0.01-1% hydrochloric acid, and treating it at 15-25°C for 120-360 seconds.

8. The processing method as described in claim 1, characterized in that, The thickness of the back-side deposition mask layer is 20-300 nm, and the back-side mask layer is composed of one or more materials selected from silicon oxide, silicon nitride, or silicon oxynitride.

9. The method for processing reworked heterojunction solar cells with differentiated textured surface as described in any one of claims 1-8 is applied to the recycling of reworked heterojunction solar cells to prepare high-efficiency thin-film HJT cells.

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