A method and system for detecting and compensating for bad pixels

Abstract

This invention provides a method and system for bad pixel detection and compensation control, relating to the field of image processing technology. The method includes: acquiring multiple frames of raw image data during camera on-orbit or laboratory calibration; performing rigid registration processing on the multiple frames of raw image data, calculating the translation and rotation angles between images and performing spatial transformation to obtain registered image data; based on the registered image data, statistically analyzing the response value of each pixel, identifying pixels whose response values ​​continuously deviate from the normal range as bad pixels; traversing and extracting the spatial location information and attributes of the bad pixels, compiling them into a structured data list to obtain a bad pixel location mapping table. This invention, through the design from data acquisition, bad pixel identification, real-time compensation to dynamic configuration, achieves real-time performance and on-orbit adaptive flexibility in bad pixel processing of high-resolution remote sensing cameras, improving image data quality.

Description

Technical Field

[0001] This invention relates to the field of image processing technology, and in particular to a method and system for detecting and compensating for bad pixels. Background Technology

[0002] High-resolution optical remote sensing cameras are key payloads in the field of Earth observation, and their imaging quality is of paramount importance. However, due to limitations in detector manufacturing processes and the space radiation environment, bad pixels (such as dead pixels and hot pixels) inevitably exist on the camera's focal plane. These bad pixels have severely abnormal response characteristics, forming fixed noise in the image, reducing the visual and radiometric quality of the image, and posing a serious obstacle to accurate quantitative analysis and automated information extraction.

[0003] Currently, the mainstream processing method relies on ground pre-calibration and fixed compensation strategies. That is, before launch, a fixed bad pixel location mapping table is generated through laboratory calibration and pre-installed in the processing system. During in-orbit operation, the system locates bad pixels according to this mapping table and uses a fixed neighborhood interpolation algorithm for compensation. This method has the following drawbacks: First, the bad pixel mapping table is locked after launch, and it is impossible to add newly generated bad pixels in orbit or pixels whose response characteristics have drifted. Second, the data processing capability cannot evolve with the camera status, which may lead to irreversible degradation of image quality as the mission life increases.

[0004] Secondly, the source data (fixed mapping table) and preset parameters (such as neighborhood window and weight) on which the compensation algorithm relies are optimized based on the pre-launch environment, which is very easy to mismatch with the dynamic operating conditions in orbit (such as thermal deformation and radiation damage). This mismatch leads to deviations in the compensation results and may introduce secondary errors, thereby impairing the accuracy of the radiation quantification data. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a bad pixel detection and compensation control method and system. Through the design of data acquisition, bad pixel identification, real-time compensation and dynamic configuration, the real-time performance and on-orbit adaptive flexibility of bad pixel processing of high-resolution remote sensing cameras are realized, thereby improving the image data quality.

[0006] To solve the above-mentioned technical problems, the technical solution of the present invention is as follows:

[0007] In a first aspect, a method for detecting and compensating for bad pixels, the method comprising:

[0008] Acquire multiple frames of raw image data during the camera's on-orbit or laboratory calibration process; perform rigid registration processing on the multiple frames of raw image data, and obtain the registered image data by calculating the translation and rotation angles between the images and performing spatial transformation;

[0009] Based on the registered image data, the response value of each pixel is statistically analyzed to identify pixels whose response values ​​continuously deviate from the normal range as bad pixels; the spatial location information and attributes of the bad pixels are traversed and extracted, and compiled into a structured data list to obtain a bad pixel location mapping table.

[0010] Load the bad pixel location mapping table; during real-time imaging by the camera, locate and identify bad pixels in the current row in real time according to the bad pixel mapping table, and obtain the real-time identified bad pixel information;

[0011] Based on the bad pixel information, the neighborhood pixel interpolation algorithm is invoked to calculate the weighted average value of adjacent normal pixels in the same spectral band of the bad pixel, and this value is used to replace the original pixel value of the bad pixel to obtain the image data stream generated after replacement compensation.

[0012] Real-time scheduling and integrity verification are performed based on the image data stream to obtain a data stream readiness status signal; according to the data stream readiness status signal, external commands are received and parsed through the CAN bus interface to obtain control signals;

[0013] According to the control signal, the bad pixel compensation function is dynamically configured, including enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored inside the FPGA, and feeding the updated mapping table back to the real-time compensation processing flow.

[0014] Secondly, a bad pixel detection and compensation control system includes:

[0015] The acquisition module is used to acquire multiple frames of raw image data during the on-orbit or laboratory calibration process of the camera; rigid registration processing is performed on the multiple frames of raw image data, and the registered image data is obtained by calculating the translation and rotation angles between the images and performing spatial transformation;

[0016] The structured module is used to perform statistical analysis on the response value of each pixel based on the registered image data, identify pixels whose response values ​​continuously deviate from the normal range as bad pixels, traverse and extract the spatial location information and attributes of the bad pixels, compile them into a structured data list, and obtain a bad pixel location mapping table.

[0017] The positioning module is used to load the bad pixel location mapping table; during real-time imaging by the camera, it locates and identifies bad pixels in the current row in real time according to the bad pixel mapping table, and obtains the real-time identified bad pixel information.

[0018] The compensation module is used to call the neighborhood pixel interpolation algorithm based on the bad pixel information, calculate the weighted average value of adjacent normal pixels in the same spectral band of the bad pixel, and replace the original pixel value of the bad pixel with this value to obtain the image data stream generated after replacement compensation.

[0019] The parsing module is used to perform real-time scheduling and integrity verification based on the image data stream to obtain a data stream readiness status signal; and to receive and parse external commands through the CAN bus interface to obtain control signals based on the data stream readiness status signal.

[0020] The dynamic configuration module is used to dynamically configure the bad pixel compensation function according to the control signal, including enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored in the FPGA, and feeding the updated mapping table back to the real-time compensation processing flow.

[0021] Thirdly, a computing device, comprising:

[0022] One or more processors;

[0023] A storage device for storing one or more programs that, when executed by one or more processors, cause the one or more processors to implement the method.

[0024] Fourthly, a computer-readable storage medium storing a program that, when executed by a processor, implements the method.

[0025] The above-described solution of the present invention has at least the following beneficial effects:

[0026] Acquiring multiple frames of raw image data provides a sufficient data foundation for subsequent rigid registration; generating a rigid transformation parameter set by calculating inter-frame translation and rotation angles quantifies inter-frame positional deviations; performing spatial transformation and resampling based on the parameter set eliminates inter-frame spatial misalignment and improves the accuracy of statistical results; calculating the mean and standard deviation of the response value of each pixel under different radiance levels accurately reflects individual pixel response characteristics; setting a dynamic threshold range based on the mean and standard deviation avoids the problem of insufficient adaptability of fixed thresholds to pixels with different response characteristics; comparing response values ​​pixel by pixel and filtering pixels that consistently exceed the threshold. The system effectively distinguishes between stable abnormal pixels and transient noise interference; it extracts the spatial location and attributes of bad pixels and compiles them into a structured data list, resulting in a well-formatted bad pixel location mapping table that facilitates rapid reading and retrieval by subsequent hardware; it loads the bad pixel location mapping table into the FPGA's internal high-speed storage unit, improving the table's reading speed; it performs real-time comparison of pixel coordinates while the camera outputs image data line by line, ensuring complete matching between bad pixel identification and imaging timing; it locates bad pixels in the current row through coordinate matching, and the generated bad pixel identification information directly provides accurate location information for subsequent compensation steps.

[0027] This process analyzes the location and spectral information of bad pixels to provide a basis for selecting normal pixels within the same spectral band. It filters normal pixels based on preset neighborhood windows, distance, and validity conditions, aligning with pixel spatial distribution patterns and grayscale correlation to ensure the representativeness of the selected normal pixels. Weight allocation and weighted averaging based on distance-weight mapping balances the impact of normal pixels at different locations on the compensation value. The compensation value replacement operation is synchronized with the image data stream transmission, ensuring the integrity of the output compensated data stream without data blockage. A data block geometric partitioning scheduling algorithm is used to partition and sort the data stream, improving data parallel processing efficiency. Data block timing scheduling is performed through FPGA internal logic circuits to match the camera imaging output rate. Frame integrity verification checks for packet loss and errors in data blocks. Addressing bit issues ensures image data quality; CAN bus receive commands are triggered based on data stream readiness status signals, optimizing bus resource usage; command parsing and cyclic redundancy checks guarantee the accuracy of control signals; control signals are parsed to extract opcodes and parameter fields, distinguishing command intent; function control commands quickly switch the compensation process enabled or disabled by configuring FPGA internal registers, adapting to different scenarios such as laboratory calibration and on-orbit observation; mapping table update commands perform write operations based on storage area addresses and update data, locating the storage area and ensuring the accuracy and timeliness of updated data; updated mapping tables are loaded into the real-time compensation query cache and take effect immediately without restarting the compensation process, ensuring the continuity of bad pixel compensation processing and improving the flexibility of dynamic function adjustments. Attached Figure Description

[0028] Figure 1 This is a schematic flowchart of a bad pixel detection and compensation control method provided by an embodiment of the present invention.

[0029] Figure 2 This is a schematic diagram of a bad pixel detection and compensation control system provided by an embodiment of the present invention. Detailed Implementation

[0030] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0031] like Figure 1 As shown, an embodiment of the present invention proposes a method for detecting and compensating for bad pixels, the method comprising the following steps:

[0032] Step 1: Acquire multiple frames of raw image data during the camera's on-orbit or laboratory calibration process; perform rigid registration processing on the multiple frames of raw image data, and obtain the registered image data by calculating the translation and rotation angles between the images and performing spatial transformation.

[0033] Step 2: Based on the registered image data, perform statistical analysis on the response value of each pixel, identify pixels whose response values ​​continuously deviate from the normal range as bad pixels; traverse and extract the spatial location information and attributes of the bad pixels, compile them into a structured data list, and obtain a bad pixel location mapping table.

[0034] Step 3: Load the bad pixel location mapping table; during real-time imaging by the camera, locate and identify bad pixels in the current row in real time according to the bad pixel mapping table, and obtain the real-time identified bad pixel information;

[0035] Step 4: Based on the bad pixel information, call the neighborhood pixel interpolation algorithm to calculate the weighted average value of adjacent normal pixels in the same spectral band of the bad pixel, and use this value to replace the original pixel value of the bad pixel to obtain the image data stream generated after replacement compensation.

[0036] Step 5: Perform real-time scheduling and integrity verification based on the image data stream to obtain a data stream ready status signal; according to the data stream ready status signal, receive and parse external commands through the CAN bus interface to obtain control signals;

[0037] Step 6: Based on the control signal, dynamically configure the bad pixel compensation function, including enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored inside the FPGA, and feeding the updated mapping table back to the real-time compensation processing flow.

[0038] In this embodiment of the invention, acquiring multiple frames of raw image data and performing rigid registration can eliminate translation and rotation interference between images, aligning the data space of multiple frames, providing a consistent data foundation for subsequent pixel response statistics, and ensuring the data uniformity of bad pixel detection. Based on the registration data, pixel responses are statistically analyzed and a structured bad pixel location mapping table is generated, which can identify continuously abnormal bad pixels. The bad pixel information is stored in a standardized manner for easy retrieval later, improving the usability of bad pixel identification results. Loading the mapping table and locating the bad pixels in the current row during real-time imaging, adapting to the row-by-row push-broom imaging sequence, can quickly match the bad pixel location, avoiding delays that affect image output, and ensuring... The system ensures timely localization of bad pixels in real-time imaging; it uses a neighborhood pixel interpolation algorithm to calculate compensation values ​​and replace the original values ​​of bad pixels, and utilizes weighted calculations of adjacent normal pixels in the same spectral band to maintain the continuity of the image grayscale space and ensure the naturalness of the image data stream after compensation; it schedules and verifies the image data stream and parses CAN bus commands to ensure complete and reliable data transmission, while also achieving coordination between data processing and external control to ensure a smooth image data stream link; it dynamically configures the compensation function and updates the mapping table stored in the FPGA, which can flexibly adapt to the needs of different imaging scenarios, adjust the bad pixel processing flow in real time, and the updated mapping table can be immediately fed back to the compensation process.

[0039] In a preferred embodiment of the present invention, step 1 above involves acquiring multiple frames of raw image data during the camera's on-orbit or laboratory calibration process; performing rigid registration processing on the multiple frames of raw image data, and obtaining registered image data by calculating the translation and rotation angles between images and performing spatial transformation, including:

[0040] Step 11: Acquire multiple frames of raw image data output during the camera's on-orbit or laboratory calibration process. Specifically, this includes: selecting the acquisition scene according to the camera's operating mode; for laboratory calibration, controlling the camera to align with the integrating sphere radiation source; for on-orbit calibration, switching to on-orbit calibration mode to coordinate with the entire satellite to complete a ±90-degree yaw maneuver; activating the eight TDI detectors of the camera's focal plane assembly to simultaneously acquire the full spectral band (450±20nm~800±20nm) and eight multispectral bands (B1: 450±20nm~520±20nm). The original image data (m to B8: 857±20nm~1039±20nm) was collected, with the panchromatic detector outputting 6144 pixels / line of original electrical signal conversion data and the multispectral detector outputting 1536 pixels / line of original electrical signal conversion data. At least 20 frames of original image data were continuously acquired at a frequency of not less than 0.1s between each frame of imaging, and the camera integration time (0.032 to 0.150ms for panchromatic and 0.128 to 0.600ms for multispectral) and attitude parameters were recorded at the time of each frame acquisition.

[0041] Step 12: Based on the multi-frame original image data, calculate the translation and rotation angles between each frame to obtain a set of rigid transformation parameters for image alignment. Specifically, this includes selecting the frame with the best imaging quality from the acquired multi-frame original image data as the reference frame. This frame must meet the conditions of uniform pixel grayscale distribution and no obvious noise interference (which can be determined by a grayscale standard deviation of less than or equal to 50DN and a noise pixel ratio of less than 0.1%). For example, in a laboratory calibration scenario, 20 frames of panchromatic (450±20nm~800±20nm) original images (pixel size 7μm×7μm, resolution 1024×1024 pixels) are acquired. Among them, the grayscale mean of the 8th frame image is 1850DN, the grayscale standard deviation is 32DN, the noise pixel ratio is 0.05%, and the integrating sphere target image is complete and distortion-free, which meets the optimal imaging quality standard and is determined as the reference frame.

[0042] In the reference frame and other frames to be registered, feature points in the overlapping areas between frames are extracted. In the laboratory calibration scene, the edge of the integrating sphere target is used as the feature point, and in the on-orbit scene, fixed ground features (such as building corners and road intersections) are used as the feature points. For example, in the laboratory calibration scene, the integrating sphere target in the reference frame (frame 8) is circular, and the coordinate range of its edge in the image is (200, 200) to (824, 824). Feature points with a 20-pixel interval on the edge are extracted, totaling 32, such as (200, 512), (300, 600), (512, 824), etc. In the 12th frame image to be registered, the edge position of the integrating sphere target is... With slight offset, 32 corresponding edge feature points are extracted, such as (202, 513), (301, 601), (513, 825), etc. In the on-orbit scene, the fixed ground object in the reference frame is a crossroads. The four corners of the crossroads are extracted as feature points, with coordinates of (350, 420), (350, 580), (550, 420), and (550, 580), respectively. In the 15th frame image to be registered, the position of the crossroads is slightly offset due to the small change in camera pose. The corresponding corner feature point coordinates are extracted as (352, 421), (352, 581), (552, 421), and (552, 581).

[0043] The corresponding feature point pairs between the reference frame and the frame to be registered are determined by a feature point matching algorithm (such as normalized cross-correlation matching). Based on the camera coordinate system (+X for flight direction, +Y for swath width direction, +Z for optical axis direction), the coordinate difference of each pair of feature points is calculated, thereby obtaining the X-direction translation, Y-direction translation, and rotation angle around the Z-axis of each frame to be registered relative to the reference frame. For example, for the reference frame (frame 8) and the frame to be registered (frame 12) in the laboratory calibration scenario, three sets of corresponding feature point pairs are selected: (200, 512) and (202, 513), (300, 600) and (301, 601), (512, 824) and (51... 3,825); The X coordinate differences for each pair of feature points were calculated to be 2, 1, and 1, and the average value was taken to obtain an X-direction translation of 1.3 pixels (equivalent to a physical distance of 1.3 × 7 μm = 9.1 μm); The Y coordinate differences were 1, 1, and 1, and the average value was taken to obtain a Y-direction translation of 1 pixel (7 μm); By fitting the coordinate deviation of the feature point pairs, the rotation angle of the frame to be registered relative to the reference frame around the Z-axis was calculated to be 0.08°; For the reference frame and the frame to be registered (frame 15) in the on-orbit scene, the X coordinate difference of the four sets of feature point pairs was 2 pixels (14 μm), the Y coordinate difference was 1 pixel (7 μm), and the rotation angle around the Z-axis was 0.05°.

[0044] All translation and rotation angles of the frames to be registered are organized into a structured rigid transformation parameter set. Each parameter is accompanied by a corresponding frame number. The parameter set format must include the frame number, X-axis translation (pixels / μm), Y-axis translation (pixels / μm), and Z-axis rotation angle (°) for easy indexing in subsequent steps. For example, part of the rigid transformation parameter set for 20 frames in a laboratory calibration scenario is as follows: Frame number 8 (reference frame), X-axis translation 0 pixels (pixels / μm), Y-axis translation 0 pixels (pixels / μm), Z-axis rotation angle (°). Frame number 12 (to be registered): X translation 1.3 pixels (9.1μm), Y translation 1 pixel (7μm), rotation angle 0.08°; Frame number 15 (to be registered): X translation 0.8 pixels (5.6μm), Y translation 0.9 pixels (6.3μm), rotation angle 0.06°; The remaining frames to be registered are supplemented in this format to form a complete rigid transformation parameter set.

[0045] Step 13: Based on the rigid transformation parameter set, perform spatial transformation and resampling operations on each frame of original image data to obtain spatially aligned registered image data. Specifically, this includes: using the reference frame determined in Step 12 as the spatial reference, calling the image preprocessing module in the focal plane circuit, and performing spatial transformation on each frame of original image data to be registered according to the translation and rotation angle of the corresponding frame in the rigid transformation parameter set; during the transformation process, adjusting the pixel position in the flight direction by the X-direction translation, adjusting the pixel position in the width direction by the Y-direction translation, and correcting the spatial position of the pixel by the rotation angle around the Z-axis. Orientation is ensured to maintain consistency between the pixel coordinate system of each frame after transformation and the reference frame. For pixel missing regions that appear after spatial transformation, a resampling method adapted to the TDI pushbroom imaging characteristics is adopted to supplement missing pixel data based on the gray values ​​of the four adjacent normal pixels around the missing region. The resampling process strictly controls the pixel position deviation to not exceed ±1 pixel size (7μm for panchromatic and 28μm for multispectral). After completing the spatial transformation and resampling of all frames, the registered image data that is completely aligned in space is output. This data must meet the stitching accuracy requirement of inter-frame pixel position deviation less than or equal to 5μm.

[0046] In this embodiment of the invention, acquiring multiple frames of raw image data during camera on-orbit or laboratory calibration can obtain sufficient data samples covering different scenarios, providing a complete raw data foundation for subsequent rigid registration and bad pixel detection, and ensuring the sufficiency of data sources for data processing; calculating a rigid transformation parameter set based on multiple frames of raw image data, extracting translation and rotation angle information between each frame image to form a definite image alignment basis, providing accurate parameter support for subsequent spatial transformation, and ensuring the accuracy of image alignment parameters; performing spatial transformation and resampling on the raw images according to the rigid transformation parameter set can enable each frame image to be spatially aligned, eliminating data misalignment caused by positional deviation between frames, providing a unified spatial benchmark for subsequent pixel response statistical analysis, and ensuring data consistency in subsequent processing.

[0047] In a preferred embodiment of the present invention, step 2 above involves statistically analyzing the response value of each pixel based on the registered image data, identifying pixels whose response values ​​continuously deviate from the normal range as bad pixels; traversing and extracting the spatial location information and attributes of the bad pixels, compiling them into a structured data list to obtain a bad pixel location mapping table, including:

[0048] Step 21: Based on the registered image data, calculate the mean and standard deviation of the response value of each pixel under different radiance conditions, and set a dynamic threshold range based on the mean and standard deviation. Specifically, this includes: selecting effective frames covering different radiance conditions from the registered image data. The selection criteria are no obvious motion blur within the frame and no sudden saturation in the pixel response (grayscale value does not exceed 4095DN, 12-bit quantization upper limit). In the laboratory calibration scenario, select image frames corresponding to 5 to 8 different radiance levels output by the integrating sphere; in the on-orbit scenario, select image frames corresponding to different reflectivity areas of the ground (such as Tibetan glaciers, vegetation, and bare land). For example, in the laboratory calibration scenario, the integrating sphere outputs 6 radiance levels, which are 50W / (m²). 2 •sr•μm), 100W / (m 2 •sr•μm), 150W / (m 2 •sr•μm), 200W / (m 2 •sr•μm), 250W / (m 2 •sr•μm), 300W / (m 2 For the spectral range of 450±20nm~800±20nm, pixel size 7μm×7μm), 6 registered panchromatic images were selected. Each image has a resolution of 1024×1024 pixels and meets the conditions of grayscale value range of 500~3800DN and no saturated pixels. For the on-orbit scene, for the observation area in Tibet, 4 registered multispectral images were selected, corresponding to the glacier area (ground reflectivity 0.8~0.9), alpine meadow vegetation area (reflectivity 0.2~0.3), bare soil area (reflectivity 0.1~0.15), and rock area (reflectivity 0.15~0.2), covering all spectral bands from B1 (450±20nm~520±20nm) to B8 (857±20nm~1039±20nm). Each frame has no motion blur and the pixel response is stable.

[0049] For each pixel, it is classified according to its spectral band (panchromatic 450±20nm~800±20nm, multispectral B1 to B8). After excluding abnormal data where the intra-frame grayscale value exceeds the normal response range of that spectral band (panchromatic 300~4000DN, multispectral 200~3900DN), the mean response value of that pixel in different radiance frames is calculated. Simultaneously, the standard deviation is obtained by summing the squared deviations of each frame's response value from the mean, then averaging and taking the square root. For example, for a panchromatic pixel in the full spectral band, the panchromatic pixel with coordinates (512, 512) in the registered image is selected. Its response values ​​in 6 radiance frames in the laboratory were 820DN, 1580DN, 2350DN, 3120DN, 3880DN, and 4050DN (all within the normal response range for full color). The mean was calculated as follows: first, sum the 6 response values ​​(820 + 1580 + 2350 + 3120 + 3880 + 4050 = 15800DN), then divide by the number of frames (6) to obtain the mean = 15800 / 6 ≈ 2633.33DN. The standard deviation was calculated by first calculating the squared deviation of each response value from the mean ((820 - 2633.33)). 2 ≈3,288,177.78, (1580-2633.33) 2 ≈1,109,502.22、(2350-2633.33) 2 ≈80, 277.78, (3120-2633.33) 2 ≈236,944.44, (3880-2633.33) 2 ≈1,554,202.22, (4050-2633.33) 2 ≈2,008,944.44), then sum the squared deviations (3,288,177.78+1,109,502.22+80,277.78+236,944.44+1,554,202.22+2,008,944.44=8,278,048.88), take the average (i.e., variance=8,278,048.88 / 6≈1,379,674.81), and finally take the square root to get the standard deviation ≈√1379674.81≈1174.6DN.

[0050] Multispectral B3 band pixels were selected, specifically the B3 (630±20nm~690±20nm) pixel at coordinates (300, 400). Its response values ​​in four frames representing different reflectance regions in Tibet were 1950DN (glacier), 680DN (vegetation), 420DN (bare soil), and 550DN (rock). The mean was calculated by summing the four response values ​​(1950+680+420+550=3600DN) and dividing by the frame number (4) to obtain the mean = 3600 / 4 = 900DN. The standard deviation was calculated by first calculating the squared deviation of each response value from the mean ((1950-900)). 2 =1,102,500,(680-900) 2 =48, 400, (420-900) 2 =230, 400, (550-900) 2 =122,500), then sum the squared deviations (1,102,500+48,400+230,400+122,500=1,503,800), take the average (i.e., variance=1,503,800 / 4=375,950), and finally take the square root to get the standard deviation≈√375950≈613.15DN.

[0051] A dynamic threshold range is set based on the mean and standard deviation of each pixel. Thresholds are set separately for the entire chromatographic segment and each multispectral segment (to avoid poor threshold adaptability due to differences in response between different spectral segments). The lower limit of the threshold is uniformly set as the mean minus twice the standard deviation, and the upper limit of the threshold is uniformly set as the mean plus twice the standard deviation. This ensures that the threshold range can cover normal response fluctuations of pixels and effectively distinguish bad pixels with abnormal responses. At the same time, the threshold boundary is adjusted in combination with the actual response characteristics of the pixels (no negative values, not exceeding the 12-bit quantization limit of 4095DN). For example, for a pixel (512, 512) in the entire chromatographic segment, the basic data of the pixel is first determined: the response values ​​are 820DN, 1580DN, 2350DN, 3120DN, 3880DN, and 4050DN, respectively. The sum is 15800DN, the mean is 15800÷6≈2633.33DN, and the standard deviation is ≈1174.6DN.

[0052] Lower threshold = mean - 2 × standard deviation ≈ 2633.33 - 2 × 1174.6 ≈ 2633.33 - 2349.2 ≈ 284.13 DN (since the pixel response value has no decimal, it is actually rounded to 284 DN); Upper threshold = mean + 2 × standard deviation ≈ 2633.33 + 2 × 1174.6 ≈ 2633.33 + 2349.2 ≈ 4982.53 DN; since the full-color pixel is 12-bit quantized, the maximum response value is 4095 DN, so the actual upper limit is 4095 DN; the final dynamic threshold range is 284~4095 DN.

[0053] Multispectral B3 band (300, 400) pixels, basic data for this pixel: response values ​​1950DN, 680DN, 420DN, 550DN, mean = 900DN, standard deviation ≈ 613.15DN; lower threshold = mean - 2 × standard deviation ≈ 900 - 2 × 613.15 ≈ 900 - 1226.3 ≈ -326.3DN; since there are no negative values ​​for pixel response values, the actual lower limit is 0DN; upper threshold = mean + 2 × standard deviation ≈ 900 + 2 × 613.15 ≈ 900 + 1226.3 ≈ 2126.3DN (actually rounded to 2126DN); the final dynamic threshold range is 0~2126DN.

[0054] The multispectral B5 band (760±20nm~830±20nm) pixels have the following basic data: mean 1200DN, standard deviation 520DN, lower threshold = mean - 2 × standard deviation = 1200 - 2 × 520 = 1200 - 1040 = 160DN; upper threshold = mean + 2 × standard deviation = 1200 + 2 × 520 = 1200 + 1040 = 2240DN; the final dynamic threshold range is 160~2240DN.

[0055] Step 22: Based on the dynamic threshold range, compare the response values ​​of each pixel, and identify pixels whose response values ​​continuously exceed the dynamic threshold range as bad pixels. Specifically, this includes: traversing each of the 8 TDI detectors on the camera's focal plane in the stitching order, and within each detector, traversing the registered image data according to the row priority principle (first increasing by row coordinates, then increasing by column coordinates); wherein each panchromatic detector contains 6144 columns of pixels (column coordinates 0 to 6143), and each multispectral detector contains 1536 columns of pixels (column coordinates 0 to 153). 5) The row coordinates increase synchronously with the continuously acquired frame sequence (frames 1 to 20 correspond to row coordinates 1 to 20), ensuring that no pixels are missed or repeated. For example, when traversing the No. 1 panchromatic detector, start from the pixel with row coordinate 1 and column coordinate 0, and traverse to the pixel with row coordinate 20 and column coordinate 6143. Then switch to the No. 2 panchromatic detector and traverse according to the same rule until all pixels of the 8 detectors (4 panchromatic, 4 multispectral, or 8 detectors containing panchromatic and multispectral integrated units, depending on the actual splicing structure) have been traversed.

[0056] For each traversed pixel, the dynamic threshold range of its corresponding spectral band is retrieved (e.g., pixels in the full spectral band correspond to 284~4095 DN, and pixels in the B3 spectral band correspond to 0~2126 DN). Frame by frame (20 consecutively acquired frames, frame numbers 1 to 20), the response value of the pixel in the current frame is compared with the threshold range: if the response value is lower than the lower threshold limit or higher than the upper threshold limit, it is recorded as an over-threshold frame; if the response value is between the lower and upper threshold limits, it is recorded as a normal frame. After each frame comparison, the over-threshold frame counter for that pixel is updated to ensure that the frame sequence and the counter are synchronized. For example: Case 1 (full spectral band bad pixel identification): Select the pixel at coordinates (100, 200) of panchromatic detector 1, whose dynamic threshold range is 284~4095 DN. The response values ​​for the next 20 frames are as follows: 250DN (below the lower limit), 245DN (below the lower limit), 260DN (below the lower limit), 275DN (below the lower limit), 280DN (below the lower limit), 290DN (normal), 255DN (below the lower limit), 240DN (below the lower limit), 230DN (below the lower limit), 265DN (below the lower limit), 270DN (below the lower limit), 282DN (below the lower limit), 258DN (below the lower limit), 248DN (below the lower limit), 235DN (below the lower limit), 262DN (below the lower limit), 278DN (below the lower limit), 283DN (below the lower limit), 252DN (below the lower limit), and 242DN (below the lower limit). After frame-by-frame comparison, the frame count counter for exceeding the threshold shows 19 frames (only the 6th frame is normal).

[0057] Case 2 (Determination of normal pixels in the B3 band of multispectral spectrum): Select the B3 pixel at coordinates (50, 80) of multispectral detector No. 3. The dynamic threshold range is 0~2126DN. In 20 consecutive frames of response values, only frame No. 5 (2200DN, exceeding the upper limit), frame No. 12 (2150DN, exceeding the upper limit), and frame No. 18 (2180DN, exceeding the upper limit) exceed the threshold, a total of 3 frames. The frame count counter for exceeding the threshold shows 3 frames.

[0058] The following criteria are set for consistently exceeding the threshold: If a pixel exceeds the threshold for 18 or more frames out of 20 consecutively acquired frames, its response characteristics are considered abnormally stable, and it is identified as a bad pixel. If the number of frames exceeding the threshold is less than 18, it is considered a normal pixel and is not included in the bad pixel statistics. Simultaneously, the distribution of frames exceeding the threshold is marked for each identified bad pixel (e.g., frames 1 to 5, 7 to 20 exceeding the threshold) to facilitate subsequent tracking of abnormal patterns. During the identification process, instantaneous noise verification is performed on pixels with fewer than 18 frames exceeding the threshold: If the frame exceeding the threshold is an isolated frame (e.g., only one frame exceeds the threshold, and the adjacent frames are normal), and the threshold exceedance is small (e.g., exceeding the upper limit by less than or equal to 50 DN or falling below the lower limit by less than or equal to 50 DN), it is determined to be single-frame instantaneous noise interference (e.g., instantaneous spatial particle noise). Pixels affected by bombardment or single-frame circuit voltage fluctuations are not included in the bad pixel statistics. If the frames exceeding the threshold are continuously distributed (e.g., 3 consecutive frames exceeding the threshold), further verification is required using historical pixel response data to avoid misjudgment. For example, if a pixel with coordinates (300, 450) is selected from the No. 2 panchromatic detector, with a dynamic threshold range of 284~4095 DN, only frame number 10 has a response value of 4150 DN (55 DN above the upper limit) in 20 consecutive frames. The other 19 frames are all within the range of 284~4095 DN. Frames 9 (3800 DN) and 11 (3750 DN) before and after the frame exceeding the threshold are normal and are judged as transient noise interference, not identified as bad pixels. Finally, only pixels with 18 or more frames exceeding the threshold are selected as bad pixels to ensure the accuracy of bad pixel identification.

[0059] Step 23: Traverse all identified bad pixels, extract their respective detector chip number, spectral band number, and row and column coordinate information to obtain the spatial location and attribute information of the bad pixels. Specifically, this includes: traversing all identified bad pixels sequentially by detector chip number (1 to 8), first determining the physical detector number to which each bad pixel belongs; based on the grayscale response characteristics and filter parameters of the bad pixels, distinguishing their respective spectral band type (panchromatic or B1 to B8 multispectral), and recording the corresponding spectral band number; based on the camera coordinate system (+X for flight direction, +Y for swath width direction), reading the row coordinates (corresponding to the X direction) and column coordinates (corresponding to the Y direction) of the bad pixels within the detector chip, where the row and column coordinates of panchromatic pixels are recorded according to the pixel position corresponding to a 7μm pixel size, and the pixel position of multispectral pixels is recorded according to the pixel position corresponding to a 28μm pixel size; integrating the detector chip number, spectral band number, and row and column coordinates to form the spatial location and attribute information of each bad pixel.

[0060] Step 24: Compile the spatial location and attribute information of the bad pixels into a structured data list to generate a bad pixel location mapping table. Specifically, this includes: First, determining the format of the structured data list, which requires defining the core information and value specifications for each bad pixel data entry to ensure completeness and unambiguity. The detector chip number identifies the focal plane detector to which the bad pixel belongs, with a value range of 1 to 8 (corresponding to the 8 TDI detectors on the camera's focal plane). The spectral band identifier distinguishes the spectral band to which the pixel belongs; the full spectral band is represented by P (covering 450±20nm~800±20nm), and the multispectral bands are represented by B1 to B8 (corresponding to 450±20nm~520±20nm respectively). The range is 20nm to 857±20nm~1039±20nm); the row number reflects the position of the bad pixel in the push-broom imaging direction, with the full chromatographic band row number ranging from 0 to 6143 and the multispectral band row number ranging from 0 to 1535 (matching the number of imaging rows of the two types of detectors); the column number reflects the position of the bad pixel in the swath direction, with the full chromatographic band column number ranging from 0 to 6143 (corresponding to 6144 pixels per panchromatic detector) and the multispectral band column number ranging from 0 to 1535 (corresponding to 1536 pixels per multispectral detector); the fields of each data entry are arranged in a fixed order of detector chip number, spectral band identifier, row number, and column number to ensure that each attribute can be quickly analyzed during subsequent processing.

[0061] Next, the data is compiled in groups by spectral band. The purpose is to achieve orderly management of bad pixel data in different spectral bands, which facilitates rapid retrieval. First, all bad pixels in the full spectral band are screened out and sorted according to the rules of detector chip number from smallest to largest (1 to 8), row number within the same detector from smallest to largest (0 to 6143), and column number within the same row from smallest to largest (0 to 6143), and integrated into full spectral group data. Then, the multispectral bands are processed sequentially, from B1 to B8. The bad pixels in each spectral band are sorted according to the same rules of detector chip number, row number, and column number, forming groups B1 to B8 respectively. To further distinguish between different spectral band groups, a 1-byte spectral band identifier header is added at the beginning of each group of data. For example, the full spectral band is identified by 0x00, group B1 by 0x01, group B2 by 0x02, and so on up to group B8 by 0x08, ensuring that the FPGA can quickly locate the data range of the target spectral band through the identifier header when reading.

[0062] Next, the compiled structured data list is converted into a binary format adapted for FPGA reading of the focal plane circuit to improve hardware retrieval efficiency. The specific conversion rules are as follows: detector chip numbers (1 to 8) are converted into 8-bit binary numbers (e.g., detector chip number 3 is converted into 00000011); spectral segment identifiers are converted into preset 8-bit binary codes (e.g., P corresponds to 00000001, B1 corresponds to 00000010, B2 corresponds to 00000011, up to B8 corresponding to 00001001); row numbers and column numbers are converted into 16-bit binary numbers (e.g., full chromatographic segment row number 1200 is converted into 00000100101100). 00, column number 4500 is converted to 0001000110010100); each data occupies a fixed 6 bytes (8 bits + 8 bits + 16 bits + 16 bits), and is concatenated in the order of detector chip number binary, spectral segment identifier binary, row number binary, and column number binary, and stored as a whole in the specified address range of the FPGA external non-volatile memory (such as SPIFlash). The data of the full color group and B1 to B8 groups are stored sequentially. For example, the starting address of the full color group is 0x000000, and the starting address of the B1 group is 0x020000, so that the FPGA can directly access the bad image metadata of the target spectral segment through the address index.

[0063] Finally, after generating the bad pixel location mapping table, a version number and a timestamp are added synchronously for data management and traceability. The version number is 2 bytes and uses a major version number plus a minor version number encoding method. For example, V1.0 corresponds to 0000000100000000, and V1.1 corresponds to 0000000100000001. This makes it easy to distinguish the mapping tables generated in different batches and avoids confusion of old data during updates. The timestamp is 6 bytes and is encoded in the format of year (2 bytes), month (1 byte), day (1 byte), hour (1 byte), and minute (1 byte). For example, 15:30 on April 20, 2024 is encoded as 0000011111100100 (year), 00000100 (month), 00010100 (day), 00001111 (hour), and 00011110 (minute). This records the generation time of the mapping table and facilitates the tracing of the bad pixel metadata update history during subsequent on-orbit operation.

[0064] In this embodiment of the invention, the mean and standard deviation of the response values ​​of each pixel under different radiance are calculated based on the registered image data. This fully utilizes the statistical characteristics of multi-frame data, allowing the threshold setting to closely match the actual response patterns of the pixels. The set dynamic threshold range can be adaptively adjusted with changes in radiance, adapting to the different response characteristics of the camera's panchromatic and eight multispectral bands. This avoids misjudgments under complex irradiation conditions due to fixed thresholds, ensuring the adaptability of bad pixel identification. By comparing the response values ​​pixel by pixel according to the dynamic threshold range, and only identifying pixels that continuously exceed the threshold as bad pixels, temporary response anomalies caused by accidental noise (such as instantaneous spatial interference) in single-frame data can be effectively eliminated, reducing misidentification. Through the criterion of continuous exceedance, pixels with stable and abnormal response characteristics can be accurately screened, meeting the requirements of long-term on-orbit imaging (design life of 5 years) for the stability of bad pixel identification and improving the bad pixel identification results. The system ensures accuracy; it traverses bad pixels and extracts their detector chip number, spectral band number, and row and column coordinate information to determine the physical ownership and spatial location of bad pixels, adapting to the focal plane structure of a camera with 8 TDI detectors stitched together (6144 pixels / panchromatic and 1536 pixels / multispectral); it also distinguishes spectral band attributes, providing key basis for calling neighboring pixels of the same spectral band during subsequent real-time compensation, ensuring the integrity and usability of bad pixel information; it compiles the spatial location and attribute information of bad pixels into a structured data list, enabling the mapping table to conform to the data storage format of the camera's focal plane circuit, facilitating fast reading and retrieval by the FPGA (focal plane circuit core control unit); the generated bad pixel location mapping table can be directly used for bad pixel localization during subsequent real-time imaging without additional data conversion steps, adapting to the camera's high data rate (total data rate 27.832Gbps) real-time processing requirements and improving data retrieval efficiency.

[0065] In a preferred embodiment of the present invention, step 3 above involves loading the bad pixel location mapping table; during real-time imaging by the camera, bad pixels in the current row are located and identified in real time according to the bad pixel mapping table, and the real-time identified bad pixel information is obtained, including:

[0066] Step 31 involves reading the bad pixel location mapping table from the memory and loading it into the high-speed storage unit inside the FPGA to obtain the loaded bad pixel location mapping table. Specifically, this includes: determining that the storage location of the bad pixel location mapping table is the external non-volatile memory of the camera focal plane circuit, which is connected to the focal plane circuit FPGA via an SPI interface; starting the FPGA's mapping table reading logic, reading the mapping table data block by block from the external memory according to spectral band groups (panchromatic P, multispectral B1 to B8), verifying data integrity during the reading process, checking the mapping table version number and generation timestamp to ensure that the data is not damaged. The data is corrupted or tampered with. The read mapping table data is loaded into the BlockRAM high-speed storage unit inside the FPGA by spectral segment partition. The full-spectrum mapping table occupies a separate storage partition, and the multispectral mapping tables B1 to B8 occupy the remaining partitions in sequence according to the spectral segment number. Each partition is set with an address index (corresponding to the detector chip number and pixel row and column range) to adapt to the splicing structure of 8 TDI detectors (6144 pixels per panchromatic detector and 1536 pixels per multispectral detector), ensuring that the subsequent reading latency is less than or equal to 10ns, which meets the real-time processing requirements of the camera's total data rate of 27.832Gbps.

[0067] Step 32: Based on the loaded bad pixel location mapping table, when the camera outputs image data line by line during real-time imaging, the pixel coordinates of each pixel in the current line are compared with the coordinate data in the bad pixel location mapping table in real time to obtain the comparison result. Specifically, after the camera enters the real-time pushbroom imaging mode, the focal plane circuit outputs image data line by line according to the TDI pushbroom timing sequence, and a line synchronization signal is triggered before each line is output; based on the line synchronization signal, the FPGA first determines the detector chip number (1 to 8) and spectral type (panchromatic or a certain multi-spectral) to which the current line belongs. The system first extracts the pixel coordinates of each pixel in the current row based on the camera coordinate system (+X for flight direction, +Y for swath width direction). The coordinate range for panchromatic pixels is 0 to 6143, and for multispectral pixels it is 0 to 1535. A secondary spatial index is constructed and calculations are performed. The primary index directly matches the detector chip number (1 to 8) of the current row, corresponding to the eight primary partitions in the high-speed storage unit divided by detector chip number. The secondary index is calculated by dividing the spectrum into intervals based on the total number of pixels in the spectral band. Panchromatic pixels are divided into intervals of 1024 columns. Divide the pixel into sub-intervals, divide the current panchromatic pixel column coordinate by 1024 and take the integer quotient (e.g., when the column coordinate is 3500, 3500 divided by 1024 equals 3, take the quotient 3), and determine the corresponding secondary sub-interval index (6 intervals from 0 to 5). For multispectral pixels, divide them into sub-intervals of every 256 columns, divide the current multispectral pixel column coordinate by 256 and take the integer quotient (e.g., when the column coordinate is 800, 800 divided by 256 equals 3, take the quotient 3), and determine the corresponding secondary sub-interval index (6 intervals from 0 to 5). Based on the primary index and... The calculation results of the secondary index locate the specific sub-partition of the bad pixel location mapping table in the high-speed storage unit; the parallel comparison logic inside the FPGA is called to compare the pixel coordinates of each pixel in the current row with the coordinate data of the bad pixels in the located sub-partition point by point. The comparison process adopts pipeline operation, and the coordinate matching of 4 pixels is completed per clock cycle, ensuring that the comparison speed is perfectly matched with the image data output rate (0.032 to 0.150 ms per line for panchromatic and 0.128 to 0.600 ms for multispectral) to avoid data blocking.

[0068] Step 33: Based on the comparison results, pixels whose pixel coordinates match the coordinates recorded in the bad pixel location mapping table are identified as bad pixels, and the bad pixel identification information of the current row is obtained as the bad pixel information identified in real time. Specifically, this includes: based on the parallel comparison results (such as synchronously comparing all pixel coordinates of the current row with the coordinates in the mapping table through the FPGA parallel processing module), filtering out pixels whose pixel coordinates completely match the coordinates recorded in the mapping table; for example: assuming the parameter of the current image row is "Spectral band number: 3 (visible light wave)". The camera consists of 4 detectors stitched together, and the current row number is 156. This row contains 2048 pixels with pixel coordinates ranging from (156, 1) to (156, 2048). In the bad pixel location mapping table, the bad pixel records in row 156 corresponding to "Segment 3 - Detector 2" are (156, 45), (156, 982), and (156, 1720). After parallel comparison, 3 pixels with perfectly matching coordinates are directly selected and preliminarily determined to be bad pixels in the current row.

[0069] Complete identification information is generated for the selected bad pixels and the normal pixels in the current row. The identification information must include the row and column coordinates of the bad pixel in the current row, the detector patch number, the spectral band number, and an additional flag bit (rule: 1 indicates a bad pixel, 0 indicates a normal pixel). For example: the identification information generated for the bad pixel (156, 45) is: "Row: 156, Column: 45, Detector patch number: 2, Spectral band number: 3, Flag bit: 1"; the identification information generated for the adjacent normal pixel (156, 46) is: "Row: 156, Column: 46, Detector patch number: 2, Spectral band number: 3, Flag bit: 0"; all 2048 pixels in this row are generated with unique identification information in this format to ensure that the attributes of each pixel are traceable.

[0070] The generated 2048 pixel identification information is embedded into the auxiliary data segment of the current row of image data (the image data format is defined as "grayscale data segment + auxiliary data segment", where the grayscale data segment stores the 12-bit grayscale value of each pixel, and the auxiliary data segment stores the 24-bit identification information of each pixel, and the two correspond one-to-one in pixel order), so as to realize the synchronous output of identification information and image grayscale data; for example, the grayscale data of the 45th pixel in the current row is "0x1A3" (12 bits), and its auxiliary data segment stores the identification information "0x09C2D001" (24 bits, where "0x09C" corresponds to row 156, "0x2D" corresponds to column 45, "0x2" corresponds to detector chip number 2, "0x3" corresponds to spectrum band 3, and "0x1" corresponds to flag bit 1). During output, the two are transmitted synchronously through the same data channel.

[0071] Before outputting, the identification information needs to be double-validated to ensure that there are no mislabeled or missing labels: count the number of bad pixels in "Spectrum 3-Detector 2-Row 156" in the bad pixel location mapping table (3 in this example), and compare it with the number of pixels with a marker bit of 1 identified in the current row. If they match, the quantity verification passes; randomly select 5% of the identification information (such as the 10th, 45th, 982nd, 1500th, and 2048th pixels), and check whether their row and column coordinates, detector piece number, spectrum number match the parameters of the current row, and whether the marker bit matches the record in the mapping table. If there is no deviation, the attribute verification passes.

[0072] After verification, a real-time image data stream containing bad pixel identifiers is generated. This data stream can provide the bad pixel location basis for subsequent "neighborhood interpolation compensation in the same spectral band". The entire identifier process (comparison-generation-embedding-verification) only takes 3 clock cycles and is completely synchronized with the line frequency of camera push-broom imaging (e.g., 1000 lines / second). Each clock cycle outputs a set of "grayscale data + identifier information", which does not affect the continuity of camera push-broom imaging.

[0073] In this embodiment of the invention, the bad pixel location mapping table is loaded into the high-speed storage unit inside the FPGA. Leveraging the FPGA's high-speed data processing capabilities (the core control unit of the focal plane circuit, responsible for detector driving and image preprocessing), the reading and access speed of the mapping table is improved; external data transmission links during mapping table calls are reduced, lowering data latency and adapting to the camera's high data rate (total data rate 27.832Gbps) real-time imaging requirements. This provides efficient data support for subsequent line-by-line comparison, ensuring the timing stability of the real-time processing flow. When the camera outputs image data line by line (a core feature of TDI pushbroom imaging, real-time imaging is output line by line pushbroom), a real-time comparison of the current row's pixel coordinates with the mapping table coordinates is performed simultaneously, which can match the output rhythm of the imaging data. To avoid high latency caused by accumulating and comparing full-frame data, line-by-line comparison focuses only on the current processing line, reducing the amount of data compared per comparison, lowering the FPGA's computational load, ensuring that the comparison process matches the image output rate, and not affecting the smoothness of the overall data transmission link; bad pixels are identified through coordinate matching, which can accurately correspond to the stitching structure of the 8 detectors on the camera's focal plane (6144 pixels / piece for panchromatic and 1536 pixels / piece for multispectral), ensuring that the location of bad pixels does not deviate from their actual physical location; the generated bad pixel identification information is directly associated with the positional attributes of the bad pixels in the current row, and can be passed to subsequent compensation steps (neighborhood interpolation compensation) without additional parsing, simplifying the data flow process, improving the continuity and efficiency of the bad pixel processing link, and adapting to the continuous requirements of focal plane circuit image preprocessing.

[0074] In a preferred embodiment of the present invention, step 4 above, based on the bad pixel information, calls a neighborhood pixel interpolation algorithm to calculate the weighted average value of adjacent normal pixels within the same spectral band of the bad pixel, and replaces the original pixel value of the bad pixel with this value to obtain the image data stream generated after replacement compensation, including:

[0075] Step 41: Based on the real-time identified bad pixel information, analyze and obtain the location of the bad pixel that needs compensation and its corresponding spectral band information. Specifically, this includes: the FPGA receiving the real-time identified bad pixel information output in step 33, which includes the detector chip number (1 to 8), spectral band identifier (panchromatic P or multispectral B1 to B8), row coordinates (corresponding to the camera's +X flight direction), and column coordinates (corresponding to the +Y swath direction) of the bad pixel; starting the information parsing logic inside the FPGA, first extracting the detector chip number and row and column coordinates from the bad pixel information, and combining this with the stitching layout of the 8 TDI detectors on the camera's focal plane (each panchromatic chip contains 6144 pixels, and each multispectral chip contains 1536 pixels), determining the specific location of the bad pixel on the camera's physical focal plane, and eliminating the possibility of damage caused by detector stitching. To address potential coordinate ambiguities, spectral segment identification information is extracted. Based on the spectral segment identification, the type of bad pixel is distinguished. The panchromatic segment identification corresponds to the spectral segment of 450±20nm~800±20nm, and the B1 to B8 segments correspond to eight multispectral segments of 450±20nm~520±20nm to 857±20nm~1039±20nm, respectively. The obtained bad pixel location (detector chip number + row and column coordinates) and its corresponding spectral segment information are temporarily stored in the FPGA's temporary data buffer according to a preset format. The buffer is partitioned by spectral segment to ensure fast indexing in subsequent steps, while adapting to the real-time processing rhythm of the focal plane circuit for image data (panchromatic imaging time per line is 0.032 to 0.150ms, multispectral is 0.128 to 0.600ms).

[0076] Step 42: Based on the location and spectral band information of the bad pixel, the row and column coordinates of the target bad pixel and its spectral band identifier are parsed and obtained; based on the row and column coordinates and spectral band identifier, a neighborhood pixel interpolation algorithm is invoked, and according to the preset neighborhood window size and shape rules, adjacent normal pixels within the same spectral band of the bad pixel that meet the distance and validity conditions are searched and filtered to obtain a set of normal pixels. Specifically, this includes: the FPGA reading the location and spectral band information of the bad pixel from the temporary data buffer, and further parsing to obtain the target bad pixel. The precise row and column coordinates of the pixels are determined, with column coordinates ranging from 0 to 6143 for panchromatic bad pixels and from 0 to 1535 for multispectral bad pixels. Row coordinates increase row by row as the camera pushes through the image. Simultaneously, the spectral band identifier of the target bad pixel is determined; for example, identifier P corresponds to the panchromatic band, and identifier B3 corresponds to the 630±20nm~690±20nm multispectral band. Based on the analytical results, a preset neighborhood pixel interpolation algorithm in the focal plane circuit is invoked. First, the size and shape of the corresponding neighborhood window are set according to the spectral band to which the bad pixel belongs. Therefore, for the full spectral band, due to the small pixel size (7μm×7μm), a 3×3 rectangular window is used (centered on the bad pixel, covering one row and one column of pixels above, below, left, and right). For the multispectral band, due to the larger pixel size (28μm×28μm), a 3×3 or 5×5 rectangular window is used (which can be switched via CAN bus commands according to the imaging task requirements). The shape is uniformly centrally symmetrical to ensure spatial correlation. Adjacent pixels within the same spectral band are searched according to the set neighborhood window. During the search, bad pixels are excluded by comparing with the bad pixel position mapping table. For other identified bad pixels, distance conditions (the difference between the row and column coordinates of adjacent pixels and bad pixels does not exceed the window radius, such as a 3×3 window where the difference does not exceed 1) and validity conditions (the gray value of adjacent pixels is within the normal response range of the spectral band, with the normal gray value range of 0 to 4095 DN for panchromatic and 0 to 4095 DN for multispectral) are set. Adjacent pixels that meet both conditions are selected, and the row and column coordinates and pixel values ​​of these pixels are organized into a set of normal pixels and stored in a dedicated data queue of the FPGA for subsequent processing.

[0077] Step 43: Obtain the pixel value of each normal pixel in the normal pixel set and its spatial distance to the target bad pixel; assign a corresponding weight coefficient to each normal pixel according to the preset distance-weight mapping relationship; calculate the weighted sum of the pixel values ​​of all normal pixels based on the pixel values ​​and weight coefficients, and divide the weighted sum by the sum of the weight coefficients to obtain the bad pixel compensation value. Specifically, this includes: first, completing the preset distance-weight mapping relationship, which is based on the camera hardware characteristics and laboratory calibration test results, specifically: combining the pixel size parameters of the camera focal plane detector (full... Using 7μm×7μm color pixels and 28μm×28μm multispectral pixels, and with the window size (3×3 or 5×5 rectangular window) adapted to the neighborhood pixel interpolation algorithm, the spatial distance range between normal and bad pixels was determined. In a laboratory environment, different radiance conditions were simulated using an integrating sphere (covering the radiance range from 0.65 ground reflectivity at a solar altitude angle of 70° to 0.05 ground reflectivity at a solar altitude angle of 20°). Panchromatic (450±20nm~800±20nm) and eight multispectral bands (B1 to B8) were collected to measure the spatial distance between normal and bad pixels at different distances. The grayscale response correlation of normal pixels was analyzed. Data analysis revealed that normal pixels closer to the center pixel showed smaller deviations in grayscale values ​​from the center pixel, indicating stronger representativeness of the center pixel's grayscale. Based on this, a weighting rule was determined: in the full spectral range, normal pixels with a spatial distance of 7 μm (corresponding to a row-column coordinate difference of 1 within a 3×3 window) were assigned a weighting coefficient of 0.6 due to their strongest grayscale correlation; normal pixels with a spatial distance of 14 μm (row-column coordinate difference of 2) were assigned a weighting coefficient of 0.4; in the multispectral range, normal pixels with a spatial distance of 28 μm (row-column coordinate difference of 1) were assigned a weighting coefficient of... A weight coefficient of 0.6 is assigned to normal pixels with a spatial distance of 56μm (row and column coordinate difference of 2), and a weight coefficient of 0.4 is assigned to ensure that the weight allocation conforms to the spatial gradation law of pixel grayscale. At the same time, combined with the camera radiometric calibration accuracy requirements (absolute calibration accuracy less than or equal to 7%), multiple rounds of testing are conducted to verify that the deviation between the compensation value and the true grayscale value under this weight allocation is less than or equal to 7%. Finally, the determined distance-weight correspondence is compiled into a binary data table and stored in the BlockRAM high-speed storage unit inside the FPGA to form a preset distance-weight mapping relationship table.

[0078] The FPGA reads the set of normal pixels from a dedicated data queue, extracts the pixel value of each normal pixel (both panchromatic and multispectral are 12-bit quantized values), and calculates the spatial distance between the normal pixel and the target bad pixel based on their row and column coordinates. During the calculation, the pixel size is considered: panchromatic pixels are converted to a 7μm side length for the actual physical distance (e.g., a row and column coordinate difference of 1 corresponds to a 7μm spatial distance), and multispectral pixels are converted to a 28μm side length (e.g., a row and column coordinate difference of 1 corresponds to a 28μm spatial distance). The FPGA then calls a pre-set distance-weight mapping table in its internal BlockRAM, matching the calculated spatial distance to the corresponding weight coefficient in the table. For example, a weight coefficient of 0.6 is matched when the spatial distance for the panchromatic spectrum is 7μm, and the spatial distance is 14μm. A weighting coefficient of 0.4 is used for normal pixels, 0.6 for multispectral bands with a spatial distance of 28 μm, and 0.4 for a spatial distance of 56 μm, ensuring that normal pixels closer to the bad pixel have a greater impact on the compensation value. Based on the pixel value of each normal pixel and its corresponding weighting coefficient, the product of the pixel value and the weighting coefficient is calculated by the parallel multiplier of the FPGA, and then all products are accumulated by the adder to obtain a weighted sum. At the same time, the weighting coefficients of all normal pixels are accumulated to obtain the total weighting coefficients. Finally, the weighted sum is divided by the total weighting coefficients by the divider of the FPGA to obtain the compensation value of the target bad pixel. The compensation value retains the same 12-bit quantization precision as the original pixel value to ensure that the radiometric calibration accuracy meets the requirements (absolute calibration accuracy less than or equal to 7%).

[0079] Step 44: Replace the original pixel value of the corresponding bad pixel with the bad pixel compensation value to obtain all the replaced and compensated pixel data, resulting in the image data stream generated after replacement and compensation. Specifically, the FPGA locates the original pixel value storage location of the bad pixel in the current row image data stream output by the camera real-time pushbroom based on the row and column coordinates of the target bad pixel. This data stream is transmitted row by row according to the TDI pushbroom timing sequence, and each row contains pixel grayscale data and auxiliary data. The bad pixel compensation value calculated in step 43 is directly written into the storage location of the original pixel value to complete the replacement operation. The replacement process is strictly synchronized with the transmission timing of the image data stream to avoid data misalignment due to replacement delay, ensuring an imaging cycle of 0.032 to 0.150 ms per line for panchromatic and 0.128 to 0.600 ms for multispectral. During the period, the replacement of a single bad pixel is completed; the above replacement operation is repeated for all identified bad pixels until the original pixel values ​​of all bad pixels in the current row are replaced by the corresponding compensation values; after the replacement is completed, the FPGA performs validity verification on the compensated pixel data of the current row, checking whether the compensation value is within the normal grayscale range of the spectral band (panchromatic 0 to 4095DN, multispectral 0 to 4095DN). If there is a compensation value that exceeds the range, a recalculation mechanism is triggered. If all requirements are met, the compensated pixel data of the current row is integrated with the auxiliary data according to the preset format; according to the camera data output interface specification (CXP physical interface, line rate 3.125Gbps, 8B / 10B encoding), the integrated pixel data is transmitted to the subsequent data stream scheduling stage to form the image data stream generated after replacement and compensation.

[0080] In this embodiment of the invention, by analyzing the location of the bad pixel and its spectral band information, the target pixel requiring compensation can be located, and its spectral band attribute (panchromatic or B1 to B8 multispectral) can be determined. This adapts to the differences in the response characteristics of the camera's panchromatic and multispectral bands (panchromatic 450±20nm~800±20nm, different wavelength ranges for each band in multispectral spectrum), providing a basis for subsequent selection of neighboring pixels only within the same spectral band, avoiding spectral response deviations introduced by cross-band compensation, and ensuring the accuracy of the compensation direction. The row and column coordinates of the bad pixel are also determined. The label and spectral band identifier can fit the stitching structure of the 8 detectors on the camera's focal plane (6144 pixels per panchromatic element and 1536 pixels per multispectral element) to locate the physical position of bad pixels within the detector; it filters normal pixels within the same spectral band according to preset neighborhood window size and shape rules, adapting to a regular pixel grid distribution (7μm×7μm for panchromatic and 28μm×28μm for multispectral), ensuring strong spatial correlation between the filtered normal and bad pixels; simultaneously, it filters abnormal pixels based on distance and validity conditions to ensure that normal pixels are properly identified. The reliability of the normal pixel set provides a high-quality data foundation for subsequent weighted calculations. Obtaining the pixel values ​​and spatial distances of normal pixels, and combining this with a preset distance-weight mapping to assign weight coefficients, allows for the utilization of spatial grayscale correlation between pixels. Normal pixels closer to bad pixels are assigned higher weights, aligning with the natural spatial gradation of image grayscale. Compensation values ​​are obtained through weighted summation and total weight calculations, balancing the influence of normal pixels at different locations and avoiding compensation errors caused by single pixel deviations, thus meeting the grayscale accuracy requirements of high-resolution camera imaging. Replacing the original pixel values ​​of bad pixels with the compensation values ​​directly corrects abnormal pixel data, ensuring that the output image data stream is free of significant bad pixel noise. The replacement process is synchronized with the camera's TDI push-broom line-by-line output timing, ensuring uninterrupted data transmission and meeting the real-time processing requirements of the camera's total data rate of 27.832Gbps. The generated compensated image data stream can be directly connected to subsequent real-time scheduling and integrity verification stages without additional data format conversion, improving the continuity and overall efficiency of the bad pixel processing chain.

[0081] In a preferred embodiment of the present invention, step 5 above involves real-time scheduling and integrity verification based on the image data stream to obtain a data stream readiness status signal; and receiving and parsing external commands through the CAN bus interface based on the data stream readiness status signal to obtain control signals, including:

[0082] Step 51: Based on the image data stream, the data block geometric partitioning scheduling algorithm is invoked to geometrically partition and schedule the data stream according to the preset image block division rules, resulting in partitioned and scheduled image data blocks. Specifically, the FPGA receives the replaced and compensated image data stream output in step 44. This data stream contains pixel data of panchromatic (450±20nm~800±20nm) and 8 multispectral bands (B1 to B8), and is transmitted line by line according to the TDI push-broom timing, with a total data rate of 27. 832Gbps; Based on this data stream, the preset data block geometric partitioning scheduling algorithm in the focal plane circuit is invoked. First, the preset image block division rules are determined. These rules are set in combination with the stitching structure of the 8 TDI detectors on the camera's focal plane (each panchromatic detector contains 6144 pixels, and each multispectral detector contains 1536 pixels) and spectral characteristics. Specifically, the image is divided into 8 primary partitions according to the detector chip number (1 to 8). Each primary partition is further divided into sub-partitions according to the spectral band (e.g., detector partition 1 contains a panchromatic sub-partition and sub-partitions B1 to B8). The image data stream is divided into spectral sub-partitions and data blocks. The panchromatic sub-partition is divided into data blocks of 100 rows each (containing 6144×100 pixels), and the multispectral sub-partition is divided into data blocks of 200 rows each (containing 1536×200 pixels). This ensures that the data size of each data block is compatible with the capacity of the FPGA's internal storage units (BlockRAM single block capacity is greater than or equal to 1MB). The algorithm geometrically partitions the image data stream according to the above rules. During the partitioning process, a partition identifier (including detector chip number, spectral band type, and row / block range) is added to each data block. Then, the data is scheduled and sorted according to the rules of detector chip number from smallest to largest + spectral band order within the same detector (panchromatic, then B1 to B8 in sequence) + row / block order from first to last, avoiding congestion caused by cross-transmission of data from different partitions. Finally, the image data blocks after partition scheduling are obtained. These data blocks are temporarily stored in the FPGA's multi-port data buffer according to the sorting result. The buffer allocates an independent storage area for each partition to ensure parallel reading during subsequent timing scheduling.

[0083] Step 52: Based on the partitioned image data blocks, the FPGA internal logic circuit performs data block timing scheduling and frame integrity verification to obtain a data stream ready status signal. Specifically, the FPGA reads the partitioned image data blocks from the multi-port data buffer according to the scheduling sorting result, and starts the timing scheduling module in the internal logic circuit. This module allocates processing time slots for each data block according to the timing characteristics of the camera's TDI pushbroom imaging (panchromatic imaging time per line is 0.032 to 0.150 ms, multispectral imaging time per line is 0.128 to 0.600 ms). For example, the time slot allocated to the panchromatic data block is synchronized with the imaging time per line to ensure that the data block processing rhythm matches the image output rate and avoid data backlog. At the same time, the frame integrity verification module is started. This module first checks whether the partition identifier of each data block is complete (including detector chip number, spectral type, and row block). First, check if the range fields are complete. Then, verify if the number of pixels in the data block meets the preset value (e.g., a 100-line data block for panchromatic should contain 614,400 pixels, and a 200-line data block for multispectral should contain 307,200 pixels). Finally, verify the frame check bit at the end of the data block (using 8-bit parity check). If the identifier is missing, the number of pixels is incorrect, or the check bit is wrong, the data block is determined to be incomplete, triggering the operation of rereading the buffer data. If all data blocks pass the integrity verification, the timing scheduling module generates a data stream ready status signal. This signal is a level signal (high level indicates data stream ready, low level indicates not ready) and transmits the signal to the FPGA's CAN bus control interface as a trigger condition for receiving external commands. At the same time, the complete data block after partition scheduling is transmitted to the front buffer of the data transmission interface, waiting for the data transmission subsystem to read it.

[0084] Step 53: Based on the data stream ready status signal, trigger the CAN bus communication interface to receive external control command data packets, obtaining CAN bus command data packets. Specifically, this includes: the FPGA's CAN bus control interface monitors the data stream ready status signal in real time; when a high level signal is detected, trigger the CAN bus communication interface to start the receiving process; this CAN bus interface is a dual-redundant design (compliant with CAN2.0B specification, 500kbps rate). The interface first initializes the receiving parameters, setting the baud rate to 500kbps, data bit length to 8 bits, stop bit to 1 bit, and parity bit to none, ensuring matching with the CAN bus parameters of the space station subsystem; subsequently, the interface listens for external control commands sent by the space station subsystem. The CAN bus interface receives data packets, which contain configuration instructions for bad pixel compensation (such as enabling real-time compensation, disabling real-time compensation, and updating the bad pixel location mapping table). Each data packet's frame structure includes a frame start bit, an arbitration field (containing instruction priority), a control field, a data field (containing instruction content), a CRC field, and a frame end bit. The CAN bus interface receives the data packets bit by bit according to the frame structure and temporarily stores the received data packets in the CAN instruction dedicated buffer inside the FPGA. This buffer adopts a first-in-first-out (FIFO) mechanism and can store 10 complete data packets to avoid data loss due to excessively fast instruction reception. At the same time, the interface generates a reception completion signal and feeds it back to the FPGA's instruction parsing module to notify it to prepare to parse the data packets.

[0085] Step 54: Perform format parsing and cyclic redundancy check (CRC) on the CAN bus command data packet; after passing the check, extract the command opcode and auxiliary parameter fields from the data packet; according to the predefined command-action mapping rules, convert the opcode and parameters into corresponding control signals, specifically including: after the FPGA command parsing module receives the reception completion signal, it reads the CAN bus command data packet from the CAN command dedicated buffer area, first performs cyclic redundancy check (CRC), calculates the CRC value of the data packet through the FPGA's internal CRC calculation logic, and compares it with the preset value in the data packet's CRC field. If the two are inconsistent, it is determined that the data packet transmission is damaged, the data packet is directly discarded, and a check failure signal is generated and fed back to the satellite service subsystem; if the check passes, the data packet is format parsed, the data packet is split according to the predefined frame structure, and the command opcode (1 byte, such as 0x01 representing enabling real-time compensation, 0x02 representing disabling real-time compensation, 0x0...) is extracted from the data field. 3 represents updating the bad pixel location mapping table) and auxiliary parameter fields (such as the mapping table version number when updating the mapping table, and the neighborhood window size parameter when enabling compensation; the parameter field length is 2 to 4 bytes); then, the predefined instruction-action mapping rule table preset inside the FPGA is called. This table stores the association between opcodes and corresponding control actions. For example, opcode 0x01 corresponds to generating a compensation enable control signal, opcode 0x02 corresponds to generating a compensation disable control signal, and opcode 0x03 corresponds to generating a mapping table update trigger control signal and a parameter signal carrying the version number; according to the mapping rule, the extracted opcodes and parameters are converted into control signals that can be recognized by the camera's internal circuitry. These control signals are digital level signals (active high or active low, such as compensation enable being active high). After conversion, the control signals are temporarily stored in the FPGA's control signal register, which is directly connected to the control module of the bad pixel compensation function (such as the compensation algorithm enable terminal and the mapping table storage update terminal).

[0086] In this embodiment of the invention, a data block geometric partitioning scheduling algorithm is invoked to geometrically partition and schedule the image data stream. This aligns with the 8-element detector stitching structure of the camera's focal plane (6144 pixels per element for panchromatic and 1536 pixels per element for multispectral) and the total data rate of 27.832Gbps. The high-bandwidth data stream is decomposed into ordered data blocks according to preset partitioning rules (e.g., by detector element number, spectral type, or row block). This avoids congestion in a single data stream, improves the parallelism of data transmission and processing, and ensures that the partitioned image data blocks are compatible with the subsequent FPGA timing scheduling logic, laying the foundation for efficient data block processing. Data block timing scheduling via the FPGA's internal logic circuits matches the progressive output timing of the camera's TDI pushbroom imaging (0.032 to 0.150 ms per line for panchromatic and 0.128 to 0.600 ms for multispectral), ensuring that the data block processing rhythm is synchronized with the imaging output rate. Frame integrity verification checks for packet loss, misalignment, and other issues in the data blocks, ensuring the integrity of the image data. The generated data stream ready status signal accurately... The system provides feedback on data processing progress, triggering conditions for subsequent CAN bus command reception. Triggering CAN bus reception of external commands based on data stream readiness status signals enables coordinated data processing and command reception, avoiding resource waste or processing conflicts caused by initiating command reception before data is ready. Adapting to the camera's dual-redundant CAN bus communication design, on-demand triggering of reception actions optimizes bus resource usage while ensuring command reception timing matches data processing status, improving command processing timeliness. Format parsing and cyclic redundancy checks on CAN bus command data packets filter out erroneous or damaged packets, ensuring command data reliability and preventing erroneous commands from causing camera control anomalies. After successful verification, the system extracts the opcode and parameter fields and converts them into control signals according to predefined command-action mapping rules, ensuring accurate command interpretation and adapting to the camera's dynamic configuration requirements for bad pixel compensation. It also ensures the control signals are compatible with the control logic of the camera's internal circuitry (such as FPGA and focus control circuitry), improving the consistency of command execution.

[0087] In a preferred embodiment of the present invention, step 6 above, which dynamically configures the bad pixel compensation function according to the control signal, includes enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored internally in the FPGA, and feeding back the updated mapping table to the real-time compensation processing flow, including:

[0088] Step 61: Parse and extract the instruction opcode and parameter fields of the control signal to obtain the parsed instruction information. Specifically, this includes: the FPGA reading the control signal generated in step 54 from the control signal register. This control signal contains a 1-byte instruction opcode and 2 to 4 bytes of auxiliary parameter fields, arranged in a fixed byte order (opcode first, parameter fields second); starting the instruction parsing logic, first extracting the opcode and matching it with a predefined opcode list (e.g., 0x01 represents a function control instruction, 0x03 represents a mapping table update instruction) to initially determine the instruction category; then extracting the corresponding parameter fields according to the opcode type. If it is a function control instruction, extracting a 1-bit enable flag (the least significant bit of the first byte of the parameter field). 0 indicates disabled, 1 indicates enabled. If it is a mapping table update instruction, extract 2 bytes of mapping table storage area address (e.g., 0x1000 to 0xFFFF, corresponding to the storage area of ​​the FPGA's internal BlockRAM) and N bytes of update data (N varies with the number of updated pixels, and each update data contains detector chip number, spectral band identifier, and row and column coordinate information). Integrate the parsed opcode type, enable flag (for function control instructions) or storage area address with the update data (for mapping table update instructions) into structured instruction information, and temporarily store it in the instruction information buffer area inside the FPGA. The buffer area allocates an independent storage unit for this information to avoid confusion with other data. At the same time, a parsing completion signal is generated to trigger the subsequent instruction type judgment process.

[0089] Step 62: Based on the parsed instruction information, determine the instruction type: If it is a function control instruction, configure the status value of the FPGA's internal compensation function control register according to the enable flag in the instruction parameters to enable or disable the real-time bad pixel compensation process. Specifically, this includes: the FPGA reads the parsed instruction information from the instruction information buffer and determines the instruction type by the opcode type; if it is determined to be a function control instruction, the compensation function control module is called. This module first locates the FPGA's internal compensation function control register (address preset to 0x0001, 1 byte width), and bit 0 of the register is the compensation enable bit (0 = disabled, 1 = enabled); then, configure the register status value according to the enable flag in the instruction information. If the enable flag is 1, then bit 0 of the register is set to 1 to enable the real-time bad pixel compensation process. When the enable terminal of the compensation processing flow receives a high-level signal, the compensation algorithm (such as neighboring pixel interpolation calculation and compensation value replacement) is started. If the enable flag is 0, register bit 0 is set to 0, so that the compensation enable terminal receives a low-level signal, pausing the execution of the compensation algorithm. At this time, the camera directly outputs the uncompensated image data stream. After the configuration is completed, the compensation function control module reads the current status value of the register for verification to ensure that the status value is consistent with the enable flag. At the same time, a configuration completion feedback signal is generated and transmitted to the CAN bus interface to inform the satellite subsystem of the function control result. The entire configuration process is completed within one clock cycle, adapting to the timing requirements of real-time imaging of the camera (0.032 to 0.150 ms per line of panchromatic image) and only affects the compensation processing flow, without affecting the normal operation of other links such as image acquisition and data scheduling.

[0090] Step 63: If the instruction type is determined to be a mapping table update instruction, then according to the mapping table storage area address and update data in the instruction parameters, a write operation is performed on the bad pixel location mapping table stored internally in the FPGA to obtain the updated bad pixel location mapping table. Specifically, if the instruction information determines that it is a mapping table update instruction, the FPGA calls the mapping table update module. This module first locates the target storage area in the FPGA's internal BlockRAM that stores the bad pixel location mapping table according to the mapping table storage area address in the instruction information. This area is partitioned by spectral band (panchromatic, B1 to B8), and each partition has an independent address range (e.g., the panchromatic mapping table corresponds to 0x1000 to 0x2FFF, and the B1 mapping table corresponds to 0x3000 to 0x4FFF). Subsequently, the module performs a pre-write verification, reads the current data of the target address range, and confirms that the address range is a mapping table. To avoid accidental writes, the updated data in the instruction information is written byte by byte into the target storage area, in ascending address order. Each updated data corresponds to a newly added or drifting bad pixel. During writing, the detector chip number, spectral band identifier, row and column coordinates are ensured to match the spectral band partition of the storage area (e.g., bad pixel data of the B3 spectral band is written to the B3 mapping table address segment). After all updated data is written, the mapping table update module reads the written data in the target address segment again and compares it byte by byte with the updated data. If they are completely consistent, the writing is considered successful, and an updated bad pixel location mapping table is generated. If there is a discrepancy, the writing is considered a failure, triggering a rewrite operation. At the same time, an update failure signal is fed back to the satellite service subsystem through the CAN bus interface to ensure the accuracy of the mapping table update and avoid subsequent compensation anomalies due to data writing errors.

[0091] Step 64: The updated bad pixel location mapping table is loaded into the query cache of the real-time compensation processing flow for application in the real-time identification and compensation processing of bad pixels in subsequent image frames. Specifically, this includes: After confirming the successful update of the mapping table, the FPGA's mapping table update module starts the data migration logic, reads the updated bad pixel location mapping table from the BlockRAM storage area, and organizes the data by spectral band (panchromatic, B1 to B8), ensuring that the format of each group of data is consistent with the reading requirements of the real-time compensation processing flow (e.g., each row of data includes the detector chip number, spectral band identifier, and pixel row and column coordinates); then, the organized mapping table data is loaded into the query cache of the real-time compensation processing flow. This cache is the high-speed SRAM inside the FPGA (access speed less than or equal to 5ns), with independent cache space allocated by spectral band, and the size of the cache space is proportional to the number of mapping tables. Data matching (e.g., the panchromatic mapping table occupies approximately 10KB, and each multispectral band mapping table occupies approximately 8KB); during the loading process, a pipelined operation of reading and writing is adopted to avoid excessive time spent on data migration, ensuring that the entire mapping table is loaded within one frame of image imaging cycle (approximately 0.032 to 0.150ms for panchromatic and approximately 0.128 to 0.600ms for multispectral); after loading, a ready signal is generated by querying the buffer and transmitted to the bad pixel location module (the module corresponding to step 3) in the real-time compensation processing flow, informing it that subsequent image frames can call the updated mapping table in the buffer for bad pixel identification and compensation; at the same time, the mapping table update module records the update timestamp and stores it in the FPGA's log storage unit, which facilitates subsequent on-orbit fault investigation and data traceability, ensuring that the updated mapping table can be applied to the real-time compensation process in a timely and stable manner.

[0092] In this embodiment of the invention, the instruction opcode and parameter fields of the control signal are parsed and extracted, the core intent and additional parameters of the instruction are distinguished, and the subsequent processing direction (function control or mapping table update) is determined. It adapts to the format differences of different types of instructions in the control signal, avoiding execution deviations caused by incomplete interpretation of instruction information, providing a clear basis for subsequent precise execution of instruction actions, and ensuring the accuracy of instruction processing. Based on the enable flag configuration of the FPGA's internal compensation function control register, it can directly act on the hardware control end of the real-time compensation processing flow, with fast response speed and rapid switching between enabled and disabled states. It adapts to the needs of different camera imaging scenarios (such as disabling compensation during laboratory calibration and enabling compensation during on-orbit observation), and the register state configuration only applies to the compensation function, without affecting other image processing links, ensuring the stability and independence of the process switching. By performing write operations based on the address of the mapping table storage area and the updated data, the region where the bad pixel location mapping table is stored internally in the FPGA can be located, avoiding accidental writing to other data storage areas. The updated data is written directly to the internal storage of the FPGA without relying on external memory, which meets the need for rapid mapping table updates in on-orbit environments. This ensures that newly added or drifting bad pixel information can be promptly integrated into the compensation process, guaranteeing the timeliness and integrity of the mapping table. The updated mapping table is loaded into the query cache of the real-time compensation process, allowing the updated data to be directly applied to the processing of subsequent image frames without restarting the compensation process, meeting the real-time requirements of the camera's TDI push-broom frame-by-frame imaging. The query cache provides fast data retrieval support for the compensation process, avoiding the impact of mapping table call delays on compensation efficiency, ensuring that the updated mapping table takes effect immediately, and improving the consistency and accuracy of the compensation process.

[0093] like Figure 2 As shown, embodiments of the present invention also provide a bad pixel detection and compensation control system, comprising:

[0094] The acquisition module is used to acquire multiple frames of raw image data during the on-orbit or laboratory calibration process of the camera; rigid registration processing is performed on the multiple frames of raw image data, and the registered image data is obtained by calculating the translation and rotation angles between the images and performing spatial transformation;

[0095] The structured module is used to perform statistical analysis on the response value of each pixel based on the registered image data, identify pixels whose response values ​​continuously deviate from the normal range as bad pixels, traverse and extract the spatial location information and attributes of the bad pixels, compile them into a structured data list, and obtain a bad pixel location mapping table.

[0096] The positioning module is used to load the bad pixel location mapping table; during real-time imaging by the camera, it locates and identifies bad pixels in the current row in real time according to the bad pixel mapping table, and obtains the real-time identified bad pixel information.

[0097] The compensation module is used to call the neighborhood pixel interpolation algorithm based on the bad pixel information, calculate the weighted average value of adjacent normal pixels in the same spectral band of the bad pixel, and replace the original pixel value of the bad pixel with this value to obtain the image data stream generated after replacement compensation.

[0098] The parsing module is used to perform real-time scheduling and integrity verification based on the image data stream to obtain a data stream readiness status signal; and to receive and parse external commands through the CAN bus interface to obtain control signals based on the data stream readiness status signal.

[0099] The dynamic configuration module is used to dynamically configure the bad pixel compensation function according to the control signal, including enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored in the FPGA, and feeding the updated mapping table back to the real-time compensation processing flow.

[0100] It should be noted that this system is a system corresponding to the above method. All implementation methods in the above method embodiments are applicable to this embodiment and can achieve the same technical effect.

[0101] Embodiments of the present invention also provide a computing device, including: a processor and a memory storing a computer program, wherein the computer program, when executed by the processor, performs the method described above. All implementations in the above method embodiments are applicable to this embodiment and can achieve the same technical effects.

[0102] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for detecting and compensating for bad pixels, characterized in that, The method includes: Acquire multiple frames of raw image data during the camera's on-orbit or laboratory calibration process; perform rigid registration processing on the multiple frames of raw image data, and obtain the registered image data by calculating the translation and rotation angles between the images and performing spatial transformation; Based on the registered image data, the response value of each pixel is statistically analyzed to identify pixels whose response values ​​continuously deviate from the normal range as bad pixels; the spatial location information and attributes of the bad pixels are traversed and extracted, and compiled into a structured data list to obtain a bad pixel location mapping table. Load the bad pixel location mapping table; during real-time imaging by the camera, locate and identify bad pixels in the current row in real time according to the bad pixel mapping table, and obtain the real-time identified bad pixel information; Based on the bad pixel information, the neighborhood pixel interpolation algorithm is invoked to calculate the weighted average value of adjacent normal pixels in the same spectral band of the bad pixel, and this value is used to replace the original pixel value of the bad pixel to obtain the image data stream generated after replacement compensation. Real-time scheduling and integrity verification are performed based on the image data stream to obtain a data stream readiness status signal; according to the data stream readiness status signal, external commands are received and parsed through the CAN bus interface to obtain control signals; According to the control signal, the bad pixel compensation function is dynamically configured, including enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored inside the FPGA, and feeding the updated mapping table back to the real-time compensation processing flow.

2. The bad pixel detection and compensation control method according to claim 1, characterized in that, Acquire multiple frames of raw image data during camera on-orbit or laboratory calibration processes; Rigid registration processing is performed on the multiple frames of original image data. By calculating the translation and rotation angles between the images and performing spatial transformation, registered image data is obtained, including: Acquire multiple frames of raw image data output during camera on-orbit or laboratory calibration; Based on the multi-frame original image data, a set of rigid transformation parameters for image alignment is obtained by calculating the translation and rotation angles between each frame image. Based on the rigid transformation parameter set, spatial transformation and resampling operations are performed on each frame of original image data to obtain spatially aligned registered image data.

3. The bad pixel detection and compensation control method according to claim 2, characterized in that, Based on the registered image data, the response value of each pixel is statistically analyzed, and pixels whose response values ​​continuously deviate from the normal range are identified as bad pixels. The spatial location information and attributes of the bad pixels are traversed and extracted, and compiled into a structured data list to obtain a bad pixel location mapping table, including: Based on the registered image data, the mean and standard deviation of the response value of each pixel under different radiance conditions are calculated, and a dynamic threshold range is set based on the mean and standard deviation. Based on the dynamic threshold range, the response value of each pixel is compared, and pixels whose response value continuously exceeds the dynamic threshold range are identified as bad pixels. Traverse all identified bad pixels, extract their detector chip number, spectral band number, and row and column coordinate information to obtain the spatial location and attribute information of the bad pixels; The spatial location and attribute information of the bad pixels are compiled into a structured data list to generate a bad pixel location mapping table.

4. The bad pixel detection and compensation control method according to claim 3, characterized in that, Load the bad pixel location mapping table; during real-time camera imaging, locate and identify bad pixels in the current row in real time according to the bad pixel mapping table, and obtain the real-time identified bad pixel information, including: The bad pixel location mapping table is read from the memory and loaded into the high-speed storage unit inside the FPGA to obtain the loaded bad pixel location mapping table. Based on the loaded bad pixel location mapping table, when the camera outputs image data line by line in real-time imaging, the pixel coordinates of each pixel in the current line are compared with the coordinate data in the bad pixel location mapping table in real time to obtain the comparison result. Based on the comparison results, pixels whose pixel coordinates match the coordinates recorded in the bad pixel location mapping table are identified as bad pixels, and the bad pixel identification information of the current row is obtained as the bad pixel information identified in real time.

5. The bad pixel detection and compensation control method according to claim 4, characterized in that, Based on the bad pixel information, a neighborhood pixel interpolation algorithm is invoked to calculate the weighted average value of adjacent normal pixels within the same spectral band of the bad pixel. This value is then used to replace the original pixel value of the bad pixel, resulting in an image data stream after replacement compensation, including: Based on the real-time identified bad pixel information, the location of the bad pixel that needs to be compensated and its spectral band information are analyzed and obtained. Based on the location of the bad pixel and its spectral band information, the row and column coordinates of the target bad pixel and its spectral band identifier are obtained by parsing. Based on the row and column coordinates and spectral band identifier, the neighborhood pixel interpolation algorithm is called. According to the preset neighborhood window size and shape rules, the neighboring normal pixels in the same spectral band of the bad pixel that meet the distance and validity conditions are searched and filtered to obtain a set of normal pixels. Obtain the pixel value of each normal pixel in the normal pixel set and its spatial distance to the target bad pixel; assign a corresponding weight coefficient to each normal pixel according to the preset distance-weight mapping relationship; calculate the weighted sum of the pixel values ​​of all normal pixels based on the pixel value and the weight coefficient, and divide the weighted sum by the sum of the weight coefficients to obtain the bad pixel compensation value; The original pixel value of the corresponding bad pixel is replaced by the bad pixel compensation value to obtain all the replaced and compensated pixel data, thus obtaining the image data stream generated after replacement and compensation.

6. The bad pixel detection and compensation control method according to claim 5, characterized in that, Real-time scheduling and integrity verification are performed on the image data stream to obtain a data stream readiness status signal. Based on the data stream ready status signal, external commands are received and parsed via the CAN bus interface to obtain control signals, including: Based on the image data stream, the data block geometric partitioning scheduling algorithm is invoked to perform geometric partitioning and scheduling sorting of the data stream according to the preset image blocking rules, so as to obtain the partitioned and scheduled image data blocks. Based on the image data blocks after partitioning and scheduling, the data block timing scheduling and frame integrity verification are performed through the internal logic circuit of the FPGA to obtain the data stream ready status signal. Based on the data stream ready status signal, the CAN bus communication interface is triggered to receive external control command data packets, and CAN bus command data packets are obtained. The CAN bus instruction data packet is format parsed and cyclic redundancy check is performed; after the check passes, the instruction opcode and auxiliary parameter fields in the data packet are extracted; according to the predefined instruction-action mapping rules, the opcode and parameters are converted into corresponding control signals.

7. The bad pixel detection and compensation control method according to claim 6, characterized in that, Based on the control signal, the bad pixel compensation function is dynamically configured, including enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored internally in the FPGA, and feeding the updated mapping table back to the real-time compensation processing flow, including: The instruction opcode and parameter fields of the control signal are parsed and extracted to obtain the parsed instruction information; Based on the parsed instruction information, determine the instruction type: if it is a function control instruction, configure the status value of the FPGA internal compensation function control register according to the enable flag in the instruction parameters to enable or disable the real-time bad pixel compensation processing flow. If the instruction type is determined to be a mapping table update instruction, then according to the mapping table storage area address and update data in the instruction parameters, a write operation is performed on the bad pixel location mapping table stored inside the FPGA to obtain the updated bad pixel location mapping table. The updated bad pixel location mapping table is loaded into the query cache of the real-time compensation processing flow and applied to the real-time identification and compensation processing of bad pixels in subsequent image frames.

8. A bad pixel detection and compensation control system, wherein the system implements the method as described in any one of claims 1 to 7, characterized in that, include: The acquisition module is used to acquire multiple frames of raw image data during the camera's on-orbit or laboratory calibration process; The original image data of the multiple frames is rigidly registered by calculating the translation and rotation angles between the images and performing spatial transformation to obtain the registered image data. The structured module is used to perform statistical analysis on the response value of each pixel based on the registered image data, identify pixels whose response values ​​continuously deviate from the normal range as bad pixels, traverse and extract the spatial location information and attributes of the bad pixels, compile them into a structured data list, and obtain a bad pixel location mapping table. The positioning module is used to load the bad pixel location mapping table; during real-time imaging by the camera, it locates and identifies bad pixels in the current row in real time according to the bad pixel mapping table, and obtains the real-time identified bad pixel information. The compensation module is used to call the neighborhood pixel interpolation algorithm based on the bad pixel information, calculate the weighted average value of adjacent normal pixels in the same spectral band of the bad pixel, and replace the original pixel value of the bad pixel with this value to obtain the image data stream generated after replacement compensation. The parsing module is used to perform real-time scheduling and integrity verification based on the image data stream to obtain a data stream readiness status signal; and to receive and parse external commands through the CAN bus interface to obtain control signals based on the data stream readiness status signal. The dynamic configuration module is used to dynamically configure the bad pixel compensation function according to the control signal, including enabling or disabling the real-time compensation processing flow, or updating the bad pixel location mapping table stored in the FPGA, and feeding the updated mapping table back to the real-time compensation processing flow.

9. A computing device, characterized in that, include: One or more processors; A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a program that, when executed by a processor, implements the method as described in any one of claims 1 to 7.

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