High input dynamic range low noise amplifier

Abstract

The invention discloses a low-noise amplifier with a high input dynamic range. The low-noise amplifier comprises a low-noise amplifying circuit, a first radio frequency transformer and a second radio frequency transformer, the turn ratio of the first radio frequency transformer is 1: N, and the turn ratio of the second radio frequency transformer is M: 1; the first radio frequency transformer comprises a first winding and a second winding, the number of turns of the first winding is smaller than that of the second winding, the second radio frequency transformer comprises a third winding and a fourth winding, the number of turns of the third winding is larger than that of the fourth winding, and the first end of the first winding serves as a signal input port of the amplifier. The second end of the first winding is connected to the input port of the amplifying circuit, the first end of the fourth winding serves as the signal output port of the amplifier, and the second end of the fourth winding is connected to the output port of the amplifying circuit. According to the invention, under the condition of relatively large input signals, power saturation of the amplifier caused by overlarge gain can be avoided, and signal distortion is avoided.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design. More specifically, this invention relates to a high input dynamic range, low noise amplifier. Background Technology

[0002] Low-noise amplifiers (LNOA), as a crucial component of modern wireless communication, are primarily used in the radio frequency (RF) front-end of wireless communication receivers, typically serving as the first active device in the RF front-end. LNOA plays a vital role in the performance of wireless communication receivers; to ensure receiver sensitivity, they require very low noise and a certain level of gain. When a wireless communication receiver receives a high-power signal from the antenna, conventional LNOA, while achieving low noise, also has a relatively high gain, which can cause amplifier saturation, resulting in signal compression and distortion. To prevent signal distortion, LNOA typically requires low gain and high linearity. In existing technologies, the gain of LNOA is usually adjusted using a feedback resistor in a negative feedback structure, such as... Figure 1 As shown, although the gain of the low-noise amplifier can be reduced, the resistor will introduce noise, which will degrade the noise of the low-noise amplifier and affect the sensitivity of the wireless communication receiver.

[0003] Therefore, it is necessary to design a technical solution that can overcome the above-mentioned defects. Summary of the Invention

[0004] One objective of this invention is to provide a high input dynamic range low-noise amplifier that can adjust the amplifier gain with minimal impact on noise, thereby preventing power saturation of the low-noise amplifier due to excessive gain under large input signal conditions and thus avoiding signal distortion.

[0005] To achieve these objectives and other advantages of the present invention, according to one aspect of the present invention, a high input dynamic range low noise amplifier is provided, comprising a low noise amplifier circuit, a first radio frequency transformer, and a second radio frequency transformer; the first radio frequency transformer has a turns ratio of 1:N, where N is 2, 3, or 4, and the second radio frequency transformer has a turns ratio of M:1, where M is 2, 3, or 4; the first radio frequency transformer includes a first winding and a second winding, the first winding having fewer turns than the second winding; the second radio frequency transformer includes a third winding and a fourth winding, the third winding having more turns than the fourth winding; a first end of the first winding serves as the signal input port of the high input dynamic range low noise amplifier, a second end of the first winding is connected to the input port of the low noise amplifier circuit, a first end of the fourth winding serves as the signal output port of the high input dynamic range low noise amplifier, a second end of the fourth winding is connected to the output port of the low noise amplifier circuit, a second end of the first winding is connected to the first end of the third winding, a first end of the second winding is connected to the second end of the fourth winding, a second end of the second winding is grounded, and a second end of the third winding is grounded.

[0006] Furthermore, the first and second ends of the first winding of the first RF transformer can be interchanged as signal input ports or connected to the input port of the low-noise amplifier circuit; the first and second ends of the second winding of the first RF transformer can be interchanged as ground terminals or feedback signal terminals; the first and second ends of the third winding of the second RF transformer can be interchanged as ground terminals or feedback signal terminals; and the first and second ends of the fourth winding of the second RF transformer can be interchanged as signal output ports or connected to the output port of the low-noise amplifier circuit.

[0007] Furthermore, it also includes an input matching circuit and an output matching circuit; the input matching circuit is connected between the second end of the first winding of the first RF transformer and the input port of the low-noise amplifier circuit; the output matching circuit is connected between the second end of the fourth winding of the second RF transformer and the output port of the low-noise amplifier circuit.

[0008] Furthermore, at least one of the input matching circuit and the output matching circuit includes an adjustable matching network; the input matching circuit includes a first fixed inductor, a first adjustable capacitor, and a second fixed capacitor; wherein, one end of the first fixed inductor is connected to the second end of the first winding of the first RF transformer, and the other end of the first fixed inductor is simultaneously connected to one end of the first adjustable capacitor and one end of the second fixed capacitor; the other end of the first adjustable capacitor receives an externally provided first DC tuning voltage, used to continuously adjust its capacitance value by changing the amplitude of the first DC tuning voltage; the other end of the second fixed capacitor is connected to the input port of the low-noise amplifier circuit and is used to implement the DC blocking function; the output matching circuit includes a second adjustable capacitor, one end of the second adjustable capacitor receives an externally provided second DC tuning voltage, used to continuously adjust its capacitance value by changing the amplitude of the second DC tuning voltage, and the other end of the second adjustable capacitor is connected to the second end of the fourth winding or the output port.

[0009] Furthermore, the input matching circuit also includes an electrostatic discharge (ESD) protection structure. The ESD protection structure is connected in parallel between the critical node in the input matching circuit and ground. The critical node is the common node connecting the first fixed inductor, the first adjustable capacitor, and the second fixed capacitor. The ESD protection structure includes at least one ESD protection diode. The cathode of the ESD protection diode is connected to the critical node, and the anode of the ESD protection diode is connected to ground. The breakdown voltage of the ESD protection diode is set to be higher than the highest RF voltage amplitude that occurs at the critical node in the normal operating mode of the high input dynamic range low noise amplifier, but lower than the rated breakdown voltage of the first adjustable capacitor and the gate oxide breakdown voltage of the transistor at the input port of the low noise amplifier circuit.

[0010] Furthermore, both the first adjustable capacitor in the input matching circuit and the second adjustable capacitor in the output matching circuit are binary weighted capacitor arrays. The binary weighted capacitor array includes a least significant bit capacitor unit and at least one more significant bit capacitor unit. Each capacitor unit consists of a fixed capacitor and a switching transistor connected in parallel with it. The control terminal of the switching transistor receives a single digital control signal. When the switching transistor is turned on, the corresponding fixed capacitor is connected to the binary weighted capacitor array. When the switching transistor is turned off, the corresponding fixed capacitor is disconnected from the binary weighted capacitor array. The sum of the capacitance values ​​of all connected fixed capacitors constitutes the current total capacitance value of the binary weighted capacitor array. The digital control signals together form a binary control word, used to discretely adjust the capacitance values ​​of the first and second adjustable capacitors.

[0011] Furthermore, the low-noise amplifier circuit integrates an active bias circuit, including a current mirror structure, a temperature compensation network, and an RF choke. The current mirror structure includes a first bias transistor and a second bias transistor, with the control terminals of the first and second bias transistors connected. The temperature compensation network is connected to a reference node of the current mirror structure and comprises a parallel combination of a positive temperature coefficient resistor and a negative temperature coefficient diode network. The RF choke is connected between the control terminal of a main amplifying transistor of the low-noise amplifier circuit and a bias voltage output node of the active bias circuit.

[0012] Furthermore, the negative temperature coefficient diode network in the temperature compensation network is composed of multiple PN junction diodes connected in series; the multiple PN junction diodes include a first diode, a second diode, and so on up to the Lth diode, where L is an integer greater than or equal to 2; the anode of the first diode serves as one port of the negative temperature coefficient diode network and is connected to the reference node of the current mirror structure; the cathode of the first diode is connected to the anode of the second diode, and so on, until the cathode of the Lth diode serves as another port of the negative temperature coefficient diode network and is connected to ground; the total negative temperature coefficient of the negative temperature coefficient diode network is adjusted by selecting the number L of PN junction diodes connected in series.

[0013] Furthermore, it also includes a bypass resonant branch and a mode control switch; the bypass resonant branch is composed of a resonant inductor and a resonant capacitor connected in series; the mode control switch is implemented by a single-pole single-throw transistor; after the bypass resonant branch is connected in series with the mode control switch, it is connected in parallel between the input port of the low-noise amplifier circuit and ground, or in parallel between the output port of the low-noise amplifier circuit and ground; when the mode control switch is closed, the bypass resonant branch presents low impedance near the resonant frequency of the resonant inductor and resonant capacitor, switching the operating frequency band of the high input dynamic range low-noise amplifier to the first frequency band; when the mode control switch is open, the bypass resonant branch is removed from the circuit, and the operating frequency band of the high input dynamic range low-noise amplifier switches to the second frequency band.

[0014] Furthermore, the low-noise amplifier circuit includes a cascaded amplification structure, which consists of a driver amplification transistor and a cascode transistor. The control terminal of the driver amplification transistor serves as the input port of the low-noise amplifier circuit. The first current-carrying terminal of the driver amplification transistor is connected to an RF ground potential, and the second current-carrying terminal of the driver amplification transistor is connected to the first current-carrying terminal of the cascode transistor. The control terminal of the cascode transistor is connected to a DC bias voltage, and the second current-carrying terminal of the cascode transistor serves as the output port of the low-noise amplifier circuit. At the connection node between the second current-carrying terminal of the driver amplification transistor and the first current-carrying terminal of the cascode transistor, an inter-stage matching network is connected. The inter-stage matching network is composed of inter-stage inductors and inter-stage capacitors connected in parallel or in series.

[0015] The present invention has at least the following beneficial effects: This invention constructs a negative feedback mechanism using a first RF transformer (1:N, N=2-4) and a second RF transformer (M:1, M=2-4). With minimal impact on noise performance (noise figure ≤1dB), the gain range can be flexibly adjusted by different turns ratios (gain adjustment span 6-12dB), effectively expanding the amplifier's input dynamic range (input dynamic range ≥50dB, covering the -40dBm to 0dBm input signal power range). The design employs a low-turn winding connection: the first winding (low number of turns) serves as the signal input port, and the fourth winding (low number of turns) serves as the signal output port, adapting to mainstream 50Ω system impedance. Basic impedance matching of the input and output ports can be achieved without additional complex matching (reflection coefficient ≤-15dB), significantly reducing signal reflection loss and ensuring signal transmission efficiency over a wide input power range. The specific connection of the two transformer windings (the second end of the first winding is connected to the first end of the third winding, and the first end of the second winding is connected to the second end of the fourth winding) forms impedance characteristics of (50N) / (N+1) and (50M) / (M+1). Even if M and N take small values, space can still be reserved for subsequent optimization and matching. The low-noise amplifier circuit can flexibly use a single amplifier tube or a complete amplifier circuit, taking into account the core function of low noise and the adaptation requirements of different application scenarios, significantly improving the high input dynamic range performance and practical value of the amplifier, and avoiding signal saturation and distortion over a wide input power range.

[0016] Other advantages, objectives and features of the present invention will become apparent in part from the following description, and in part from those skilled in the art through study and practice of the invention. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of a traditional negative feedback structure; Figure 2This is a schematic diagram of the structure of a high input dynamic range low noise amplifier according to an embodiment of this application. Detailed Implementation

[0018] The present invention will now be described in further detail so that those skilled in the art can implement it based on the description.

[0019] It should be understood that terms such as "having," "comprising," and "including" used in the embodiments of this application do not exclude the presence or addition of one or more other elements or combinations thereof. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationship and movement of components in a specific posture. If the specific posture changes, the directional indication will also change accordingly. When an element is referred to as "fixed to" or "set on" another element, it can be directly on the other element or may have an intervening element present. When an element is referred to as "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element through an intervening element. Descriptions involving "first," "second," etc., in the embodiments of this application are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features.

[0020] It should be noted that the technical solutions of the various embodiments of this application can be combined with each other, but only if they are based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by this application.

[0021] like Figure 2As shown, embodiments of this application provide a high input dynamic range low noise amplifier, including a low noise amplifier circuit, a first radio frequency transformer, and a second radio frequency transformer. The first radio frequency transformer has a turns ratio of 1:N, where N is 2, 3, or 4, and the second radio frequency transformer has a turns ratio of M:1, where M is 2, 3, or 4. The first radio frequency transformer includes a first winding and a second winding, with the first winding having fewer turns than the second winding. The second radio frequency transformer includes a third winding and a fourth winding, with the third winding having more turns than the fourth winding. The first end of the first winding serves as the signal input port of the high input dynamic range low noise amplifier, and the second end of the first winding is connected to the input port of the low noise amplifier circuit. The first end of the fourth winding serves as the signal output port of the high input dynamic range low noise amplifier, and the second end of the fourth winding is connected to the output port of the low noise amplifier circuit. The second end of the first winding is connected to the first end of the third winding, and the first end of the second winding is connected to the second end of the fourth winding. The second end of the second winding is grounded, and the second end of the third winding is grounded.

[0022] For example, the high input dynamic range low noise amplifier of this embodiment includes a low noise amplifier circuit, a first RF transformer, and a second RF transformer. The low noise amplifier circuit can be a single-transistor amplifier circuit or an integrated low noise amplifier chip. Its core function is to amplify the RF signal with low noise over a wide input power range (noise figure controlled below 1dB) while ensuring an input dynamic range ≥50dB. The first RF transformer and the second RF transformer can be standard RF transformers, both of which are standard passive RF devices that do not require DC power supply and rely on electromagnetic induction to achieve signal coupling and impedance transformation. The first RF transformer has a turns ratio of 1:N, where N can be 2 or 3. When N=2, the turns ratio of the first winding with fewer turns to the second winding with more turns is 1:2. When N=3, the turns ratio is 1:3. All windings are made of oxygen-free copper wire wound on a ferrite core. For example, if the first winding has 5 turns, the second winding has 10 or 15 turns. The ferrite core can be made of nickel-zinc ferrite to meet the requirements of RF signal transmission. The second RF transformer has a turns ratio of M:1, where M can be 2 or 4. When M=2, the turns ratio of the third winding with more turns to the fourth winding with fewer turns is 2:1. When M=4, the ratio is 4:1. The windings are also made of oxygen-free copper wire wound on a ferrite core. For example, if the third winding has 10 or 20 turns, the fourth winding has 5 turns, ensuring that the impedance of the winding with fewer turns is compatible with common 50-ohm systems. The first end of the first winding serves as the signal input port, where an SMA connector can be soldered to receive the RF signal transmitted from the antenna. The SMA connector is connected to the antenna via an RF coaxial cable with a characteristic impedance of 50 ohms. The second end of the first winding is connected to the input port of the low-noise amplifier circuit via an RF coaxial cable of the same characteristic impedance. If it is a single-transistor amplifier circuit, it is connected to the gate of the transistor; if it is an integrated chip, it is connected to the RF IN pin of the chip. When connecting, ensure that the cable trace length does not exceed 5mm to reduce signal loss. The first end of the fourth winding serves as the signal output port, also soldered with an SMA connector, used to output the amplified signal to the subsequent mixer or filter circuit. The second end of the fourth winding is connected to the output port of the low-noise amplifier circuit via an RF coaxial cable, corresponding to the drain of the transistor or the RF OUT pin of the integrated chip. The trace length is also controlled within 5mm. The second end of the first winding is connected to the first end of the third winding through a 0-ohm resistor in a 0402 package. This resistor is soldered to the RF signal trace layer of the PCB. A grounded copper layer is laid around the connection point, and it is kept at least 3mm away from other signal traces to avoid interference. The first end of the second winding is connected to the second end of the fourth winding through a 0-ohm resistor of the same specification. The assembly position is kept 10mm away from the previous connection point to further reduce the risk of signal crosstalk.The second end of the second winding and the second end of the third winding are both connected to the ground plane of the PCB through vias with a diameter of 0.3mm. The ground plane adopts a large area copper foil design with a copper foil thickness of not less than 35μm to reduce grounding impedance and reduce the impact of grounding noise on the signal.

[0023] In existing technologies, low-noise amplifiers often adjust the gain through a series feedback resistor. For example, when building a circuit using a common operational amplifier, a fixed 1k ohm resistor is connected in series between the output and input terminals. This resistor introduces additional noise (the noise figure increases from 0.8dB to 1.5dB), and the input dynamic range is narrow (only -30dBm to -10dBm). When the input signal power exceeds -10dBm, power saturation is likely to occur, and the signal distortion exceeds 5%. This embodiment uses two standard RF transformers to construct a negative feedback structure, eliminating the need for additional feedback resistors and stabilizing the noise figure below 0.8dB. By selecting a turns ratio of N=2, M=2 (gain adjusted to 15dB) or N=3, M=4 (gain adjusted to 9dB), different input power requirements can be flexibly adapted, extending the input dynamic range to -40dBm to 0dBm (≥50dB). Even when the input signal power reaches 0dBm, the amplifier does not exhibit saturation, and signal distortion is controlled within 1%. Simultaneously, the transformer with fewer turns directly connects to the input and output ports, naturally adapting to external 50-ohm systems (reflection coefficient ≤-15dB). While ensuring low noise performance, this significantly improves the amplifier's high input dynamic range performance and linearity.

[0024] In another embodiment, the first and second ends of the first winding of the first RF transformer can be interchanged as signal input ports or connected to the input port of the low-noise amplifier circuit; the first and second ends of the second winding of the first RF transformer can be interchanged as ground terminals or feedback signal terminals; the first and second ends of the third winding of the second RF transformer can be interchanged as ground terminals or feedback signal terminals; and the first and second ends of the fourth winding of the second RF transformer can be interchanged as signal output ports or connected to the output port of the low-noise amplifier circuit.

[0025] For example, in the high input dynamic range low noise amplifier of this embodiment, the first RF transformer and the second RF transformer are both standard RF transformers with interchangeable ports. Their winding structures are symmetrical, and the electrical characteristics of different ports are consistent. The port functions can be adjusted according to the adaptation requirements of a wide input power range to ensure the stability of signal transmission throughout the dynamic range. The first winding of the first RF transformer has a small number of turns, made of oxygen-free copper wire with a diameter of 0.1 mm wound on a nickel-zinc ferrite core. The number of turns can be 4 or 6. Both ends of the winding are provided with metal solder pads with a diameter of 0.5 mm for easy connection to external circuits. During assembly, the first end of the first winding can be soldered with an SMA connector as an input port to receive antenna signals in the frequency range of 1 GHz-3 GHz. In this case, the second end of the first winding is connected to the input port of the low-noise amplifier circuit through a 0.5 mm wide PCB trace (when the low-noise amplifier circuit is built with transistors, the input port is the gate of the transistor). Alternatively, the second end of the first winding can be soldered with an SMA connector as an input port, and the first end can be connected to the input port of the low-noise amplifier circuit. In both connection methods, the insertion loss of the signal is less than 0.3 dB, and the phase offset is controlled within ±3°. The second winding of the first RF transformer has a larger number of turns, which can be 8 turns (corresponding to 4 turns in the first winding, with a turns ratio of N=2) or 18 turns (corresponding to 6 turns in the first winding, with a turns ratio of N=3). It is wound with oxygen-free copper wire of the same specification as the first winding, and solder pads are also provided at both ends of the winding. During assembly, the first end of the second winding can be connected to the ground plane of the PCB through a via as a ground terminal. A 1mm radius ground copper foil is laid around the via. The second end of the second winding is used as a feedback signal terminal through a PCB trace with a characteristic impedance of 50 ohms, outputting a feedback signal with the opposite phase to the input signal. Alternatively, the second end of the second winding can be grounded and the first end can be used as the feedback signal terminal. Under both connection methods, the amplitude error of the feedback signal is less than 0.2dB, and the phase difference is stable at 180±5°, ensuring consistent feedback effect. The third winding of the second RF transformer is a winding with a large number of turns, made of oxygen-free copper wire with a diameter of 0.1mm wound on a manganese-zinc ferrite core. The number of turns can be 8 turns (corresponding to 4 turns in the fourth winding, with a turns ratio of M=2) or 16 turns (corresponding to 4 turns in the fourth winding, with a turns ratio of M=4). Solder pads are set at both ends of the winding. During assembly, the first end of the third winding can be connected to the ground plane as the ground terminal and the second end as the feedback signal terminal. Alternatively, the second end of the third winding can be grounded and the first end can be used as the feedback signal terminal. In both ways, the transmission delay of the feedback signal is less than 1ns, avoiding feedback phase deviation due to delay.The fourth winding of the second RF transformer has fewer turns, either 4 or 5. Solder pads are provided at both ends of the winding. During assembly, the first end of the fourth winding can be soldered with an SMA connector as the output port, and the second end can be connected to the output port of the low-noise amplifier circuit (the drain of the transistor when it is built). Alternatively, the second end of the fourth winding can be soldered with an SMA connector as the output port, and the first end can be connected to the output port of the low-noise amplifier circuit. In both cases, the VSWR of the output signal is less than 1.2, ensuring efficient signal transmission to subsequent circuits.

[0026] In existing technologies, the RF transformer ports used in low-noise amplifiers typically have fixed functions; the input port, ground port, and feedback port are not interchangeable. To accommodate a wide input power range, different transformer models must be used, increasing the circuit debugging cycle and potentially damaging solder joints due to frequent component replacements. Fixed-port transformers also have poor adaptability to changes in external system impedance. When the external system impedance deviates by ±5 ohms, the signal reflection coefficient easily exceeds -10dB, resulting in a compressed input dynamic range (reduced to ≤40dB). This embodiment uses an RF transformer with interchangeable ports, allowing flexible adjustment of the signal input terminal of the first winding, the ground terminal of the second winding, the ground terminal of the third winding, and the output terminal of the fourth winding without replacing components, significantly shortening the circuit debugging cycle. By adjusting the port connection method, it can adapt to external system impedance deviations of ±5 ohms, stabilizing the signal reflection coefficient below -15dB and ensuring the input dynamic range remains ≥50dB. This improves circuit flexibility and environmental adaptability, and the entire adjustment process does not introduce additional noise (noise figure fluctuation ≤0.1dB) or signal loss.

[0027] In another embodiment, an input matching circuit and an output matching circuit are also included; the input matching circuit is connected between the second end of the first winding of the first RF transformer and the input port of the low-noise amplifier circuit; the output matching circuit is connected between the second end of the fourth winding of the second RF transformer and the output port of the low-noise amplifier circuit.

[0028] For example, the high input dynamic range low noise amplifier of this embodiment, in addition to the low noise amplifier circuit, the first RF transformer, and the second RF transformer, also includes an input matching circuit and an output matching circuit. The first and second RF transformers are both standard RF transformers with selectable turns ratios. The low noise amplifier circuit can use an integrated low noise amplifier chip or a discrete circuit built with transistors. Its core function is to achieve low noise amplification of the RF signal, with the noise figure controlled below 1dB. The input matching circuit is used to achieve impedance matching between the first RF transformer and the low noise amplifier circuit, reducing signal reflection loss during transmission. It can be composed of a 0402 packaged fixed inductor (1nH or 2nH) and a 0402 packaged fixed capacitor (1pF or 2pF) connected in series, or it can be composed of a fixed inductor and a fixed capacitor with the same parameters connected in parallel. The inductor uses a ferrite core material, and the capacitor uses a ceramic dielectric material to ensure stable electrical characteristics in the RF band. The input matching circuit is mounted on the RF signal trace layer of the PCB. One end is connected to the second end of the first winding of the first RF transformer (the first winding has fewer turns and the first end is connected to the SMA input connector) through a 0.4mm wide PCB trace. Grounding copper is laid around the connection point, and the distance between the copper and the signal trace is not less than 0.2mm. The other end is connected to the input port of the low-noise amplifier circuit through a PCB trace of the same specification. If it is an integrated chip, it is connected to the RF IN pin of the chip; if it is a discrete transistor, it is connected to the gate of the transistor. The trace length is strictly controlled within 3mm to ensure that the signal insertion loss is less than 0.5dB. The output matching circuit is used to achieve impedance matching between the second RF transformer and the low-noise amplifier circuit. Its configuration is similar to that of the input matching circuit. It can be composed of a 0402 packaged fixed inductor (2nH or 3nH) and a 0402 packaged fixed capacitor (2pF or 3pF) connected in series or in parallel. The materials of the inductor and capacitor are the same as those of the input matching circuit. The output matching circuit is also mounted on the RF signal trace layer of the PCB and is kept at a distance of more than 15mm from the input matching circuit to avoid electromagnetic interference between the two. One end of the output matching circuit is connected to the second end of the fourth winding of the second RF transformer (the fourth winding is a winding with fewer turns, and the first end is connected to the SMA output connector) through a 0.4mm wide PCB trace. The other end is connected to the output port of the low-noise amplifier circuit. If it is an integrated chip, it is connected to the RF OUT pin of the chip. If it is a discrete transistor, it is connected to the drain of the transistor. The trace length is controlled within 3mm, the insertion loss is less than 0.5dB, and the impedance matching error is less than 5% in the 1GHz-3GHz operating frequency band.

[0029] This embodiment, by adding an input / output matching circuit and selecting inductors and capacitors with appropriate parameters, ensures that the signal reflection coefficient is less than -15dB and the signal transmission efficiency exceeds 95% throughout the entire operating frequency band. At the same time, the matching circuit has low insertion loss and does not significantly increase the noise figure, ensuring that the noise figure of the low-noise amplifier circuit remains stable below 0.9dB. This effectively improves impedance matching performance and frequency band adaptability without adding excessive circuit complexity and cost.

[0030] In another embodiment, at least one of the input matching circuit and the output matching circuit includes an adjustable matching network; the input matching circuit includes a first fixed inductor, a first adjustable capacitor, and a second fixed capacitor; wherein one end of the first fixed inductor is connected to the second end of the first winding of the first RF transformer, and the other end of the first fixed inductor is simultaneously connected to one end of the first adjustable capacitor and one end of the second fixed capacitor; the other end of the first adjustable capacitor receives an externally provided first DC tuning voltage for continuously adjusting its capacitance value by changing the amplitude of the first DC tuning voltage; the other end of the second fixed capacitor is connected to the input port of the low-noise amplifier circuit and is used to implement DC blocking function; the output matching circuit includes a second adjustable capacitor, one end of which receives an externally provided second DC tuning voltage for continuously adjusting its capacitance value by changing the amplitude of the second DC tuning voltage, and the other end of the second adjustable capacitor is connected to the second end of the fourth winding or the output port.

[0031] For example, in the high input dynamic range low noise amplifier of this embodiment, at least one of the input matching circuit and the output matching circuit includes an adjustable matching network. For example, both the input matching circuit and the output matching circuit are equipped with adjustable matching networks to adapt to the matching requirements under different frequency bands or different external impedance conditions. The first RF transformer and the second RF transformer are both standard RF transformers with turns ratios of 1:N (N=2 or 3) and M:1 (M=2 or 4), respectively. The low noise amplifier circuit can be a discrete circuit built with transistors or an integrated low noise amplifier chip, with the noise figure controlled below 1dB. The input matching circuit includes a first fixed inductor, a first adjustable capacitor, and a second fixed capacitor. The first fixed inductor is a ferrite inductor with a 0603 package and an inductance value of 1.5nH or 2.5nH. One end of the inductor is connected to the second end of the first winding of the first RF transformer (the first winding has fewer turns and the first end is connected to the SMA input connector) through a 0.5mm wide PCB trace. A grounding copper sheet with an area of ​​not less than 2mm × 2mm is laid around the connection point to reduce grounding noise. The other end of the first fixed inductor is connected to one end of the first adjustable capacitor and one end of the second fixed capacitor through a PCB trace of the same specification. The common connection point is 2mm away from the previous connection point of the first fixed inductor to avoid signal crosstalk. The first adjustable capacitor is an electrically tunable capacitor with a capacitance value adjustment range of 0.5pF to 5pF. It is made of ceramic dielectric material. Its other end receives an externally supplied first DC tuning voltage through a 0.3mm wide PCB trace. The amplitude range of this voltage is 0V to 5V. When the voltage is adjusted from 0V to 2.5V, the capacitance value of the adjustable capacitor decreases linearly from 5pF to 2.5pF. When the voltage is adjusted from 2.5V to 5V, the capacitance value continues to decrease to 0.5pF, realizing continuous adjustment of the capacitance value to adapt to the impedance matching requirements at different frequencies. The second fixed capacitor is a 0603 packaged ceramic capacitor with a capacitance of 1.5pF or 2.5pF. Its other end is connected to the input port of the low-noise amplifier circuit through a 0.5mm wide PCB trace. If it is a discrete transistor, it is connected to the gate; if it is an integrated chip, it is connected to the RF IN pin. This fixed capacitor can block DC signals and only allow RF signals to pass through. The DC blocking voltage range is 0V to 10V, ensuring that the DC bias of the low-noise amplifier circuit is not affected by the input signal.The output matching circuit includes a second adjustable capacitor, which is of the same type and has the same parameters as the first adjustable capacitor. The capacitance value is adjustable from 0.5pF to 5pF. One end of the capacitor receives a second DC tuning voltage provided externally through a 0.3mm wide PCB trace. The voltage amplitude is also 0V to 5V. When the voltage is adjusted from 0V to 3V, the capacitance value decreases from 5pF to 2pF, and when adjusted from 3V to 5V, it decreases to 0.5pF. The other end of the second adjustable capacitor is connected to the second end of the fourth winding of the second RF transformer (the fourth winding is a winding with fewer turns) or the signal output port (SMA connector) through a 0.5mm wide PCB trace. Grounding copper foil is laid around the connection point to reduce electromagnetic interference and ensure stable output signal.

[0032] This embodiment uses an electrically tunable adjustable capacitor. The capacitor value can be adjusted in real time by changing the DC tuning voltage. Within the operating frequency band of 1GHz-3GHz, the signal reflection coefficient is consistently below -15dB, and the signal loss is controlled within 0.5dB. The electrically tunable method requires no mechanical structure, has a response time of less than 10μs, can quickly adapt to changes in external conditions, and has high reliability for long-term use. It effectively improves the frequency band adaptability and dynamic adjustment capability of the circuit. At the same time, the circuit has a high degree of integration, which facilitates its collaboration with other modules.

[0033] In another embodiment, the input matching circuit further includes an electrostatic discharge (ESD) protection structure. The ESD protection structure is connected in parallel between a critical node in the input matching circuit and ground. The critical node is a common node connecting the first fixed inductor, the first adjustable capacitor, and the second fixed capacitor. The ESD protection structure includes at least one ESD protection diode, with its cathode connected to the critical node and its anode connected to ground. The breakdown voltage of the ESD protection diode is set to be higher than the highest RF voltage amplitude at the critical node of the high input dynamic range low noise amplifier in normal operating mode, but lower than the rated breakdown voltage of the first adjustable capacitor and the gate oxide breakdown voltage of the transistor at the input port of the low noise amplifier circuit.

[0034] For example, in the high input dynamic range low noise amplifier of this embodiment, the input matching circuit further includes an electrostatic discharge protection structure. This structure is used to prevent external static electricity from damaging the components of the input matching circuit and the low noise amplifier circuit through the input port, ensuring circuit stability over a wide input power range (-40dBm~0dBm). The first RF transformer is a standard RF transformer with a turns ratio of 1:N (N=2 or 3), the rated breakdown voltage of the first adjustable capacitor is 20V, and the gate oxide breakdown voltage of the transistor (if it is a discrete circuit) at the input port of the low noise amplifier circuit is 15V, ensuring that the electrical safety threshold of the components meets the operating requirements of the high input dynamic range. The electrostatic discharge (ESD) protection structure is connected in parallel between the critical node of the input matching circuit and ground. This critical node is the common connection point of the first fixed inductor, the first adjustable capacitor, and the second fixed capacitor. The first fixed inductor is a 0603 packaged ferrite inductor (1.5nH), and the second fixed capacitor is a 0603 packaged ceramic capacitor (2pF). The critical node is connected to one end of each of the three components via 0.5mm wide PCB traces. Multiple 0.3mm diameter grounding vias with a 1mm spacing are arranged around the node to form a grounding ring for rapid discharge of electrostatic charge. The ESD protection structure includes at least one ESD protection diode, or two identical ESD protection diodes connected in parallel to improve ESD discharge capability. The diode uses an SOT-23 package. Its cathode is connected to the critical node via a 0.3mm wide PCB trace, and its anode is connected to the PCB ground plane via a PCB trace of the same specification. The ground plane uses a large-area copper foil design with a copper foil thickness of not less than 35μm and a grounding impedance of less than 0.1 ohms to ensure that electrostatic charge can be quickly conducted to ground. The breakdown voltage of this electrostatic discharge protection diode is set to 10V. In the normal operating mode of the high input dynamic range low noise amplifier, the highest RF voltage amplitude at the critical node is 5V (when the input signal power is 0dBm). The 10V breakdown voltage is higher than this highest RF voltage amplitude, which can prevent the diode from breaking down accidentally during normal operation, thus not affecting the transmission of the input signal. At the same time, the 10V breakdown voltage is lower than the rated breakdown voltage of the first adjustable capacitor (20V) and the gate oxide breakdown voltage of the transistor at the input port of the low noise amplifier circuit (15V). When the critical node generates a transient high voltage of more than 10V due to external electrostatic interference, the diode will quickly break down and conduct, discharging the electrostatic charge to the ground plane, thereby protecting the first adjustable capacitor and the transistor from overvoltage damage.

[0035] This embodiment, by adding an electrostatic discharge protection structure and reasonably setting the breakdown voltage of the protection diode, can control the circuit failure rate to below 1% when encountering 15kV air discharge electrostatic discharge and 8kV contact discharge electrostatic discharge. Under normal operation, the diode will not break down accidentally, will not introduce additional noise (the noise figure is stable below 0.8dB), and will not compress the input dynamic range (it still maintains ≥50dB). This not only improves the circuit's anti-static capability and reliability, but also ensures the signal amplification performance within a high input dynamic range.

[0036] In another embodiment, the first adjustable capacitor in the input matching circuit and the second adjustable capacitor in the output matching circuit are both binary weighted capacitor arrays. The binary weighted capacitor array includes a least significant bit capacitor unit and at least one more significant bit capacitor unit. Each capacitor unit consists of a fixed capacitor and a switching transistor connected in parallel with it. The control terminal of the switching transistor receives a digital control signal. When the switching transistor is turned on, the corresponding fixed capacitor is connected to the binary weighted capacitor array. When the switching transistor is turned off, the corresponding fixed capacitor is disconnected from the binary weighted capacitor array. The sum of the capacitance values ​​of all connected fixed capacitors constitutes the current total capacitance value of the binary weighted capacitor array. The digital control signals together form a binary control word, which is used to discretely adjust the capacitance values ​​of the first adjustable capacitor and the second adjustable capacitor.

[0037] For example, in the high input dynamic range low noise amplifier of this embodiment, the first adjustable capacitor in the input matching circuit and the second adjustable capacitor in the output matching circuit are both binary weighted capacitor arrays. This array can be integrated on a PCB board using CMOS technology or assembled as an independent module. The first RF transformer and the second RF transformer are standard RF transformers with turns ratios of 1:N (N=2 or 3) and M:1 (M=2 or 4), respectively. The low noise amplifier circuit can be built using integrated chips or discrete transistors, and the noise figure is controlled below 1dB. The binary weighted capacitor array includes one least significant bit capacitor unit and at least one higher significant bit capacitor unit. For example, it can include one least significant bit capacitor unit and two higher significant bit capacitor units (a total of 3 units), or it can include one least significant bit capacitor unit and three higher significant bit capacitor units (a total of 4 units). The number of units can be selected according to the capacitance value adjustment accuracy requirements. Each capacitor cell consists of a fixed capacitor and a switching transistor connected in parallel. The fixed capacitor is a 0402 packaged ceramic capacitor. The fixed capacitance value of the least significant bit (LSB) capacitor cell is 0.5pF, the fixed capacitance value of the first higher SSB capacitor cell is 1pF (twice the LSB value), the fixed capacitance value of the second higher SSB capacitor cell is 2pF (four times the LSB value), and the fixed capacitance value of the third higher SSB capacitor cell is 4pF (eight times the LSB value), ensuring that the capacitance values ​​of each cell are in a binary weighted relationship. The switching transistor is an N-channel MOSFET in an SOT-23 package. Its source and drain are connected to the two ends of the corresponding fixed capacitor, respectively, to achieve parallel connection with the fixed capacitor. The control terminal (gate) of the switching transistor receives a digital control signal through a 0.2mm wide PCB trace. The amplitude of this signal is 0V (low level) or 3.3V (high level). When the digital control signal is 3.3V high level, the switching transistor is turned on, and the corresponding fixed capacitor is connected to the binary weighted capacitor array to participate in the composition of the total capacitance value. When the digital control signal is 0V low level, the switching transistor is turned off, and the corresponding fixed capacitor is disconnected from the array and does not participate in the composition of the total capacitance value. The sum of the capacitance values ​​of all the connected fixed capacitors constitutes the current total capacitance value of the binary weighted capacitor array. For example, when the digital control signals of the three capacitor units are 1 (3.3V), 0 (0V), and 0 (0V), the total capacitance value is 0.5pF; when the control signals are 1, 1, and 0, the total capacitance value is 0.5pF + 1pF = 1.5pF; and when the control signals are 1, 1, and 1, the total capacitance value is 0.5pF + 1pF + 2pF = 3.5pF.All digital control signals together form a binary control word. For example, 3 units correspond to a 3-bit binary control word, and 4 units correspond to a 4-bit binary control word. By changing the value of the binary control word, the capacitance values ​​of the first and second adjustable capacitors can be adjusted discretely, with the adjustment step being the capacitance value of the least significant bit capacitor unit (0.5pF) to meet the requirements of different impedance matching accuracies.

[0038] In existing technologies, adjustable capacitors mostly use single-path variable capacitors, whose capacitance value is continuously adjusted by DC voltage. However, the adjustment accuracy is low, with capacitance error typically exceeding ±10%, and the capacitance drift exceeds 5% in high-temperature environments (85℃), failing to meet the requirements of high-precision impedance matching. This embodiment uses a binary weighted capacitor array, which discretely adjusts the capacitance value through digital control signals. The capacitance error can be controlled within ±2%, and the capacitance drift is less than 1% within a temperature range of -40℃ to 85℃, significantly improving adjustment accuracy and environmental stability. The binary control word can be automatically generated by the digital control module, realizing automatic adjustment of the capacitance value without manual intervention, adapting to dynamic working scenarios. Furthermore, the array structure is clear, facilitating integration with other digital circuits and reducing circuit complexity and control difficulty.

[0039] In another embodiment, the low-noise amplifier circuit integrates an active bias circuit, including a current mirror structure, a temperature compensation network, and an RF choke. The current mirror structure includes a first bias transistor and a second bias transistor, with the control terminals of the first and second bias transistors connected. The temperature compensation network is connected to a reference node of the current mirror structure and includes a parallel combination of a positive temperature coefficient resistor and a negative temperature coefficient diode network. The RF choke is connected between the control terminal of a main amplifying transistor of the low-noise amplifier circuit and a bias voltage output node of the active bias circuit.

[0040] For example, in the high input dynamic range low noise amplifier of this embodiment, the low noise amplifier circuit integrates an active bias circuit. This circuit is used to provide a stable bias current and bias voltage for the low noise amplifier circuit, so as to avoid unstable amplification performance due to power supply fluctuations or temperature changes. The main amplification transistor of the low noise amplifier circuit can be an NPN bipolar transistor or an N-channel MOSFET. The first RF transformer and the second RF transformer are standard RF transformers with turns ratios of 1:N (N=2 or 3) and M:1 (M=2 or 4), respectively. The active bias circuit includes a current mirror structure, a temperature compensation network, and an RF choke. The current mirror structure includes a first bias transistor and a second bias transistor, both of which are NPN bipolar transistors, or MOSFETs of the same type can be used. The emitter (or source) of the transistors is connected to the ground plane of the PCB through a 0.3mm wide PCB trace. The ground plane uses a large area copper foil design to reduce grounding impedance. The control terminal (base or gate) of the first bias transistor is connected to the control terminal of the second bias transistor through a 0.3mm wide PCB trace, forming the reference terminal of the current mirror. The collector (or drain) of the first bias transistor is connected to an external 5V DC power supply through a trace. The collector (or drain) of the second bias transistor serves as the output terminal of the current mirror, providing bias current for subsequent circuits. A temperature compensation network is connected to a reference node of the current mirror structure (i.e., the connection point between the control terminals of the first and second bias transistors) to compensate for the effect of temperature changes on the bias current. This network consists of a parallel combination of a positive temperature coefficient resistor and a negative temperature coefficient diode network. The positive temperature coefficient resistor is made of ceramic material with a temperature coefficient of 3850ppm / ℃ or 3920ppm / ℃, 0402 package, and its resistance value is 1k ohms at 25℃. The negative temperature coefficient diode network is composed of multiple silicon diodes connected in series, with a forward voltage drop of approximately 0.7V and a negative temperature coefficient of approximately -2mV / ℃ for each diode. One end of both the positive temperature coefficient resistor and the negative temperature coefficient diode network is connected to the reference node, and the other end is connected to the ground plane. The temperature characteristics of the two complement each other to cancel out the effect of temperature changes on the bias current. The RF choke is a ferrite inductor with an inductance of 100nH, packaged in a 0402 package. One end is connected to the control terminal (base or gate) of the main amplifying transistor in the low-noise amplifier circuit via a 0.3mm wide PCB trace, and the other end is connected to a bias voltage output node of the active bias circuit (i.e., the collector or drain of the second bias transistor). The RF choke has a cutoff frequency higher than 3GHz, which can block RF signals from entering the bias circuit, avoiding interference from RF signals on the bias voltage and current, while allowing the DC bias signal to be transmitted smoothly to the main amplifying transistor, ensuring the stable amplification state of the main amplifying transistor.

[0041] This embodiment integrates an active bias circuit and utilizes a current mirror structure to provide a stable bias current. Combined with the complementary characteristics of a temperature compensation network, the variation in bias current can be controlled within 5% when the temperature changes from -40℃ to 85℃, and the amplifier gain fluctuation is less than 0.3dB, significantly improving temperature adaptability. At the same time, the RF choke effectively blocks RF signal crosstalk, ensuring that the noise of the bias circuit will not couple to the main amplifier circuit. The noise figure of the low-noise amplifier is stable below 0.8dB, and the circuit has high integration, eliminating the need for an additional external bias module and simplifying the overall circuit structure.

[0042] In another embodiment, the negative temperature coefficient diode network in the temperature compensation network is composed of multiple PN junction diodes connected in series; the multiple PN junction diodes include a first diode, a second diode, up to the Lth diode, where L is an integer greater than or equal to 2; the anode of the first diode serves as one port of the negative temperature coefficient diode network and is connected to the reference node of the current mirror structure; the cathode of the first diode is connected to the anode of the second diode, and so on, until the cathode of the Lth diode serves as another port of the negative temperature coefficient diode network and is connected to ground; the total negative temperature coefficient of the negative temperature coefficient diode network is adjusted by selecting the number L of PN junction diodes connected in series.

[0043] For example, in the high input dynamic range low noise amplifier of this embodiment, the negative temperature coefficient diode network in the temperature compensation network of the active bias circuit integrated with the low noise amplifier circuit is composed of multiple PN junction diodes connected in series. The current mirror structure of the active bias circuit adopts an NPN bipolar transistor, the positive temperature coefficient resistor is made of ceramic material (temperature coefficient 3850ppm / ℃, resistance value 1k ohm at 25℃), the main amplification transistor is an NPN bipolar transistor, and the first RF transformer and the second RF transformer are standard RF transformers with turns ratios of 1:N (N=2 or 3) and M:1 (M=2 or 4), respectively. The multiple PN junction diodes include a first diode, a second diode, up to the Lth diode, where L is an integer greater than or equal to 2. The value of L can be selected as 2 or 3 to adjust the total negative temperature coefficient according to the actual temperature compensation requirements. All PN junction diodes are silicon rectifier diodes. The forward voltage drop of a single diode is about 0.7V. The negative temperature coefficient is about -2mV / ℃ in the temperature range of -40℃ to 85℃. The diodes are packaged in DO-35 for easy soldering and assembly on the PCB. The anode of the first diode serves as one port of the negative temperature coefficient diode network, connected to the reference node of the current mirror structure (i.e., the connection point of the control terminals of the two bias transistors in the current mirror) via a 0.3mm wide PCB trace. A grounded copper layer with an area of ​​not less than 1mm × 1mm is laid around the connection point to reduce external interference. The cathode of the first diode is connected to the anode of the second diode via a 0.3mm wide PCB trace, with the trace length controlled within 1mm to avoid signal loss. When L=2, the cathode of the second diode serves as another port of the negative temperature coefficient diode network, connected to the ground plane of the PCB via a trace. When L=3, the cathode of the second diode is connected to the anode of the third diode via a trace, and the cathode of the third diode serves as another port of the network connected to the ground plane. The ground plane adopts a large-area copper layer design with a grounding impedance of less than 0.1 ohms to ensure a stable current path. The total negative temperature coefficient of the negative temperature coefficient diode network can be adjusted by selecting the number L of PN junction diodes connected in series. For example, when L=2, the total negative temperature coefficient of the network is twice that of a single diode, i.e., -4mV / ℃; when L=3, the total negative temperature coefficient is -6mV / ℃. An appropriate value of L can be selected according to the current mirror structure and the temperature characteristics of the main amplifying transistor, so that the negative temperature coefficient of the diode network complements the positive temperature coefficient of the positive temperature coefficient resistor, thereby offsetting the effect of temperature change on the bias current and ensuring the stability of the bias current.

[0044] This embodiment uses multiple PN junction diodes connected in series to form a negative temperature coefficient diode network. The total negative temperature coefficient can be flexibly adjusted by changing the number of diodes connected in series, L. For example, when L=2, the total coefficient is -4mV / ℃, and when L=3, it is -6mV / ℃. This network can be precisely matched with positive temperature coefficient resistors of different parameters to achieve complementary temperature characteristics. When the temperature changes by 50℃, the change in bias current can be controlled within 5%, the amplifier gain fluctuation is less than 0.3dB, the temperature compensation accuracy is significantly improved, and the diode series structure is simple, requiring no complex control circuit, and is easy to integrate into the active bias circuit, reducing the difficulty of circuit design.

[0045] In another embodiment, a bypass resonant branch and a mode control switch are also included; the bypass resonant branch is composed of a resonant inductor and a resonant capacitor connected in series; the mode control switch is implemented by a single-pole single-throw transistor; the bypass resonant branch is connected in series with the mode control switch and then connected in parallel between the input port of the low-noise amplifier circuit and ground, or in parallel between the output port of the low-noise amplifier circuit and ground; when the mode control switch is closed, the bypass resonant branch presents low impedance near the resonant frequency of the resonant inductor and resonant capacitor, switching the operating frequency band of the high input dynamic range low-noise amplifier to the first frequency band; when the mode control switch is open, the bypass resonant branch is removed from the circuit, and the operating frequency band of the high input dynamic range low-noise amplifier switches to the second frequency band.

[0046] For example, the high input dynamic range low noise amplifier of this embodiment also includes a bypass resonant branch and a mode control switch. The low noise amplifier circuit can be an integrated low noise amplifier chip or a discrete circuit built with transistors. The first RF transformer and the second RF transformer are standard RF transformers with turns ratios of 1:N (N=2 or 3) and M:1 (M=2 or 4), respectively. The core function is to switch the operating frequency band of the amplifier by connecting and disconnecting the bypass resonant branch, and maintain an input dynamic range of ≥50dB in each frequency band. The bypass resonant branch consists of a resonant inductor and a resonant capacitor connected in series. The resonant inductor is a fixed ferrite inductor with an inductance value of 10nH or 20nH, in a 0402 package, and its inductance value deviation is less than ±5% in the 1GHz-3GHz frequency band. The resonant capacitor is a fixed ceramic capacitor with a capacitance value of 1pF or 2pF, in a 0402 package, and its capacitance value deviation is less than ±2%. The resonant inductor and resonant capacitor are connected in series via a 0.3mm wide PCB trace, with the trace length controlled within 2mm to reduce signal loss. For example, when the inductor is 10nH and the capacitor is 1pF, the resonant frequency is approximately 1.59GHz; when the inductor is 20nH and the capacitor is 2pF, the resonant frequency is approximately 0.796GHz. The inductor and capacitor parameters can be selected according to the target resonant frequency. The mode control switch is implemented using a single-pole single-throw transistor, which can be an N-channel MOSFET or an NPN bipolar transistor in an SOT-23 package. Its source (or emitter) is connected to one end of the bypass resonant branch via a trace, its drain (or collector) is connected to ground via a trace, and its gate (or base) receives an external mode control signal (0V low level or 3.3V high level) via a trace. The transistor turns on when the control signal is high and turns off when it is low. The bypass resonant branch, connected in series with the mode control switch, can be connected in parallel between the input port and ground of the low-noise amplifier circuit, or between the output port and ground of the low-noise amplifier circuit. When connected in parallel at the input port, one end of the branch is connected to the input port (the RF IN pin of the integrated chip or the gate of the transistor), and the other end is grounded through the mode control switch. When connected in parallel at the output port, one end of the branch is connected to the output port (the RF OUT pin of the integrated chip or the drain of the transistor), and the other end is grounded through the mode control switch.When the mode control switch is closed, the bypass resonant branch is connected to the circuit, exhibiting low impedance characteristics near the resonant frequency of the resonant inductor and capacitor. Signals at this frequency and in the nearby frequency band are grounded through the branch, thereby switching the operating frequency band of the high input dynamic range low noise amplifier to the first frequency band (e.g., when the resonant frequency is 1.59GHz, the first frequency band is 2GHz-3GHz), and the input dynamic range within this frequency band is ≥50dB (-40dBm~0dBm). When the mode control switch is open, the bypass resonant branch is removed from the circuit, and the originally grounded frequency band signals can pass normally. The amplifier's operating frequency band switches to the second frequency band (e.g., 1GHz-3GHz), and the input dynamic range within this frequency band still remains ≥50dB, achieving flexible switching between different frequency bands without sacrificing dynamic range performance.

[0047] In existing technologies, low-noise amplifiers typically operate on a fixed frequency band. To cover multiple bands, multiple independent amplification paths must be designed, requiring manual switching to select the path. This not only increases circuit size and cost but also introduces additional noise (noise figure increase of 0.5dB or more) due to the contact resistance of the switching switch, and the input dynamic range of each path is inconsistent (fluctuation ≥8dB). This embodiment, through a combination of a bypass resonant branch and a mode control switch, only requires controlling the on / off state of the switching transistor to complete the operating frequency band switching within 10μs, resulting in fast switching speed. Simultaneously, the resonant frequency of the resonant branch can be precisely set by selecting inductor and capacitor parameters. After switching, the reflection coefficient in each operating frequency band is ≤-15dB, the noise figure is stable below 0.9dB, and the input dynamic range is ≥50dB. This eliminates the need for multiple amplification paths, simplifying the circuit structure, reducing costs, and ensuring high reliability due to the absence of mechanical operation during switching.

[0048] In another embodiment, the low-noise amplifier circuit includes a cascaded amplifier structure, which consists of a driver amplifier transistor and a cascode transistor. The control terminal of the driver amplifier transistor serves as the input port of the low-noise amplifier circuit. The first current-carrying terminal of the driver amplifier transistor is connected to an RF ground potential, and the second current-carrying terminal of the driver amplifier transistor is connected to the first current-carrying terminal of the cascode transistor. The control terminal of the cascode transistor is connected to a DC bias voltage, and the second current-carrying terminal of the cascode transistor serves as the output port of the low-noise amplifier circuit. At the connection node between the second current-carrying terminal of the driver amplifier transistor and the first current-carrying terminal of the cascode transistor, an inter-stage matching network is connected. The inter-stage matching network is composed of inter-stage inductors and inter-stage capacitors connected in parallel or in series.

[0049] For example, in the high input dynamic range low noise amplifier of this embodiment, the low noise amplifier circuit includes a cascaded amplification structure. This structure improves the linearity of the amplifier while ensuring low noise (noise figure ≤ 0.8dB) and extends the input dynamic range to ≥ 50dB through the cascading of two stages of transistors. The first RF transformer and the second RF transformer are standard RF transformers with turns ratios of 1:N (N=2 or 3) and M:1 (M=2 or 4), respectively. The cascaded amplification structure consists of a driver amplification transistor and a cascode transistor. Both the driver amplification transistor and the cascode transistor can be N-channel MOSFETs or NPN bipolar transistors. Both are packaged in SOT-23 to reduce PCB area. The control terminal (gate or base) of the driver amplification transistor serves as the input port of the low noise amplifier circuit. It is connected to the second end of the first winding of the first RF transformer (the first winding has fewer turns and the first end is connected to an SMA input connector) through a 0.5mm wide PCB trace. A grounded copper layer is laid around the connection point, and the distance between the copper layer and the signal trace is not less than 0.2mm to reduce interference. The first current-carrying terminal (source or emitter) of the driving amplifier transistor is connected to an RF ground potential via a trace. The RF ground is connected to a large-area ground plane via a ground via on the PCB, with a grounding impedance of less than 0.1 ohms. The second current-carrying terminal (drain or collector) of the driving amplifier transistor is connected to the first current-carrying terminal (source or emitter) of the cascode transistor via a 0.5mm wide PCB trace. The trace length is controlled within 2mm to reduce signal loss and phase shift. The control terminal (gate or base) of the cascode transistor is connected to a DC bias voltage via a trace. The amplitude of this bias voltage can be 2V or 3V, used to make the cascode transistor operate in the saturation region (or amplification region) to ensure the amplification performance of the cascaded structure. The second current-carrying terminal (drain or collector) of the cascode transistor serves as the output port of the low-noise amplifier circuit and is connected to the second end of the fourth winding of the second RF transformer (the fourth winding is a winding with fewer turns, and the first end is connected to the SMA output connector) via a 0.5mm wide PCB trace.At the connection node between the second current-carrying terminal of the driving amplifier transistor and the first current-carrying terminal of the cascode transistor, an interstage matching network is connected. This network is used to achieve impedance matching between the two stages of transistors and reduce signal reflection loss during interstage transmission. The interstage matching network consists of an interstage inductor and an interstage capacitor connected in parallel, or they can be connected in series. The interstage inductor is a fixed ferrite inductor with an inductance value of 5nH or 10nH and a 0402 package. The interstage capacitor is a fixed ceramic capacitor with a capacitance value of 1pF or 3pF and a 0402 package. When a parallel structure is used, one end of both the inductor and capacitor is connected to the interstage node, and the other end is connected to RF ground. When a series structure is used, one end of the inductor and capacitor connected in series is connected to the interstage node, and the other end is connected to RF ground. By properly selecting the inductor and capacitor parameters, the impedance matching error of the interstage matching network in the 1GHz-3GHz frequency band is less than 5%, and the insertion loss is less than 0.3dB.

[0050] In existing technologies, low-noise amplifier circuits often employ a single-stage amplification structure. While simple in structure, this approach struggles to balance gain and linearity, resulting in a narrow input dynamic range (only -35dBm to -8dBm). Saturation easily occurs when the input signal power exceeds -8dBm, leading to distortion exceeding 5%. This embodiment utilizes a cascaded structure of a driving amplification transistor and a cascode transistor. The cascode transistor suppresses the Miller effect of the driving transistor, significantly improving the amplifier's linearity and extending the input dynamic range to -40dBm to 0dBm (≥50dB). Even with an input signal power of 0dBm, there is no saturation, and distortion is controlled within 1%. The interstage matching network achieves precise impedance matching between the two stages (reflection coefficient ≤ -15dB in the 1GHz-3GHz band) and interstage signal loss ≤ 0.3dB, ensuring the noise figure of the low-noise amplifier circuit remains stable below 0.8dB and the gain is increased by 3dB-5dB. This achieves a good balance between low noise, high linearity, and high input dynamic range, and the circuit structure is compact and easy to integrate.

[0051] Although embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. For those skilled in the art, other modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and embodiments shown and described herein.

Claims

1. A high input dynamic range, low noise amplifier, characterized in that: Includes a low-noise amplifier circuit, a first radio frequency transformer, and a second radio frequency transformer; The first radio frequency transformer has a turns ratio of 1:N, where N is 2, 3 or 4, and the second radio frequency transformer has a turns ratio of M:1, where M is 2, 3 or 4. The first RF transformer includes a first winding and a second winding, with the first winding having fewer turns than the second winding. The second RF transformer includes a third winding and a fourth winding, with the third winding having more turns than the fourth winding. The first end of the first winding serves as the signal input port of a high-input dynamic range low-noise amplifier, and the second end of the first winding is connected to the input port of a low-noise amplifier circuit. The first end of the fourth winding serves as the signal output port of the high-input dynamic range low-noise amplifier, and the second end of the fourth winding is connected to the output port of the low-noise amplifier circuit. The second end of the first winding is connected to the first end of the third winding, and the first end of the second winding is connected to the second end of the fourth winding. The second end of the second winding is grounded, and the second end of the third winding is grounded.

2. The high input dynamic range low noise amplifier as described in claim 1, characterized in that, The first and second ends of the first winding of the first RF transformer can be interchanged as signal input ports or connected to the input port of a low-noise amplifier circuit. The first and second ends of the second winding of the first RF transformer can be interchanged as ground terminals or feedback signal terminals. The first and second ends of the third winding of the second RF transformer can be interchanged as grounding terminals or feedback signal terminals, and the first and second ends of the fourth winding of the second RF transformer can be interchanged as signal output ports or connected to the output port of a low-noise amplifier circuit.

3. The high input dynamic range low noise amplifier as described in claim 1, characterized in that, It also includes input matching circuitry and output matching circuitry; The input matching circuit is connected between the second end of the first winding of the first RF transformer and the input port of the low-noise amplifier circuit. The output matching circuit is connected between the second end of the fourth winding of the second RF transformer and the output port of the low-noise amplifier circuit.

4. The high input dynamic range low noise amplifier as described in claim 3, characterized in that, At least one of the input matching circuit and the output matching circuit includes an adjustable matching network; The input matching circuit includes a first fixed inductor, a first adjustable capacitor, and a second fixed capacitor. One end of the first fixed inductor is connected to the second end of the first winding of the first RF transformer, and the other end of the first fixed inductor is connected to one end of the first adjustable capacitor and one end of the second fixed capacitor. The other end of the first adjustable capacitor receives an externally provided first DC tuning voltage, which is used to continuously adjust its capacitance value by changing the amplitude of the first DC tuning voltage. The other end of the second fixed capacitor is connected to the input port of the low-noise amplifier circuit and is used to implement the DC blocking function. The output matching circuit includes a second adjustable capacitor. One end of the second adjustable capacitor receives an externally provided second DC tuning voltage to continuously adjust its capacitance value by changing the amplitude of the second DC tuning voltage. The other end of the second adjustable capacitor is connected to the second end of the fourth winding or the output port.

5. The high input dynamic range low noise amplifier as described in claim 4, characterized in that, The input matching circuit also includes an electrostatic discharge protection structure; The electrostatic discharge protection structure is connected in parallel between the critical node in the input matching circuit and ground. The critical node is the common node connecting the first fixed inductor, the first adjustable capacitor, and the second fixed capacitor. The electrostatic discharge protection structure includes at least one electrostatic discharge protection diode, with the cathode of the electrostatic discharge protection diode connected to a critical node and the anode of the electrostatic discharge protection diode connected to ground. The breakdown voltage of the electrostatic discharge protection diode is set to be higher than the highest RF voltage amplitude that occurs at the critical node of the high input dynamic range low noise amplifier in normal operating mode, but lower than the rated breakdown voltage of the first adjustable capacitor and the gate oxide breakdown voltage of the transistor at the input port of the low noise amplifier circuit.

6. The high input dynamic range low noise amplifier as described in claim 4, characterized in that, The first adjustable capacitor in the input matching circuit and the second adjustable capacitor in the output matching circuit are both binary weighted capacitor arrays. The binary weighted capacitor array includes a least significant bit capacitor unit and at least one more significant bit capacitor unit; each capacitor unit consists of a fixed capacitor and a switching transistor connected in parallel with it; the control terminal of the switching transistor receives a digital control signal; when the switching transistor is turned on, the corresponding fixed capacitor is connected to the binary weighted capacitor array; when the switching transistor is turned off, the corresponding fixed capacitor is disconnected from the binary weighted capacitor array. The sum of the capacitance values ​​of all connected fixed capacitors constitutes the current total capacitance value of the binary weighted capacitor array; The digital control signals together form a binary control word, which is used to discretely adjust the capacitance values ​​of the first adjustable capacitor and the second adjustable capacitor.

7. The high input dynamic range low noise amplifier as described in claim 1, characterized in that, The low-noise amplifier circuit integrates an active bias circuit, including a current mirror structure, a temperature compensation network, and an RF choke. The current mirror structure includes a first bias transistor and a second bias transistor, with the control terminal of the first bias transistor connected to the control terminal of the second bias transistor. The temperature compensation network is connected to a reference node of the current mirror structure. The temperature compensation network consists of a parallel combination of a positive temperature coefficient resistor and a negative temperature coefficient diode network. The radio frequency choke is connected between the control terminal of a main amplifying transistor in a low-noise amplifier circuit and a bias voltage output node in an active bias circuit.

8. The high input dynamic range low noise amplifier as described in claim 7, characterized in that, The negative temperature coefficient diode network in the temperature compensation network consists of multiple PN junction diodes connected in series. These PN junction diodes include a first diode, a second diode, and so on up to the Lth diode, where L is an integer greater than or equal to 2. The anode of the first diode serves as one port of the negative temperature coefficient diode network and is connected to the reference node of the current mirror structure. The cathode of the first diode is connected to the anode of the second diode, and so on, until the cathode of the Lth diode serves as another port of the negative temperature coefficient diode network and is connected to ground. The total negative temperature coefficient of the negative temperature coefficient diode network is adjusted by selecting the number L of PN junction diodes connected in series.

9. The high input dynamic range low noise amplifier as described in claim 1, characterized in that, It also includes a bypass resonant branch and a mode control switch; The bypass resonant branch consists of a resonant inductor and a resonant capacitor connected in series; the mode control switch is implemented by a single-pole single-throw transistor; after the bypass resonant branch is connected in series with the mode control switch, it is connected in parallel between the input port of the low-noise amplifier circuit and ground, or in parallel between the output port of the low-noise amplifier circuit and ground; when the mode control switch is closed, the bypass resonant branch presents low impedance near the resonant frequency of the resonant inductor and resonant capacitor, switching the operating frequency band of the high input dynamic range low-noise amplifier to the first frequency band; When the mode control switch is off, the bypass resonant branch is removed from the circuit, and the operating frequency band of the high input dynamic range low noise amplifier switches to the second frequency band.

10. The high input dynamic range low noise amplifier as described in claim 1, characterized in that, The low-noise amplifier circuit includes a cascaded amplifier structure, which consists of a driver amplifier transistor and a cascode transistor. The control terminal of the driver amplifier transistor serves as the input port of the low-noise amplifier circuit. The first current-carrying terminal of the driver amplifier transistor is connected to an RF ground potential, and the second current-carrying terminal of the driver amplifier transistor is connected to the first current-carrying terminal of the cascode transistor. The control terminal of the cascode transistor is connected to a DC bias voltage, and the second current-carrying terminal of the cascode transistor serves as the output port of the low-noise amplifier circuit. At the connection node between the second current-carrying terminal of the driver amplifier transistor and the first current-carrying terminal of the cascode transistor, an inter-stage matching network is connected. The inter-stage matching network is composed of inter-stage inductors and inter-stage capacitors connected in parallel or in series.

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