Stop strip structure for forming cavity of ultrasonic transceiver and packaging method

Abstract

The invention discloses a stop strip structure for forming a cavity of an ultrasonic transceiver and a packaging method, and belongs to the technical field of micro electro mechanical system (MEMS) packaging, the stop strip structure is arranged on the periphery of a cavity area on the surface of a chip and is used for preventing a molding material from flowing into the cavity area in a molding process, the stop strips are arranged in a manner of encircling at least two circles inside and outside, and the stop strips on the inner ring and the stop strips on the outer ring are distributed in a staggered manner, so that the impact force of a molding material and the flow distance in the PMUT direction are effectively dispersed and reduced, and the molding material is ensured not to flow into a PMUT area; meanwhile, a plurality of welding pins which are distributed at intervals are arranged on the chip on the periphery of the stop strip structure; and connecting and fixing the welding pins on the chip, the stop strips on the chip, the copper columns on the chip and the corresponding bonding pads on the RDL carrier plate by adopting a reflow soldering process. The problems of low cavity forming precision, complex process and chip displacement in the existing chip preposition process are solved, and the performance and the stability of the ultrasonic transceiver are improved.

Description

Technical Field

[0001] This invention belongs to the field of microelectromechanical systems (MEMS) packaging technology, specifically relating to a stop bar structure for cavity formation in ultrasonic transceiver (PMUT) devices and its packaging method, which is particularly suitable for cavity forming control in chip last processes. Background Technology

[0002] Currently, the common method used in the industry to form cavities in advanced packaging is the chip-first process, which involves attaching the chip face down to release tape, molding it, and then creating a cavity through openings in the photosensitive dielectric layer. The disadvantage of this method is: 1. Chip shift problem: During the molding process, the chip is susceptible to positional shift due to material flow, resulting in a decrease in cavity positioning accuracy; 2. High process complexity: It requires opening holes in the photosensitive dielectric layer, which increases the number of process steps and costs; 3. Cavity integrity is difficult to guarantee: Molding material may seep into the pre-designed cavity area, affecting device performance.

[0003] Therefore, there is an urgent need for a packaging solution that can precisely control cavity formation, simplify the process, and avoid chip displacement. Summary of the Invention

[0004] The purpose of this invention is to provide a stop strip structure and packaging method for forming cavities in ultrasonic transceivers, which solves the problems of low cavity forming accuracy and complex process caused by chip displacement and molding material flow in existing chip pre-processing.

[0005] The objective of this invention is achieved through the following technical solution: A stop strip structure for forming an ultrasonic transceiver cavity is disclosed. The stop strip structure is disposed around the cavity area on the chip surface to prevent molding material from flowing into the cavity area during the molding process. The stop strip is arranged in a layout of at least two concentric rings, with the inner and outer rings staggered to effectively disperse and reduce the impact force of the molding material and the flow distance towards the PMUT, ensuring that the molding material cannot flow into the PMUT area.

[0006] As a further improvement of one embodiment of the present invention, the inner ring stop strip and the outer ring stop strip are both arranged in a mutually spaced manner to avoid stress delamination caused by heating or CET (coefficient of thermal expansion) mismatch due to the difference in thermal expansion coefficients of different materials, thereby enhancing the reliability and stability of the structure.

[0007] As a further improvement of one embodiment of the present invention, the stop strip is preferably made of a metal material, including but not limited to tin-silver-copper pillars, copper pillars or gold bumps, and any material that can reliably bond and fix the chip to the carrier board is applicable.

[0008] An ultrasonic transceiver packaging method based on a stop bar structure includes the following steps: S1. Lay out the RDL carrier board, including coating a release layer on the carrier board, sputtering a titanium copper seed layer, and forming a redistribution layer; S2. A stop bar structure as described in any one of claims 1 to 3 is provided at the edge of the PMUT area on the chip surface, and solder pads are provided above the stop bar structure. The RDL carrier board has pre-fabricated pads corresponding to the solder feet on the stop strip and the solder feet on the copper pillar; the solder feet on the chip, the stop strip on the chip and the copper pillar are connected and fixed to the corresponding pads on the RDL carrier board using a reflow soldering process; S3. Perform a molding process on the RDL carrier board, using epoxy molding compound to wrap the chip and copper pillars to form an EMC layer. Among them, a stop strip structure pre-set on the chip surface prevents the molding material from flowing into the PMUT area. S4. Grind the upper surface of the EMC layer to expose the upper end of the copper pillar; S5. Prepare the top layer structure on the surface of the polished EMC layer.

[0009] As a further improvement of one embodiment of the present invention, in the step of arranging the RDL carrier board, the formation of the redistribution layer includes coating and photolithographically etching a photoresist layer to form an electroplating mask, performing electroplating to form copper lines and pads, stripping the photoresist, and etching a seed layer to complete circuit pattern isolation.

[0010] The above technical solution has the following beneficial effects: 1. Precise cavity control: The stop strip effectively isolates the molding material, ensuring the accuracy of the cavity shape and position; 2. Avoid chip shifting: Post-chip processing combined with flip-chip bonding improves chip positioning stability; 3. Simplified process: No need to rely on photosensitive dielectric layer openings, reducing process steps; 4. Material flexibility: The stop strip is not limited to tin, silver, or copper pillars; any material that can enable chip bonding and fixation to the carrier board is applicable. Attached Figure Description

[0011] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings in the following description are merely exemplary, and those skilled in the art can derive other embodiments based on the provided drawings without creative effort.

[0012] The structures, proportions, sizes, etc. shown in this specification are only used to complement the content disclosed in the specification for those skilled in the art to understand and read, and are not intended to limit the conditions under which the present invention can be implemented. Therefore, they have no substantial technical significance. Any modifications to the structure, changes in the proportional relationships, or adjustments to the size, without affecting the effects and objectives that the present invention can produce, should still fall within the scope of the technical content disclosed in the present invention.

[0013] Figure 1 This is a top view of the surface structure of an existing chip.

[0014] Figure 2 This is a top view of the chip surface structure provided by the present invention.

[0015] Figure 3 This is a schematic diagram of the packaging process provided by the present invention.

[0016] In the picture: 1. Chip; 11, 111, 112, Stop bar; 12. Welding feet; 2. RDL carrier board; 3. Copper pillar; 4. EMC layer; 5. Top-level structure; 6. BGA ball. Detailed Implementation

[0017] In this invention, unless otherwise stated, directional terms such as "upper," "lower," "top," and "bottom" are generally used in relation to the direction shown in the accompanying drawings, or in relation to the vertical, perpendicular, or gravitational direction of the component itself; similarly, for ease of understanding and description, "inner" and "outer" refer to the inner and outer contours of each component itself, but the above directional terms are not intended to limit this invention.

[0018] First embodiment, such as Figures 1-3As shown, a stop strip structure for forming an ultrasonic transceiver cavity is disposed around the cavity area on the chip surface. This cavity area is a PMUT (piezoelectric micromechanical ultrasonic transducer), which receives ultrasonic waves and converts electrical energy into acoustic energy through the piezoelectric effect. The physical barrier formed by the stop strip 11 around the PMUT effectively prevents molding material from flowing into the cavity during molding.

[0019] In this design, the stop strips 11 adopt a unique layout with two concentric rings (at least two rings, and more rows of stop strips can be arranged according to the actual usable area). The inner ring of stop strips 111 and the outer ring of stop strips 112 are staggered. During the molding process, the molding material exerts an impact force on the structure. The staggered arrangement of the inner and outer layers of stop strips effectively disperses and reduces the impact force of the molding material and the flow distance towards the PMUT, thereby ensuring that the molding material cannot flow into the PMUT area and providing a reliable guarantee for the stable operation of the PMUT.

[0020] Considering the differences in thermal expansion coefficients among different materials, delamination can easily occur when heated, affecting the stability and performance of the structure. Therefore, neither the inner ring stop strip 111 nor the outer ring stop strip 112 can be designed as a closed structure; instead, they are arranged in an alternating pattern. This alternating design provides a buffer space for the thermal expansion of different materials, effectively avoiding delamination caused by uneven heating, and further enhancing the reliability and stability of the structure.

[0021] In terms of material selection, the stop strip 11 is preferably made of metallic materials, such as tin-silver-copper pillars, copper pillars, or gold bumps. These metallic materials have good electrical conductivity, thermal conductivity, and mechanical strength, which can meet the requirements for chip bonding and fixation to the carrier board. Of course, the material of the stop strip 11 is not limited to the above-mentioned types. It can be flexibly selected according to actual needs. Any material that can reliably bond and fix the chip to the carrier board is applicable, which provides a wider range of material choices for the application of this structure.

[0022] In addition, several spaced solder pads 12 are provided on the chip 1 surrounding the PMUT area. The RDL carrier board has pre-fabricated pads corresponding to the solder pads. In use, the solder pads are aligned with the pads and fixed together by a soldering process, which can securely fix the chip on the RDL carrier board, effectively avoiding chip displacement problems in subsequent molding processes and ensuring the stability and reliability of the entire ultrasonic transceiver structure.

[0023] A chip packaging method based on a stop bar includes the following steps: Step 1: Lay out the RDL carrier board 2. The specific steps are as follows: S11. Provide a glass substrate: Select a standard glass wafer with a flat and clean surface as the substrate. Glass has excellent flatness, thermal stability and chemical stability (in actual use, it is not limited to glass substrates; any material that can be used as a substrate is acceptable).

[0024] S12. Coat Release Layer: A special release material (such as a photosensitive or pyrolytic polymer) is spin-coated or sprayed onto the surface of the glass substrate to form a release layer.

[0025] S13. Sputtered Ti / Cu Seed Layer: A layer of titanium (Ti) and a layer of copper (Cu) are sequentially deposited on the release layer using physical vapor deposition (PVD) techniques, such as magnetron sputtering. The titanium layer enhances the adhesion between the copper layer and the release layer, ensuring the smooth progress of subsequent processes such as electroplating.

[0026] S14. The redistribution layer (RDL) is formed, as follows: S141. Coating and photolithographically stenciling a photoresist (PR) layer to form an electroplating mask.

[0027] S142. Perform electroplating to form copper lines and pads.

[0028] S143. Stripping the photoresist.

[0029] S144. Etching the seed layer completes the circuit pattern isolation.

[0030] The RDL carrier plate 2 was prepared using the above process.

[0031] Step 2: Pads corresponding to the solder feet on the stop strip 11 and the copper pillars are pre-fabricated on the RDL carrier board 2. Reflow soldering is used to connect and fix the solder feet 12 on chip 1, the stop strip 11 on chip 1, and the copper pillars 3 to the RDL carrier board 2. First, chip 1 and copper pillars 3 are precisely placed at the corresponding pad positions on the RDL carrier board 2. These pads are pre-fabricated during the fabrication of the RDL carrier board 2, ensuring accurate positioning and suitable dimensions. Then, the entire assembly is placed in a reflow soldering machine. Under specific temperature control, the solder on the pads gradually melts, wetting the soldering areas of chip 1 and copper pillars 3. As the temperature decreases, the solder solidifies, firmly fixing chip 1 and copper pillars 3 to the RDL carrier board 2. Furthermore, the pre-designed circuitry on the RDL carrier board 2 enables electrical connection between chip 1 and copper pillars 3, ensuring stable signal transmission.

[0032] Step 3: After fixing chip 1 and copper pillar 3, a molding process is performed on RDL carrier board 2. Epoxy molding compound (EMC) is selected as the molding material, as it has good flowability, insulation, and mechanical properties. The EMC is uniformly injected into the molding mold, encapsulating chip 1 and copper pillar 3. Through heat curing, an EMC layer 4 encapsulating chip 1 and copper pillar 3 is formed on RDL carrier board 2. During this process, the stop strip 11 pre-set on the chip surface plays a crucial role, effectively preventing the molding material from flowing into the PMUT area.

[0033] Step 4: After packaging, the upper surface of EMC layer 4 needs to be polished to expose the upper end of copper pillar 5. Polishing can reduce the thickness of EMC layer 4, optimize the structure, reduce component size, and improve space utilization. It also improves heat conduction efficiency, allowing the heat generated by the chip to dissipate more quickly and effectively reduce the chip's operating temperature.

[0034] Step 5: Prepare an nPmM top layer structure 5 (n and m are natural numbers greater than or equal to 0) on the surface of the polished EMC layer 4. The specific number of layers is flexibly determined according to actual needs. During preparation, first deposit a copper layer (P) using methods such as electroplating or physical vapor deposition (PVD) to ensure that the copper layer uniformly covers the surface of EMC layer 4. Next, deposit a dielectric layer (M), such as silicon oxide or silicon nitride, using processes such as chemical vapor deposition (CVD). This alternating deposition process forms a top layer structure 5 with specific electrical and mechanical properties, meeting the performance requirements of the chip in different application scenarios.

[0035] In step 6, a ball-mounting machine is used to precisely implant the BGA balls 6 into the preset positions of the top layer structure 5 (ball-mounting is not always necessary; the process can be tailored to the package pin configuration, and this technology is known). When ball-mounting is used, the BGA balls 6 achieve a reliable electrical connection with the copper pillars 3 via the EMC layer 4. After ball-mounting, the packages are precisely divided using mechanical cutting tools or laser cutting with a high-energy laser beam. Subsequently, professional testing equipment is used to perform electrical tests on the package units, including circuit continuity and signal integrity, to rigorously screen and eliminate defective products, ensuring a high yield of the final product.

[0036] In this invention, the stop strip 11 plays a crucial role. During the molding process, it efficiently and reliably isolates the molding material, precisely maintaining the shape and positional accuracy of the cavity, creating a stable environment for the normal operation of the PMUT. The stop strip 11 and solder pads 12, fabricated on the chip surface, are tightly fixed to the RDL carrier board 2 using a flip-chip reflow soldering process. This process ensures a stable chip connection, effectively preventing chip displacement, significantly improving chip positioning stability, and guaranteeing the accuracy of signal transmission.

[0037] From an overall process perspective, this invention eliminates the need for the complex step of creating apertures in the photosensitive dielectric layer, reducing unnecessary process steps and lowering production costs and process complexity. Furthermore, the choice of material for the stop strip is highly flexible, not limited to tin-silver-copper pillars. Materials such as copper pillars and gold bumps, as long as they enable reliable chip bonding and fixation to the carrier board, can be used in this invention, providing more options for production and enhancing the versatility and adaptability of the process.

[0038] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0039] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in sequences other than those illustrated or described herein.

[0040] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A stop bar structure for ultrasonic transducer cavity formation, characterized by, The stop bar structure is arranged at the periphery of the cavity region on the chip surface, and is used to block the flow of molding material into the cavity region in the molding process.

2. The stop bar structure of claim 1, wherein The inner and outer circle stop bars are distributed in staggered positions to effectively disperse and reduce the impact force of the molding material and the flow distance in the direction of the PMUT, and to ensure that the molding material cannot flow into the PMUT region.

3. The stop bar structure according to claim 1 or 2, characterized in that, The inner and outer circle stop bars are distributed in staggered positions to effectively disperse and reduce the impact force of the molding material and the flow distance in the direction of the PMUT, and to ensure that the molding material cannot flow into the PMUT region.

4. An ultrasonic transceiver package method based on a stopper bar structure, characterized by, The stop bar is made of a metal material, which includes but is not limited to a tin-silver-copper pillar, a copper pillar or a gold bump. The method comprises the following steps: S1, arranging an RDL carrier, including coating a release layer on the carrier, sputtering a titanium copper seed layer, and forming a redistribution layer; S2, arranging the stop bar structure as claimed in any one of claims 1 to 3 at the edge of the PMUT region on the chip surface, and arranging a soldering leg above the stop bar structure; Corresponding pads are pre-prepared on the RDL carrier corresponding to the soldering legs on the stop bar and the soldering legs on the copper pillar; the soldering legs on the chip, the stop bar and the copper pillar on the chip are connected and fixed to the corresponding pads on the RDL carrier by using a reflow soldering process; S3, performing a molding process on the RDL carrier to wrap the chip and the copper pillar with an epoxy molding compound to form an EMC layer, wherein the stop bar structure arranged on the chip surface in advance blocks the flow of molding material into the PMUT region; S4, grinding the upper end surface of the EMC layer to expose the upper end of the copper pillar; 5. The packaging method according to claim 4, characterized in that, S5, preparing a top layer structure on the surface of the ground EMC layer. In the step of arranging the RDL carrier, the formation of the redistribution layer includes coating and photoetching a photoresist layer to form an electroplating mask, performing electroplating to form copper lines and pads, stripping the photoresist, and etching the seed layer to complete circuit pattern isolation.

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