Intelligent network card, operating system switching method and electronic equipment

Abstract

The invention provides an intelligent network card, an operating system switching method and electronic equipment, which can be applied to the technical field of computers. The intelligent network card comprises a system-on-chip, a nonvolatile memory and an embedded memory, wherein the system-on-chip, the nonvolatile memory and the embedded memory are deployed in the intelligent network card; the nonvolatile memory is used for storing programmable gate array mirror images and bootstrap programs of a main system and a standby system in the intelligent network card; the embedded memory is used for storing an operating system mirror image of the standby system, user data shared by the main system and the standby system and a system running file; the intelligent network card is configured to control the processor to run a bootstrap program of the standby system through a system switching module in the programmable gate array under the condition of determining that the main system has a fault, so as to configure a programmable gate array mirror image of the standby system to the programmable gate array, and load an operating system mirror image of the standby system to the processor; and mounting the user data and the system running file at the same time to start the standby system.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, in particular to an intelligent network card, an operating system switching method and an electronic device. BACKGROUND

[0002] The intelligent network card usually adopts a non-volatile memory to store key data of a main system and a backup system. In the related art, due to the limited storage space of the non-volatile memory, the mirror data of the backup system is usually greatly simplified, and only the most basic function modules are retained.

[0003] In the process of implementing the present application, it is found that at least the following problems exist in the related art: Since the mirror data of the backup system is trimmed due to storage limitations, after the main system fails and switches to the backup system, the backup system can only run limited bottom-layer logic, which makes it difficult for the intelligent network card to maintain complete business functions, and also leads to reduced reliability and stability. SUMMARY

[0004] In view of the above problems, the present application provides an intelligent network card, an operating system switching method and an electronic device.

[0005] According to a first aspect of the present application, an intelligent network card is provided, comprising: a system-on-chip, a non-volatile memory and an embedded memory deployed in the intelligent network card, wherein the system-on-chip integrates a programmable gate array and a processor; the non-volatile memory is divided into multiple partitions for storing programmable gate array images and boot programs of a main system and a backup system in the intelligent network card; the embedded memory is divided into an operating system partition and a user data partition, the operating system partition is used to store an operating system image of the backup system, and the user data partition is used to store user data and system running files shared by the main system and the backup system; the intelligent network card is configured to, in a case where it is determined that the main system has failed, control the processor to run the boot program of the backup system through a system switching module in the programmable gate array, so as to configure the programmable gate array image of the backup system to the programmable gate array, load the operating system image of the backup system to the processor, and mount the user data and the system running files at the same time, so as to start the backup system

[0006] The second aspect of the present application provides an operating system switching method, characterized in that it is applied to a smart network card, the smart network card comprising a system-on-chip, a non-volatile memory and an embedded memory, the system-on-chip comprising a programmable gate array and a processor, the method comprising: in the case where it is determined that a main system in the smart network card fails, configuring a programmable gate array image of a backup system to the programmable gate array by running a boot program of the backup system stored in the non-volatile memory; providing an operating system image of the backup system stored in an operating system partition of the embedded memory to the processor; and mounting user data and system running files shared by the main system and the backup system stored in a user data partition of the embedded memory to start the backup system.

[0007] The third aspect of the present application provides an electronic device, comprising: a server, and the smart network card as described above, the smart network card being installed in the server; wherein the server is configured to monitor the running state of a main system in the smart network card, and in the case where it is determined that the main system fails, send a system switching instruction to the smart network card so as to start a backup system in the smart network card.

[0008] The fourth aspect of the present application further provides a computer readable storage medium, which stores a computer program or instructions, the computer program or instructions being executed by a processor to realize the steps of the method.

[0009] The fifth aspect of the present application further provides a computer program product, comprising a computer program or instructions, the computer program or instructions being executed by a processor to realize the steps of the method.

[0010] According to the embodiments of the present application, by deploying a system-on-chip, a non-volatile memory and an embedded memory in a smart network card, and performing partition division and setting a system switching module, the smart network card can realize fast switching between a main system and a backup system. When the main system fails, the system switching module can control the processor to run the boot program of the backup system, configure the programmable gate array image of the backup system to the programmable gate array, load the operating system image of the backup system to the processor, and mount the shared user data and system running files, so as to quickly start the backup system, effectively improve the reliability and stability of the smart network card, reduce the downtime caused by system failure, and ensure the continuity of business processing. BRIEF DESCRIPTION OF DRAWINGS

[0011] The above and other objects, features and advantages of the present application will become more apparent from the following description when taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1A structural diagram of a smart NIC according to an embodiment of the present application is shown.

[0013] Figure 2 A schematic diagram of a partition configuration of a smart NIC according to the present application is shown.

[0014] Figure 3 A structural diagram of a smart NIC according to another embodiment of the present application is shown.

[0015] Figure 4 A structural diagram of a smart NIC according to still another embodiment of the present application is shown.

[0016] Figure 5 A flowchart of an operating system switching method according to an embodiment of the present application is shown.

[0017] Figure 6 A structural block diagram of an operating system switching apparatus according to an embodiment of the present application is shown.

[0018] Figure 7 A block diagram of an electronic device adapted to implement an operating system switching method according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0019] Hereinafter, embodiments of the present application will be described with reference to the accompanying drawings. It should be understood, however, that the description which follows is merely illustrative and is not intended to limit the scope of the present application. In the following detailed description of embodiments of the present application, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, it will be apparent to one skilled in the art that one or more embodiments of the present application can be practiced without these specific details. In other instances, well-known structures and functions have not been described in detail in order to avoid obscuring aspects of the present application.

[0020] The terms used herein are merely used to describe specific embodiments and are not intended to limit the present application. The terms "include", "comprise", and the like used herein indicate the presence of the described features, steps, operations, and / or components but do not preclude the presence or addition of one or more other features, steps, operations, or components.

[0021] All terms used herein, including technical and scientific terms, have the same meanings as those generally understood by those skilled in the art unless otherwise defined. It should be noted that the terms used herein should be interpreted as having meanings consistent with the context of the present specification, and should not be interpreted in an idealized or overly formal manner.

[0022] In the case of using expressions similar to "at least one of A, B, and C, etc.", it is generally intended to include any of A, B, and C alone, or in combination with each other, as well as the system including at least one of A, B, and C, etc.

[0023] In the technical solutions of the present application, the data involved (including but not limited to data for analysis, stored data, displayed data, etc.) are all information and data authorized by the user or fully authorized by all parties, and the collection, storage, use, processing, transmission, provision, disclosure and application of related data comply with relevant laws, regulations and standards, necessary security measures are taken, do not violate public order and good customs, and appropriate operation portals are provided for users to choose authorization or refusal.

[0024] Figure 1 A structural diagram of an intelligent network card according to an embodiment of the present application is shown.

[0025] As shown in Figure 1 The system-on-chip 101, the non-volatile memory 102 and the embedded memory 103 are deployed in the intelligent network card, wherein the programmable gate array 1011 and the processor 1012 are integrated in the system-on-chip 101; the non-volatile memory 102 is divided into multiple partitions for storing programmable gate array images and boot programs of the main system and the standby system in the intelligent network card; the embedded memory 103 is divided into an operating system partition 1031 and a user data partition 1032, the operating system partition 1031 is used for storing the operating system image of the standby system, and the user data partition 1032 is used for storing user data and system running files shared by the main system and the standby system.

[0026] The intelligent network card is configured to, in the case of determining that the main system fails, control the processor 1012 to run the boot program of the standby system through the system switching module in the programmable gate array 1011, so as to configure the programmable gate array image of the standby system to the programmable gate array 1011 and load the operating system image of the standby system to the processor 1012, while mounting the user data and the system running files, so as to start the standby system.

[0027] According to the embodiment of the present application, the hardware architecture of the intelligent network card takes the system-on-chip 101 as the core, the programmable gate array 1011 and the embedded processor 1012 are highly integrated inside the system-on-chip 101, and the two are closely coordinated through the internal high-speed bus.

[0028] Among them, the programmable gate array 1011 is responsible for data forwarding, protocol processing and other hardware acceleration tasks, and the processor 1012 undertakes the management work of system control, task scheduling and other software level management work, and cooperates with the non-volatile memory 102 and the embedded memory 103 to build a complete storage system.

[0029] The non-volatile memory 102 adopts high-reliability flash media and is divided into multiple independent storage areas through a pre-planned partition strategy. Among them, a partition for storing the programmable gate array image and the boot program of the main system in the intelligent network card is specially allocated, and a partition for storing the programmable gate array image and the boot program of the backup system in the intelligent network card is also specially allocated, and each partition is provided with a data check mechanism to ensure that the stored programmable gate array image and boot program are not lost or damaged in the case of power failure or abnormality, providing basic storage guarantee for the independent operation of the dual system.

[0030] The embedded memory 103 can be an embedded multimedia memory card, which is also divided into an operating system partition 1031 and a user data partition 1032 through partition management. The operating system partition 1031 is specially used for storing the complete operating system image of the backup system, including kernel files, drivers, system service components, etc. The user data partition 1032 centrally stores various data commonly used by the main system and the backup system, including user configuration parameters, business running logs, temporary cache data, and general system running files. These shared data adopt a unified file system format, supporting concurrent read and write and real-time access of data by the dual system.

[0031] During system operation, the running state of the main system in the intelligent network card is continuously monitored by the server, including the logical running integrity of the programmable gate array 1011, the task execution state of the processor 1012, the continuity of data transmission, etc. When the server detects that the main system has logical errors, system crashes, communication interruptions and other faults, the switching mechanism will be triggered immediately.

[0032] The system switching module in the programmable gate array 1011 is started by pre-programming through hardware logic, sends an interrupt signal to the processor 1012, and controls the processor 1012 to terminate the execution of the main system related program. Then the processor 1012 reads and loads the corresponding boot program of the backup system from the partition of the non-volatile memory 102.

[0033] Under the drive of the boot program, the processor 1012 calls the programmable gate array image of the standby system from the non-volatile memory 102, writes the programmable gate array image into the configuration storage unit of the programmable gate array 1011 frame by frame through the special configuration interface, completes the logic reconfiguration and function switching of the programmable gate array 1011. At the same time, the operating system image of the standby system is loaded from the operating system partition 1031 of the embedded memory 103, and the system kernel is gradually initialized, the hardware driver is loaded, and the necessary system services are started.

[0034] In this process, through the preset mounting protocol, the shared user data of the user data partition 1032 in the embedded memory 103 and the system running file are seamlessly mounted under the file system directory of the standby system, so as to ensure that the standby system can directly reuse these data resources without reconfiguring or data migration.

[0035] Finally, the overall startup of the standby system is completed in a short time, and seamless connection and continuous transmission of business data are realized. The integrity and consistency of data in the whole switching process are strictly guaranteed through partition isolation, data verification and other mechanisms, and the situation of business interruption or data loss is effectively avoided.

[0036] By deploying a system-on-a-chip, a non-volatile memory and an embedded memory in the intelligent network card, and performing partition division and setting a system switching module, the intelligent network card can realize fast switching between the main system and the standby system. When the main system fails, the system switching module can control the processor to run the boot program of the standby system, configure the programmable gate array image of the standby system to the programmable gate array, load the operating system image of the standby system to the processor, and mount the shared user data and system running file, so as to quickly start the standby system, effectively improve the reliability and stability of the intelligent network card, reduce the downtime caused by system failure, and ensure the continuity of business processing.

[0037] Figure 2 A schematic diagram of partition configuration of the intelligent network card according to the present application is shown

[0038] As Figure 2 shown, the user can perform partition configuration through the interface of the programming file generator. Among them, the left area of the interface shows the list of created partitions, and the partition 1, the partition 2 and the partition 3 existing partition entries can be seen, and a plurality of empty partition positions are reserved below for subsequent addition of partition content.

[0039] The interface right side is arranged with a plurality of function operation buttons in turn, each button corresponds to different configuration management functions. Among them, the "add device" button is used to associate the programming file with the corresponding hardware device, the "add partition" button can add a partition entry in the partition list on the left side, the "add file system" button is to configure the file system type adapted to the created partition, the "edit" button can adjust the parameters and modify the content of the selected partition or related configuration item, and the "remove" button can delete the selected partition or the related item configured.

[0040] The layout of the whole interface is clear and explicit. Through these operation buttons, the user can complete the creation, adjustment and management of the storage structure (including partition, associated device, file system, etc.) corresponding to the programming file, so as to build the programming file configuration meeting the requirements.

[0041] According to the embodiment of the application, the boot program includes a first boot program and a second boot program; the first boot program is configured with an offset address parameter of the second boot program corresponding to the first boot program in the non-volatile memory; the first boot program is configured to load the corresponding programmable gate array image for hardware resource initialization, and load the corresponding second boot program according to the offset address parameter.

[0042] Specifically, the first boot program and the second boot program correspond to the matching components of the main system or the backup system, are respectively stored in the corresponding partitions in the non-volatile memory, and the storage addresses of the two are pre-planned to ensure that they do not overlap and the access path is optimal.

[0043] A configuration parameter area is specially divided in the code segment of the first boot program, and the offset address parameter of the second boot program bound to the current first boot program in the non-volatile memory is fixed in the configuration parameter area.

[0044] The offset address parameter is a physical address offset value accurate to byte, and its value is calibrated by a system burning tool before the smart network card is factory-finished, and can uniquely determine the physical storage position of the second boot program in combination with the base address of the non-volatile memory.

[0045] When the first boot program is triggered to execute, the corresponding programmable gate array image is loaded. The first boot program will read the programmable gate array image from the corresponding partition in the non-volatile memory according to the system identification (main system or backup system) of itself.

[0046] The legality and adaptability of the programmable gate array image are verified in the reading process, so as to ensure that the loaded programmable gate array image matches the current hardware platform. Then the programmable gate array image is written into the configuration register of the programmable gate array in time sequence through the special configuration interface of the programmable gate array, to complete the reconstruction and loading of the hardware logic.

[0047] Then, the hardware resources are initialized and configured, including setting the high-speed bus rate between the processor and the programmable gate array, initializing the network port physical layer parameters of the network card, configuring the read-write timing of the storage controller, enabling the interrupt response mechanism of the key hardware module, etc., to ensure that the hardware components can work cooperatively according to the preset specifications.

[0048] After the hardware initialization is completed, the first boot program enters the loading process of the second boot program.

[0049] After the reading is completed, the first boot program completes the context switching of the processor, points the program counter to the entry address of the second boot program, releases the temporary resources occupied by itself, and formally hands over the system control to the second boot program, to ensure smooth connection of the subsequent boot process.

[0050] By dividing the boot program into the first boot program responsible for hardware initialization and the second boot program responsible for system loading, the division of work is clear, and the modularity and reliability of the boot process are effectively improved.

[0051] According to the embodiment of the application, the non-volatile memory is further divided into an environment variable partition for storing a main system environment variable and a backup system environment variable, wherein the second boot program of the main system is configured to read the device address and partition information in the main system environment variable to load the operating system image of the main system from the non-volatile memory; and the second boot program of the backup system is configured to read the startup instruction in the backup system environment variable to load the operating system image of the backup system from the operating system partition of the embedded memory.

[0052] When planning the partitions of the non-volatile memory, in addition to reserving the partition for storing the programmable gate array image and the partition for storing the boot program, an independent environment variable partition is specially divided.

[0053] The environment variable partition adopts a double backup design and is further divided into a main system environment variable sub-partition and a backup system environment variable sub-partition, and the two sub-partitions are physically isolated and equal in size.

[0054] The core data stored in the main system environment variable sub-partition includes device address corresponding to the main system and partition information. The device address is the global physical base address of the non-volatile memory (accurate to byte), and the partition information includes the starting offset of the partition where the main system operating system image is located, the total storage length, the data block size, and the file system type identifier. These parameters are written by a special tool when the smart network card is configured or the system is upgraded, and subsequent updating and maintenance are supported through the system management interface.

[0055] The standby system environment variable sub-partition mainly stores the startup instruction of the standby system. The startup instruction is structured data, including target storage medium identifier (explicitly pointing to embedded memory), index number of operating system partition, starting address offset of the image, loading priority, and verification method, and other key information.

[0056] When the second boot program of the main system is handed over control by the first boot program, the access interface of the non-volatile memory is initialized, and the storage area of the main system environment variable sub-partition is located according to the preset environment variable partition base address.

[0057] Subsequently, the second boot program extracts the device address and partition information in the main system environment variable through the built-in parameter analysis logic. Based on the device address (non-volatile memory base address) and partition information (starting offset, total length, etc.) obtained by analysis, the second boot program calculates the physical storage range of the operating system image of the main system in the non-volatile memory.

[0058] Then read the operating system image of the main system, the second boot program will verify the operating system image, confirm its adaptation to the current hardware platform and the main system version, and then load the operating system image to the corresponding memory running area of the processor, complete the preliminary loading preparation of the main system operating system.

[0059] And the second boot program of the standby system is triggered to execute, and also completes the initialization of the non-volatile memory access interface, and then directly locates the standby system environment variable sub-partition in the environment variable partition.

[0060] After reading the standby system environment variable stored in the standby system environment variable sub-partition, the second boot program extracts the identification information of the target storage medium (embedded memory), the specific parameters of the operating system partition (such as partition starting address, image length, file system format).

[0061] According to the configuration in the startup instruction, the second boot program will switch the storage access channel to the embedded memory and locate the preset operating system partition in the embedded memory. Then read the operating system image of the standby system according to the reading mode specified in the startup instruction.

[0062] In the reading process, the second boot program loads the operating system image into the memory space allocated by the processor, and completes the memory address mapping and permission configuration, thereby laying a foundation for subsequent initialization and start of the standby system operating system.

[0063] By dividing the independent environment variable partition, the boot programs of the primary system and the standby system can read the respective configuration parameters, and a differentiated boot path is realized.

[0064] According to the embodiment of the application, the second boot program of the standby system is further configured to, in the case of loading the operating system image of the standby system from the operating system partition of the embedded memory, pass a root file system path parameter pointing to the user data partition in the embedded memory to the operating system of the standby system; and the operating system of the standby system is configured to mount the user data partition according to the root file system path parameter to mount the shared user data and system running files.

[0065] The second boot program of the standby system prepares and encapsulates the root file system path parameter before completing its own initialization and starting to load the operating system image of the standby system in the embedded memory. The root file system path parameter includes the device identifier of the embedded memory, the physical start address of the user data partition, the total storage capacity of the partition, the file system format identifier, and the like. These data are fixed in the second boot program based on the storage partition planning of the smart network card at the time of factory shipment, and are also supported to be fine-tuned later through a system management tool.

[0066] In the process of loading the operating system image of the standby system into the specified memory area, the second boot program synchronously packs the root file system path parameter in the format agreed upon with the operating system kernel of the standby system, and converts it into a binary data format that can be directly parsed by the kernel. Then, it is written into a pre-allocated shared memory area in the embedded memory that can be accessed by the kernel at the time of starting, and the area has independent address mapping and access permission, thereby avoiding the parameter from being modified by mistake by other processes.

[0067] Before the operating system image of the standby system is loaded and the kernel is about to start initialization, the second boot program passes a parameter ready signal to the kernel, to inform the kernel that the root file system path parameter can be read from the shared memory area, thereby ensuring the timing accuracy of parameter passing. After the operating system kernel of the standby system is started, it completes the initialization of the basic hardware driver according to the preset starting process, which includes the loading of the driver of the embedded memory controller, thereby ensuring that each partition of the embedded memory can be normally accessed.

[0068] Subsequently, the kernel actively scans the shared memory area designated by the second boot program, reads the root file system path parameter stored therein, and resolves the core information in the root file system path parameter. After the resolution is completed, partition mounting is started. Specifically, integrity detection is first performed on the user data partition, and after the detection is passed, the user data partition is mounted under the shared directory preset by the kernel.

[0069] After the mounting is completed, the kernel generates a system log indicating that the mounting is successful, and configures the access permission of the partition as read-write permission consistent with the main system, so that the standby system can seamlessly reuse the shared user data (such as business configuration files and user account information) and system running files (such as general library files and temporary cache directories), without additional data migration or configuration adaptation, and realizes complete coordination of the dual systems at the data level.

[0070] By passing specific root file system parameters, the standby system can accurately mount the shared data partition after startup, ensuring data continuity and availability after system switching, and improving system running efficiency and stability.

[0071] According to the embodiment of the application, the programmable gate array is further configured to: in the case of starting the intelligent network card, acquire a current effective pointer block by reading a startup information partition stored in the non-volatile memory, wherein the pointer block is used to indicate a programmable gate array image of a system to be started; and according to the indication of the pointer block, consult a partition table corresponding to the system to be started in the non-volatile memory to locate a boot program of the system to be started, and run the boot program.

[0072] As the core hardware control unit of the intelligent network card, the programmable gate array (FPGA) needs to initialize the communication interface between itself and the non-volatile memory. After the FPGA is powered on, the hardware configuration logic in the FPGA will first activate the storage controller, and the storage controller will configure the connection protocol with the non-volatile memory according to the preset timing parameters, so as to ensure that the data in the memory can be stably and quickly read.

[0073] After the communication interface is ready, the FPGA will access a pre-defined startup information partition with a fixed starting address in the non-volatile memory according to the internal fixed boot logic. By reading the startup information partition stored in the non-volatile memory, a current effective pointer block is acquired.

[0074] Each pointer block is a structured data unit, including a physical starting address and data length of a programmable gate array image of a certain system (main system or backup system) in the non-volatile memory, and further embedding a valid bit flag. When reading the pointer block, if the valid bit flag is 0, the FPGA considers that the pointer block is damaged or invalid, and automatically attempts to read the next pointer block, which provides basic fault tolerance for the startup process. Finally, the FPGA finds the pointer block with the valid bit being 1, and determines the pointer block as the current valid pointer block, thereby determining the target system image to be loaded in this startup.

[0075] After determining the valid pointer block, the FPGA consults a partition table corresponding to the system to be started. The partition table is a higher-level storage layout index, also stored in a specific location of the non-volatile memory, and the address is usually specified by a field in the valid pointer block. The partition table includes detailed information of all logical partitions of the intelligent network card, such as the name, purpose, starting address, size, and access permission of each partition.

[0076] The FPGA finds the corresponding entry in the partition table according to the system identifier (such as a binary bit or an index value) indicated in the valid pointer block. This entry clearly tells the FPGA where the boot program (i.e., the first boot program) of the system to be started is stored.

[0077] After obtaining the precise storage address and length of the boot program, the storage controller of the FPGA initiates a series of read instructions to completely load the code and data of the boot program from the non-volatile memory to the configuration logic block and embedded block inside the FPGA. After configuration, the logical function of the FPGA will be completely defined by the loaded boot program code, and the control of the system will be formally handed over to the boot program at the software level, starting the subsequent operating system loading process. The entire process from hardware initialization to boot program running forms a complete startup closed loop.

[0078] By reading the startup information partition in the non-volatile memory through the programmable gate array, obtaining the pointer block, and locating the boot program of the system to be started, the intelligent network card realizes fast startup and system switching, and improves the startup efficiency and flexibility of the system.

[0079] According to the embodiments of the present application, the system switching module is configured to update the pointer block in the non-volatile memory to point to the programmable gate array image of the backup system in the case of determining that the main system fails; and the programmable gate array is configured to locate the programmable gate array image and the corresponding boot program of the backup system according to the updated pointer block, to start the backup system.

[0080] The server determines that the main system has an unrecoverable failure (such as kernel crash, hardware logic error, communication link interruption, etc.) by continuously monitoring the processor running state, data transmission link integrity, programmable gate array logic execution result, etc. After sending an explicit failure signal, the system switching module will immediately start the pointer block updating process.

[0081] The system switching module will send a partition locking instruction to the memory through the special control interface of the non-volatile memory, temporarily shielding other access requests to the startup information partition, preventing data conflicts or tampering during the pointer block updating process, and ensuring the atomicity of the updating operation.

[0082] Subsequently, the system switching module will read the pointer block currently stored in the startup information partition, and modify the pointer block content according to the preset rules. Specifically, the original physical address offset pointing to the main system programmable gate array image is replaced by the accurate physical address of the backup system programmable gate array image in the non-volatile memory. At the same time, the valid bit corresponding to the original main system is set to "invalid", and the valid bit corresponding to the backup system is switched to "valid", ensuring the data integrity and uniqueness of the updated pointer block. After the updating data is prepared, the system switching module will write the modified pointer block data to the original storage location of the startup information partition through the high-speed storage interface, covering the old pointer block.

[0083] Subsequently, the programmable gate array reads the updated pointer block, and according to the physical address and data length information pointing to the backup system programmable gate array image in the pointer block, the programmable gate array can locate the partition storing the backup system programmable gate array image in the non-volatile memory. The programmable gate array image is written into the configuration storage unit of itself in time sequence, completing the reconstruction and initialization of hardware logic, ensuring that the hardware resources required by the backup system are ready according to the preset specifications.

[0084] After the hardware logic configuration is completed, the programmable gate array will refer to the preset partition table in the non-volatile memory according to the backup system identification information implied in the updated pointer block, search for the entry corresponding to the backup system in the partition table, and extract the starting address, storage length, and access authority of the backup system bootloader (first bootloader) recorded in the entry.

[0085] Subsequently, the storage controller of the programmable gate array will accurately read the first bootloader of the backup system from the non-volatile memory according to these information, load it into the embedded block of itself, point the program counter to the entry address of the first bootloader, and hand over the system control right.

[0086] Subsequently, the corresponding programmable gate array image is loaded by the first boot program to complete secondary confirmation of hardware resources, and then a second boot program is loaded through an offset address parameter, and finally the operating system of the backup system is started step by step and the user data partition is mounted, so that complete switching from the main system failure to the normal operation of the backup system is realized. In the entire process, the programmable gate array always guarantees the timeliness and reliability of switching through hardware-level logical control, so that the business interruption time is controlled within a preset range.

[0087] The pointer block is updated by the system switching module when the main system fails, and the programmable gate array starts the backup system according to the updated pointer block to locate the image and boot program of the backup system, so that fast switching between the main system and the backup system is realized, and the reliability and fault tolerance of the intelligent network card are improved.

[0088] According to the embodiment of the application, the intelligent network card is further configured to: in the case where it is determined that the main system failure is repaired, update the pointer block in the non-volatile memory, so that the pointer block is redirected to the programmable gate array image of the main system; the programmable gate array is configured to: according to the updated pointer block, locate the programmable gate array image of the main system and the corresponding boot program, and start the main system; after the main system is started, the user data partition in the embedded memory is mounted, so that the user data and system running files updated during the operation of the backup system are mounted.

[0089] The server confirms whether the main system has been completely repaired by checking the integrity of the programmable gate array image of the main system, detecting the processor core function recovery, verifying the availability of the operating system kernel and the driver, and the like. When it is detected that the hardware logic and software components of the main system are restored to the normal operation standard and there is no potential failure risk, the server sends a confirmation signal of the repair completion of the main system to the system switching module, to trigger the pointer block switching back process.

[0090] After receiving the signal, the system switching module sends a start information partition locking instruction to the non-volatile memory, temporarily blocks the access of other modules to the partition, to avoid the risk of data competition or tampering during the updating of the pointer block. Subsequently, the system switching module reads the pointer block currently stored in the start information partition (which points to the backup system at this time), and modifies the content of the pointer block.

[0091] Specifically, the physical address offset originally pointing to the programmable gate array image of the backup system is replaced by the accurate physical address of the programmable gate array image of the main system in the non-volatile memory. At the same time, the valid bit corresponding to the backup system is set to “invalid”, and the valid bit corresponding to the main system is switched to “valid”, to ensure the uniqueness and accuracy of the pointer block. After the updated data is ready, the system switching module writes the new pointer block into the original storage position of the start information partition, to overwrite the pointer block originally pointed to by the backup system.

[0092] Subsequently, the programmable gate array reinitializes the communication interface with the non-volatile memory, accesses the information partition of the start-up according to the solidified address, and reads the updated pointer block. The pointer block is checked to check whether the valid bit corresponding to the main system is valid, and it is confirmed that the pointer block is the current legal valid pointer block. According to the physical address and data length of the programmable gate array image of the main system recorded in the pointer block, the programmable gate array is positioned to the partition storing the programmable gate array image of the main system in the non-volatile memory, and the programmable gate array image is written into the configuration storage unit of the programmable gate array according to the preset timing sequence frame by frame through the special configuration interface, the reconfiguration and initialization of the hardware logic are completed, and the core resources such as the hardware acceleration module, the data forwarding channel, and the interrupt control logic required by the main system are recovered.

[0093] After the hardware logic configuration is completed, the programmable gate array consults the partition table in the non-volatile memory according to the main system identification information implied in the pointer block, retrieves the partition entry corresponding to the main system, and extracts the storage address, length, and access permission of the main system boot program (first boot program) recorded in the entry. Subsequently, the storage controller of the programmable gate array accurately reads the main system boot program from the non-volatile memory according to the information, loads it into the embedded block of the programmable gate array, completes the integrity check of the boot program, points the program counter to the boot program entry address, and hands over the system control right. The boot program loads the main system operating system image according to the preset process, completes the kernel initialization, driver loading, and other start-up steps.

[0094] After the main system is started, the operating system mounts the partition under the specified directory of the main system according to the preset root file system path parameter, combines the device identification of the embedded memory and the physical address of the user data partition, and mounts the partition under the specified directory of the main system through the standard mounting protocol. During the mounting process, the user data and system running files updated during the running of the standby system are automatically synchronized, and the consistency of the data is checked to ensure that the main system reads the latest and complete data.

[0095] At the same time, the partition access permission consistent with the standby system is configured to ensure that the application programs and services of the main system can seamlessly access, read, and write these shared resources, realize seamless connection of business data after the main system is restored, and ensure that there is no data loss and no service interruption in the entire switching process.

[0096] Figure 3 A structure diagram of an intelligent network card according to another embodiment of the application is shown.

[0097] As Figure 3The diagram illustrates the storage layout of the non-volatile memory and embedded memory in a smart network interface card (NIC) and the collaborative logic between them. On the non-volatile memory side, various core data resources required for the operation of the smart NIC are centrally located. Among them, the boot information partition stores the basic navigation information required for the boot process, and the factory image, as the initial hardware configuration image pre-programmed when the NIC leaves the factory, together with the independent partition tables of the main system and the backup system, constitute the basis for system booting.

[0098] These partition tables record detailed layout information such as the physical address, data length, and access permissions of each storage module in the corresponding system. Meanwhile, pointer blocks for both the primary and backup systems specify the exact storage location of the corresponding system's programmable gate array image in memory.

[0099] The non-volatile memory also stores the programmable gate array (PGA) images and the first bootloader for both the primary and backup systems. The PGA image is used to reconstruct the hardware logic of the corresponding system during startup, while the first bootloader serves as the initial execution code for the system startup process. Furthermore, the second bootloaders for both the primary and backup systems, as subsequent execution components of the first bootloader, are also stored here, as is the complete operating system image of the primary system.

[0100] On the embedded memory side, there is an operating system image for the backup system, which is associated with the backup system's second bootloader stored in non-volatile memory. This second bootloader is responsible for locating and loading the image. The embedded memory also includes a user data partition. This storage area, shared by the primary and backup systems, is effectively connected to the relevant runtime data of the primary and backup systems in the non-volatile memory. This enables both systems to access and reuse shared user data and system runtime files, thus ensuring seamless data transfer during system switchover.

[0101] Figure 4 A structural diagram of a smart network interface card according to another embodiment of the present invention is shown.

[0102] like Figure 4 As shown, this architecture is in Figure 3 Optimizations have been made to further improve system performance and storage management efficiency. In this architecture, non-volatile memory continues to carry core basic data such as boot information partitions, factory images, primary and backup system partition tables and pointer blocks, programmable gate array images, first boot program, and second boot program.

[0103] In addition to the user data partition, the embedded memory also stores the operating system images of the main system and the backup system. The second boot program of the main system in the non-volatile memory associates and loads the operating system image of the main system in the embedded memory, and the second boot program of the backup system also associates and loads the operating system image of the backup system in the embedded memory.

[0104] Since the read-write speed of the embedded memory is generally better than that of the non-volatile memory, deploying the operating system images of the main system and the backup system in the embedded memory can significantly improve the image loading efficiency during system startup and effectively shorten the startup time. At the same time, the non-volatile memory can release more storage space to better serve the storage needs of core basic data such as startup information and FPGA image, and relieve the storage pressure.

[0105] In addition, storing the operating system images of the main system and the backup system in the embedded memory makes the storage location more regular, facilitating the subsequent unified management, updating and calling of the operating system images, thereby further improving the smoothness and timeliness of the main system and the backup system switching process, and enhancing the overall efficiency and stability of the dual-system operation of the intelligent network card.

[0106] Figure 5 A flowchart of an operating system switching method according to an embodiment of the present application is shown.

[0107] As shown in Figure 5 The embodiment includes operations S510-S530.

[0108] In operation S510, in the case where it is determined that the main system in the intelligent network card has failed, the FPGA image of the backup system is configured to the FPGA by running the boot program of the backup system stored in the non-volatile memory.

[0109] In operation S520, the operating system image of the backup system stored in the operating system partition of the embedded memory is provided to the processor.

[0110] In operation S530, the user data and system running files shared by the main system and the backup system stored in the user data partition of the embedded memory are mounted to start the backup system.

[0111] When detecting that the main system has a hardware failure (such as FPGA logic exception, processor interface failure), system crash, core process termination, or business execution timeout, and other abnormal conditions that cannot be recovered by itself, the operating system switching process is triggered. At this time, the system-on-chip will first start the initialization program, complete the basic configuration of its own hardware resources, and then automatically load the backup system boot program stored in the specified area of the non-volatile memory. The boot program is pre-compiled and optimized to adapt to the hardware architecture of the intelligent network card, and its startup priority is higher than that of the main system related program.

[0112] After the boot program runs, integrity check is performed on the programmable gate array image of the standby system stored in the nonvolatile memory, and after the check passes, the boot program writes the programmable gate array image of the standby system into the configuration register of the programmable gate array through the configuration interface inside the system-level chip, completes the logic function reconstruction of the programmable gate array, and makes it adapt to the hardware driving requirements and service processing logic of the standby system.

[0113] At the same time of the programmable gate array configuration, the boot program guides the processor to access the embedded memory, which has been pre-divided into an independent operating system partition, and the operating system image (including complete components such as kernel, driver, system service program, etc.) of the standby system has been pre-stored in the partition. The processor reads and loads the operating system image of the standby system in the embedded memory operating system partition into its own memory space according to the instructions of the boot program, completes the initialization of the operating system kernel and the start of the basic service.

[0114] In this process, the embedded memory is also divided into an independent user data partition, which is pre-configured as a shared storage area of the main system and the standby system, and internally stores user configuration information, service data files, and general system running files (such as general driver library, configuration script, etc.) generated during the running of the main system, and the partition adopts a file system format compatible with dual systems.

[0115] When the operating system kernel of the standby system is initialized, the user data partition is recognized and mounted through a preset file system mounting protocol, and the user data and system running files therein are integrated into the file directory structure of the standby system, ensuring that the standby system can directly call the existing user configuration and service data, without the need for reconfiguration to continue the service process of the main system, and finally completing the complete start of the standby system, realizing seamless switching of the main and standby systems, and guaranteeing the service continuity of the intelligent network card.

[0116] By running the standby system boot program when the main system fails, the programmable gate array image of the standby system is configured to the programmable gate array, and the operating system image of the standby system and the mounted shared user data and system running files are provided, realizing the quick switching between the main and standby systems in the intelligent network card, improving the reliability and fault tolerance of the system, and guaranteeing the continuity and stability of network communication.

[0117] According to an embodiment of the present application, the boot program comprises a first boot program and a second boot program; by running the boot program of the standby system stored in the non-volatile memory, comprising: running the first boot program of the standby system to load the programmable gate array image of the standby system for hardware resource initialization, and loading the second boot program of the standby system according to the pre-configured offset address parameter; running the second boot program of the standby system to read the starting instruction in the standby system environment variable stored in the non-volatile memory; according to the starting instruction, loading the operating system image of the standby system from the operating system partition of the embedded memory.

[0118] The boot program is composed of a first boot program and a second boot program which are pre-stored in independent and designated storage areas of the non-volatile memory of the smart network card, and can be quickly accessed by the system chip during startup.

[0119] When the main system failure triggers the switching process, the system chip first calls and runs the first boot program of the standby system in the non-volatile memory, and the first boot program reads the programmable gate array image of the standby system stored in the non-volatile memory after startup. The programmable gate array image is written into the programmable gate array through an internal configuration interface, completing logic function reconstruction and hardware resource initialization, including data bus configuration between the programmable gate array and the processor, memory, hardware interrupt vector initialization, key peripheral interface activation and other operations, to build a stable hardware foundation for subsequent system operation.

[0120] Meanwhile, the first boot program calls the offset address parameter pre-existing in the code itself, which is pre-configured to accurately point to the storage starting address of the second boot program in the non-volatile memory. The first boot program locates the complete storage area of the second boot program according to the offset address, loads the second boot program into the designated memory buffer of the system chip through the data reading protocol, and ensures that the second boot program can be normally executed by the processor.

[0121] After the first boot program completes the above operations, it automatically transfers the execution right, and the processor immediately runs the loaded second boot program of the standby system. The second boot program will first access the preset standby system environment variable partition in the non-volatile memory, which stores various configuration parameters and instructions required for the standby system startup. The second boot program accurately extracts the starting instruction from the partition data by analyzing the partition data, including the storage path, loading priority, verification method and other key information of the operating system image.

[0122] Subsequently, the second boot program locates the operating system partition of the embedded memory according to the extracted start instruction, reads the operating system image of the backup system from the partition according to the reading rule and the verification standard specified by the instruction, and gradually loads the kernel, the drive module, the system service and other components in the operating system image into the running memory of the processor, so as to prepare for the complete start of the backup system.

[0123] The phased boot mode improves the flexibility and reliability of system start, and ensures that the intelligent network card can quickly and accurately start the backup system when the main system fails.

[0124] Based on the above operating system switching method, the application further provides an operating system switching device. Figure 6 The device will be described in detail.

[0125] Figure 6 The structure block diagram of the operating system switching device according to the embodiment of the application is shown.

[0126] As shown in Figure 6 The operating system switching device 600 of the embodiment includes an image configuration module 610, an image providing module 620 and a data mounting module 630.

[0127] The image configuration module 610 is configured to configure the programmable gate array image of the backup system to the programmable gate array by running the boot program of the backup system stored in the non-volatile memory when it is determined that the main system in the intelligent network card fails. In an embodiment, the image configuration module 610 can be configured to perform the operation S510 described above, and details are not repeated here.

[0128] The image providing module 620 is configured to provide the operating system image of the backup system stored in the operating system partition of the embedded memory to the processor. In an embodiment, the image providing module 620 can be configured to perform the operation S520 described above, and details are not repeated here.

[0129] The data mounting module 630 is configured to mount the user data and system running files shared by the main system and the backup system stored in the user data partition of the embedded memory, so as to start the backup system. In an embodiment, the data mounting module 630 can be configured to perform the operation S530 described above, and details are not repeated here.

[0130] According to embodiments of the present invention, any plurality of modules among the mirror configuration module 610, mirror providing module 620, and data mounting module 630 may be combined into one module, or any one of these modules may be split into multiple modules. Alternatively, at least a portion of the functionality of one or more of these modules may be combined with at least a portion of the functionality of other modules and implemented in one module. According to embodiments of the present invention, at least one of the mirror configuration module 610, mirror providing module 620, and data mounting module 630 may be at least partially implemented as hardware circuitry, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or any other reasonable means of integrating or packaging circuitry, or implemented in software, hardware, or firmware, or in any appropriate combination of any of these three implementation methods. Alternatively, at least one of the mirror configuration module 610, mirror providing module 620, and data mounting module 630 may be at least partially implemented as a computer program module, which, when run, can perform corresponding functions.

[0131] Figure 7 A block diagram of an electronic device suitable for implementing an operating system switching method according to an embodiment of the present invention is shown.

[0132] like Figure 7 As shown, the electronic device 700 according to an embodiment of the present invention includes a server and a smart network interface card (NIC) 712 installed on the server. The smart NIC 712 is configured with a system-on-a-chip (SoC), non-volatile memory, and embedded memory. The SoC integrates a programmable gate array (FPGA) and a dedicated processor. The server and the smart NIC 712 interact and transmit control signals through a hardware interface. The processor of the electronic device 700 is the core processing unit of the server. It can perform various appropriate actions and processes according to the program stored in the server's read-only memory (ROM) 702, or the program loaded from the server's storage portion 708 and the non-volatile memory of the smart NIC 712 into the random access memory (RAM) 703. The processor may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor, and / or a related chipset and / or a dedicated microprocessor (e.g., an application-specific integrated circuit (ASIC)). The processor may also include onboard memory for caching purposes. It can be a single processing unit performing different actions or multiple processing units working in concert. One of its core functions is to continuously monitor the operating status of the main system in the smart NIC 712.

[0133] In the random access memory (RAM) 703, various programs and data required for the operation of the electronic device 700 (including the server and the smart NIC 712) are stored, and the processor, the read-only memory (ROM) 702, and the random access memory (RAM) 703 of the server are connected to each other through the bus 704, while the bus 704 also establishes a connection with the system-level chip of the smart NIC 712 through the interface, to realize the transmission of instructions and the exchange of data between the server and the smart NIC 712. The processor performs various operations of the operating system switching method according to the embodiments of the present application by executing the programs in the read-only memory (ROM) 702, the random access memory (RAM) 703, or the related programs stored in the nonvolatile memory of the smart NIC 712, and the programs can also be stored in one or more storage media other than the above-mentioned memories, and the processor can also complete the corresponding operations by executing the programs in the storage media.

[0134] According to the embodiments of the present application, the electronic device 700 further includes an input / output (I / O) interface 705 connected to the bus 704, and the related control interface of the smart NIC 712 also establishes communication with the I / O interface 705, so as to receive the control instructions issued by the server and feedback the running state of itself. The electronic device 700 can also include one or more of the following components connected to the input / output (I / O) interface 705: an input part 706 including a keyboard, a mouse, etc., for receiving the configuration operations of the server and the smart NIC 712 by the user; an output part 707 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc., for displaying the running state, fault alarm, etc. of the server and the smart NIC 712; a storage part 708 including a hard disk, etc., for storing the system programs, business data, etc. of the server and the backup data, etc. related to the smart NIC 712; and a communication part 709 taking the smart NIC 712 as the core communication component, replacing the traditional LAN card, modem, etc., to perform communication processing through a network such as the Internet, and the programmable gate array of the smart NIC 712 undertakes the hardware acceleration tasks such as data forwarding and protocol processing, to guarantee the high efficiency and stability of communication. The driver 710 can also be connected to the input / output (I / O) interface 705 as needed, and the removable medium 711 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc. is installed on the driver 710 as needed, so that the computer programs read therefrom are installed in the storage part 708 or the nonvolatile memory of the smart NIC 712 as needed.

[0135] The present application also provides a computer readable storage medium, which can be included in the electronic device 700 (including the server and the smart NIC 712) described in the above embodiments, such as the read-only memory (ROM) 702, the random access memory (RAM) 703, the storage portion 708 of the server, or the non-volatile memory and the embedded memory of the smart NIC 712, or can exist separately and not be assembled into the electronic device 700. The above computer readable storage medium carries one or more programs, when the one or more programs are executed, the complete process of the operating system switching method according to the embodiments of the present application is realized, that is, the server monitors the running state of the main system of the smart NIC 712, sends the switching instruction, and the smart NIC 712 starts the standby system.

[0136] According to the embodiments of the present application, the computer readable storage medium can be a non-volatile computer readable storage medium, which can include but is not limited to: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above, and can particularly include the non-volatile memory of the smart NIC 712, which specially stores the programmable gate array image, the boot program, the environment variable and other key data of the main and standby systems. In the present application, the computer readable storage medium can be any tangible medium containing or storing a program, which can be used by or in combination with the processor of the server, the processor of the processor system, device or apparatus of the smart NIC 712 to realize the corresponding operating system switching function. For example, according to the embodiments of the present application, the computer readable storage medium can include the read-only memory (ROM) and / or the random access memory (RAM) of the server, the non-volatile memory and / or the embedded memory of the smart NIC 712, and one or more other related memories.

[0137] The embodiments of the present application also include a computer program product, which includes a computer program containing program codes for executing the methods shown in the flowcharts. When the computer program product is run in the computer system, the program codes are used to make the computer system realize the operating system switching method provided by the embodiments of the present application.

[0138] The above functions defined in the system / device of the embodiments of the present application are executed when the computer program is executed by the processor. According to the embodiments of the present application, the above described system, device, module, unit and the like can be realized by computer program modules.

[0139] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and may be downloaded and installed via the communication section 709, and / or installed from a removable medium 711. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0140] In such an embodiment, the computer program can be downloaded and installed from a network via communication section 709, and / or installed from removable medium 711. When the computer program is executed by a processor, it performs the functions defined in the system of this embodiment of the invention. According to embodiments of the invention, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0141] According to embodiments of the present invention, program code for executing the computer programs provided in the embodiments of the present invention can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0142] The computer program product of the present application can be a computer program product comprising a computer readable storage medium and a computer program mechanism embedded in the computer readable storage medium. Such computer program product can further include a computer readable storage medium and program means for causing a processor or other programmable processing apparatus to function in a particular manner, such that the computer program mechanism embedded in the computer readable storage medium can be used to actually effect the apparatus functions.

[0143] Those skilled in the art will appreciate that the features recited in the various embodiments of the present application can be combined and / or integrated in a variety of ways, even if such combinations or integrations are not expressly contemplated in the present application. In particular, the features recited in the various embodiments of the present application can be combined and / or integrated in a variety of ways without departing from the spirit and scope of the present application. All such combinations and / or integrations are within the scope of the present application.

[0144] The embodiments of the present application have been described above. However, these embodiments are merely intended for illustration, and are not intended to limit the scope of the present application. Although the embodiments are described separately above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Various alternatives and modifications can be made to the embodiments of the present application without departing from the scope of the present application, and such alternatives and modifications are intended to fall within the scope of the present application.

Claims

1. A smart network interface card (NIC), characterized in that, include: The smart network interface card (NIC) is equipped with a system-on-a-chip (SoC), a non-volatile memory, and an embedded memory. The SoC integrates a programmable gate array (PGA) and a processor. The non-volatile memory is divided into multiple partitions for storing programmable gate array images and boot programs of the main system and backup system in the smart network card; The embedded memory is divided into an operating system partition and a user data partition. The operating system partition is used to store the operating system image of the backup system, and the user data partition is used to store user data and system runtime files shared by the main system and the backup system. The smart network interface card is configured to, in the event of a failure in the primary system, control the processor to run the boot program of the backup system through the system switching module in the programmable gate array (PGA), thereby configuring the PGA image of the backup system onto the PGA, loading the operating system image of the backup system onto the processor, and simultaneously mounting the user data and the system runtime files to start the backup system.

2. The smart network interface card according to claim 1, characterized in that, The boot program includes a first boot program and a second boot program; The first bootloader is configured with an offset address parameter of a second bootloader corresponding to the first bootloader in the non-volatile memory; The first bootloader is configured to: load the corresponding programmable gate array image for hardware resource initialization, and load the corresponding second bootloader according to the offset address parameter.

3. The smart network interface card according to claim 2, characterized in that, The non-volatile memory is further divided into environment variable partitions for storing primary system environment variables and backup system environment variables, wherein: The second bootloader of the main system is configured to read the device address and partition information in the main system environment variables in order to load the operating system image of the main system from the non-volatile memory; The second bootloader of the backup system is configured to read the boot instructions in the backup system environment variables to load the operating system image of the backup system from the operating system partition of the embedded memory.

4. The smart network interface card according to claim 3, characterized in that, The second boot program of the backup system is also configured to: When loading the operating system image of the backup system from the operating system partition of the embedded memory, the root file system path parameter pointing to the user data partition in the embedded memory is passed to the operating system of the backup system. The operating system of the backup system is configured to mount the user data partition according to the root file system path parameters to mount the shared user data and the system runtime files.

5. The smart network interface card according to claim 1, characterized in that, The programmable gate array is also configured to: When the smart network card is started, the currently valid pointer block is obtained by reading the startup information partition stored in the non-volatile memory, wherein the pointer block is used to indicate the programmable gate array image of the system to be started; According to the pointer block, the partition table corresponding to the system to be booted in the non-volatile memory is consulted to locate the boot program of the system to be booted and run the boot program.

6. The smart network interface card according to claim 5, characterized in that, The system switching module is configured as follows: If a failure is determined in the primary system, the pointer block in the non-volatile memory is updated so that the pointer block points to the programmable gate array image of the backup system; The programmable gate array is configured to: locate the programmable gate array image of the backup system and the corresponding boot program based on the updated pointer block, so as to start the backup system.

7. The smart network interface card according to claim 6, characterized in that, The smart network interface card is also configured to: Once it is determined that the main system fault repair is complete, the pointer block in the non-volatile memory is updated so that the pointer block points back to the programmable gate array image of the main system; The programmable gate array is configured to: locate the programmable gate array image of the main system and the corresponding boot program based on the updated pointer block, and start the main system. After the main system starts up, the user data partition in the embedded memory is mounted to mount the user data and system runtime files that have been updated during the operation of the backup system.

8. An operating system switching method, characterized in that, Applied to smart network interface cards (NICs), the smart NIC includes a system-on-a-chip (SoC), non-volatile memory, and embedded memory. The SoC integrates a programmable gate array (FPGA) and a processor. The method includes: If a failure is determined in the main system of the smart network card, the programmable gate array (PGA) of the backup system is mirrored and configured onto the PGA by running the boot program of the backup system stored in the non-volatile memory. The processor is provided with an operating system image of the backup system stored in the operating system partition of the embedded memory; The user data and system runtime files shared by the primary system and the backup system, stored in the user data partition of the embedded memory, are mounted to start the backup system.

9. The method according to claim 8, characterized in that, The boot program includes a first boot program and a second boot program; The process of running the boot program for the backup system stored in the non-volatile memory includes: The first bootloader of the backup system is run to load the programmable gate array image of the backup system for hardware resource initialization, and the second bootloader of the backup system is loaded according to the pre-configured offset address parameters. Run the second bootloader of the backup system to read the startup instructions from the backup system environment variables stored in the non-volatile memory; According to the boot instruction, the operating system image of the backup system is loaded from the operating system partition of the embedded memory.

10. An electronic device, characterized in that, include: The server, and the smart network interface card as described in any one of claims 1 to 7, wherein the smart network interface card is installed in the server; The server is configured to monitor the operating status of the main system in the smart network interface card (NIC) and, if it is determined that the main system has failed, send a system switch command to the smart NIC so that the smart NIC can start the backup system.

Images