Denoising circuit, signal processing method and device, server, medium and product

Abstract

The invention discloses a de-noising circuit, a signal processing method, a signal processing device, a server, a medium and a product, and relates to the technical field of servers, through the hierarchical collaborative de-noising circuit, pulse width discrimination and pulse continuity discrimination processing can be performed on a heat dissipation signal in sequence, the de-noising effect and the signal fidelity are considered, and the processing efficiency is improved. Therefore, the signal processing accuracy is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of servers, and in particular to a denoising circuit, a signal processing method and device, a server, a medium and a product. BACKGROUND

[0002] In communication and industrial scenarios, edge servers, as core devices for data processing and real-time response, are widely used in complex environments such as industrial sites, roadside base stations, water conservancy facilities, or circuit systems. The complex environment brings challenges to the stable operation of the server.

[0003] In related technologies, a single denoising process is performed on the server signal to obtain a denoised signal, and the working state of the server is determined according to the denoised signal. However, this method has the technical problem of low accuracy. SUMMARY

[0004] The present application provides a denoising circuit, a signal processing method and device, a server, a medium and a product to at least solve the problem of low signal processing accuracy in related technologies.

[0005] The present application provides a denoising circuit, comprising: an edge stabilization circuit, a pulse width discrimination circuit, and a pulse continuity discrimination circuit, wherein the edge stabilization circuit is connected to the pulse width discrimination circuit and the pulse continuity discrimination circuit, the edge stabilization circuit is used to receive an original heat dissipation signal and perform edge stabilization processing on the original heat dissipation signal through the high level threshold and the low level threshold of the edge stabilization circuit to obtain a shaped signal; the pulse width discrimination circuit is connected to the edge stabilization circuit, and the pulse width discrimination circuit is used to perform pulse width discrimination processing on the shaped signal according to a preset pulse window to obtain a preliminary denoised signal, the width of the pulses in the preliminary denoised signal is greater than or equal to the preset pulse window; the pulse continuity discrimination circuit is used to perform pulse continuity discrimination analysis on the preliminary denoised signal, determine isolated noise pulses in the shaped signal, and eliminate the isolated noise pulses from the shaped signal to obtain a target denoised signal.

[0006] The present application also provides a signal processing method applied to a denoising circuit, comprising: receiving an original heat dissipation signal, performing edge stabilization processing on the original heat dissipation signal through the high level threshold and the low level threshold of the edge stabilization circuit to obtain a shaped signal; performing pulse width discrimination processing on the shaped signal through the pulse width discrimination circuit according to a preset pulse window to obtain a preliminary denoised signal, the width of the pulses in the preliminary denoised signal is greater than or equal to the preset pulse window; performing pulse continuity discrimination analysis on the preliminary denoised signal through the pulse continuity discrimination circuit, determining isolated noise pulses in the preliminary denoised signal, and eliminating the isolated noise pulses from the preliminary denoised signal to obtain a target denoised signal.

[0007] The application further provides a signal processing device applied to a denoising circuit, comprising: a receiving module configured to receive an original heat dissipation signal, perform edge stabilization processing on the original heat dissipation signal through high-level and low-level thresholds of an edge stabilization circuit, and obtain a shaped signal; a screening module configured to perform pulse width authentication processing on the shaped signal through a pulse width authentication circuit according to a preset pulse window, and obtain a preliminary denoising signal, wherein the width of the pulses in the preliminary denoising signal is greater than or equal to the preset pulse window; and a judging module configured to perform pulse continuity discrimination analysis on the preliminary denoising signal through a pulse continuity discrimination circuit, determine isolated noise pulses in the preliminary denoising signal, and remove the isolated noise pulses from the preliminary denoising signal to obtain a target denoising signal.

[0008] The application further provides a server comprising any of the denoising circuits.

[0009] The application further provides a nonvolatile computer readable storage medium, wherein the nonvolatile computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps of any of the signal processing methods.

[0010] The application further provides a computer program product comprising a computer program, and the computer program is executed by a processor to implement the steps of any of the signal processing methods.

[0011] Through the hierarchical and cooperative denoising circuit, pulse width authentication and pulse continuity discrimination processing can be sequentially performed on the heat dissipation signal, the denoising effect and signal fidelity are taken into account, and thus the accuracy of signal processing is improved. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the application, the drawings needed in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative labor.

[0013] Figure 1 An application scenario diagram of a signal processing method provided by an embodiment of the application;

[0014] Figure 2 A structural diagram of a denoising circuit provided by an embodiment of the application;

[0015] Figure 3 A structural diagram of another denoising circuit provided by an embodiment of the application;

[0016] Figure 4 A structural diagram of still another denoising circuit provided by an embodiment of the application;

[0017] Figure 5 A flowchart of a signal processing method provided by an embodiment of the present application is shown in FIG. 1.

[0018] Figure 6 A flowchart of another signal processing method provided by an embodiment of the present application is shown in FIG. 2.

[0019] Figure 7 A structural diagram of a signal processing device provided by an embodiment of the present application is shown in FIG. 3.

[0020] Figure 8 A structural diagram of another signal processing device provided by an embodiment of the present application is shown in FIG. 4.

[0021] Figure 9 A structural diagram of a server provided by an embodiment of the present application is shown in FIG. 5. DETAILED DESCRIPTION

[0022] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments of the present application. Based on the embodiments in the present application, any other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0023] It should be noted that, in the description of the present application, the terms “comprise”, “contain” or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0024] For example, an edge server (hereinafter referred to as a server) is a special computing device deployed in a physical location adjacent to a data source, which is used to provide real-time data processing, storage and application services locally at the data source. By taking over the localized computing and storage, the server can reduce the delay and bandwidth consumption of data transmission to the cloud, and meet the real-time requirements of the business.

[0025] However, the environment for deploying the server is complex and harsh, which poses great challenges to the stable operation and heat dissipation control of the server. It is necessary to monitor the working state of the server and maintain the server in a timely manner.

[0026] The heat dissipation signal of the server, such as a fan speed signal, can directly reflect the running state of the heat dissipation system of the server. The accuracy of the heat dissipation signal directly affects the heat management and fault warning capability of the server.

[0027] In a complex environment, the heat dissipation signal is easily disturbed, on the one hand, power supply noise, electromagnetic radiation of adjacent circuits or mechanical vibration can introduce high-frequency glitches (such as nanosecond-level narrow pulses) in the signal; on the other hand, impedance mismatch in the signal transmission path, poor connector contact or aging problems can cause ringing or multiple logic threshold crossings (i.e. non-monotonic edge jitter) on the edges of the square wave signal. These disturbances can be misjudged as actual speed changes, causing the server's baseboard management controller (BMC) to obtain incorrect heat dissipation data, and then triggering the heat dissipation system to malfunction (such as abnormal stop or over-frequency start of the fan), which may cause server hardware damage or data processing interruption. Therefore, in the complex running environment of the server, how to realize efficient denoising of the heat dissipation signal and ensure the stability and real-time performance of the heat dissipation signal is of great significance to ensure the reliable operation of the server.

[0028] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below in conjunction with the drawings and specific embodiments.

[0029] In conjunction with the specific application environment architecture on which the denoising circuit is executed, the specific application environment architecture is described here. Referring to Figure 1 , Figure 1 The server includes a heat dissipation device, which is used to maintain the working temperature of the server within a standard range. The heat dissipation signal generated by the heat dissipation device in real time is sent to the BMC, which switches the heat dissipation strategy or issues an alarm to ensure the normal operation of the server.

[0030] In the related art, a resistor-capacitor filter is used to denoise the heat dissipation signal to suppress high-frequency noise in the heat dissipation signal. However, the resistor-capacitor filter cannot effectively suppress both high-frequency narrow pulse glitches (nanosecond level) and wide pulse isolated noise (microsecond to millisecond level), and there is a problem of low signal processing accuracy. If the signal processing accuracy is low, it may cause the BMC to misjudge and cause server hardware damage or data processing interruption.

[0031] Figure 2 A structure diagram of a denoising circuit provided by an embodiment of the present application is shown in Figure 2 The structure diagram includes an edge stabilization circuit, a pulse width discrimination circuit, and a pulse continuity discrimination circuit, wherein

[0032] The edge stabilization circuit is connected with the pulse width discrimination circuit and the pulse continuity discrimination circuit. The edge stabilization circuit is configured to receive the original heat dissipation signal and perform edge stabilization processing on the original heat dissipation signal through high-level threshold and low-level threshold of the edge stabilization circuit to obtain a shaped signal.

[0033] The pulse width discrimination circuit is connected with the edge stabilization circuit. The first timer is configured to perform pulse width discrimination processing on the shaped signal according to a preset pulse window to obtain a preliminary denoising signal. The width of the pulse in the preliminary denoising signal is greater than or equal to the preset pulse window.

[0034] The pulse continuity discrimination circuit is configured to perform pulse continuity discrimination analysis on the preliminary denoising signal, determine an isolated noise pulse in the shaped signal, and eliminate the isolated noise pulse from the shaped signal to obtain a target denoising signal.

[0035] For example, the edge stabilization circuit includes, but is not limited to, a Schmitt trigger. The Schmitt trigger is a voltage comparator with hysteresis. The Schmitt trigger has two different threshold voltages: a higher rising threshold and a lower falling threshold. The original heat dissipation signal with slow changes, noise or ringing can be converted into a shaped signal with clear and steep edges.

[0036] For example, the edge stabilization circuit solves the edge quality problem of the original heat dissipation signal and provides a high-quality signal basis for the judgment of the subsequent denoising circuit.

[0037] For example, the pulse width discrimination circuit filters out high-frequency narrow glitches, thereby solving the problem of high-frequency narrow pulse interference.

[0038] For example, the pulse continuity discrimination circuit accurately identifies and eliminates isolated noise pulses through judgment, solves the problem of wide pulse isolated noise, and through the hierarchical cooperative denoising circuit, the complex denoising task can be decomposed, thereby performing full coverage processing on the composite noise.

[0039] Optionally, the denoising circuit is configured to be able to process multiple independent heat dissipation signal channels in parallel. Each channel includes an edge stabilization circuit, a pulse width discrimination circuit, and a pulse continuity discrimination circuit. Through multiple independent heat dissipation signal channels, multiple heat dissipation signals can be processed in parallel to improve the efficiency of signal processing.

[0040] Based on the above embodiments, the complex denoising task is decomposed into three optimized special circuits, which respectively solve the problems of edge jitter, high-frequency narrow pulse and wide pulse isolated noise, thereby improving the accuracy of signal processing.

[0041] A feasible implementation, Figure 3 Another structure diagram of a denoising circuit provided by the embodiment of the application is shown in FIG. 4.Figure 3 As shown, the pulse width discrimination circuit comprises a first timer and a storage circuit; wherein,

[0042] The first timer is connected with the clock input end of the edge stabilization circuit and the storage circuit, and the first timer is used for outputting a pulse signal according to the edge change of the shaped signal;

[0043] The edge stabilization circuit is connected with the data input end of the storage circuit, and the storage circuit is used for reading the level state of the edge stabilization circuit through the data input end when the clock input end receives the pulse signal as a rising edge;

[0044] The storage circuit is further used for outputting the level state through the output end of the storage circuit and latching until the next rising edge, so as to generate a preliminary denoising signal.

[0045] Exemplarily, the first timer comprises but is not limited to a monostable trigger. The monostable trigger has a stable state (for example, a low level), enters a temporary quasi-stable state (for example, a high level) after triggering, and automatically returns to the stable state after a fixed time length.

[0046] Specifically, the first timer receives the edge (rising edge or falling edge) of the shaped signal. Whenever an edge is received, the first timer generates a pulse, and the width (duration) of the pulse is accurately set by an external resistor and capacitor (for example, 200 nanoseconds), which is a preset pulse window. It is determined by the generated pre-trial pulse window whether a pulse in the shaped signal is a valid signal or an invalid signal of a "narrow spike".

[0047] Exemplarily, the storage circuit comprises but is not limited to a D trigger. The D trigger is a 1-bit memory with clock control, which selectively samples and holds the pulse signal at a certain time.

[0048] Specifically, the storage circuit determines the sampling time according to the pulse signal output by the first timer, and samples and holds from the shaped signal at the sampling time. The sampling result is used as the target denoising signal of the output.

[0049] Exemplarily, the storage circuit comprises two input ends: a clock input end and a data input end. Through the two input ends, the decision and data sampling are separated. When the decision result is that the condition is met, data sampling is performed. When the decision condition is not met, data sampling is not performed. In order to realize the filtering of noise.

[0050] In combination with a scene example, reference is made to Figure 3The data input end of the storage circuit is connected with the shaped signal with clear edges, and the clock input end of the storage circuit is connected with the pulse signal. The working mechanism of the storage circuit is to sample and latch the level of the data input end at the rising edge of the pulse signal and output to the output end Q. During the non-effective edge of the pulse signal, the output end Q keeps the state of the last clock effective edge latching and is not affected by the change of the data input end. If the width of a glitch is less than a preset value (for example, 200 ns), the glitch has disappeared before the next pulse signal arrives to sample and latch it. Therefore, the storage circuit does not latch the short glitch, and the short glitch will not be transmitted to the output end Q. Only when the level change of the shaped signal is stable and lasts until the time when the pulse signal samples it, the change will be recognized as an effective edge and reflected on the output end Q of the storage circuit. Finally, a pure target denoising signal containing only effective edges is obtained, and all useless narrow glitches are removed.

[0051] In the feasible implementation, the first timer and the storage circuit are arranged to work cooperatively, the denoising task is decomposed, the denoising effect and signal fidelity are considered, and therefore the accuracy of signal processing is improved.

[0052] A feasible implementation, Figure 4 Another structure diagram of a denoising circuit provided by the embodiment of the application is shown in FIG. 2. Figure 4 As shown in FIG. 2, the denoising circuit further includes a second timer, a logic gate circuit, and a delay circuit; wherein,

[0053] The input end of the second timer is connected with the output end of the storage circuit, and the second timer is configured to generate a state signal in response to the edge change of the preliminary denoising signal and send the state signal to the logic gate circuit. The state signal is an effective level or an ineffective level.

[0054] The input end of the delay circuit is connected with the output end of the storage circuit, and the delay circuit is configured to add a delay time length to the preliminary denoising signal.

[0055] The logic gate circuit is configured to determine that the current preliminary denoising signal is an isolated noise pulse in response to the state signal being the ineffective level, block the current preliminary denoising signal until the state signal is the effective level, and output a target denoising signal.

[0056] Exemplarily, the second timer includes but is not limited to a retriggerable monostable flip-flop. The retriggerable monostable flip-flop is used to generate a single pulse that can be retriggered. When the retriggerable monostable flip-flop receives a pulse edge (such as a rising edge), it is triggered, the output becomes a valid level (such as a high level), and the internal timing starts. Before the timeout time ends, if a new pulse edge is received again, the timer is reset to start timing from zero again, and the output continues to remain at the valid level, thereby showing the retriggerable characteristic. If no new pulse edge is received after the timeout time ends, the output will return to the invalid level.

[0057] Exemplarily, the delay circuit of the application can be composed of a delay logic gate and an analog delay line. The delay circuit is used to delay the preliminary denoising signal to reach the logic gate circuit by a fixed propagation delay time. In this way, when the isolated noise pulse in the preliminary denoising signal reaches the logic gate circuit, the logic gate has already received the invalid level, so that the isolated noise pulse can be effectively intercepted and removed.

[0058] Exemplarily, the logic gate circuit of the application is an AND gate circuit. Only when the two input ends of the AND gate circuit are both valid levels (such as high levels), the output end is a valid level. As long as one of the input ends is an invalid level (low level), the output end is an invalid level.

[0059] Specifically, the two inputs of the logic gate circuit are the delayed preliminary denoising signal and the state signal used for judgment. The logic gate circuit judges whether the delayed preliminary denoising signal is valid and whether it is passed according to the state signal. Only when the state signal is a valid level, the delayed preliminary denoising signal received by the current logic gate circuit can be passed, so as to realize filtering of the isolated noise pulse.

[0060] In this feasible implementation manner, through the delay judgment mechanism, it is ensured that the judgment logic is prior to signal transmission, the cooperation of effective signal lossless transmission and noise physical interception is realized, and the delay problem of the software algorithm is avoided.

[0061] Figure 5 The flowchart of the signal processing method provided by the embodiment of the application is shown in FIG. 1. Figure 5 As shown in FIG. 1, the embodiment of the application provides a signal processing method, and the method is described in detail as follows.

[0062] S501, receive the original heat dissipation signal, and perform edge stabilization processing on the original heat dissipation signal through the high level threshold and the low level threshold of the edge stabilization circuit to obtain a shaped signal.

[0063] For example, the original heat dissipation signal may have edge jitter or ringing in transmission due to electromagnetic interference. The edge stabilization circuit with hysteresis is used to shape the original heat dissipation signal by setting a high threshold and a low threshold (i.e. hysteresis voltage).

[0064] Optionally, when the voltage of the original heat dissipation signal exceeds the high threshold, a high level is output; when the voltage of the original heat dissipation signal is lower than the low threshold, a low level is output; and for voltage jitter between the two thresholds, the output remains unchanged. This process shapes a signal with fuzzy edges into a square wave signal with steep and clean edges, i.e. a shaped signal, thereby avoiding edge jitter or ringing interference from affecting the analysis of the working state of the heat dissipation device.

[0065] S502, according to the preset pulse window, the pulse width discrimination circuit is used to perform pulse width discrimination processing on the shaped signal to obtain a preliminary denoising signal, and the width of the pulses in the preliminary denoising signal is greater than or equal to the preset pulse window.

[0066] For example, the shaped signal may have high-frequency narrow pulse interference. The width of the high-frequency narrow pulse is extremely narrow (e.g. nanoseconds), but the amplitude may reach the logic level, which is easy to be misjudged as an effective signal. Based on a preset pulse window, the pulse width discrimination circuit is used to discriminate the pulse width to identify the high-frequency narrow pulse.

[0067] Specifically, a pulse of a preset pulse window is triggered by the shaped signal. The pulse serves as a clock command to control a storage circuit to sample the shaped signal at the end of the pulse. Only when the duration of the pulse is longer than the preset pulse window, the level of the pulse is latched by the storage circuit and output. The narrow pulse with a duration shorter than the window is removed because it cannot maintain a stable level at the sampling time, thereby obtaining a preliminary denoising signal.

[0068] S503, the pulse continuity discrimination circuit is used to perform pulse continuity discrimination analysis on the preliminary denoising signal to determine the isolated noise pulse in the preliminary denoising signal, and the isolated noise pulse is removed from the preliminary denoising signal to obtain a target denoising signal.

[0069] For example, the width of the isolated noise pulse is similar to that of the effective signal, but the isolated noise pulse appears in isolation and lacks periodicity. The isolated noise pulse is discriminated and removed by analyzing the continuity of the pulse stream.

[0070] Specifically, the pulse continuity discrimination circuit discriminates whether the pulse of the preliminary denoising signal is continuous according to a preset continuous time threshold, and only allows continuous pulses to pass, while blocking non-continuous pulses, thereby removing the isolated noise pulse.

[0071] The signal processing method provided in this application optimizes the processing of noise with different characteristics, thereby achieving a full-coverage denoising effect on composite noise that cannot be achieved by existing single technical means, and improving the accuracy of signal processing.

[0072] Based on any of the above embodiments, the following, in conjunction with Figure 6 The detailed process of signal processing is explained.

[0073] Figure 6 This is a schematic flowchart illustrating another signal processing method provided in an embodiment of this application. Figure 6 As shown, the method includes:

[0074] S601 receives the original heat dissipation signal and performs edge stabilization processing on the original heat dissipation signal through the high-level threshold and low-level threshold of the edge stabilization circuit to obtain the shaped signal.

[0075] One feasible implementation method for edge stabilization includes: performing a first-stage filter on the original heat dissipation signal to attenuate high-frequency noise, resulting in a first filtered signal; performing a second-stage filter on the first filtered signal to smooth the signal edges, resulting in a second filtered signal; if the level of the second filtered signal exceeds a high-level threshold from low to high, a high-level signal is output through the edge stabilization circuit; if the level of the second filtered signal exceeds a low-level threshold from high to low, a low-level signal is output through the edge stabilization circuit; if the level of the second filtered signal fluctuates between the high-level and low-level thresholds, the output of the edge stabilization circuit is maintained; and the output of the edge stabilization circuit is determined as a shaped signal.

[0076] For example, preprocessing with two stages of pre-filtering can improve the success rate of edge-stabilized processing.

[0077] Optionally, the ringing amplitude of high-frequency interference noise may exceed the suppression range of the edge stabilization circuit, causing edge stabilization processing to fail. By setting a higher cutoff frequency to coarsely filter the original heat dissipation signal, the high-amplitude high-frequency interference noise can be suppressed, thereby improving the success rate of edge stabilization processing.

[0078] Alternatively, a second-stage filtering process can be performed using a filter with steeper characteristics, such as a second-order Butterworth low-pass filter. This balances the filter cutoff frequency between suppressing ringing and preserving the main characteristics of the signal, making the rising and falling edges of the first-filtered signal smoother and reducing ringing.

[0079] For example, the edge stabilization circuit determines whether the second filtered signal is a rising edge or a falling edge based on the high-level threshold and the low-level threshold.

[0080] Optionally, when the level of the second filtered signal rises from low to high, only when the level exceeds the higher high-level threshold, it is confirmed as a valid rising edge, and the output jumps to high level. For the jitter on the rising edge, as long as its amplitude is not as low as the low-level threshold, it will not trigger a false trigger.

[0081] Optionally, when the level of the second filtered signal falls from high to low, only when the level is lower than the lower low-level threshold, it is confirmed as a valid falling edge, and the output jumps to low level. For the jitter on the falling edge, as long as its amplitude is not higher than the high-level threshold, it will not trigger a false trigger.

[0082] Optionally, as long as the level of the second filtered signal is between the high-level threshold and the low-level threshold, the output remains unchanged, meaning that the small ringing and jitter in the hysteresis voltage region on the signal edge will be completely ignored.

[0083] In combination with the scene example, through the hysteresis voltage mechanism, it is ensured that only one determined output jump is generated for one valid edge change, and a high-quality signal basis is provided for subsequent processing.

[0084] In this feasible implementation, after two-stage pre-filtering, the ringing amplitude of the original heat dissipation signal edge is weakened, so as to more effectively pass through the hysteresis voltage interval, thereby improving the accuracy of signal processing.

[0085] S602, identify the edge change of the shaped signal through the first timer, and generate a pulse signal according to the edge change, the width of the pulse signal being equal to the width of the preset pulse window.

[0086] For example, the first timer is triggered when it detects that the shaped signal has a voltage jump, and the trigger generates a pulse signal. Thus, each signal edge in the shaped signal is converted into a standardized pulse signal with a width equal to the preset pulse window, so as to accurately make a decision subsequently.

[0087] A feasible implementation can determine the preset pulse window by the following method, including: determining a plurality of historical pulse widths corresponding to a plurality of historical noise pulse samples; determining a statistical result of the plurality of historical pulse widths; determining a rated working condition of a target heat dissipation device corresponding to the original heat dissipation signal; calculating a standard signal pulse width under the rated working condition; and determining that the preset pulse window is greater than the statistical result and less than the standard signal pulse width.

[0088] For example, in a typical working environment of a server, a plurality of historical noise pulse samples are obtained. The statistical result of the plurality of historical pulse widths corresponding to the plurality of historical noise pulse samples can represent the widest high-frequency narrow pulse noise that may occur in the existing environment. And higher than the widest high-frequency narrow pulse noise is the noise that needs to be filtered.

[0089] For example, the standard signal pulse width is an effective signal generated by the heat dissipation device in normal operation. In order to avoid the effective signal being filtered, the preset pulse window is set to be smaller than the standard signal pulse width.

[0090] Optionally, taking the fan as an example, the rated working condition can be a rated rotating speed. The standard signal pulse width determined under the rated working condition meets the standard working state of the heat dissipation device.

[0091] Optionally, the statistical result can be a maximum value or a quantile (for example, a 99% quantile).

[0092] In this feasible implementation manner, the preset pulse window is determined according to the working condition of the heat dissipation device, the blindness of parameter setting is avoided, the balance between the denoising effect and the signal fidelity is achieved, and thus the accuracy of signal processing is improved.

[0093] S603, when the clock input end of the storage circuit receives the pulse signal output by the first timer as a rising edge, the level state of the shaped signal received by the data input end of the storage circuit is read through the storage circuit.

[0094] For example, the storage circuit reads data only when the pulse signal is a rising edge. The rising edge corresponds to the end time of the fixed-width pulse output by the first timer.

[0095] For example, the pulse signal is used as a judgment standard for data reading. Whether the data is read at the current time is determined through the pulse signal, so that the data is intermittently read from the shaped signal. The intermittently read data are all effective pulses, and the duration of each effective pulse is greater than or equal to the preset pulse window, so that all the retained pulses meet the minimum width requirement, and the narrowband interference pulse with a duration shorter than the preset pulse window is removed because it cannot maintain an effective level at the sampling time.

[0096] S604, the level state is output to the output end of the storage circuit through the storage circuit and is latched until the next rising edge, so as to generate a preliminary denoising signal.

[0097] For example, once the storage circuit samples and outputs at the clock rising edge, the level of the output end of the storage circuit will remain stable regardless of the change of the level of the data input end, until the next clock rising edge arrives, so as to realize latching. The latching characteristic of the storage circuit ensures the stability and purity of the output signal, removes all noises shorter than the preset pulse window in a physical way, and generates a high-quality preliminary denoising signal.

[0098] S605, in response to the edge change of the preliminary denoising signal, a state signal is generated through the second timer, and the state signal is sent to the logic gate circuit. The state signal is an effective level or an ineffective level.

[0099] For example, the second timer starts working in response to detecting an edge of the preliminary denoised signal, and outputs a state signal according to continuity of the pulses.

[0100] For example, the logic of the second timer for generating the state signal is as follows: if the pulses are continuous, an edge of each new pulse will re-trigger the timer before the timer triggered by the previous pulse expires, so that the second timer outputs a high level, which is the valid level of the state signal. If a pulse is isolated (i.e., the next pulse does not arrive in time), the second timer will not be re-triggered after the timer expires, so that the output of the second timer will fall back to a low level, which is the invalid level of the state signal.

[0101] S606, in response to the state signal being the invalid level, it is determined that the current preliminary denoised signal output by the delay circuit is an isolated noise pulse, and the current preliminary denoised signal is blocked by the logic gate circuit until the state signal is the valid level.

[0102] For example, the logic gate circuit takes the state signal as the basis for blocking. If the logic gate circuit currently receives the invalid level of the state signal, the blocking is performed, i.e., the current preliminary denoised signal transmitted to the logic gate circuit cannot pass through the logic gate circuit and be removed.

[0103] On the contrary, if the logic gate circuit currently receives the valid level of the state signal, the blocking is not performed, so that the preliminary denoised signal is intermittently transmitted through the logic gate circuit.

[0104] S607, outputting a target denoised signal through the logic gate circuit.

[0105] For example, the denoised signal output through the logic gate circuit is a continuous and valid target pulse sequence, in which all isolated noise pulses are physically intercepted, and a pure and continuous target denoised signal is finally output, ensuring the accuracy of analyzing the working state of the heat dissipation device.

[0106] A feasible implementation manner is to generate a state signal through a second timer in response to an edge change of a preliminary denoised signal, including: determining a current pulse period of the preliminary denoised signal and a preset proportion; determining a current decision window according to the current pulse period and the preset proportion; if an edge change of the preliminary denoised signal is detected through the second timer within the decision window, determining that the state signal is the valid level; and if the edge change of the preliminary denoised signal is not detected through the second timer beyond the decision window, determining that the state signal is the invalid level.

[0107] For example, in actual application, the working condition of the heat dissipation device is a variable working condition, and the current pulse period is used to adaptively process the variable working condition.

[0108] Exemplarily, the de-noising circuit continuously monitors the pulse period of the preliminary de-noised signal, and the period value directly reflects the real-time working condition of the heat dissipation device. By multiplying the pulse period by a preset proportional coefficient, the current most suitable decision window is dynamically generated. The product relationship ensures that the decision window always maintains a reasonable proportional relationship with the signal period.

[0109] Exemplarily, in a specific implementation level, the timeout duration of the second timer is configured as the dynamically calculated decision window. When the pulses are continuous, the newly arrived pulses will re-trigger the second timer within the decision window, so that the output of the second timer remains valid. Once an isolated pulse occurs, due to the lack of re-triggering of subsequent pulses, the second timer will output an invalid level after the timeout of the decision window, thereby identifying the interruption of the pulse.

[0110] In this feasible implementation, the fundamental defect of the fixed window scheme under variable working conditions is solved. When the heat dissipation device is frequency-reduced to cause the pulse period to become longer, the dynamic decision window is extended synchronously, avoiding misjudgment of normal low-speed pulses as noise; when the heat dissipation device is frequency-increased to cause the period to become shorter, the window is automatically tightened to prevent missing the isolated interference at high speed. This adaptive characteristic ensures the accuracy of de-noising.

[0111] Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and the necessary general hardware platform, of course, it can also be realized by hardware, but in many cases the former is a better implementation.

[0112] Figure 7 The structure schematic diagram of the signal processing device provided by the embodiments of the present application is shown in FIG. 1. As shown in FIG. 1, the embodiments of the present application further provide a signal processing device 70, which can include a receiving module 71, a screening module 72, and a discrimination module 73. Figure 7

[0113] The receiving module 71 is configured to receive an original heat dissipation signal, and perform edge stabilization processing on the original heat dissipation signal through the high-level threshold and the low-level threshold of the edge stabilization circuit to obtain a shaped signal.

[0114] The screening module 72 is configured to perform pulse width discrimination processing on the shaped signal through a pulse width discrimination circuit according to a preset pulse window to obtain a preliminary de-noised signal, and the width of the pulses in the preliminary de-noised signal is greater than or equal to the preset pulse window.

[0115] The discrimination module 73 is configured to perform pulse continuity discrimination analysis on the preliminary de-noised signal through a pulse continuity discrimination circuit, determine an isolated noise pulse in the preliminary de-noised signal, and eliminate the isolated noise pulse from the preliminary de-noised signal to obtain a target de-noised signal. ​

[0116] Optionally, the receiving module 71 can perform Figure 5 S501 in the embodiments.

[0117] Optionally, the screening module 72 can perform Figure 5 S502 in the embodiments.

[0118] Optionally, the discriminating module 73 can perform Figure 5 S503 in the embodiments.

[0119] It should be noted that the signal processing apparatus shown in the embodiments of the present application can perform the technical solutions shown in the above method embodiments, and the implementation principles and beneficial effects are similar, which will not be described here in detail.

[0120] In a possible implementation, the screening module 72 is specifically configured to:

[0121] identify the edge change of the shaped signal through the first timer, and generate a pulse signal according to the edge change, the width of the pulse signal being equal to the width of the preset pulse window;

[0122] when the pulse signal output by the first timer is received at the clock input end of the storage circuit as a rising edge, read the level state of the shaped signal received at the data input end of the storage circuit through the storage circuit;

[0123] output the level state to the output end of the storage circuit and latch through the storage circuit until the next rising edge, so as to generate a preliminary denoising signal.

[0124] In a possible implementation, the discriminating module 73 is specifically configured to:

[0125] in response to the edge change of the preliminary denoising signal, generate a state signal through the second timer, and send the state signal to the logic gate circuit, the state signal being a valid level or an invalid level;

[0126] in response to the state signal being the invalid level, determine that the current preliminary denoising signal output by the delay circuit is an isolated noise pulse, and block the current preliminary denoising signal through the logic gate circuit until the state signal is the valid level;

[0127] output a target denoising signal through the logic gate circuit.

[0128] In a possible implementation, the discriminating module 73 is specifically configured to:

[0129] determine a current pulse period of the preliminary denoising signal and a preset ratio;

[0130] determine a current decision window according to the current pulse period and the preset ratio;

[0131] If a change in the edge of the preliminary denoised signal is detected by the second timer within the decision window, the status signal is determined to be at a valid level.

[0132] If the edge change of the preliminary denoised signal is not detected by the second timer after the decision window has expired, the status signal is determined to be invalid.

[0133] Figure 8 This is a schematic diagram of another signal processing device provided in an embodiment of this application. Figure 7 Based on the illustrated embodiments, as Figure 8 As shown, the signal processing device 70 also includes a filtering module 74 and an adjustment module 75.

[0134] Filter module 74 is used for:

[0135] The original heat dissipation signal is subjected to a first-stage filter to attenuate high-frequency noise, resulting in a first-filtered signal.

[0136] The first filtered signal is subjected to a second-stage filtering process to smooth the signal edges, resulting in the second filtered signal.

[0137] If the level of the second filtered signal exceeds the high-level threshold as it rises from low to high, a high level is output through the edge stabilization circuit.

[0138] If the level of the second filtered signal exceeds the low-level threshold from high to low, a low level is output through the edge stabilization circuit.

[0139] If the level of the second filtered signal jitters between the high-level threshold and the low-level threshold, the output of the edge-stabilized circuit is maintained.

[0140] The output of the edge-stabilizing circuit is determined as a shaping signal.

[0141] Adjustment module 75 is used for:

[0142] Determine the widths of multiple historical pulses corresponding to multiple historical noise pulse samples;

[0143] Determine the statistical results of multiple historical pulse widths;

[0144] Determine the rated operating conditions of the target heat dissipation equipment corresponding to the original heat dissipation signal;

[0145] Calculate the standard signal pulse width under rated operating conditions;

[0146] The preset pulse window is determined to be larger than the statistical result and smaller than the standard signal pulse width.

[0147] For a description of the features in the embodiment corresponding to the signal processing device, please refer to the relevant description in the embodiment corresponding to the signal processing method, which will not be repeated here.

[0148] Figure 9 The structural schematic diagram of the server provided in the present application is shown in FIG. 1. As shown in the figure, the server 90 provided in the present embodiment comprises at least one de-noising circuit 901 and a memory 902. Optionally, the server 90 further comprises a communication component 903. Wherein, the de-noising circuit 901, the memory 902 and the communication component 903 are connected through a bus. Figure 9

[0149] In the process of specific implementation, the at least one de-noising circuit 901 executes the computer execution instructions stored in the memory 902, so that the at least one de-noising circuit 901 executes the signal processing method embodiments described above.

[0150] The specific implementation process of the de-noising circuit 901 can refer to the method embodiments described above, which has similar implementation principles and technical effects, and will not be described here in detail.

[0151] In the above embodiments, it should be understood that the de-noising circuit can be a central processing unit (CPU), and can also be other general-purpose de-noising circuits, digital signal de-noising circuits (DSP), application specific integrated circuits (ASIC), etc. The general-purpose de-noising circuit can be a micro de-noising circuit or any conventional de-noising circuit, etc. The steps of the method disclosed in the present application can be directly embodied as hardware de-noising circuit execution or executed by a combination of hardware and software modules in the de-noising circuit.

[0152] The memory can contain a random access memory (RAM), and can also include a non-volatile memory (NVM), for example, at least one disk memory.

[0153] The bus can be an industry standard architecture (ISA) bus, a peripheral component (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For the convenience of representation, the bus in the drawings of the present application does not limit to only one bus or one type of bus.

[0154] ​The embodiment of the present application further provides a non-volatile computer readable storage medium, which stores a computer program, wherein the computer program is configured to execute the steps in any of the signal processing method embodiments when running.

[0155] In an example embodiment, the non-volatile computer readable storage medium can include, but is not limited to, a U disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0156] The embodiment of the present application further provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the steps in any of the signal processing method embodiments.

[0157] The embodiment of the present application further provides another computer program product, which comprises a non-volatile computer readable storage medium, and the non-volatile computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps in any of the signal processing method embodiments.

[0158] The skilled person can further realize that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be realized by electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of the examples have been described in general terms in the above description. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0159] The above provides a detailed introduction to the de-noising circuit, signal processing method, device, server, medium and product provided by the present application. The principles and implementation modes of the present application are described by applying specific examples in this paper, and the above example descriptions are only applicable to help understand the method and core idea of the present application. It should be noted that, for ordinary skilled persons in the technical field, some improvements and modifications can be made to the present application without departing from the principles of the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. A noise reduction circuit, characterized in that, include: The circuit includes an edge stabilization circuit, a pulse width detection circuit, and a pulse continuity determination circuit. The edge stabilization circuit is connected to the pulse width detection circuit and the pulse continuity discrimination circuit. The edge stabilization circuit is used to receive the original heat dissipation signal and perform edge stabilization processing on the original heat dissipation signal through the high-level threshold and low-level threshold of the edge stabilization circuit to obtain a shaped signal. The pulse width detection circuit is connected to the edge stabilization circuit. The pulse width detection circuit is used to perform pulse width detection processing on the shaped signal according to the preset pulse window to obtain a preliminary denoised signal. The width of the pulses in the preliminary denoised signal is greater than or equal to the preset pulse window. The pulse continuity discrimination circuit is used to perform pulse continuity discrimination analysis on the preliminary denoised signal, identify isolated noise pulses in the shaped signal, and remove the isolated noise pulses from the shaped signal to obtain the target denoised signal.

2. The noise reduction circuit according to claim 1, characterized in that, The pulse width detection circuit includes a first timer and a storage circuit; wherein The first timer is connected to the clock input of the edge stabilization circuit and the storage circuit, and the first timer is used to output a pulse signal according to the edge change of the shaped signal; The edge stabilization circuit is connected to the data input terminal of the storage circuit. The storage circuit is used to read the level state of the edge stabilization circuit through the data input terminal when the clock input terminal receives the pulse signal as a rising edge. The storage circuit is also used to output the level state through the output terminal of the storage circuit and latch it until the next rising edge, so as to generate the preliminary denoising signal.

3. The noise reduction circuit according to claim 1, characterized in that, The noise reduction circuit also includes a second timer, logic gate circuits, and a delay circuit, wherein, The input of the second timer is connected to the output of the storage circuit. The second timer is used to generate a status signal in response to the edge change of the preliminary denoising signal and send the status signal to the logic gate circuit. The status signal is either an active level or an inactive level. The input terminal of the delay circuit is connected to the output terminal of the storage circuit, and the delay circuit is used to add a delay duration to the preliminary denoising signal; The logic gate circuit is used to determine that the current preliminary denoising signal is an isolated noise pulse in response to the state signal being invalid, and to block the current preliminary denoising signal until the state signal is valid, so as to output the target denoising signal.

4. A signal processing method, characterized in that, The method is applied to the noise reduction circuit according to any one of claims 1-3; the method includes: The original heat dissipation signal is received, and edge stabilization processing is performed on the original heat dissipation signal through the high-level threshold and low-level threshold of the edge stabilization circuit to obtain the shaped signal. According to the preset pulse window, the shaped signal is subjected to pulse width detection processing by the pulse width detection circuit to obtain a preliminary denoised signal. The width of the pulses in the preliminary denoised signal is greater than or equal to the preset pulse window. The preliminary denoised signal is analyzed by pulse continuity discrimination circuit to identify isolated noise pulses in the preliminary denoised signal, and the isolated noise pulses are removed from the preliminary denoised signal to obtain the target denoised signal.

5. The signal processing method according to claim 4, characterized in that, The pulse width modulation (PWM) processing of the shaped signal includes: The edge changes of the shaping signal are identified by a first timer, and a pulse signal is generated based on the edge changes. The width of the pulse signal is equal to the width of the preset pulse window. When the clock input terminal of the storage circuit receives the rising edge of the pulse signal output by the first timer, the storage circuit reads the level state of the shaped signal received at the data input terminal of the storage circuit. The level state is output to the output terminal of the storage circuit and latched until the next rising edge to generate the preliminary denoising signal.

6. The signal processing method according to claim 4, characterized in that, The preliminary denoised signal is analyzed by pulse continuity discrimination circuit to identify isolated noise pulses in the preliminary denoised signal, and the isolated noise pulses are removed from the preliminary denoised signal to obtain the target denoised signal, including: In response to the edge change of the preliminary denoised signal, a status signal is generated by a second timer and sent to the logic gate circuit. The status signal is either an active level or an inactive level. In response to the state signal being invalid, the current preliminary denoising signal output by the delay circuit is determined to be an isolated noise pulse, and the current preliminary denoising signal is blocked by the logic gate circuit until the state signal is valid. The target denoised signal is output through the logic gate circuit.

7. The signal processing method according to claim 6, characterized in that, In response to edge changes in the initial denoised signal, a status signal is generated via a second timer, including: Determine the current pulse period and preset ratio of the preliminary denoised signal; The current decision window is determined based on the current pulse period and the preset ratio; If a change in the edge of the preliminary denoised signal is detected by the second timer within the decision window, the state signal is determined to be at a valid level. If the edge change of the preliminary denoised signal is not detected by the second timer after the decision window has expired, the status signal is determined to be invalid.

8. The signal processing method according to claim 4, characterized in that, The original heat dissipation signal is edge-stabilized using a high-level and low-level threshold circuit to obtain a shaped signal, including: The original heat dissipation signal is subjected to a first-stage filter to attenuate high-frequency noise, resulting in a first-filtered signal. The first filtered signal is subjected to a second-stage filtering to smooth the signal edges, resulting in a second filtered signal. If the level of the second filtered signal exceeds the high-level threshold as it rises from low to high, a high level is output through the edge stabilization circuit. If the level of the second filtered signal exceeds the low level threshold from high to low, a low level is output through the edge stabilization circuit. If the level of the second filtered signal jitters between the high-level threshold and the low-level threshold, the output of the edge stabilization circuit is maintained. The output of the edge stabilization circuit is determined as the shaping signal.

9. The signal processing method according to claim 4, characterized in that, The process of setting the preset pulse window includes: Determine the widths of multiple historical pulses corresponding to multiple historical noise pulse samples; Determine the statistical results of the widths of the multiple historical pulses; Determine the rated operating conditions of the target heat dissipation device corresponding to the original heat dissipation signal; Calculate the standard signal pulse width under the rated operating conditions; The preset pulse window is determined to be larger than the statistical result and smaller than the standard signal pulse width.

10. A server, characterized in that, include: The noise reduction circuit according to any one of claims 1-3.

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