Low motion blur display with variable refresh rate

Abstract

Systems and techniques for low motion blur displays with variable refresh rates are disclosed. The techniques include generating a predicted frame duration of a first frame; determining an actual frame duration of the first frame; and causing the first frame to be displayed by operating backlight of the display in the first mode. Operating the backlight of the display in the first mode includes: applying a pulse to the backlight of the display within a portion of a predicted frame duration for a first frame at a first time; and applying a pulse to a backlight of the display for the first frame at a second time based on a difference between the predicted frame duration and the actual frame duration.

Description

Technical Field

[0001] At least one embodiment relates to a retaining display, and more specifically to applying pulses to the backlight of a retaining display to achieve low motion blur. Background Technology

[0002] Holding displays can maintain an image for the entire duration of a frame until it is overwritten. Moving objects can be presented on the display, and the human eye may begin to track the motion. Because the moving object is "held" in the same position on the display for the duration of the frame, the difference between where the object should be at a given time and where it is displayed at that time may be perceived as blurry. Attached Figure Description

[0003] Figure 1 This is a block diagram of an example system of a low motion blur display with a variable refresh rate according to at least one embodiment.

[0004] Figure 2 This is a block diagram of an example system of a low motion blur display with a variable refresh rate according to at least one embodiment.

[0005] Figure 3 This includes an example voltage diagram depicting the voltage supplied to the backlight of a retainable low motion blur display with a variable refresh rate, according to at least one embodiment.

[0006] Figure 4 This includes an example voltage diagram depicting the voltage supplied to the backlight of a retainable display when transitioning from a low motion blur mode to a constant backlight mode and back, according to at least one embodiment.

[0007] Figure 5 This includes an example voltage diagram depicting the voltage supplied to the backlight of a retainable display when transitioning from a low motion blur mode to a pulse width modulation backlight mode and back, according to at least one embodiment.

[0008] Figure 6 This is a block diagram of an example method for a low motion blur display with a variable refresh rate according to at least one embodiment.

[0009] Figure 7 This is a block diagram illustrating an exemplary computer system according to at least one embodiment of the present disclosure. Detailed Implementation

[0010] Unlike holding displays, which maintain an image for the entire duration of a frame, pulsed displays (such as cathode ray tube (CRT) displays) may briefly "flash" an image, and then briefly "flash" the next image as it becomes ready. Each time an image is flashed, the moving object is in the correct position. If the flashing speed is fast enough, the human eye may perceive smooth motion without blurring.

[0011] To reduce perceived motion blur in hold-up displays, pulses can be applied to the backlight to replicate that of pulsed displays (e.g., CRT monitors). In some cases, the backlight can be pulsed for a portion of the frame duration. However, as the frame duration varies, the perceived brightness of each frame also varies, resulting in unpleasant flicker. In some cases, to reduce the amount of perceived flicker, the backlight can be pulsed twice for a specific frame. The first pulse may only last a portion of the frame duration at the target frame rate (e.g., 144Hz). For example, the first pulse could last a fixed duration for each frame based on a fixed target frame rate. The second pulse could be a lower amplitude pulse and could have a duration based on the difference between the frame duration at the target frame rate and the actual frame duration of the specific frame. However, if the actual frame rate differs significantly from the target frame rate, one or more visual artifacts may be observed (e.g., a longer, lower amplitude pulse may cause frame ghosting).

[0012] The aspects of this disclosure address the aforementioned and other shortcomings by providing low motion blur for displays with variable refresh rates. To achieve low motion blur at variable frame rates, the display backlight can be pulsed twice for each frame. The duration of the first pulse (e.g., the "main pulse") can be based on the predicted frame duration for a particular frame. For example, the duration of the main pulse can be a portion of the predicted frame duration for a particular frame (e.g., 25%, 10%, 50%, etc.). The duration of the second pulse (e.g., the "short pulse") can be based on the difference between the predicted frame duration for a particular frame and the actual frame duration of that frame.

[0013] For example, the display control circuitry might receive the first frame at time T1. The display control circuitry can predict that the second frame will be received at time Tp. The display control circuitry might actually receive the second frame at time Ta. The predicted frame duration (Dp) might be equal to Tp - T1. The actual frame duration (Da) might be equal to Ta - T1. In this case, the duration of the main pulse might be equal to Fm(Dp), where Fm is the main pulse fractional coefficient between 0 and 1. For example, the duration of the main pulse might be equal to 25% of the predicted duration (e.g., 0.25 * Dp).

[0014] If the actual frame duration Da is greater than the predicted frame duration Dp, the duration of the short pulse may be equal to Fr(Da-Dp), where Fr is the short pulse fractional coefficient between 0 and 1. For example, the duration of the short pulse may be equal to 25% of the difference between the predicted duration and the actual duration (e.g., 0.25*(Da-Dp)). In some embodiments, the main pulse fractional coefficient Fm is the same as the short pulse fractional coefficient Fr. In some embodiments, the main pulse fractional coefficient Fm is different from the short pulse fractional coefficient Fr.

[0015] If the actual frame duration Da is less than the predicted frame duration Dp, one or more subsequent pulses (e.g., main pulse, short pulse, etc.) can be modified to reduce visual artifacts (e.g., ghosting, tearing, flickering, stuttering, motion blur, etc.).

[0016] The predicted frame duration can be an estimate of the amount of time between receiving the first frame and receiving the next frame. In some embodiments, the predicted frame duration is calculated using a prediction algorithm. In some embodiments, the predicted frame duration can be calculated based on one or more previous actual frame durations (e.g., the actual time between the first and next frames). For example, the predicted frame duration can be a weighted average of previous actual frame durations. In some embodiments, if the predicted frame duration of a particular frame is shorter than the actual frame duration of that frame, one or more subsequent frame duration predictions can be modified. For example, one or more subsequent frame durations can be shortened to increase the chance that the predicted frame duration is slightly less than the actual frame duration. It may be advantageous for the predicted frame duration to be close to the actual frame duration (e.g., within 50%, 25%, 10%, etc.) and less than the actual frame duration.

[0017] In some embodiments, the display of a frame is delayed by one or more frames to allow for frame prediction. For example, the duration of a first predicted frame can be determined (e.g., predicted), and the first frame can be received. The first frame may not be displayed immediately. Based on the predicted duration of the first frame and / or the predicted durations and / or actual durations of one or more previous frames, the predicted duration of a second frame can be calculated. The second frame can be received, and the actual duration of the first frame can be calculated based on the reception time of the second frame. Then (e.g., after the second frame is received), the first frame can be displayed, where the main pulse is based on the predicted duration of the first frame (e.g., a portion of the predicted duration of the first frame), and where short pulses are based on the difference between the predicted duration of the first frame and the actual duration of the first frame. This process can be repeated for subsequent frames.

[0018] In some embodiments, if the frame rate drops below a low motion blur threshold, a particular frame may be displayed twice before the next frame is displayed. For example, the low motion blur threshold could be 80 frames per second (e.g., 80 Hz). If the frame rate drops below 80 Hz, each frame may be displayed twice (e.g., doubled). The first frame may be displayed with a main pulse and a short pulse for the duration of the first frame. Then, the first frame may be displayed again with a second main pulse and a short pulse for the same duration of the first frame. Then, the second frame may be displayed with another main pulse and a short pulse for the duration of the second frame. The resulting frame rate may be equal to twice the original frame rate (e.g., if the original frame rate is 75 Hz, the resulting frame rate can be doubled and is equivalent to 150 Hz). However, in some embodiments, displaying the same frame twice may result in a "double image" visual artifact.

[0019] In some embodiments, if the frame rate drops below a low motion blur threshold, the display control circuitry can switch from a first operating mode (e.g., pulsed backlight mode) to a second operating mode (e.g., constant backlight mode or pulse width modulation (PWM) backlight mode). For example, the low motion blur threshold could be 80Hz. If the frame rate drops below 80Hz, instead of pulses applied to the display backlight for each frame, the display control circuitry provides a constant (or PWM) voltage to the backlight. Operating the backlight in the second mode prevents the dual-image problem discussed above. When switching from pulsed backlight mode to constant voltage mode, one or more pulse durations (e.g., main pulse duration, short pulse duration, etc.) can be modified before the transition to keep the perceived display brightness the same between the first and second modes and reduce any display flicker. Similarly, when the frame rate rises above the low motion blur threshold and the display control circuitry is transitioning from the second mode to the first mode, one or more pulse durations can be modified immediately after the transition.

[0020] In some embodiments, the display may include more than one backlight. For example, the display may have multiple (e.g., 8, 10, etc.) backlight bars positioned adjacent to each other to fill the display. In this case, the pixel values ​​of the frame to be displayed can be modified based on the predicted duration of the frame.

[0021] If the display has only one backlight, the pixel values ​​of the frame to be displayed can be modified based on the predicted frame duration and the pixel's position within the frame. For example, if pixel values ​​are set from the top to the bottom of the display (e.g., in a scan), pixels at the bottom of the display may have a shorter "settling" time before a pulse is applied to the backlight than pixels at the top of the display. Therefore, the values ​​of pixels at the bottom of the display may be modified more than those at the top of the display.

[0022] Pixel value modification can be based on one or more lookup tables. For example, a set of lookup tables can be stored for a specific predicted frame duration and screen position. When determining the pixel value of a specific pixel in a frame, a lookup table containing the predicted frame duration closest to that frame and the screen position closest to that pixel can be used. In some embodiments, multiple values ​​can be accessed from the lookup tables, and the modified value is obtained by interpolating between the values ​​in the lookup tables.

[0023] Compared to existing technologies, the advantages of the disclosed embodiments include, but are not limited to, displays with low motion blur at variable refresh rates. In other words, frames can be displayed at variable refresh rates where virtually (or completely) no visual artifacts perceptible to the human eye, such as tearing, double images, ghosting, stuttering, or flickering, occur.

[0024] Figure 1 This is a block diagram of an example system 100 with a variable refresh rate and low motion blur, according to at least one embodiment. System 100 may include a frame generator subsystem 102 and a retentive display 110. The frame generator subsystem 102 may generate one or more frames (e.g., image frames) for display on the retentive display 110. In some embodiments, the one or more frames are frames from video games, digital media, virtual reality applications, augmented reality applications, etc. The techniques described herein can be used to display one or more frames on the retentive display 110 with low motion blur and a variable refresh rate.

[0025] The frame generator subsystem 102 may include one or more processing units (e.g., a central processing unit (CPU) 104, a graphics processing unit (GPU) 108, etc.) and one or more memory devices (e.g., memory 106) for generating frames to be displayed on the retentive display 110. For example, the CPU 104 may execute instructions from an application (e.g., a video game application, a media player application, a virtual reality application, an augmented reality application, etc.). The CPU 104 may provide one or more instructions and / or data (e.g., frame data) to a specific processor (e.g., GPU 108) for processing. For example, the GPU 108 may perform one or more graphics operations, such as shading, ray tracing, etc. The GPU 108 may (e.g., via display control circuitry 112) be connected to the retentive display 110 and may provide one or more frames to the retentive display 110 for display with low motion blur.

[0026] The retentive display 110 may include display control circuitry 112 and one or more backlights 114. The retentive display 110 may include a panel 116 illuminated by one or more backlights 114. The panel 116 may include one or more pixels for displaying one or more frames from the frame generator subsystem 102. In some embodiments, the panel 116 may include a liquid crystal display (LCD).

[0027] In some embodiments, panel 116 may include one or more light-emitting diodes (LEDs) and / or organic LEDs (OLEDs). In this case, each pixel may be "self-illuminating" and may not require backlighting. Thus, as described herein, each LED pixel and / or OLED pixel may be "pulsed" to achieve low motion blur with a variable refresh rate.

[0028] The hold-type display 110 can receive frames from the frame generator subsystem 102 via display control circuitry 112. Display control circuitry 112 may include processing circuitry for receiving image frames and can predict the duration of subsequent frames based on one or more previously received frames. The predicted frame duration may be an estimate of the amount of time between receiving the first frame and receiving the next frame. In some embodiments, the predicted frame duration is calculated using a prediction algorithm. In some embodiments, the predicted frame duration may be calculated based on one or more previous actual frame durations (e.g., the actual time between the first and next frames). For example, the predicted frame duration may be a weighted average of previous actual frame durations. In some embodiments, if the predicted frame duration of a particular frame is shorter than the actual frame duration of that frame, one or more subsequent frame duration predictions may be modified. For example, one or more subsequent frame durations may be shortened to increase the chance that the predicted frame duration is slightly less than the actual frame duration. It may be advantageous for the predicted frame duration to be close to the actual frame duration (e.g., within 50%, 25%, 10%, etc.) and less than the actual frame duration.

[0029] The display control circuit 112 may apply pulses to the backlight 114 based on the timing and / or frame duration prediction of received frames. Applying pulses to the backlight 114 may include supplying voltage to the backlight 114. For example, applying pulses to the backlight 114 may include supplying a fixed amount of voltage (e.g., 100%, 50%, 200%, 400%, etc.) to the backlight 114 for a specific duration. In some embodiments, the display control circuit 112 applies pulses to the backlight 114 during a first operating mode.

[0030] In the first operating mode, the display control circuit 112 can cause the backlight 114 to be pulsed twice for a specific frame from the frame generator subsystem 102. The duration of the first pulse (e.g., the "main pulse") can be based on the predicted frame duration of the frame. For example, the duration of the main pulse can be a portion of the predicted frame duration (e.g., 25%). The duration of the second pulse (e.g., the "short pulse") can be based on the difference between the predicted frame duration and the actual frame duration.

[0031] For example, display control circuit 112 may receive the first frame at time T1. Display control circuit 112 can predict that the second frame will be received at time Tp. Display control circuit 112 may receive the second frame at time Ta. The predicted frame duration (Dp) may be equal to Tp-T1. The actual frame duration (Da) may be equal to Ta-T1. In this case, the duration of the main pulse may be equal to Fm(Dp), where Fm is a main pulse fractional coefficient between 0 and 1 (inclusive). For example, the duration of the main pulse may be equal to 25% of the predicted duration (e.g., 0.25*Dp).

[0032] If the actual frame duration Da is greater than the predicted frame duration Dp, the duration of the short pulse may be equal to Fr(Da-Dp), where Fr is a short pulse fractional coefficient between 0 and 1 (inclusive). For example, the duration of the short pulse may be equal to 25% of the difference between the predicted duration and the actual duration (e.g., 0.25*(Da-Dp)). In some embodiments, the main pulse fractional coefficient Fm is the same as the short pulse fractional coefficient Fr.

[0033] If the actual frame duration Da is less than the predicted frame duration Dp, one or more subsequent pulses (e.g., the main pulse, short pulses, etc.) can be modified to reduce visual artifacts (e.g., ghosting, tearing, flickering, stuttering, motion blur, etc.). For example, one or more main pulses can be shortened and / or one or more short pulses can be lengthened. In some embodiments, if the actual frame duration Da is less than the predicted frame duration Dp, the frame can be illuminated using the main pulse without the corresponding short pulse. In some embodiments, if the actual frame duration Da is less than the predicted frame duration Dp, the frame can be illuminated using the main pulse and a "zero" short pulse. The "zero" short pulse can have a duration of zero seconds, or it can supply zero voltage to the backlight for a duration greater than zero seconds.

[0034] In some embodiments, the display control circuit 112 may delay the display of a specific frame to enable frame prediction. In some embodiments, the display control circuit 112 receives a frame and the delay between it and displaying that frame is equal to a portion of the frame duration (e.g., predicted frame duration, actual frame duration, average frame duration, etc.). In some embodiments, the delay is based on the current frame rate. In some embodiments, the delay is a predetermined value (e.g., 1 millisecond, 3 milliseconds, 10 milliseconds, etc.).

[0035] In some embodiments, the display control circuit 112 may delay the display of a particular frame by one or more frames. For example, the duration of a first predicted frame may be determined (e.g., predicted), and the first frame may be received. The first frame may not be displayed immediately. Based on the predicted duration of the first frame and / or the predicted duration and / or actual duration of one or more previous frames, the predicted duration of a second frame may be calculated. The second frame may be received, and the actual duration of the first frame may be calculated based on the reception time of the second frame. Then (e.g., after the second frame is received), the first frame may be displayed, wherein the main pulse is based on the predicted duration of the first frame (e.g., a portion of the predicted duration of the first frame), and wherein short pulses are based on the difference between the predicted duration of the first frame and the actual duration of the first frame, as described above. This process may be repeated for subsequent frames.

[0036] In some embodiments, the display control circuit 112 may modify the length of a single pulse based on the actual frame duration, rather than applying two pulses to the backlight 114 for a specific frame. For example, the display control circuit 112 may apply a pulse to the backlight 114 once for each frame, wherein the pulse duration is equal to a portion of the actual duration of the frame (e.g., 25%, 50%, 40%, 30%, etc.).

[0037] In some embodiments, the low motion blur threshold can be configured by the user. If the frame rate of the frame generator subsystem 102 drops below the user-configured low motion blur threshold, the display control circuitry 112 cannot operate the backlight 114 in the manner described above. For example, the display control circuitry 112 can switch from a first operating mode (e.g., pulsed backlight mode) to a second operating mode (e.g., constant backlight mode or PWM backlight mode).

[0038] For example, a first user can configure the low motion blur threshold of the first display to 80Hz, while a second user can configure the low motion blur threshold of the second display to 60Hz. If the frame rate of the frame generator subsystem connected to the first display is equal to 70Hz (e.g., lower than the low motion blur threshold of the first user), the display control circuitry of the first display can operate the first display in a second operating mode. If the frame rate of the frame generator subsystem connected to the second display is equal to 70Hz (e.g., higher than the low motion blur threshold of the second user), the display control circuitry of the second display can operate the second display in the first operating mode discussed above.

[0039] In some embodiments, if the frame rate drops below a low motion blur threshold, a particular frame may be displayed twice before the next frame is displayed. For example, the low motion blur threshold could be 80 frames per second (e.g., 80 Hz). If the frame rate drops below 80 Hz, each frame may be displayed twice (e.g., doubled). The first frame may be displayed with a main pulse and a short pulse for the duration of the first frame. Then, the first frame may again be displayed with a second main pulse and a short pulse for the same duration of the first frame. Then, the second frame may be displayed with another main pulse and a short pulse for the duration of the second frame. The resulting frame rate may be equal to twice the original frame rate (e.g., if the original frame rate is 75 Hz, the resulting frame rate can be doubled and is equivalent to 150 Hz). However, in some embodiments, displaying the same frame twice may result in a "double image" visual artifact.

[0040] In some embodiments, one or more processing units of the frame generator subsystem 102 (e.g., GPU 108) may be configured to serve a particular frame twice if the frame rate drops below a low motion blur threshold. In this case, the display control circuitry 112 may not be aware that the frame is being doubled, but simply displays the frame as it is received, as discussed above. In some embodiments, the GPU 108 may be configured to serve each frame once regardless of the frame rate and the low motion blur threshold. In this case, if the frame rate is below the low motion blur threshold, the display control circuitry 112 may display the frame twice before displaying the next received frame.

[0041] In some embodiments, the hold-up display 110 may have a low refresh rate threshold, beyond which panel 116 begins to flicker. If GPU 108 is providing frames at a rate lower than the low refresh rate threshold of panel 116, display control circuitry 112 may cause the frame to be displayed twice before displaying the next received frame. To avoid “double-image” visual artifacts, display control circuitry 112 may illuminate only the first frame in each frame set (e.g., by applying pulses to the backlight with a main pulse and short pulses).

[0042] For example, GPU 108 may be serving frames at a rate of 25 frames per second. Panel 116 may have a lower refresh rate threshold of 30 frames per second. Because GPU 108 is serving frames at a rate below the lower refresh rate threshold, display control circuitry 112 may cause the frame to be displayed twice before displaying the next received frame, thereby artificially increasing the frame rate to 50 frames per second and preventing panel 116 from flickering at a low frame rate. Display control circuitry 112 may receive the first frame from GPU 108, set the pixel values ​​of panel 116 based on the first frame (as discussed below), and then apply pulses to backlight 114 to display the first frame, as described herein (e.g., with a main pulse and short pulses). Display control circuitry 112 may receive the second frame from GPU 108, but may wait for the duration of the first frame before displaying the second frame. Thus, each frame may be displayed over two durations, but is only illuminated during the duration of the first frame (e.g., pulses may have already been applied to the backlight).

[0043] In some embodiments, the second operating mode may include applying a constant voltage to the backlight 114. For example, instead of applying two pulses to the backlight 114 as in the first operating mode, a specific voltage may be used to illuminate the backlight 114. The specific voltage may be selected such that the average voltage supplied to the backlight 114 in the first operating mode is the same as the constant voltage supplied in the second operating mode.

[0044] In some embodiments, the second operating mode may include applying a pulse width modulation (PWM) voltage to the backlight 114. For example, instead of applying two pulses to the backlight 114 as in the first operating mode, the backlight 114 may be pulsed extremely quickly (e.g., at a rate of 1 kHz, 2 kHz, etc.) such that the average voltage supplied to the backlight 114 in the first operating mode is the same as the average voltage supplied using the PWM voltage.

[0045] Using constant backlight or PWM backlight operation can prevent the dual-image problem discussed above. When transitioning from pulsed backlight mode to constant voltage mode or PWM backlight mode, the display control circuit 112 can modify one or more pulse durations (e.g., main pulse duration, short pulse duration, etc.) before the transition to keep the perceived display brightness the same between the first and second operating modes and reduce any display flicker or other visual artifacts. Similarly, when the frame rate rises above the low motion blur threshold and the display control circuit 112 is transitioning from the second operating mode to the first operating mode, one or more pulse durations can be modified immediately after the transition.

[0046] In some embodiments, the retention display 110 may include more than one backlight 114. For example, the retention display 110 may include multiple (e.g., 8, 10, etc.) backlight bars positioned adjacent to each other to fill the panel 116 of the retention display 110. In this case, the pixel values ​​of the frame to be displayed may be modified based on the predicted frame duration of the frame (e.g., via display control circuitry 112). For example, each frame received from the frame generator subsystem 102 may include multiple pixel values. Display control circuitry 112 may modify one or more pixel values ​​of the frame based on the predicted frame duration of the frame. In some embodiments, if the predicted frame duration is long (e.g., longer than the average, longer than the duration of the previous frame, etc.), the amount of pixel value modification may be less than in the case of a shorter predicted frame duration.

[0047] In some embodiments, the pixel modification value is determined using one or more lookup tables. For example, the display control circuitry 112 may include one or more lookup tables 118 that can store pixel modification values. In some embodiments, a first lookup table may store pixel modification values ​​for a first frame duration or frame rate, and a second lookup table may store pixel modification values ​​for a second frame duration or frame rate. If the predicted frame duration of a particular frame is between the frame duration of the first lookup table and the frame duration of the second lookup table, the pixel modification value can be determined by interpolation between the two lookup tables.

[0048] If the retaining display 110 has only one backlight 114, the pixel values ​​of the frame to be displayed can be modified based on the predicted frame duration and the pixel's position within the frame. For example, if pixel values ​​are set (e.g., scanned) from the top of the retaining display 110 (or the top of the panel 116) to the bottom, pixels at the bottom may have a shorter "settling" time before a pulse is applied to the backlight 114 than pixels at the top of the retaining display 110 (or the panel 116). Therefore, the values ​​of pixels at the bottom of the retaining display 110 can be modified more than the values ​​of pixels at the top of the retaining display 110.

[0049] In some embodiments, the pixel modification values ​​of a backlit display are determined using one or more lookup tables based on the predicted frame duration of the frame to be displayed and the pixel's position within the frame. For example, a first lookup table may be used for the first frame duration or frame rate and for pixels at the top of the display. A second lookup table may be used for the first frame duration or frame rate and for pixels at the bottom of the display.

[0050] In some embodiments, the display control circuitry 112 may include four sets of 18 different lookup tables 118 (72 lookup tables 118 in total). Each set of lookup tables can be used for different predicted frame durations. Tables within a set can be used for different screen locations. For example, for a display with 2K resolution, the 18 tables in a set may have pixel modification values ​​from row 0 to row 2176, with a step size of 128 rows. For a display with 4K resolution, the 18 tables in a set may have pixel modification values ​​from row 0 to row 4352, with a larger step size (e.g., 256 rows, 512 rows, etc.).

[0051] When determining the pixel value of a specific pixel in a frame, a lookup table can be used, consisting of the predicted frame duration closest to that frame and the screen position closest to that pixel. In some embodiments, multiple values ​​can be accessed from the lookup table, and a modified value can be obtained by interpolating between the values ​​in the lookup table.

[0052] Figure 2 This is a block diagram of an example system 200 with a variable refresh rate and low motion blur display according to at least one embodiment. System 200 may include a frame generator subsystem 202 and a retentive display 212. Frame generator subsystem 202 may include one or more processing units (e.g., CPU 204, GPU 208, etc.) and one or more memory devices (e.g., memory 206) for generating frames to be displayed on the retentive display 212.

[0053] The retainable display 212 may include a panel 216 illuminated by one or more backlights 214. The panel 216 may include one or more pixels for displaying one or more frames from the frame generator subsystem 202. In some embodiments, the panel 216 may include an LCD. In some embodiments, the panel 216 may include one or more LEDs and / or OLEDs.

[0054] Figure 2 The various components in it can perform with Figure 1 The operation is similar to that of the corresponding components. For example, the display control circuit 210 can control the backlight 214 of the retaining display 212 to display one or more frames from the GPU 208. In a first operating mode, the display control circuit 210 can apply pulses to the backlight 214 twice for each frame: once with a main pulse and once again with a short pulse. The durations of the main pulse and the short pulse can be determined based on the predicted frame duration and the actual frame duration, as discussed above.

[0055] If the frame rate drops below a low motion blur threshold, the display control circuit 210 can control the backlight 214 in a second operating mode, which may include supplying a constant voltage to the backlight 214 or supplying a PWM voltage to the backlight 214. As discussed above, the display control circuit 210 can also use pixel modification values ​​from lookup table 218 to modify the values ​​of pixels within a specific frame.

[0056] Although Figure 1 The retention display 110 is controlled by the display control circuit 112 included within the retention display 110, but Figure 2 The retractable display 212 can be controlled by the display control circuitry 210 included within the GPU 208. System 100 can depict a desktop computer system having a detachable display connected to the frame generator subsystem 102, while system 200 can depict a laptop computer system having a display attached to the frame generator subsystem 202.

[0057] Figure 3 Example voltage diagrams 300 and 320, according to at least one embodiment, depict voltages supplied to the backlight of a retainable low motion blur display with a variable refresh rate. For example, voltage diagram 300 may depict voltages supplied while operating in a first mode (e.g., pulsed backlight mode). Figure 1 The voltage of the backlight 114 of the retaining display 110. The voltage diagram 300 may include multiple main pulses, such as main pulse 302, main pulse 304 and main pulse 306. The voltage diagram 300 may also include one or more short pulses, such as short pulse 308.

[0058] The main pulse 302 may correspond to the first frame. The actual frame duration of the first frame may be equal to the frame duration 310 (e.g., the time between receiving the first frame and receiving the second frame). The length of the main pulse 302 may be equal to a portion of the predicted frame duration corresponding to the first frame. For example, the length of the main pulse 302 may be equal to 25% of the predicted frame duration of the first frame. In other words, a fixed voltage (e.g., 100% voltage) may be provided to the display backlight for 25% of the predicted frame duration, while 0 voltage may be provided to the display backlight for the remaining 75% of the predicted frame duration. If the predicted frame duration of the first frame is equal to the actual frame duration of the first frame, then the main pulse 302 may not have a corresponding short pulse.

[0059] The main pulse 304 may correspond to the second frame. The second frame may have a corresponding actual frame duration. The length of the main pulse 304 may be equal to a portion of the predicted frame duration corresponding to the second frame. For example, the length of the main pulse 304 may be equal to 25% of the predicted frame duration of the second frame. If the predicted frame duration of the second frame is equal to the actual frame duration of the second frame, then the main pulse 304 may not have a corresponding short pulse.

[0060] The main pulse 306 may correspond to a third frame. The third frame may have a corresponding actual frame duration. The length of the main pulse 306 may be equal to a portion of the predicted frame duration corresponding to the third frame. For example, the length of the main pulse 306 may be equal to 25% of the predicted frame duration of the third frame. The main pulse 306 has a corresponding short pulse 308 indicating that the predicted frame duration is shorter than the actual frame duration. The length of the short pulse 308 may be equal to a portion of the difference between the predicted frame duration and the actual frame duration of the third frame. For example, the length of the short pulse 308 may be 25% of the difference between the longer actual frame duration and the shorter predicted frame duration. In some embodiments, the short pulse 308 may be located midway between the main pulse 306 and the following main pulse (e.g., in the middle).

[0061] Voltage diagram 320 can be depicted while operating in the alternative first mode and is provided simultaneously. Figure 1 The voltage of the backlight 114 of the retaining display 110 is maintained. In an alternative first mode, a pulse can be applied to the backlight of the display only once for each frame, wherein the length of the pulse is determined based on the actual frame duration of the frame corresponding to the pulse. For example, the main pulse 322 can correspond to the first frame and can have a length equal to a portion of the actual frame duration of the first frame. The extended pulse 324 can correspond to the second frame. Because the actual frame duration of the second frame is longer than that of the first frame, the length of the extended pulse 324 can be longer than that of the main pulse 322. The length of each pulse can be a fixed portion of the actual frame duration of the frame corresponding to the pulse. For example, the length of the main pulse 322 can be 25% of the actual frame duration of the first frame, and the length of the extended pulse 324 can be 25% of the actual frame duration of the second frame.

[0062] Figure 4 Example voltage diagrams 400 and 410, according to at least one embodiment, depict the voltage supplied to the backlight of a retainable display when transitioning from a low motion blur mode to a constant backlight mode and back. For example, voltage diagram 400 may depict the voltage supplied to the backlight of a retainable display while transitioning from a first operating mode (e.g., pulsed backlight mode) to a second operating mode (e.g., constant backlight mode). Figure 1The voltage of the backlight 114 of the retaining display 110. Voltage diagram 400 may include one or more main pulses, such as main pulse 402 and main pulse 406. Voltage diagram 400 may also include one or more short pulses, such as short pulse 404.

[0063] The main pulse 402 and the short pulse 404 can correspond to the first frame and can have the characteristics described above. Figure 3 The described length. The main pulse 406 may correspond to the second frame and has a length equal to a portion of the predicted frame duration of the second frame. After receiving the second frame, the display control circuitry of the display may switch to a second operating mode (e.g., constant backlight mode). For example, the display control circuitry of the display may switch to the second operating mode when the frame rate drops below a low motion blur threshold.

[0064] The constant voltage 408 may represent the voltage supplied to the backlight during the second operating mode. The constant voltage 408 can be selected such that the average voltage supplied to the backlight during the first operating mode (or a subset of the first operating mode) is equal to the constant voltage 408. In some embodiments, when switching from the first operating mode to the second operating mode, the main pulse (e.g., main pulse 406) may not have a corresponding short pulse. In some embodiments, the length of one or more main pulses and / or short pulses before the transition is modified (e.g., lengthened, shortened, etc.) to reduce visual artifacts around the transition.

[0065] Voltage diagram 410 can be depicted while transitioning from a second operating mode (e.g., constant backlight mode) to a first operating mode (e.g., pulsed backlight mode) and providing voltage to the circuit. Figure 1 The voltage of the backlight 114 of the retaining display 110. The voltage diagram 410 may also include one or more short pulses, such as the main pulse 414. The voltage diagram 410 may also include one or more short pulses, such as the short pulse 416.

[0066] The constant voltage 412 can represent the voltage supplied to the backlight during the second operating mode. After receiving one or more frames during the second operating mode, the display control circuitry of the display can switch to the first operating mode (e.g., pulsed backlight mode). For example, the display control circuitry of the display can switch to the first operating mode when the frame rate rises above a low motion blur threshold.

[0067] The main pulse 414 and the short pulse 416 may correspond to the first frame received after the transition back to the first operating mode. The length of the main pulse 414 may be based on a portion of the predicted frame duration of the first frame. The length of the short pulse 416 may be based on a portion of the difference between the actual frame duration of the first frame and the predicted frame duration of the first frame. In some embodiments, the length of one or more main pulses and / or short pulses is modified after the transition (e.g., lengthened, shortened, etc.) to reduce visual artifacts around the transition.

[0068] Figure 5 Example voltage diagrams 500 and 510, according to at least one embodiment, depict the voltage supplied to the backlight of a retainable display when transitioning from a low motion blur mode to a pulse width modulation backlight mode and back. For example, voltage diagram 500 may depict the voltage supplied to the backlight of a retainable display while transitioning from a first operating mode (e.g., pulsed backlight mode) to a second operating mode (e.g., PWM backlight mode). Figure 1 The voltage of the backlight 114 of the retaining display 110. The voltage diagram 500 may include one or more main pulses, such as main pulse 502 and main pulse 506. The voltage diagram 500 may also include one or more short pulses, such as short pulse 504.

[0069] The main pulse 502 and the short pulse 504 can correspond to the first frame and can have the characteristics described above. Figure 3 The described length. The main pulse 506 may correspond to the second frame and has a length equal to a portion of the predicted frame duration of the second frame. After receiving the second frame, the display control circuitry of the display may switch to a second operating mode (e.g., PWM backlight mode). For example, the display control circuitry of the display may switch to the second operating mode when the frame rate drops below a low motion blur threshold.

[0070] The PWM voltage 508 may represent the voltage supplied to the backlight during the second operating mode. During the second operating mode, the voltage may be supplied to the backlight at a high frequency (e.g., 1 kHz, 2 kHz, etc.) such that the average voltage supplied to the backlight during the second operating mode is equal to the average voltage supplied to the backlight during the first operating mode. In some embodiments, when transitioning from the first operating mode to the second operating mode, the main pulse (e.g., main pulse 506) may not have a corresponding short pulse. In some embodiments, the length of one or more main pulses and / or short pulses is modified (e.g., lengthened, shortened, etc.) before the transition to reduce visual artifacts around the transition.

[0071] Voltage diagram 510 can be depicted while transitioning from a second operating mode (e.g., PWM backlight mode) to a first operating mode (e.g., pulsed backlight mode) and providing voltage to the circuit. Figure 1The voltage of the backlight 114 of the retaining display 110. The voltage diagram 510 may also include one or more main pulses, such as main pulse 514. The voltage diagram 510 may also include one or more short pulses, such as short pulse 516.

[0072] The PWM voltage 512 can represent the voltage supplied to the backlight during the second operating mode. After receiving one or more frames during the second operating mode, the display control circuitry of the display can switch to the first operating mode (e.g., pulsed backlight mode). For example, the display control circuitry of the display can switch to the first operating mode when the frame rate rises above a low motion blur threshold.

[0073] The main pulse 514 and the short pulse 516 may correspond to the first frame received after the transition back to the first operating mode. The length of the main pulse 514 may be based on a portion of the predicted frame duration of the first frame. The length of the short pulse 516 may be based on a portion of the difference between the actual frame duration of the first frame and the predicted frame duration of the first frame. In some embodiments, the length of one or more main pulses and / or short pulses is modified after the transition (e.g., lengthened, shortened, etc.) to reduce visual artifacts around the transition.

[0074] Figure 6 This is a flowchart of an example method for a low motion blur display with a variable refresh rate according to at least one embodiment.

[0075] Method 600 can be executed using one or more processing units (e.g., CPU, GPU, accelerator, physical processing unit (PPU), data processing unit (DPU), etc.), which may communicate with (or be in communication with) one or more memory devices. In at least one embodiment, method 600 can be executed using one or more processing devices. In at least one embodiment, method 600 can be performed by... Figure 1 The display control circuit 112 executes the method. In at least one embodiment, the method 600 can be performed by... Figure 2 The display control circuit 210 executes. In at least one embodiment, the processing unit executing any method of method 600 may be executing instructions stored on a non-transitory computer-readable storage medium. In at least one embodiment, method 600 may be executed using multiple processing threads (e.g., CPU threads and / or GPU threads), each thread executing one or more various functions, routines, subroutines, or operations of the method. In at least one embodiment, the processing threads implementing method 600 may be synchronized (e.g., using semaphores, critical sections, and / or other thread synchronization mechanisms). Alternatively, the processing threads implementing method 600 may execute asynchronously with respect to each other. Figure 6Compared to the order shown, the various operations of method 600 can be performed in different orders. Some operations of method 600 can be performed concurrently with other operations. In at least one embodiment, Figure 6 One or more of the operations shown may not always be performed.

[0076] At block 602, the processing unit executing method 600 can generate a predicted frame duration for the first frame. At block 604, the processing unit can determine the actual frame duration of the first frame. At block 606, the processing unit can cause the first frame to be displayed by operating the backlight of the display in a first mode.

[0077] In order to display the first frame by operating the backlight of the display in the first mode, the processing unit may apply a pulse to the backlight of the display for the first frame at a first time for a portion of the predicted frame duration at block 610. In order to apply a pulse to the backlight of the display for the first frame for a portion of the predicted frame duration at the first time, the processing unit may supply a voltage to the backlight of the display for a portion of the predicted frame duration.

[0078] At block 612, the processing unit may apply a pulse to the backlight of the display for the first frame at a second time based on the difference between the predicted frame duration and the actual frame duration. In some embodiments, in order to apply a pulse to the backlight of the display for the first frame at a second time based on the difference between the predicted frame duration and the actual frame duration, the processing unit may cause a voltage to be supplied to the backlight of the display for a portion of the difference between the predicted frame duration and the actual frame duration. In some embodiments, if the actual frame duration is less than the predicted frame duration, in order to apply a pulse to the backlight of the display for the first frame at a second time based on the difference between the predicted frame duration and the actual frame duration, the processing unit may cause a voltage to be supplied to the backlight of the display for a duration of zero seconds. In some embodiments, if the actual frame duration is less than the predicted frame duration, in order to apply a pulse to the backlight of the display for the first frame at a second time based on the difference between the predicted frame duration and the actual frame duration, the processing unit may cause a zero voltage to be supplied to the backlight of the display for a duration greater than zero seconds.

[0079] In some embodiments, the actual frame duration is longer than the predicted frame duration, and the second time is located in the middle of the actual frame duration.

[0080] In some embodiments, the actual frame duration is shorter than the predicted frame duration, and the processing unit may also generate a second frame with a shorter predicted frame duration.

[0081] In some embodiments, in response to the frame rate dropping below a predetermined threshold, the processing unit may cause the second frame to be displayed twice by operating the backlight of the display in a first mode, and then cause the third frame to be displayed.

[0082] In some embodiments, at block 608, the processing unit may cause the display to display a second frame by operating the backlight of the display in a second mode. In some embodiments, the average brightness of the display's backlight in the second mode is the same as the average brightness of the display's backlight in the first mode. In some embodiments, the action of causing the display to display a second frame by operating the backlight of the display in the second mode is performed in response to the frame rate falling below a predetermined threshold.

[0083] In some embodiments, in order to display a second frame by operating the backlight of the display in the second mode, the processing unit may, at block 610, supply a pulse width modulation voltage to the backlight of the display for the duration of the second frame.

[0084] In some embodiments, in order to display a second frame by operating the backlight of the display in the second mode, the processing unit may supply a constant voltage to the backlight of the display during the duration of the second frame.

[0085] In some embodiments, before displaying a second frame by operating the backlight of the display in the second mode, the processing unit may modify one or more pulses of one or more previous frames displayed in the first mode.

[0086] In some embodiments, the display includes a single backlight, and the pixel values ​​of the first frame are modified based on the predicted frame duration of the first frame and the pixel position within the first frame. In some embodiments, the display includes more than one backlight, and the pixel values ​​of the first frame are modified based on the predicted frame duration of the first frame.

[0087] Figure 7 This is a block diagram illustrating an exemplary computer system according to at least one embodiment of the present disclosure. The computer system 700 can be configured with respect to... Figure 1 This corresponds to the described system 100. The computer system 700 can also be associated with... Figure 2Corresponding to the described system 200. Computer system 700 can operate as a server or endpoint machine in an endpoint-server network environment, or as a peer-to-peer machine in a peer-to-peer (or distributed) network environment. A machine can be a television, personal computer (PC), tablet PC, set-top box (STB), personal digital assistant (PDA), cellular phone, network device, server, network router, switch or bridge, or any machine capable of executing a (continuous or discontinuous) set of instructions specifying the actions to be taken by that machine. Furthermore, although only a single machine is illustrated, the term "machine" should also be considered as including any collection of machines that individually or jointly execute one or more sets of instructions to perform any one or more of the methods discussed herein.

[0088] Example computer system 700 includes a processing device (processor) 702, main memory 704 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM), double data rate (DDR SDRAM) or DRAM (RDRAM), etc.), static memory 706 (e.g., flash memory, static random access memory (SRAM), etc.), and data storage device 716, which communicate with each other via bus 728.

[0089] Processor (processing device) 702 represents one or more general-purpose processing devices, such as microprocessors, central processing units, etc., and may include processing logic 722. More specifically, processor 702 may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, or a processor implementing other instruction sets, or more processors implementing combinations of instruction sets. Processor 702 may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, etc. Processor 702 is configured to execute instructions 726 for performing the operations discussed herein (e.g., for generating threat indicator alerts).

[0090] The computer system 700 may also include a network interface device 708. The computer system 700 may also include a video display unit 710 (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an input device 712 (e.g., a keyboard and alphanumeric keypad, a motion-sensing input device, a touchscreen), a cursor control device 714 (e.g., a mouse), and a signal generation device 718 (e.g., a speaker). In some embodiments, the computer system 700 may not include the video display unit 710, the input device 712, and / or the cursor control device 714 (e.g., in a headless configuration).

[0091] Data storage device 716 may include a non-transitory machine-readable storage medium 724 (and a computer-readable storage medium) thereon storing one or more instruction sets 726 (e.g., low motion blur for displays with variable refresh rates) embodying any or more methodologies or functions described herein. The instructions 726 may also reside wholly or at least partially within main memory 704 and / or processor 702 during execution by computer system 700, which also constitute computer-readable storage media. The instructions may also be transmitted or received via network 720 via network interface device 708.

[0092] In one embodiment, instruction 726 includes instructions for low motion blur for a display with a variable refresh rate. While in the exemplary implementation, computer-readable storage medium 724 (machine-readable storage medium) is shown as a single medium, the terms "computer-readable storage medium" and "machine-readable storage medium" should be understood to include a single medium or multiple media (e.g., a centralized or distributed database and / or associated caches and servers) storing one or more sets of instructions. The terms "computer-readable storage medium" and "machine-readable storage medium" should also be understood to include any medium capable of storing, encoding, or carrying a set of instructions for execution by a machine and causing the machine to perform any one or more methodologies of this disclosure. The terms "computer-readable storage medium" and "machine-readable storage medium" should therefore be understood to include, but are not limited to, solid-state memory, optical media, and magnetic media.

[0093] Other variations are within the spirit of this disclosure. Therefore, while the disclosed technology is susceptible to various modifications and alternative constructions, certain illustrated embodiments are shown in the accompanying drawings and have been described in detail above. However, it should be understood that this disclosure is not intended to be limited to one or more specific forms disclosed, but rather, it is intended to cover all modifications, alternative constructions, and equivalents falling within the spirit and scope of this disclosure as defined by the appended claims.

[0094] Unless otherwise indicated herein or clearly contradicted by the context, the use of the terms “a,” “an,” and “the,” and similar designations, in the context of describing the disclosed embodiments (especially in the context of the following claims), should be interpreted as encompassing both the singular and plural, and not as definitions of the terms. Unless otherwise stated, the terms “comprising,” “having,” “including,” and “containing” are to be interpreted as open-ended terms (meaning “including, but not limited to”). When unmodified and referring to a physical connection, “connection” is to be interpreted as partially or completely contained in, attached to, or combined with, even with intervening elements. Unless otherwise indicated herein, statements of value ranges herein are intended only as a shorthand method of individually referring to each individual value falling within the range, and each individual value is incorporated into the specification as it is individually stated herein. In at least one embodiment, unless otherwise indicated or contradicted by the context, the use of the terms “set” (e.g., “itemset”) or “subset” is to be interpreted as a non-empty set comprising one or more members. Furthermore, unless otherwise stated or contradicted by the context, the term "subset" in the context of a corresponding set does not necessarily refer to an appropriate subset of the corresponding set, but rather that a subset and a corresponding set can be equal.

[0095] Unless explicitly stated otherwise or otherwise clearly contradicted by the context, connective language (such as phrases in the form of "at least one of A, B, and C" or "at least one of A, B, and C") is otherwise understood, along with the context, to generally represent any non-empty subset of a set, such as items, terms, etc., that can be A or B or C, or A and B and C. For example, in an illustrative example of a set with three members, the connective phrases "at least one of A, B, and C" and "at least one of A, B, and C" refer to any of the following sets: {A}, {B}, {C}, {A, B}, {A, C}, {B, C}, {A, B, C}. Therefore, such connective language is generally not intended to imply that certain embodiments require the existence of at least one of A, at least one of B, and at least one of C, respectively. Additionally, unless otherwise indicated or contradicted by the context, the term "multiple" indicates multiple states (e.g., "multiple items" indicates many items). In at least one embodiment, the number of items in the multiple is at least two, but can be more when explicitly indicated or indicated by the context. Furthermore, unless otherwise stated or clearly understood from the context, the phrase “based on” means “at least partially based on” or “at least based on” rather than “based on only”.

[0096] Unless otherwise indicated herein or otherwise clearly contradicted by the context, the operations of the processes described herein may be performed in any suitable order. In at least one embodiment, processes such as those described herein (or variations and / or combinations thereof) are executed under the control of one or more computer systems configured with executable instructions and are implemented by hardware or a combination thereof as code (e.g., executable instructions, one or more computer programs, or one or more application programs) that executes jointly on one or more processors. In at least one embodiment, the code is stored on a computer-readable storage medium, for example, in the form of a computer program comprising a plurality of instructions executable by one or more processors. In at least one embodiment, the computer-readable storage medium is a non-transitory computer-readable storage medium that does not include transient signals (e.g., propagation of transient electrical or electromagnetic transmissions) but includes non-transitory data storage circuitry (e.g., buffers, caches, and queues) within a transceiver containing transient signals. In at least one embodiment, code (e.g., executable code or source code) is stored on a set of one or more non-transitory computer-readable storage media having executable instructions (or other memory for storing executable instructions) stored thereon, which, when executed by one or more processors of a computer system (i.e., due to execution), cause the computer system to perform the operations described herein. In at least one embodiment, the set of non-transitory computer-readable storage media comprises a plurality of non-transitory computer-readable storage media, and one or more of the various non-transitory computer-readable storage media lack all the code, while the plurality of non-transitory computer-readable storage media collectively store all the code. In at least one embodiment, the executable instructions are executed such that different instructions are executed by different processors, i.e., for example, the non-transitory computer-readable storage media stores the instructions, and the main central processing unit (“CPU”) executes some of the instructions, while the graphics processing unit (“GPU”) executes the others. In at least one embodiment, different components of the computer system have separate processors and different processors execute different subsets of instructions.

[0097] Therefore, in at least one embodiment, the computer system is configured to implement one or more services that perform the operations of the processes described herein, either individually or collectively, and such a computer system is configured with applicable hardware and / or software capable of performing the operations. Furthermore, the computer system implementing at least one embodiment of this disclosure is a single device, and in another embodiment, it is a distributed computer system comprising multiple devices operating in different ways, such that the distributed computer system performs the operations described herein, and such that the single device does not perform all the operations.

[0098] The use of any and all examples or exemplary language (e.g., “such as”) provided herein is intended only to better illustrate embodiments of this disclosure and, unless otherwise required, does not constitute a limitation on the scope of the disclosure. The language in the specification should not be construed as indicating that any unclaimed element is essential to the practice of this disclosure.

[0099] All references cited herein, including publications, patent applications and patents, are incorporated herein by reference to the same extent that each reference is individually and specifically indicated to be incorporated by reference and fully elaborated herein.

[0100] The terms “coupled” and “connected” and their derivatives may be used in the specification and claims. It should be understood that these terms are not intended to be synonyms with each other. Rather, in specific examples, “connected” or “coupled” can be used to indicate that two or more elements are in direct or indirect physical or electrical contact with each other. “Coupled” can also mean that two or more elements are not in direct contact with each other, but still cooperate or interact with each other.

[0101] Unless otherwise explicitly stated, in some embodiments it should be understood that throughout the specification terms such as “processing,” “operation,” “calculation,” “determine,” etc., refer to the actions and / or processes of a computer or computing system or similar electronic computing device that manipulate and / or transform data representing physical (such as electronic) quantities in the registers and / or memory of the computing system into other data representing physical quantities in the memory, registers, or other such information storage, transmission, or display devices of the computing system.

[0102] Similarly, the term "processor" can refer to any device or part of a device that processes electronic data from registers and / or memory and transforms that electronic data into other electronic data that can be stored in registers and / or memory. As a non-limiting example, a "processor" can be a CPU or a GPU. A "computing platform" can include one or more processors. As used herein, a "software" process can include, for example, software and / or hardware entities that perform work over time, such as tasks, threads, and intelligent agents. Furthermore, each process can refer to multiple processes for executing instructions sequentially or in parallel, continuously or intermittently. In at least one embodiment, the terms "system" and "method" are used interchangeably herein, provided that the system can embody one or more methods and the methods can be considered as a system.

[0103] In this document, reference may be made to obtaining, acquiring, receiving, or inputting analog or digital data into a subsystem, computer system, or computer implementation machine. In at least one embodiment, the process of obtaining, acquiring, receiving, or inputting analog and digital data can be accomplished in various ways, such as by receiving data as a parameter of a function call or a call to an application programming interface. In at least one embodiment, the process of obtaining, acquiring, receiving, or inputting analog or digital data can be accomplished by transmitting data via a serial or parallel interface. In at least one embodiment, the process of obtaining, acquiring, receiving, or inputting analog or digital data can be accomplished by transmitting data from a providing entity to an acquiring entity via a computer network. In at least one embodiment, reference may also be made to providing, outputting, transmitting, sending, or presenting analog or digital data. In various examples, the process of providing, outputting, transmitting, sending, or presenting analog or digital data can be implemented by transmitting data as an input or output parameter of a function call, an application programming interface, or an inter-process communication mechanism.

[0104] While the discussion herein illustrates exemplary embodiments of the described technologies, other architectures may also be used to implement the described functionality and are intended to fall within the scope of this disclosure. Furthermore, although specific assignments of responsibilities have been defined above for discussion purposes, various functions and responsibilities may be assigned and divided in different ways depending on the circumstances.

[0105] Furthermore, although the subject matter has been described in language specific to structural features and / or methodological actions, it should be understood that the subject matter claimed in the appended claims is not necessarily limited to the specific features or actions described. Rather, specific features and actions are disclosed as exemplary forms for implementing the claims.

Claims

1. A method comprising: The duration of the predicted frame for generating the first frame; Determine the actual frame duration of the first frame; as well as The first frame is displayed by operating the backlight of the display in a first mode, wherein operating the backlight of the display in the first mode includes: A pulse is applied to the backlight of the display for the first frame during a portion of the predicted frame duration; as well as Based on the difference between the predicted frame duration and the actual frame duration, a pulse is applied to the backlight of the display for the first frame at a second time.

2. The method as described in claim 1, wherein, Applying a pulse to the backlight of the display for the first frame at the first time includes supplying a voltage to the backlight of the display for a portion of the predicted frame duration.

3. The method as described in claim 1, wherein, The actual frame duration is longer than the predicted frame duration, and the second time is located in the middle of the actual frame duration.

4. The method of claim 3, wherein, Applying a pulse to the backlight of the display for the first frame at the second time includes supplying a voltage to the backlight of the display within a portion of the difference between the predicted frame duration and the actual frame duration.

5. The method of claim 1, wherein, The actual frame duration is shorter than the predicted frame duration, and the method further includes generating a second frame with a shorter predicted frame duration.

6. The method of claim 1, further comprising: In response to the frame rate dropping below a predetermined threshold, before displaying the third frame, the second frame is displayed twice by operating the backlight of the display in the first mode.

7. The method of claim 1, further comprising: In response to the frame rate dropping below a predetermined threshold, a second frame is displayed by operating the backlight of the display in a second mode; The average brightness of the backlight of the display in the second mode is the same as the average brightness of the backlight of the display in the first mode.

8. The method of claim 7, wherein, The display of the second frame by operating the backlight of the display in the second mode includes at least one of the following: This ensures that a constant voltage is supplied to the backlight of the display during the duration of the second frame; or This causes a pulse-width modulation voltage to be supplied to the backlight of the display during the duration of the second frame.

9. The method of claim 7, further comprising: Before the second frame is displayed by operating the backlight of the display in the second mode, one or more pulses of one or more previous frames displayed in the first mode are modified.

10. The method of claim 1, wherein, The display includes a single backlight, and the values ​​of the pixels in the first frame are modified based on the predicted frame duration of the first frame and the position of the pixel within the first frame.

11. The method of claim 1, wherein, The display includes more than one backlight, and the value of the pixel of the first frame is modified based on the predicted frame duration of the first frame.

12. A system comprising: Processing unit, the processing unit being used to generate the first frame; monitor; as well as A display control circuit, coupled between the processing unit and the display, is used for: Generate the predicted frame duration of the first frame; Determine the actual frame duration of the first frame; as well as This enables the first frame to be displayed by operating the backlight of the display in a first mode, wherein, in order to operate the backlight of the display in the first mode, the display control circuitry is configured to: A pulse is applied to the backlight of the display for the first frame during a portion of the predicted frame duration; as well as Based on the difference between the predicted frame duration and the actual frame duration, a pulse is applied to the backlight of the display for the first frame at a second time.

13. The system of claim 12, wherein, Applying a pulse to the backlight of the display for the first frame at the first time includes supplying a voltage to the backlight of the display for a portion of the predicted frame duration.

14. The system of claim 12, wherein, The actual frame duration is longer than the predicted frame duration, and the second time is located in the middle of the actual frame duration.

15. The system of claim 14, wherein, Applying a pulse to the backlight of the display for the first frame at the second time includes supplying a voltage to the backlight of the display within a portion of the difference between the predicted frame duration and the actual frame duration.

16. The system of claim 12, wherein, The actual frame duration is shorter than the predicted frame duration, and the display control circuit is further configured to: generate a shorter predicted frame duration for a second frame.

17. The system of claim 12, wherein the display control circuit is further configured to: in response to the frame rate falling below a predetermined threshold, cause the second frame to be displayed twice by operating the backlight of the display in the first mode before causing the third frame to be displayed.

18. The system of claim 12, wherein the display control circuitry is further configured to: in response to a frame rate falling below a predetermined threshold, display a second frame by operating the backlight of the display in a second mode, wherein the average brightness of the backlight of the display in the second mode is the same as the average brightness of the backlight of the display in the first mode.

19. The system of claim 18, wherein, In order to display the second frame by operating the backlight of the display in the second mode, the display control circuitry is further configured to perform at least one of the following: This ensures that a constant voltage is supplied to the backlight of the display during the duration of the second frame; or This causes a pulse-width modulation voltage to be supplied to the backlight of the display during the duration of the second frame.

20. A system comprising: One or more processors; as well as A display, the display being coupled to one or more processors, the one or more processors being used for: Generate the predicted frame duration of the first frame for a specific processor in one or more of the processors; Determine the actual frame duration of the first frame; as well as The first frame is displayed by operating the backlight of the display in a first mode, wherein, in order to operate the backlight of the display in the first mode, the one or more processors are configured to: A pulse is applied to the backlight of the display for the first frame during a portion of the predicted frame duration; as well as Based on the difference between the predicted frame duration and the actual frame duration, a pulse is applied to the backlight of the display for the first frame at a second time.

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