A PCB finite element grid generation method and device, electronic equipment and storage medium

By automatically identifying and segmenting key features of the PCB board, adaptively determining the mesh transition zone and implementing a fully parameterized strategy, the problem of manual operation in existing technologies is solved, and mesh quality and the stability and efficiency of simulation calculations are improved.

CN121615434BActive Publication Date: 2026-06-05深圳十沣科技有限公司

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
深圳十沣科技有限公司
Filing Date
2026-02-03
Publication Date
2026-06-05

AI Technical Summary

Technical Problem

The existing PCB finite element modeling and mesh generation process relies on manual operation, making it difficult to automatically identify and segment key features such as pads and openings. This results in mesh mismatch, poor computational stability, and affects simulation efficiency and the reliability of results.

Method used

By automatically identifying key features such as pads and openings, the grid transition area of ​​the pin cluster region is adaptively determined, and partitioned meshing is implemented according to a preset full-parameterization strategy to achieve consistency between the solder layer and the board surface nodes.

Benefits of technology

It significantly reduces the workload of manual cutting and mesh adjustment, improves mesh quality and dimensional transition continuity, and enhances the efficiency, stability, and convergence of finite element model construction and simulation calculation.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121615434B_ABST
    Figure CN121615434B_ABST
Patent Text Reader

Abstract

The present disclosure provides a PCB board finite element grid generation method and device, electronic equipment and storage medium, through automatic identification and cutting of key features such as solder pad, opening, transition area, adaptive determination and merging of grid transition area in pin cluster area, implementation of partition grid according to preset full parameterization strategy, and realization of consistent solder layer and board surface node, which can significantly reduce the workload of manual cutting and manual grid adjustment, reduce the risk of grid fragmentation in dense pin area and cell distortion around hole, improve grid quality and size transition continuity; At the same time, the efficiency, stability and consistency of finite element model construction can be improved, so as to improve the calculation convergence and result reliability of subsequent structure, heat and vibration simulation.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This disclosure relates to the field of electronic manufacturing technology, and more specifically, to a method, apparatus, electronic device, and storage medium for generating finite element meshes for PCB boards. Background Technology

[0002] As electronic products evolve towards higher integration, miniaturization, and higher power density, the number of components on PCBs is constantly increasing, with smaller pin pitches, denser pads, and the presence of vias, blind vias, mounting openings, and areas of different materials (such as substrate, pads / solder layers, etc.). Before performing structural strength, thermal analysis, or reliability assessments, it is typically necessary to construct a finite element model based on the PCB geometry and generate a high-quality mesh. The mesh quality and the appropriateness of the mesh size transition directly affect solution convergence, computational accuracy, and simulation efficiency.

[0003] The existing PCB finite element modeling and mesh generation processes mostly rely on manual operation or semi-automatic tools in CAE preprocessing software. On the one hand, it requires manual identification and segmentation of key features such as pad areas, via areas, and dense pin areas, and manual setting of local mesh size and transition strategies. On the other hand, when assembling component models, geometric assembly is often the main focus, and it is often difficult to ensure strict consistency of nodes at solder layers / pads. This can easily lead to non-common node connections, mesh mismatch, or the need for additional binding / coupling constraints, thereby introducing additional modeling workload and affecting computational stability. Summary of the Invention

[0004] This disclosure provides at least one finite element mesh generation method, apparatus, electronic device, and storage medium for PCB boards. By automatically identifying and segmenting key features such as pads, openings, and transition areas, adaptively determining and merging mesh transition areas in pin cluster regions, and implementing partitioned meshing according to a preset full-parameterization strategy to ensure consistency between solder layers and board surface nodes, it can significantly reduce the workload of manual cutting and manual mesh adjustment, reduce the risk of mesh fragmentation in dense pin areas and distortion of hole perimeter elements, and improve mesh quality and dimensional transition continuity. At the same time, it can improve the efficiency, stability, and consistency of finite element model construction, thereby improving the computational convergence and result reliability of subsequent structural, thermal, and vibration simulations.

[0005] This disclosure provides a method for generating finite element meshes for PCB boards, including:

[0006] Obtain input data for mesh generation, and assemble the finite element mesh model of the components onto the PCB board model based on the input data;

[0007] The PCB board model is subjected to geometric preprocessing and feature recognition to form feature partitions for mesh control;

[0008] The mesh transition area is determined based on the solder layer mesh of the assembled components, and the mesh transition area is mapped to the corresponding area of ​​the PCB board model;

[0009] The preset fully parameterized meshing strategy is executed to complete the meshing of the key feature areas and other areas of the PCB board according to the feature partitions, and to achieve the consistency of the nodes of the component solder layer mesh and the PCB board mesh.

[0010] Generate a 3D volume mesh and export the finite element model file.

[0011] In one optional implementation, input data for mesh generation is acquired, and the finite element mesh model of the components is assembled onto the PCB board model according to the input data, specifically including:

[0012] Read the component assembly information file to obtain the component coordinates, rotation angles, and board surface information where the solder layer is located;

[0013] Read the mesh parameter file to obtain the processing requirements for openings and pads, as well as the preset mesh density parameters;

[0014] Read the material property file to obtain the PCB substrate material and pad material parameters, and import the corresponding component finite element mesh model to the specified position and angle according to the assembly information;

[0015] Interference and boundary checks are performed on component assembly. When the outer envelope of the component solder layer exceeds the PCB reference plane boundary, the component assembly is automatically marked and skipped.

[0016] In one optional implementation, the PCB board model undergoes geometric preprocessing and feature recognition to form feature partitions for mesh control, specifically including:

[0017] Automatically identify the upper surface of the 3D model of the PCB board and determine it as a unified reference plane to serve as the reference for cutting and mesh generation;

[0018] Based on the pad feature data, a pad geometric profile is generated according to the pad type, and the reference surface is cut using the geometric profile to form an independent pad surface area.

[0019] In one optional implementation, the process of segmenting the pad area further includes:

[0020] A secondary cut is performed within the surface area of ​​the pad according to the type of solder hole to form a through hole or blind hole structure;

[0021] By using a preset pad grouping algorithm, the surrounding areas of adjacent pad regions are cut as a whole to reduce the fragmentation of the mesh in dense pin areas and improve the mesh quality.

[0022] Automatically scan and identify PCB board openings and classify them according to preset hole diameter rules. Perform Washer processing on the target hole diameter to form a multi-layered annular transition area around the hole.

[0023] In one optional implementation, a mesh transition area is determined based on the solder layer mesh of the assembled components, and the mesh transition area is mapped to the corresponding area of ​​the PCB board model, specifically including:

[0024] Finite element mesh elements of the solder layer of components are extracted, and a connectivity-based region growing algorithm is used to group physically connected solder layer elements into pin clusters.

[0025] A two-dimensional envelope rectangle is calculated for each pin cluster, and the size of the transition region is dynamically adjusted according to the size of the pin cluster to meet the minimum transition size requirement and reduce abrupt changes in mesh size.

[0026] When the transition area boundaries of different pin clusters overlap, they are automatically merged into a continuous transition area, and the PCB reference surface is cut according to the finally determined transition area coordinates to generate an independent transition area surface region.

[0027] In one optional implementation, a preset fully parameterized meshing strategy is executed to complete the meshing of the key feature areas and other areas of the PCB board according to the feature partitions, specifically including:

[0028] Perform global settings for mesh parameters, which include at least mesh size, cell type, and mesh quality criteria;

[0029] First, mesh the pads, openings, and transition areas and fix their boundary nodes. Then, mesh the remaining areas of the PCB board.

[0030] The component solder layer mesh is projected onto the corresponding PCB board transition area mesh to achieve node sharing between the component and the PCB board.

[0031] In one optional implementation, generating a three-dimensional volume mesh and exporting a finite element model file specifically includes:

[0032] Stretch the PCB board reference surface grid to form the PCB board body grid;

[0033] Create and assign material properties to the PCB board mesh and pad mesh;

[0034] Perform grid quality standard checks and automatically collect cells that do not meet the quality standards into the non-conforming cell assembly;

[0035] Export the standard solver input file.

[0036] This disclosure also provides a finite element mesh generation device for PCB boards, including:

[0037] The data acquisition module is used to acquire input data for mesh generation and assemble the finite element mesh model of the components onto the PCB board model according to the input data.

[0038] The region segmentation module is used to perform geometric preprocessing and feature recognition on the PCB board model to form feature partitions for mesh control;

[0039] The transition area determination module is used to determine the mesh transition area based on the solder layer mesh of the assembled components, and map the mesh transition area to the corresponding area of ​​the PCB board model;

[0040] The fully parametric mesh generation module is used to execute the preset fully parametric mesh generation strategy, complete the mesh generation of the key feature areas of the PCB board and the remaining areas by partition, and ensure that the nodes of the component solder layer mesh and the PCB board mesh are consistent.

[0041] The file generation module is used to generate 3D volume meshes and export finite element model files.

[0042] This disclosure also provides an electronic device, including: a processor, a memory, and a bus. The memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor communicates with the memory via the bus. When the machine-readable instructions are executed by the processor, they perform the steps of the above-described PCB board finite element mesh generation method, or any possible implementation of the above-described PCB board finite element mesh generation method.

[0043] This disclosure also provides a computer-readable storage medium storing a computer program that, when executed by a processor, performs the steps of the above-described PCB board finite element mesh generation method, or any possible implementation thereof.

[0044] This disclosure also provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the above-described PCB board finite element mesh generation method, or any possible implementation of the above-described PCB board finite element mesh generation method.

[0045] This disclosure provides a PCB board finite element mesh generation method, apparatus, electronic device, and storage medium. By automatically identifying and segmenting key features such as pads, openings, and transition areas, adaptively determining and merging mesh transition areas in pin cluster regions, and implementing partitioned meshing according to a preset full-parameterization strategy to ensure consistency between solder layer and board surface nodes, it can significantly reduce the workload of manual cutting and manual mesh adjustment, reduce the risk of mesh fragmentation in dense pin areas and distortion of hole perimeter elements, and improve mesh quality and dimensional transition continuity. At the same time, it can improve the efficiency, stability, and consistency of finite element model construction, thereby improving the computational convergence and result reliability of subsequent structural, thermal, and vibration simulations.

[0046] To make the above-mentioned objects, features and advantages of this disclosure more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0047] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings used in the embodiments will be briefly described below. These drawings are incorporated in and constitute a part of this specification. They illustrate embodiments conforming to this disclosure and, together with the specification, serve to explain the technical solutions of this disclosure. It should be understood that the following drawings only show some embodiments of this disclosure and should not be considered as limiting the scope. Those skilled in the art can obtain other related drawings based on these drawings without creative effort.

[0048] Figure 1 A flowchart of a finite element mesh generation method for PCB boards provided in an embodiment of this disclosure is shown;

[0049] Figure 2 A schematic diagram of a finite element mesh generation effect for a PCB board provided by an embodiment of this disclosure is shown;

[0050] Figure 3 A schematic diagram of a PCB board finite element mesh generation apparatus provided in an embodiment of this disclosure is shown;

[0051] Figure 4 A schematic diagram of an electronic device provided in an embodiment of the present disclosure is shown. Detailed Implementation

[0052] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0053] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0054] In this document, the term "and / or" merely describes a relationship, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Furthermore, the term "at least one" in this document means any combination of at least two of any one or more elements. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C.

[0055] Research has revealed that existing PCB finite element modeling and mesh generation processes largely rely on manual operation or semi-automatic tools in CAE preprocessing software. On the one hand, it requires manual identification and segmentation of key features such as pad areas, via areas, and dense pin areas, and manual setting of local mesh sizes and transition strategies. On the other hand, when assembling component models, geometric assembly is often the primary focus, and nodes at solder layers / pads are often difficult to ensure strict consistency, which can easily lead to non-common node connections, mesh mismatches, or the need for additional binding / coupling constraints, thereby introducing additional modeling workload and affecting computational stability.

[0056] Based on the above research, this disclosure provides a finite element mesh generation method, apparatus, electronic device, and storage medium for PCB boards. By automatically identifying and segmenting key features such as pads, openings, and transition areas, adaptively determining and merging mesh transition areas in pin cluster regions, and implementing partitioned meshing according to a preset full-parameterization strategy to ensure consistency between solder layer and board surface nodes, it can significantly reduce the workload of manual cutting and manual mesh adjustment, reduce the risk of mesh fragmentation in dense pin areas and distortion of peri-hole elements, and improve mesh quality and dimensional transition continuity. At the same time, it can improve the efficiency, stability, and consistency of finite element model construction, thereby improving the computational convergence and result reliability of subsequent structural, thermal, and vibration simulations.

[0057] To facilitate understanding of this embodiment, a detailed description of the PCB board finite element mesh generation method disclosed in this disclosure is provided first. The execution entity of the PCB board finite element mesh generation method provided in this disclosure is generally a computer device with certain computing capabilities. This computer device may include, for example, a terminal device, a server, or other processing devices. The terminal device may be a user equipment (UE), mobile device, user terminal, terminal, cellular phone, cordless phone, personal digital assistant (PDA), handheld device, computing device, in-vehicle device, wearable device, etc. In some possible implementations, this PCB board finite element mesh generation method can be implemented by a processor calling computer-readable instructions stored in memory.

[0058] See Figure 1 The diagram shows a flowchart of a finite element mesh generation method for a PCB board according to an embodiment of this disclosure. The method includes steps S101 to S105, wherein:

[0059] S101. Obtain input data for mesh generation, and assemble the finite element mesh model of the components onto the PCB board model based on the input data.

[0060] In practice, this method runs on a CAE preprocessing software platform and automates the process through its script API interface. To ensure the repeatability and consistency of the assembly and subsequent mesh generation processes, standardized inputs are prepared in advance: 3D geometric model of the PCB board, component assembly information file, mesh parameter file, material property file, and component finite element mesh library.

[0061] Specifically, the PCB board 3D geometric model can adopt the Parasolid format, which includes geometric features such as the PCB board shape, mounting holes, and slots; the component assembly information file is used to define the name of each component, the X / Y coordinates of its geometric center in the PCB board coordinate system, and the assembly pose information such as the rotation angle around the Z axis; the mesh parameter file is used to provide parameters such as the overall mesh size, the center coordinates of each pin pad, the pad type size, the solder hole type size, and the mesh density, as well as parameters such as the number of washer layers, size, and mesh density of bolt holes; the material property file is used to define the material grade and mechanical property parameters used for the PCB board and pads; the component finite element mesh library is used to store the finite element model files of components such as chips, connectors, and capacitors that may be assembled, so that they can be retrieved by name and automatically called.

[0062] In one embodiment, the component assembly information file is read to obtain the component coordinates, rotation angle, and board surface information of the solder layer; the mesh parameter file is read to obtain the processing requirements of the openings and pads and the preset mesh density parameters; the material property file is read to obtain the PCB substrate material and pad material parameters, and the corresponding component finite element mesh model is imported to the specified position and angle according to the assembly information; interference and boundary checks are performed on the component assembly, and when the outer envelope of the component solder layer exceeds the PCB reference plane boundary, the component assembly is automatically marked and skipped.

[0063] Here, after the system starts, it first reads and parses the assembly information, mesh parameters, and material properties, and loads them into a data structure in memory to form a basic data set for driving automatic assembly and mesh control. Then, it imports the PCB board geometric model and automatically calculates the outer envelope of the PCB board 3D model; based on this, it identifies the upper surface of the PCB board and defines it as a reference plane, which serves as a unified reference for subsequent component assembly positioning, boundary determination, geometric cutting, and mesh generation.

[0064] After importing the PCB board model and determining the reference plane, the component list in the component assembly information file is traversed. For each component to be assembled, a matching component mesh model file is searched in the component finite element mesh library based on its component name and imported. After import, the center point of the component finite element mesh model is identified, and translation and rotation transformations are performed on the component mesh model according to the X / Y coordinates and rotation angle around the Z axis given in the assembly information, thereby accurately positioning and assembling the component finite element mesh model to the specified position and orientation of the PCB board model.

[0065] It should be noted that, in order to avoid invalid assembly affecting the subsequent determination of the transition area and the quality of mesh generation, this embodiment further performs an assembly compliance check during the assembly process: calculate the outer envelope of all nodes of the component solder layer and compare the outer envelope with the boundary of the PCB reference plane; when it is determined that the outer envelope exceeds the PCB boundary, it is considered that the component assembly does not meet the boundary constraints, and the assembly process of the component is automatically marked and skipped to prevent invalid assembly from entering the subsequent process.

[0066] S102. Perform geometric preprocessing and feature recognition on the PCB board model to form feature partitions for mesh control.

[0067] In practice, in order to implement differentiated mesh control for key areas such as pads, solder holes, and bolt holes in the subsequent meshing stage, and to avoid overly fragmented and poor-quality meshes in dense pin areas, the system performs geometric preprocessing and feature recognition processing on the PCB board model after component assembly, so as to automatically divide the PCB board surface into multiple feature partitions with independently applicable mesh parameters according to geometric features.

[0068] First, the system automatically identifies the upper surface of the PCB board's 3D model and designates it as the unified reference plane for subsequent PCB board operations. This reference plane serves as the reference plane and geometric carrier for subsequent pad contour creation, hole feature cutting, and mesh generation, thereby ensuring that different operation steps are performed under the same geometric reference and improving the stability and consistency of automated processing.

[0069] Here, after the reference plane is determined, automated segmentation is performed on the pad area. Specifically, the system reads the pad parameters and calls different geometric methods to create the pad outline according to the pad type; then, the outline is used to perform cutting on the reference plane, so that the pad area is separated from the reference plane to form an independent pad surface area, so that a higher mesh density or stricter quality constraints can be applied to the pad area in subsequent meshing.

[0070] Furthermore, to avoid overly fragmented cutting areas due to the large number and small spacing of pads in dense pin regions, this embodiment introduces a pad grouping algorithm to cluster and merge the pad regions. The pad grouping algorithm uses the center coordinates of the pads as the clustering basis. When the center distance between adjacent pads is less than a preset interval (e.g., 5mm), these pads and their outward gaps are merged into a continuous rectangular region for overall cutting. This creates continuous and regular feature partitions in dense pin regions, providing a geometric basis for generating higher-quality meshes later.

[0071] After the pad surface area is generated, the system performs secondary cutting at the center of the pad area according to the via hole type and size, and forms a via hole by removing the cutting surface, so as to distinguish through-hole or blind-hole structures at the geometric level, enabling subsequent mesh generation to form a mesh transition that conforms to topological constraints at the hole boundary.

[0072] It should be noted that in addition to pad / via hole features, this embodiment also performs intelligent detection and processing on bolt holes to establish a transition zone suitable for generating regular radial meshes around the holes. Specifically, the system automatically scans the reference plane of the PCB board through a geometric feature recognition engine or an opening recognition algorithm to identify all closed holes on it; then classifies the holes according to a preset multi-level aperture rule. For example, holes with a radius satisfying r ≤ 0.5 mm are directly removed, while holes within the range of 1.5 mm < r < 1.8 mm or 2.0 mm < r < 3.0 mm are determined as bolt holes and enter the Washer processing flow.

[0073] Here, for the target bolt hole, the system generates a set of concentric circles centered on the hole center according to the defined Washer size, and cuts the reference plane with the concentric circles, thereby forming a multi-layer annular transition zone around the opening; at the same time, the mesh density of the transition zone boundary can be preset to generate a more regular radial mesh and improve the mesh quality and convergence around the hole in the subsequent mesh generation stage.

[0074] As a possible implementation manner, secondary cutting is performed in the pad surface area according to the via hole type to form a through-hole or blind-hole structure; the surrounding areas of adjacent pad areas are integrally cut through a preset pad grouping algorithm to reduce the fragmentation of the mesh in the dense pin area and improve the mesh quality; the openings on the PCB board are automatically scanned and identified and classified according to the preset aperture rule, and the Washer process is performed on the target aperture to form a multi-layer annular transition area around the hole.

[0075] In a specific implementation, after the outer contour of the pad is generated and the reference plane of the PCB board is cut to obtain an independent pad surface area, in order to form a controllable geometric partition around the pad / via hole / opening, so as to obtain better mesh quality and size transition effect in subsequent mesh generation, this embodiment further performs the following processing on the pad surface area and opening features: performing secondary cutting of the via hole in the pad surface area to form a through-hole or blind-hole structure; integrally cutting the surrounding areas of adjacent pad areas through a pad grouping algorithm; and performing the Washer process on the opening that meets the specific aperture rule to form a multi-layer annular transition area.

[0076] Specifically, based on the solder hole type and size parameters, the system performs a secondary geometric cut at the center of the surface area of ​​each pad: a cutting profile is generated in the pad area according to the solder hole diameter (or radius), and a cutting operation is performed on the surface area of ​​the pad corresponding to the reference surface, forming the geometric boundary of the solder hole by removing the cutting surface.

[0077] During this process, the system determines the solder hole structure based on the solder hole type: when a solder hole is defined as a hole feature that penetrates the thickness direction of the PCB board, a through-hole structure is generated; when a solder hole is defined as a hole feature that does not penetrate the full thickness and is only located within a preset layer depth range, a blind via structure is generated. By explicitly representing the solder holes in the geometric partitioning of the pad area through a secondary cutting method, subsequent mesh generation can form a controlled mesh topology at the hole boundaries and reduce the risk of mesh distortion around the holes.

[0078] To address the issue of excessive fragmentation caused by cutting individual pads in densely populated pin areas, this embodiment introduces a pad grouping algorithm to cluster the pad regions and then performs overall cutting on the grouping results. This pad grouping algorithm uses the center coordinates of the pads as a basis to cluster all pads: when the center distance between adjacent pads is less than a preset interval (e.g., 5mm), these pads and their outward gaps are merged into a continuous region, and this continuous region (e.g., an approximately rectangular envelope region) is used as the cutting boundary for overall cutting on the reference plane.

[0079] In addition to solder pads / solder holes, PCBs typically include mounting holes, bolt holes, and other opening features. To create a geometric band suitable for grid transition around the holes, this embodiment automatically scans the PCB surface using a geometric feature recognition engine or opening recognition algorithm, identifies opening features on the reference surface, and classifies the identified holes according to preset multi-level hole diameter rules.

[0080] It should be noted that for the target hole diameter (such as a bolt hole), the system generates a set of concentric circles with the hole center as the center according to the defined Washer size parameters, and uses the set of concentric circles to cut the reference surface, thereby forming a multi-layer annular transition zone around the hole; at the same time, the mesh density parameters of the edge of the annular transition zone are preset so that a more regular radial mesh can be generated in the subsequent mesh generation stage and the mesh quality around the hole can be improved.

[0081] Thus, through the above geometric preprocessing and feature recognition processing, the PCB board reference surface is automatically segmented into a feature partition set including independent surface areas of pads, dense pad merging areas, solder hole areas, and multi-layer annular transition areas of bolt hole Washer; the feature partition set is used to implement partition mesh parameter setting and partition mesh division strategy during subsequent mesh generation, thereby taking into account both the refinement of key areas and the overall mesh quality.

[0082] S103. Determine the mesh transition area based on the solder layer mesh of the assembled components, and map the mesh transition area to the corresponding area of ​​the PCB board model.

[0083] In practice, to ensure a smooth transition between the fine mesh at the component solder layer and the relatively coarse mesh of the PCB substrate, and to provide a geometric basis for the subsequent common node connection between the solder layer mesh and the PCB mesh, after the component mesh model is assembled, the system extracts the mesh elements of the solder layer from the finite element mesh model of each successfully assembled component, and uses these as the input for the calculation of the transition zone.

[0084] Subsequently, the system performs pin cluster identification on the extracted solder layer mesh cells. Specifically, a connectivity-based region growing algorithm is used: a randomly selected unassigned solder layer cell is used as a seed cell, and solder layer cells that share an edge with the seed cell are searched and iteratively expanded until no new connected cells can be found, thus forming a physically continuous set of solder layer cells, which is then identified as a pin cluster; the above process is repeated until all solder layer cells are assigned, so as to automatically distinguish the individual solder joints of multi-pin components.

[0085] Here, after obtaining each pin cluster, the system performs dynamic transition zone boundary calculation for each pin cluster. First, it calculates the minimum enclosing rectangle (two-dimensional envelope rectangle) of all nodes of the pin cluster in the XY plane, and uses this rectangle as the geometric projection boundary of the pin cluster on the PCB board plane.

[0086] Based on this, in order to avoid abrupt changes from the fine mesh of the solder layer to the mesh of the PCB board, the system sets a basic expansion size and a minimum transition zone side length standard, and automatically increases the expansion amount according to the size of the enclosing rectangle, so that the side length of the formed transition zone reaches the minimum transition zone side length standard, thereby ensuring that the transition zone has sufficient size gradient to achieve a smooth transition.

[0087] The basic expansion size and minimum transition zone side length standard can be determined according to preset rules. For example, the basic expansion size is 1 / 3 of the pin cluster size, and the minimum transition zone side length standard is 2 / 3 of the overall PCB grid size.

[0088] Furthermore, to reduce the number of transition zones and optimize the overall mesh layout, the system performs a merging judgment on the transition zones: the boundary of the transition zone calculated above is expanded by an additional amount to form a pre-merging boundary, and it is checked whether the pre-merging boundaries of any two pin clusters intersect; if they intersect, it is determined that the transition zones of the corresponding pin clusters should be merged, and a new rectangle that can simultaneously contain the two pin clusters is recalculated as the final merged transition zone, so as to form a larger continuous transition area and improve the overall quality and stability of mesh generation.

[0089] It should be noted that after determining the final transition zone boundary at the pin cluster level or after merging, the system maps the transition zone to the corresponding area of ​​the PCB board model. Specifically, based on the finally determined rectangular coordinates of the transition zone, a cutting operation is performed on the PCB board reference surface to generate an independent surface area dedicated to mesh transition. Thus, the transition zone is explicitly divided geometrically into feature partitions where mesh parameters and partitioning strategies can be independently applied, laying the foundation for subsequently generating a mesh matching the solder layer mesh within the transition zone and achieving node sharing.

[0090] S104. Execute the preset fully parameterized mesh division strategy, complete the mesh division of the key feature area of ​​the PCB board and the remaining areas according to the feature partition, and achieve the consistency of the nodes of the component solder layer mesh and the PCB board mesh.

[0091] In practical implementation, after completing the PCB board reference surface feature partitioning (pad area, opening area, bolt hole Washer area, transition area, etc.), the system enters the fully parametric mesh generation stage. Full parametric generation refers to globally setting mesh size, cell type, and mesh quality criteria as configurable parameters. This parameter set is then written into the CAE preprocessing software's mesh generator via a script interface, enabling the reuse of the same mesh control rules and maintaining a consistent mesh quality baseline across different PCB boards and component assembly scenarios.

[0092] Specifically, the system completes the global setting of mesh parameters based on the information related to the mesh read from the mesh parameter file. The mesh parameters include at least: maximum / target mesh size, mesh cell type (e.g., two-dimensional cell types such as triangles / quadrilaterals and their mapping strategies), and mesh quality criteria (e.g., cell twist, aspect ratio, minimum angle, and other criteria used for quality inspection).

[0093] In this way, through global settings, subsequent meshing operations on different feature partitions are all performed under the same set of quality constraints, avoiding inconsistencies in mesh quality standards due to local operations.

[0094] Furthermore, after completing the global parameter settings, the system performs mesh generation according to the segmented and step-by-step meshing process: priority is given to performing two-dimensional mesh generation on key feature areas such as pads, openings, bolt holes, Washer areas, and all transition areas.

[0095] Here, the aforementioned regions typically correspond to stress / heat transfer / connection-sensitive parts, and have small local geometric scales and strict topological rules. Therefore, more refined size control and strategies such as mapped meshes are adopted in these regions to prioritize ensuring the regularity and quality of the mesh. At the same time, after completing the meshing of key feature regions, the system fixes the boundary nodes of these regions, so that they exist as locked boundary constraints when meshing other regions in the future, thereby avoiding the secondary reconstruction of the boundaries of key regions and the destruction of the high-quality mesh that has already been generated.

[0096] Subsequently, the system performs automatic 2D mesh generation on the remaining non-critical areas of the PCB board reference plane. Since the boundary nodes of the critical feature areas have been fixed, the free meshes generated in the non-critical areas can achieve geometric continuity and size transition with the feature area meshes at the boundaries, thus ensuring that the overall computational scale is controllable while taking into account the mesh refinement at critical features and the overall mesh quality.

[0097] Furthermore, in order to achieve node consistency (common node connection) between the component solder layer mesh and the PCB board mesh, this embodiment performs solder layer mesh imprinting and common node processing after the transition area mesh is generated.

[0098] Specifically, the mesh nodes of the component solder layer are projected onto their corresponding transition area mesh along a direction perpendicular to the PCB reference plane, so that the PCB transition area mesh can accurately depict the shape of the solder layer boundary. After the projection is completed, the system performs an overlap determination on the projection point and the transition area mesh node, and automatically merges the nodes whose projection distance falls within the preset tolerance range (for example, the tolerance can be set to the order of 0.001mm). This allows the component lead solder layer mesh and the PCB pad / transition area mesh to share the same node in the finite element model, achieving consistent topology connections and avoiding connection discontinuity problems caused by non-shared nodes.

[0099] S105. Generate a 3D volume mesh and export the finite element model file.

[0100] In practical implementation, after completing the two-dimensional mesh generation of the PCB board reference surface, the mesh refinement and boundary fixing of key feature areas, and the common node processing of the component solder layer mesh and the PCB board transition area mesh, the system enters the three-dimensional volume mesh generation and model export stage. The goal of this stage is to generate a three-dimensional volume mesh along the thickness direction of the PCB board from the completed two-dimensional surface mesh, complete the material property assignment and quality check at the volume mesh level, and finally form a finite element model file that can be directly used for solver calculations.

[0101] First, the system selects all 2D surface mesh objects related to the PCB, including at least the motherboard reference surface mesh, pad area mesh, and transition area mesh, and performs an extrude operation on the 2D surface mesh.

[0102] Here, the stretching direction is set to the PCB board thickness direction, and the stretching distance is equal to the PCB board thickness parameter, thereby generating a three-dimensional volume mesh from the two-dimensional surface mesh, resulting in the PCB board volume mesh; at the same time, the two-dimensional mesh of the pad part also forms a corresponding three-dimensional pad solid body mesh with stretching, so that the pad and the substrate remain a distinguishable set of solids in the three-dimensional model, which is convenient for assigning material properties to them separately in the future.

[0103] Furthermore, after the 3D volume mesh is generated, the system creates material property cards based on the material parameters in the material property file, and assigns the corresponding material properties to the volume mesh of the PCB substrate and the volume mesh of the pads, respectively. This assignment of material properties ensures that the subsequent finite element solution can accurately reflect the differences in mechanics and thermal properties between the PCB substrate and the pad materials.

[0104] Subsequently, the system invokes the quality inspection tool of the CAE preprocessing software to scan and inspect all two-dimensional and three-dimensional mesh elements according to preset mesh quality criteria. These quality criteria can be determined by a mesh parameter file or system default parameters and are used to identify elements that do not meet quality standards, such as those with excessive distortion, abnormal aspect ratios, or excessively small minimum angles.

[0105] For the non-compliant units detected, the system automatically selects them and categorizes them into specific non-compliant unit components to facilitate rapid location and manual repair or secondary adjustment, thereby improving the efficiency of grid review and rectification.

[0106] It should be noted that after completing the quality inspection and collection of non-conforming units, the system organizes the model display and exported objects: hides intermediate geometry and auxiliary components, and only retains and displays the PCB board mesh, pad mesh and all assembled component 3D mesh required for simulation solution, thereby ensuring that the exported model is concise, the data is usable and there are no redundant auxiliary objects.

[0107] Finally, the system automatically exports the complete finite element model as a standard solver input file. The format of the solver input file can be set according to the target solver type for subsequent simulation analysis calculations. See details in [link to documentation]. Figure 2 As shown, Figure 2 A schematic diagram of a finite element mesh generation effect for a PCB board provided by an embodiment of this disclosure is shown.

[0108] This disclosure provides a finite element mesh generation method for PCB boards. By automatically identifying and segmenting key features such as pads, openings, and transition areas, adaptively determining and merging mesh transition areas in pin cluster regions, and implementing partitioned meshing according to a preset full-parameterization strategy to ensure consistency between solder layer and board surface nodes, it can significantly reduce the workload of manual cutting and mesh adjustment, reduce the risk of mesh fragmentation in dense pin areas and distortion of hole perimeter elements, and improve mesh quality and dimensional transition continuity. At the same time, it can improve the efficiency, stability, and consistency of finite element model construction, thereby improving the computational convergence and result reliability of subsequent structural, thermal, and vibration simulations.

[0109] Those skilled in the art will understand that, in the above-described method of the specific implementation, the order in which each step is written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.

[0110] Based on the same inventive concept, this disclosure also provides a PCB board finite element mesh generation device corresponding to the PCB board finite element mesh generation method. Since the principle of the device in this disclosure is similar to the PCB board finite element mesh generation method described above, the implementation of the device can refer to the implementation of the method, and the repeated parts will not be described again.

[0111] Please see Figure 3 , Figure 3 This is a schematic diagram of a finite element mesh generation device for a PCB board provided in an embodiment of this disclosure. Figure 3 As shown in the figure, the PCB board finite element mesh generation apparatus 300 provided in this embodiment includes:

[0112] The data acquisition module 310 is used to acquire input data for mesh generation and assemble the finite element mesh model of the components onto the PCB board model according to the input data.

[0113] The region segmentation module 320 is used to perform geometric preprocessing and feature recognition on the PCB board model to form feature partitions for mesh control.

[0114] The transition area determination module 330 is used to determine the grid transition area based on the solder layer grid of the assembled components, and map the grid transition area to the corresponding area of ​​the PCB board model.

[0115] The fully parametric mesh generation module 340 is used to execute a preset fully parametric mesh generation strategy, complete the mesh generation of key feature areas and other areas of the PCB board by partition, and ensure that the nodes of the component solder layer mesh and the PCB board mesh are consistent.

[0116] The file generation module 350 is used to generate three-dimensional volume meshes and export finite element model files.

[0117] The processing flow of each module in the device and the interaction flow between each module can be referred to the relevant descriptions in the above method embodiments, and will not be detailed here.

[0118] This disclosure provides a PCB board finite element mesh generation device that automatically identifies and segments key features such as pads, openings, and transition areas; adaptively determines and merges mesh transition areas for pin cluster regions; implements partitioned meshing according to a preset full-parameterization strategy; and achieves consistency between solder layer and board surface nodes. This significantly reduces the workload of manual cutting and mesh adjustment, lowers the risk of mesh fragmentation in dense pin areas and distortion of hole perimeter elements, and improves mesh quality and dimensional transition continuity. At the same time, it can improve the efficiency, stability, and consistency of finite element model construction, thereby improving the computational convergence and result reliability of subsequent structural, thermal, and vibration simulations.

[0119] Corresponding to Figure 1 The PCB board finite element mesh generation method disclosed in this disclosure also provides an electronic device 400, such as... Figure 4 The diagram shown is a structural schematic of an electronic device 400 provided in an embodiment of this disclosure, including:

[0120] Processor 41, memory 42, and bus 43; memory 42 is used to store execution instructions, including main memory 421 and external memory 422; the main memory 421, also called internal memory, is used to temporarily store the computational data in processor 41, as well as the data exchanged with external memory 422 such as hard disk. Processor 41 exchanges data with external memory 422 through main memory 421. When the electronic device 400 is running, processor 41 and memory 42 communicate through bus 43, enabling processor 41 to execute... Figure 1 The steps of the finite element mesh generation method for PCB boards.

[0121] This disclosure also provides a computer-readable storage medium storing a computer program. When executed by a processor, the computer program performs the steps of the PCB board finite element mesh generation method described in the above method embodiments. The storage medium can be a volatile or non-volatile computer-readable storage medium.

[0122] This disclosure also provides a computer program product, which includes computer instructions. When the computer instructions are executed by a processor, they can perform the steps of the PCB board finite element mesh generation method described in the above method embodiments. For details, please refer to the above method embodiments, which will not be repeated here.

[0123] The aforementioned computer program product can be implemented through hardware, software, or a combination thereof. In one optional embodiment, the computer program product is specifically embodied in a computer storage medium; in another optional embodiment, the computer program product is specifically embodied in a software product, such as a software development kit (SDK), etc.

[0124] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working process of the device described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here. In the several embodiments provided in this disclosure, it should be understood that the disclosed device and method can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. Furthermore, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection may be through some communication interfaces; the indirect coupling or communication connection of devices or units may be electrical, mechanical, or other forms.

[0125] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0126] In addition, the functional units in the various embodiments of this disclosure can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0127] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a processor-executable, non-volatile, computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0128] Finally, it should be noted that the above-described embodiments are merely specific implementations of this disclosure, used to illustrate the technical solutions of this disclosure, and not to limit it. The protection scope of this disclosure is not limited thereto. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this disclosure. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure, and should all be covered within the protection scope of this disclosure. Therefore, the protection scope of this disclosure should be determined by the protection scope of the claims.

Claims

1. A method for generating finite element meshes for PCB boards, characterized in that, include: Obtain input data for mesh generation, and assemble the finite element mesh model of the components onto the PCB board model based on the input data; The PCB board model is subjected to geometric preprocessing and feature recognition to form feature partitions for mesh control; The transition zone is determined based on the solder layer mesh of the assembled components, and the transition zone is mapped to the corresponding area of ​​the PCB board model. Specifically, the finite element mesh elements of the component solder layer are extracted, and the physically connected solder layer elements are grouped into pin clusters using a connectivity-based region growth algorithm. A two-dimensional envelope rectangle is calculated for each pin cluster, and the transition zone size is dynamically adjusted according to the size of the pin cluster to meet the minimum transition size requirement and reduce abrupt changes in mesh size. When the transition zone boundaries of different pin clusters overlap, they are automatically merged into a continuous transition zone, and the PCB board reference surface is cut according to the finally determined transition zone coordinates to generate an independent transition zone surface area. The preset fully parameterized meshing strategy is executed to complete the meshing of the key feature areas and other areas of the PCB board according to the feature partitions, and to achieve the consistency of the nodes of the component solder layer mesh and the PCB board mesh. Generate a 3D volume mesh and export the finite element model file.

2. The method according to claim 1, characterized in that, Acquire input data for mesh generation, and assemble the finite element mesh model of the components onto the PCB board model based on the input data, specifically including: Read the component assembly information file to obtain the component coordinates, rotation angles, and board surface information where the solder layer is located; Read the mesh parameter file to obtain the processing requirements for openings and pads, as well as the preset mesh density parameters; Read the material property file to obtain the PCB substrate material and pad material parameters, and import the corresponding component finite element mesh model to the specified position and angle according to the assembly information; Interference and boundary checks are performed on component assembly. When the outer envelope of the component solder layer exceeds the PCB reference plane boundary, the component assembly is automatically marked and skipped.

3. The method according to claim 1, characterized in that, The PCB board model undergoes geometric preprocessing and feature recognition to form feature partitions for mesh control, specifically including: Automatically identify the upper surface of the 3D model of the PCB board and determine it as a unified reference plane to serve as the reference for cutting and mesh generation; Based on the pad feature data, a pad geometric profile is generated according to the pad type, and the reference surface is cut using the geometric profile to form an independent pad surface area.

4. The method according to claim 3, characterized in that, After generating pad geometric contours according to pad type based on pad feature data, and using the geometric contours to cut the reference plane to form independent pad surface areas, the method further includes: A secondary cut is performed within the surface area of ​​the pad according to the type of solder hole to form a through hole or blind hole structure; By using a preset pad grouping algorithm, the surrounding areas of adjacent pad regions are cut as a whole to reduce the fragmentation of the mesh in dense pin areas and improve the mesh quality. Automatically scan and identify PCB board openings and classify them according to preset hole diameter rules. Perform Washer processing on the target hole diameter to form a multi-layered annular transition area around the hole.

5. The method according to claim 1, characterized in that, Execute a preset fully parametric meshing strategy to complete the meshing of the key feature areas and other areas of the PCB board according to the aforementioned feature partitions, specifically including: Perform global settings for mesh parameters, which include at least mesh size, cell type, and mesh quality criteria; First, mesh the pads, openings, and transition areas and fix their boundary nodes. Then, mesh the remaining areas of the PCB board. The component solder layer mesh is projected onto the corresponding PCB board transition area mesh to achieve node sharing between the component and the PCB board.

6. The method according to claim 1, characterized in that, Generate a 3D volume mesh and export the finite element model file, specifically including: Stretch the PCB board reference surface grid to form the PCB board body grid; Create and assign material properties to the PCB board mesh and pad mesh; Perform grid quality standard checks and automatically collect cells that do not meet the quality standards into the non-conforming cell assembly; Export the standard solver input file.

7. A finite element mesh generation device for PCB boards, characterized in that, include: The data acquisition module is used to acquire input data for mesh generation and assemble the finite element mesh model of the components onto the PCB board model according to the input data. The region segmentation module is used to perform geometric preprocessing and feature recognition on the PCB board model to form feature partitions for mesh control; The transition zone determination module is used to determine the mesh transition zone based on the solder layer mesh of the assembled components, and map the mesh transition zone to the corresponding area of ​​the PCB board model. Specifically, it extracts the finite element mesh elements of the component solder layer, and uses a connectivity-based region growth algorithm to group physically connected solder layer elements into pin clusters; it calculates a two-dimensional envelope rectangle for each pin cluster, and dynamically adjusts the transition zone size according to the size of the pin cluster to meet the minimum transition size requirement and reduce mesh size abrupt changes; when the transition zone boundaries of different pin clusters overlap, they are automatically merged into a continuous transition zone, and the PCB board reference surface is cut according to the finally determined transition zone coordinates to generate an independent transition zone surface area; The fully parametric mesh generation module is used to execute the preset fully parametric mesh generation strategy, complete the mesh generation of the key feature areas of the PCB board and the remaining areas by partition, and ensure that the nodes of the component solder layer mesh and the PCB board mesh are consistent. The file generation module is used to generate 3D volume meshes and export finite element model files.

8. An electronic device, characterized in that, include: The device includes a processor, a memory, and a bus. The memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor communicates with the memory via the bus. When the machine-readable instructions are executed by the processor, the steps of the PCB board finite element mesh generation method as described in any one of claims 1 to 6 are performed.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, performs the steps of the PCB board finite element mesh generation method as described in any one of claims 1 to 6.