A universal serial bus (USB) state diagnosis circuit and a USB state diagnosis method

Abstract

The application discloses a universal serial bus state diagnosis circuit and a state diagnosis method, which can be applied to the field of electronic circuits. In the circuit, the output ends of the positive line detection units are respectively connected with the positive line input ends and the positive line interfaces in the comparison units; the output ends of the negative line detection units are respectively connected with the negative line input ends and the negative line interfaces in the comparison units; the positive line detection units and the negative line detection units are used for controlling the output end voltages of the units to be switched between the power supply voltage and the near-ground voltage based on preset state diagnosis rules; the comparison unit is used for comparing the voltages of the positive line interfaces, the voltages of the negative line interfaces and the preset reference voltage based on the output end voltages provided by the positive line detection units and the negative line detection units; and the output result of the comparison unit is used for determining the state of the universal serial bus. Thus, the complex fault types can be finely distinguished, and different connection states of the universal serial bus can be identified.

Description

Technical Field

[0001] This application relates to the field of electronic circuit technology, and in particular to a status diagnosis circuit and status diagnosis method for a universal serial interface. Background Technology

[0002] With the continuous development of industrial control and intelligent devices, the requirements for the communication reliability of general serial interfaces are constantly increasing.

[0003] Currently, status diagnostics for general serial interfaces can only output a single interrupt signal, requiring users to analyze complex logs to pinpoint the root cause of faults. This makes it difficult to distinguish different fault types, increasing the difficulty of troubleshooting. Furthermore, traditional status diagnostic solutions struggle to identify anomalies such as short circuits to ground or short circuits to the bus power supply, lack short-circuit termination mechanisms, and are prone to chip burnout due to overcurrent.

[0004] Therefore, how to identify the different connection states of a universal serial interface becomes a problem that needs to be solved. Summary of the Invention

[0005] To address the aforementioned issues, this application provides a status diagnosis circuit and method for a universal serial interface, capable of identifying different connection states of the universal serial interface.

[0006] The embodiments of this application disclose the following technical solutions:

[0007] In a first aspect, embodiments of this application provide a status diagnostic circuit for a universal serial interface, the circuit comprising: a positive line detection unit, a negative line detection unit, and a comparison unit;

[0008] The output of the positive line detection unit is connected to the positive line input and the positive line interface in the comparison unit, respectively.

[0009] The output of the negative line detection unit is connected to the negative line input and the negative line interface in the comparison unit, respectively.

[0010] The positive line detection unit and the negative line detection unit are used to control their respective output voltages to switch between the supply voltage and the near-ground voltage based on preset state diagnosis rules.

[0011] The comparison unit is used to compare the voltage of the positive line interface, the voltage of the negative line interface, and a preset reference voltage based on the output voltages provided by the positive line detection unit and the negative line detection unit, respectively; the output result of the comparison unit is used to determine the state of the universal serial interface.

[0012] Optionally, the positive line detection unit includes: a first power supply terminal connected to the local power supply, a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, an AND gate, a first NOT gate, a first signal input terminal, and a second signal input terminal;

[0013] The first signal input terminal is connected to the first input terminal of the AND gate;

[0014] The second signal input terminal is connected to the input terminal of the first NOT gate and the gate of the first NMOS transistor, respectively;

[0015] The output of the first NOT gate is connected to the second input of the AND gate;

[0016] The output of the AND gate is connected to the gate of the second NMOS transistor;

[0017] The first power supply terminal is connected to the source and gate of the first PMOS transistor and the drain of the second NMOS transistor;

[0018] The drain of the first PMOS transistor is connected to the drain of the first NMOS transistor and the output terminal of the positive line detection unit, respectively.

[0019] The source of the first NMOS transistor and the source of the second NMOS transistor are grounded.

[0020] Optionally, the negative line detection unit includes: a second power supply terminal connected to the local power supply, a third NMOS transistor, a second PMOS transistor, and a third signal input terminal;

[0021] The third signal input terminal is connected to the gate of the third NMOS transistor;

[0022] The second power supply terminal is connected to the source and gate of the second PMOS transistor and the drain of the third NMOS transistor;

[0023] The drain of the second PMOS transistor is connected to the output terminal of the negative line detection unit;

[0024] The source of the third NMOS transistor is grounded.

[0025] Optionally, the negative line detection unit further includes: a current driving module;

[0026] The signal output terminal of the current drive module is connected to the output terminal of the negative line detection unit, and is used to provide current based on preset state diagnosis rules to help pull down the voltage at the output terminal of the negative line detection unit.

[0027] Optionally, the comparison unit includes: a first differential amplifier circuit, a second differential amplifier circuit, a first differential voltage comparator, a second differential voltage comparator, a third comparator, a fourth comparator, and an OR gate;

[0028] The positive input terminal of the first differential amplifier circuit, the negative input terminal of the second differential amplifier circuit, and the positive input terminal of the third comparator are connected to the output terminal of the positive line detection unit.

[0029] The negative input terminal of the first differential amplifier circuit, the positive input terminal of the second differential amplifier circuit, and the positive input terminal of the fourth comparator are connected to the output terminal of the negative line detection unit.

[0030] The output of the first differential amplifier circuit is connected to the non-inverting input of the first differential voltage comparator;

[0031] The output of the second differential amplifier circuit is connected to the non-inverting input of the second differential voltage comparator;

[0032] The negative phase input terminals of the third comparator and the fourth comparator are connected to the first reference voltage, and the negative phase input terminals of the first differential voltage comparator and the second differential voltage comparator are connected to the second reference voltage.

[0033] The output of the first differential pressure comparator is connected to the first input of the OR gate, and the output of the second differential pressure comparator is connected to the second input of the OR gate.

[0034] Optionally, the circuit further includes a first drain resistor and a second drain resistor;

[0035] The output terminal of the positive line detection unit and the non-inverting input terminal of the first differential amplifier circuit are grounded through a first drain resistor; the output terminal of the negative line detection unit and the non-inverting input terminal of the second differential amplifier circuit are grounded through a second drain resistor.

[0036] Optionally, the circuit further includes: a power supply unit;

[0037] The output terminal of the power supply unit is connected to the positive line interface;

[0038] The power supply unit is used to switch the output voltage to the power supply voltage based on preset state diagnosis rules, so as to help pull up the positive line interface voltage.

[0039] Optionally, the power supply unit includes: a third power supply terminal connected to the local power supply, a fourth NMOS transistor, a third PMOS transistor, a second NOT gate, and a fourth signal input terminal;

[0040] The fourth signal input terminal is connected to the input terminal of the second NOT gate;

[0041] The output of the second NOT gate is connected to the gate of the fourth NMOS transistor;

[0042] The third power supply terminal is connected to the source and gate of the third PMOS transistor and the drain of the fourth NMOS transistor, respectively.

[0043] The drain of the third PMOS transistor is connected to the output terminal of the power supply unit;

[0044] The source of the fourth NMOS transistor is grounded.

[0045] In a second aspect, embodiments of this application provide a status diagnosis method for a universal serial interface, the method being applied to a status diagnosis circuit for a universal serial interface provided in any embodiment of the first aspect, the method comprising:

[0046] The output voltages of both the positive line detection unit and the negative line detection unit are controlled to be the power supply voltage, and the first output result of the comparison unit is detected.

[0047] If the first output result indicates that neither the positive line nor the negative line is short-circuited to ground, then the output voltage of the positive line detection unit is switched to the near-ground voltage, and the second output result of the comparison unit is detected; otherwise, based on the first output result, the general serial interface status of whether the positive line is short-circuited to ground or the negative line is short-circuited to ground is output.

[0048] The output voltage of the negative line detection unit is switched to the near-ground voltage, and the third output result of the comparison unit is detected.

[0049] If the third output result indicates that neither the positive line nor the negative line is short-circuited to the bus power supply, then the output voltage of the positive line detection unit is switched to the power supply voltage, and the fourth output result of the comparison unit is detected; otherwise, based on the third output result, the general serial interface status of either the positive line being short-circuited to the bus power supply or the negative line being short-circuited to the bus power supply is output.

[0050] Compare the second output result with the fourth output result to determine the state of the universal serial interface as positive, open, reverse, short, or incorrect.

[0051] Optionally, the output voltages of both the positive line detection unit and the negative line detection unit are controlled by the supply voltage. Before detecting the first output result of the comparison unit, the method further includes:

[0052] Determine the node type corresponding to the Universal Serial Interface;

[0053] If the universal serial interface corresponds to a master node, then local power supply is activated; if the universal serial interface corresponds to a slave node, then either local power supply or bus power supply is activated.

[0054] Optionally, the output voltages of both the positive line detection unit and the negative line detection unit are controlled by the supply voltage. Before detecting the first output result of the comparison unit, the method further includes:

[0055] Detect the voltage range of the supply voltage;

[0056] Based on the voltage range, determine the voltage division ratio between the supply voltage and the positive line interface voltage and the negative line interface voltage.

[0057] Optionally, after determining the voltage division ratio of the supply voltage to the positive line interface voltage and the negative line interface voltage based on the voltage range, the method further includes:

[0058] Collect ambient temperature;

[0059] Based on the ambient temperature, the voltage range, and the voltage division ratio, a first reference voltage and a second reference voltage are determined in the comparison unit; the first reference voltage is used to compare with the positive line interface voltage and / or the negative line interface voltage, and the second reference voltage is used to compare with the difference between the positive line interface voltage and the negative line interface voltage.

[0060] Optionally, the output voltages of both the positive line detection unit and the negative line detection unit are controlled by the supply voltage, and the detection of the first output result of the comparison unit includes:

[0061] The output voltages of both the positive line detection unit and the negative line detection unit are controlled to be the supply voltage. The comparison values ​​of the positive line interface voltage and the first reference voltage, as well as the comparison values ​​of the negative line interface voltage and the first reference voltage, are detected to obtain the first output result of the comparison unit.

[0062] Optionally, switching the output voltage of the positive line detection unit to a near-ground voltage and detecting the second output result of the comparison unit includes:

[0063] Switch the output voltage of the positive line detection unit to the near-ground voltage;

[0064] When powered by local power, the comparison value between the positive line interface voltage and the first reference voltage is detected to obtain the second output result of the comparison unit;

[0065] When powered by the bus power supply, the comparison value between the positive line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the second output result of the comparison unit.

[0066] Optionally, switching the output voltage of the negative line detection unit to a near-ground voltage and detecting the third output result of the comparison unit includes:

[0067] Switch the output voltage of the negative line detection unit to a near-ground voltage;

[0068] When powered by local power, the comparison value between the positive line interface voltage and the first reference voltage is detected, and the comparison value between the negative line interface voltage and the first reference voltage is detected, to obtain the third output result of the comparison unit.

[0069] When powered by the bus power supply, the comparison value between the positive line interface voltage and the first reference voltage, the comparison value between the negative line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the third output result of the comparison unit.

[0070] Optionally, the step of switching the output voltage of the positive line detection unit to the supply voltage and detecting the fourth output result of the comparison unit includes:

[0071] Switch the output voltage of the positive line detection unit to the power supply voltage;

[0072] When powered by local power, the comparison value between the negative line interface voltage and the first reference voltage is detected to obtain the fourth output result of the comparison unit;

[0073] When powered by the bus power supply, the comparison value between the negative line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the fourth output result of the comparison unit.

[0074] Compared with the prior art, this application has the following advantages:

[0075] This application provides a status diagnostic circuit for a universal serial interface (USB). The circuit includes a positive line detection unit, a negative line detection unit, and a comparison unit. The output of the positive line detection unit is connected to both the positive line input and the positive line interface of the comparison unit. The output of the negative line detection unit is connected to both the negative line input and the negative line interface of the comparison unit. The positive and negative line detection units are configured to switch their respective output voltages between the supply voltage and the near-ground voltage based on preset status diagnostic rules. The comparison unit is configured to compare the voltage of the positive line interface, the voltage of the negative line interface, and a preset reference voltage based on the output voltages provided by the positive and negative line detection units. The output of the comparison unit is used to determine the status of the USB.

[0076] Therefore, the positive line detection unit and the ground network detection unit dynamically switch their output voltages based on preset rules. Combined with the comparison unit's precise comparison of multiple voltage signals, this enables refined differentiation of complex fault types and identification of different connection states of the universal serial interface. This solves the problem that traditional status diagnostic schemes can only identify whether an interruption has occurred, leading to difficulties in fault location. Furthermore, the status diagnostic circuit provided in this application can identify anomalies such as short circuits to ground or short circuits to the bus power supply. In the short-circuit state, it directly outputs the corresponding status signal, employing an implicit logic of diagnosis before power supply. This avoids the formation of a current path before the fault is resolved, thereby preventing chip burnout due to overcurrent and significantly improving fault diagnosis efficiency and the communication reliability of the universal serial interface. Attached Figure Description

[0077] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0078] Figure 1 A schematic diagram of a status diagnostic circuit for a universal serial interface provided in an embodiment of this application;

[0079] Figure 2 A structural diagram of a positive line detection unit provided in an embodiment of this application;

[0080] Figure 3 A structural diagram of a negative line detection unit provided in an embodiment of this application;

[0081] Figure 4 A structural diagram of a current-driven module provided in an embodiment of this application;

[0082] Figure 5 A comparison unit structure diagram provided in an embodiment of this application;

[0083] Figure 6 A power supply unit structure diagram provided in an embodiment of this application;

[0084] Figure 7 A signal timing diagram provided for an embodiment of this application;

[0085] Figure 8 A schematic diagram of another general-purpose serial interface status diagnostic circuit provided in this application embodiment;

[0086] Figure 9 A flowchart of a status diagnosis method for a universal serial interface provided in this application embodiment;

[0087] Figure 10 A schematic diagram illustrating an abnormal state of a universal serial interface provided in an embodiment of this application;

[0088] Figure 11 A schematic diagram illustrating the abnormal states of various general-purpose serial interfaces provided in the embodiments of this application;

[0089] Figure 12 A schematic diagram illustrating an abnormal state of another universal serial interface provided in an embodiment of this application;

[0090] Figure 13 A state diagnosis logic diagram under local power supply conditions is provided in an embodiment of this application;

[0091] Figure 14 This is a state diagnosis logic diagram under bus power supply conditions provided in an embodiment of this application. Detailed Implementation

[0092] The status diagnosis circuit and status diagnosis method for a universal serial interface provided in this application can be used in the field of electronic circuits. The above is only an example and does not limit the application field of the status diagnosis circuit and status diagnosis method for a universal serial interface provided in this application.

[0093] The terms "first," "second," "third," and "fourth," etc., used in this application specification, claims, and drawings are used to distinguish different objects, not to limit a specific order.

[0094] In the embodiments of this application, the terms "as an example" or "for example" are used to indicate that they are examples, illustrations, or explanations. Any embodiment or design that is described as "as an example" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design options. Specifically, the use of terms such as "as an example" or "for example" is intended to present the relevant concepts in a specific manner.

[0095] The terminology used in the implementation section of this application is for the purpose of explaining specific embodiments of this application only, and is not intended to limit this application.

[0096] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0097] See Figure 1 The figure is a schematic diagram of a status diagnostic circuit for a universal serial interface provided in an embodiment of this application. The circuit includes a positive line detection unit 100, a negative line detection unit 200, and a comparison unit 300.

[0098] The output of the positive line detection unit 100 is connected to the positive line input and the positive line interface 400 of the comparison unit 300, respectively; the output of the negative line detection unit 200 is connected to the negative line input and the negative line interface 500 of the comparison unit 300, respectively; the output of the positive line detection unit 100 and the positive line input of the comparison unit 300 are both grounded, and the output of the negative line detection unit 200 and the negative line input of the comparison unit 300 are both grounded.

[0099] The positive line detection unit 100 can be a pull-up / pull-down circuit located in the positive line pin (i.e., the SENSE pin), the negative line detection unit 200 can be a pull-up / pull-down circuit located in the negative line connection pin (i.e., the VSSN pin), and the comparison unit 300 can include a difference calculation circuit and a comparator.

[0100] The positive line detection unit 100 and the negative line detection unit 200 are used to control their respective output voltages to switch between the supply voltage (Vin) and the near-ground voltage (approximately 0V) based on preset state diagnosis rules.

[0101] The comparison unit 300 is used to compare the voltage of the positive line interface 400, the voltage of the negative line interface 500, and a preset reference voltage based on the output voltages provided by the positive line detection unit 100 and the negative line detection unit 200, respectively. The output of the comparison unit 300 is used to determine the state of the universal serial interface. The preset reference voltage may include a first reference voltage for comparison with the positive line interface voltage and / or the negative line interface voltage, and a second reference voltage for comparison with the difference between the positive line interface voltage and the negative line interface voltage.

[0102] For example, by using local power supply to provide the supply voltage, the output voltages of both the positive line detection unit 100 and the negative line detection unit 200 can be controlled to be the supply voltage (Vin) before detecting the first output result of the comparison unit 300.

[0103] At this time, the voltages of both the SENSE and VSSN pins should be the supply voltage after resistor division. If the first output result indicates that the voltage at the positive line interface 400 is lower than the preset first reference voltage (V... ref1 If the SENSE pin is shorted to ground, the general serial interface status can be output as short to ground (0X09). If the first output indicates that the voltage of the negative line interface 500 is lower than the preset first reference voltage (V... ref1 If the VSSN pin is shorted to ground, the output of the general serial interface status is short to ground (0X29).

[0104] If the first output result indicates that neither the positive line nor the negative line is short-circuited to ground, the output voltage of the positive line detection unit 100 can be switched to the near-ground voltage (approximately 0V) to detect the second output result of the comparison unit 300.

[0105] At this time, the voltage at the SENSE pin should be near-ground voltage (approximately 0V), and the voltage at the VSSN pin should be the supply voltage after voltage division by resistors. If the second output indicates that the voltage at the positive line interface 400 is higher than the preset first reference voltage (V... ref1 If the current general serial interface state is reversed (i.e., the positive and negative bus wires are reversed), shorted (i.e., the positive and negative bus wires are shorted), or wrongly connected (i.e., the bus is connected to the wrong port), the second output result indicates that the voltage of the positive line interface 400 is lower than the preset first reference voltage (V). ref1 If the current state of the Universal Serial Interface is positive (i.e., a correctly connected, good node) or open, then the current state of the Universal Serial Interface may be either positive (i.e., a correctly connected, good node) or open.

[0106] Then, further judgment is made. The output voltage of the negative line detection unit 200 is switched to the near-ground voltage (approximately 0V), and the third output result of the comparison unit 300 is detected.

[0107] At this point, the voltages of both the SENSE and VSSN pins should be near ground (approximately 0V). If the third output indicates that the voltage at the positive line interface 400 is higher than the preset first reference voltage (V... ref1 ), or the voltage at the positive line interface 400 and the voltage at the negative line interface 500 are both higher than the preset first reference voltage (V). ref1 If the current state of the universal serial interface is short-to-power 0X0A (positive line shorted to bus power); if the third output indicates that the voltage of the negative line interface 500 is higher than the preset first reference voltage (V... ref1 If the current state is shorted to the bus power supply (Short to Power 0X2A), then the current state of the Universal Serial Interface is shorted to the negative line.

[0108] If the third output result indicates that neither the positive line nor the negative line is short-circuited to the bus power supply, then the output voltage of the positive line detection unit 100 is switched to the power supply voltage (Vin), and the fourth output result of the comparison unit 300 is detected.

[0109] At this point, the voltage at the VSSN pin should be near-ground voltage (approximately 0V), and the voltage at the SENSE pin should be the supply voltage after voltage division by resistors. If correctly connected, the diode between the SENSE and VSSN pins will raise the VSSN pin voltage; if shorted or incorrectly connected, the VSSN pin voltage will be raised by the SENSE pin voltage; if reversed or open-circuited, the VSSN pin voltage will be near-ground voltage (approximately 0V). That is, if the fourth output result indicates that the voltage at the negative line interface 500 is higher than the preset first reference voltage (V... ref1 If the current general serial interface state is positive, shorted, or incorrectly connected, then the fourth output result indicates that the voltage of the negative line interface 500 is lower than the preset first reference voltage (V). ref1 If the current state of the universal serial interface is reversed or open, then the current state of the universal serial interface may be reversed or open.

[0110] Finally, the second and fourth output results are compared to determine the state of the universal serial interface as positive, open, reverse, short, or incorrect.

[0111] Specifically, if the second output indicates that the voltage at the positive line interface 400 is lower than the preset first reference voltage (V... ref1 Furthermore, the fourth output indicates that the voltage at the negative line interface 500 is lower than the preset first reference voltage (V). ref1If the second output indicates that the voltage of the positive line interface 400 is lower than the preset first reference voltage (V), then the current general serial interface state is open; ref1 Furthermore, the fourth output indicates that the voltage at the negative line interface 500 is higher than the preset first reference voltage (V). ref1 If the second output indicates that the voltage of the positive line interface 400 is higher than the preset first reference voltage (V), then the current general serial interface state is positive; ref1 Furthermore, the fourth output indicates that the voltage at the negative line interface 500 is lower than the preset first reference voltage (V). ref1 If the second output indicates that the voltage of the positive line interface 400 is higher than the preset first reference voltage (V), then the current general serial interface state is reversed; ref1 Furthermore, the fourth output indicates that the voltage at the negative line interface 500 is higher than the preset first reference voltage (V). ref1 If the current state of the universal serial interface is short-circuited or incorrectly connected, the difference between the positive line interface voltage 400 and the negative line interface voltage 500 can be further calculated. If the difference is less than the second reference voltage (V... ref2 If the difference between the two is greater than or equal to the second reference voltage (V), then the current general serial interface state is shorted; ref2 If the connection is incorrect, then the current state of the general serial interface is incorrect.

[0112] Therefore, in this embodiment, the positive line detection unit and the ground network detection unit dynamically switch their output voltages based on preset rules. Combined with the comparison unit's precise comparison of multiple voltage signals, this enables refined differentiation of complex fault types and identification of different connection states of the universal serial interface. This solves the problem that traditional status diagnostic schemes can only identify whether an interruption has occurred, leading to difficulties in fault location. Furthermore, the status diagnostic circuit provided in this embodiment can identify anomalies such as short circuits to ground or short circuits to the bus power supply. In the short-circuit state, it directly outputs the corresponding status signal, employing an implicit logic of diagnosis before power supply. This avoids the formation of a current path before the fault is resolved, thereby preventing chip burnout due to overcurrent and significantly improving fault diagnosis efficiency and the communication reliability of the universal serial interface.

[0113] See Figure 2 The figure is a structural diagram of a positive line detection unit provided in an embodiment of this application. The positive line detection unit 100 includes: a first power supply terminal 110 connected to the local power supply, a first NMOS transistor 121, a second NMOS transistor 122, a first PMOS transistor 131, an AND gate 140, a first NOT gate 150, a first signal input terminal 161, and a second signal input terminal 162.

[0114] The first signal input terminal 161 is connected to the first input terminal of AND gate 140; the second signal input terminal 162 is connected to the input terminal of the first NOT gate 150 and the gate of the first NMOS transistor 121; the output terminal of the first NOT gate 150 is connected to the second input terminal of AND gate 140; the output terminal of AND gate 140 is connected to the gate of the second NMOS transistor 122; the first power supply terminal 110 is connected to the source and gate of the first PMOS transistor 131 and the drain of the second NMOS transistor 122; the drain of the first PMOS transistor 131 is connected to the drain of the first NMOS transistor 121 and the output terminal of the positive line detection unit 100; the source of the first NMOS transistor 121 and the source of the second NMOS transistor 122 are grounded.

[0115] The input signal of the first signal input terminal 161 is Da_sense_IP_EN; the input signal of the second signal input terminal 162 is Da_sense_pd_assit.

[0116] When Da_sense_IP_EN=1, Da_sense_pd_assit=0, the output signal of AND gate 140 is 1, the first NMOS transistor 121 is turned off, the second NMOS transistor 122 is turned on, the first PMOS transistor is turned on, and the output voltage of the positive line detection unit 100 is the supply voltage (Vin). When the positive line detection unit 100 is pulled down, Da_sense_IP_EN switches from 1 to 0. At this time, Da_sense_pd_assit can be briefly pulled up to 1 to help the output voltage of the positive line detection unit 100 quickly drop, and then Da_sense_pd_assit=0 is restored, the output signal of AND gate 140 is 0, the first NMOS transistor 121 is turned off, the second NMOS transistor 122 is turned off, the first PMOS transistor is turned off, and the output voltage of the positive line detection unit 100 is the near-ground voltage (approximately 0V).

[0117] That is: when Da_sense_IP_EN=1, the positive line detection unit 100 outputs the supply voltage (Vin); when Da_sense_IP_EN=0, the positive line detection unit 100 outputs the near-ground voltage (approximately 0V).

[0118] See Figure 3 The figure is a structural diagram of a negative line detection unit provided in an embodiment of this application. The negative line detection unit 200 includes: a second power supply terminal 210 connected to the local power supply, a third NMOS transistor 223, a second PMOS transistor 232, and a third signal input terminal 263.

[0119] The third signal input terminal 263 is connected to the gate of the third NMOS transistor 223; the second power supply terminal 210 is connected to the source and gate of the second PMOS transistor 232 and the drain of the third NMOS transistor 223; the drain of the second PMOS transistor 232 is connected to the output terminal of the negative line detection unit 200; and the source of the third NMOS transistor 223 is grounded.

[0120] The input signal of the third signal input terminal 263 is Da_vssn_IP_EN.

[0121] When Da_vssn_IP_EN=1, both the third NMOS transistor 223 and the second PMOS transistor 232 are turned on, and the output voltage of the negative line detection unit 200 is the supply voltage (Vin); when Da_vssn_IP_EN=0, both the third NMOS transistor 223 and the second PMOS transistor 232 are turned off, and the output voltage of the negative line detection unit 200 is the near-ground voltage (approximately 0V).

[0122] In one embodiment, the negative line detection unit 200 further includes a current driving module 600.

[0123] See Figure 4 The figure is a structural diagram of a current driving module provided in an embodiment of this application. The signal output terminal of the current driving module 600 can be connected to the output terminal of the negative line detection unit 200 to provide current based on a preset state diagnosis rule, so as to help pull down the voltage of the output terminal of the negative line detection unit 200.

[0124] Specifically, the current drive module 600 may include: a constant current source 610, a fifth NMOS transistor 625, and a fifth signal input terminal 665.

[0125] The first terminal of the constant current source 610 is connected to the output terminal of the negative line detection unit 200; the second terminal of the constant current source 610 is connected to the source of the fifth NMOS transistor 625; the drain of the fifth NMOS transistor 625 is grounded; and the fifth signal input terminal 665 is connected to the gate of the fifth NMOS transistor 625.

[0126] The input signal of the fifth signal input terminal 665 is Da_vssn_current_en.

[0127] When Da_vssn_IP_EN=0, Da_vssn_current_en can be briefly pulled up from 0 to 1, causing the fifth NMOS transistor 625 to conduct briefly, thereby helping to pull down the voltage at the output terminal of the negative line detection unit 200.

[0128] See Figure 5The figure is a structural diagram of a comparison unit provided in an embodiment of this application. The comparison unit 300 includes: a first differential amplifier circuit 311, a second differential amplifier circuit 312, a first differential voltage comparator 321, a second differential voltage comparator 322, a third comparator 323, a fourth comparator 324, and an OR gate 330.

[0129] The positive input terminal of the first differential amplifier circuit 311, the negative input terminal of the second differential amplifier circuit 312, and the positive input terminal of the third comparator 323 are the positive line input terminals in the comparison unit 300. The negative input terminal of the first differential amplifier circuit 311, the positive input terminal of the second differential amplifier circuit 312, and the positive input terminal of the fourth comparator 324 are the negative line input terminals in the comparison unit 300.

[0130] Specifically, the positive input terminal of the first differential amplifier circuit 311, the negative input terminal of the second differential amplifier circuit 312, and the positive input terminal of the third comparator 323 are connected to the output terminal of the positive line detection unit 100; the negative input terminal of the first differential amplifier circuit 311, the positive input terminal of the second differential amplifier circuit 312, and the positive input terminal of the fourth comparator 324 are connected to the output terminal of the negative line detection unit 200.

[0131] The output of the first differential amplifier circuit 311 is connected to the non-inverting input of the first differential voltage comparator 321; the output of the second differential amplifier circuit 312 is connected to the non-inverting input of the second differential voltage comparator 322; the negative inputs of the third comparator 323 and the fourth comparator 324 are connected to the first reference voltage (V). ref1 The negative input terminals of the first differential voltage comparator 321 and the second differential voltage comparator 322 are connected to the second reference voltage (V). ref2 The output of the first differential pressure comparator 321 is connected to the first input of the OR gate 330, and the output of the second differential pressure comparator 322 is connected to the second input of the OR gate 330.

[0132] The first differential amplifier circuit 311 is used to amplify the difference between the voltage of the SENSE pin and the voltage of the VSSN pin, and the second differential amplifier circuit 322 is used to amplify the difference between the voltage of the VSSN pin and the voltage of the SENSE pin.

[0133] The first differential voltage comparator 321 is used to compare the output voltage of the first differential amplifier circuit 311 with the second reference voltage (V). ref2 The output voltage of the first differential amplifier circuit 311 is greater than or equal to the second reference voltage (V). ref2 The output is 1 when the voltage at the output of the first differential amplifier circuit 311 is less than the second reference voltage (V). ref2 The output will be 0 if the condition is met.

[0134] The second differential voltage comparator 322 is used to compare the output voltage of the second differential amplifier circuit 312 with the second reference voltage (V). ref2 The output voltage of the second differential amplifier circuit 312 is greater than or equal to the second reference voltage (V). ref2 When the output voltage of the second differential amplifier circuit 312 is less than the second reference voltage (V), the output voltage is 1. ref2 The output will be 0 if the condition is met.

[0135] The output signal of the OR gate is sub_comp_out. When either the output signal of the first differential pressure comparator 321 or the second differential pressure comparator 322 is 1, sub_comp_out = 1; when both the output signals of the first differential pressure comparator 321 and the second differential pressure comparator 322 are 0, sub_comp_out = 0.

[0136] The third comparator 323 is used to compare the voltage at the SENSE pin with the first reference voltage (V). ref1 The output signal is sense_comp_out. When the voltage at the SENSE pin is greater than or equal to the first reference voltage (V... ref1 In the case of ), sense_comp_out=1; when the voltage at the SENSE pin is less than the first reference voltage (V ref1 In the case of ), sense_comp_out=0.

[0137] The fourth comparator 324 is used to compare the voltage at the VSSN pin with the first reference voltage (V). ref1 The output signal is vssn_comp_out. This occurs when the voltage at the VSSN pin is greater than or equal to the first reference voltage (V). ref1 In the case of ), vssn_comp_out=1; when the voltage at the VSSN pin is less than the first reference voltage (V ref1 In the case of ), vssn_comp_out=0.

[0138] In one embodiment, the status diagnostic circuit of the universal serial interface further includes a power supply unit 800. The output of the power supply unit 800 is connected to the positive line interface and is used to switch the output voltage to the supply voltage (Vin) based on a preset status diagnostic rule, so as to help pull up the positive line interface voltage.

[0139] Specifically, see Figure 6 The figure is a structural diagram of a power supply unit provided in an embodiment of this application. The power supply unit 800 includes: a third power supply terminal 810 connected to the local power supply, a fourth NMOS transistor 824, a third PMOS transistor 833, a second NOT gate 840, and a fourth signal input terminal 864.

[0140] The fourth signal input terminal 864 is connected to the input terminal of the second NOT gate 840; the output terminal of the second NOT gate 840 is connected to the gate of the fourth NMOS transistor 824; the third power supply terminal 810 is connected to the source and gate of the third PMOS transistor 833 and the drain of the fourth NMOS transistor 824 respectively; the drain of the third PMOS transistor 833 is connected to the output terminal of the power supply unit 800; and the source of the fourth NMOS transistor 824 is grounded.

[0141] The input signal of the fourth signal input terminal 864 is Da_SWP.

[0142] When Da_sense_IP_EN switches from 0 to 1, Da_SWP can be briefly switched from 0 to 0, thereby briefly turning on the fourth NMOS transistor 824 and the third PMOS transistor 833, which can help pull up the positive line interface voltage.

[0143] See Figure 7 This figure is a signal timing diagram provided in an embodiment of this application. The default initial setting can be the signal state corresponding to step 0, that is, Da_sense_IP_EN=1, Da_sense_pd_assist=0, Da_vssn_IP_EN=1, Da_vssn_current_en=0, Da_SWP=1. The output voltages of the positive line detection unit 100 and the negative line detection unit 200 are both the supply voltage, and this state is maintained when step 1 is executed. The first output result of the detection comparison unit 300 is detected to determine whether there is a short circuit to ground.

[0144] Then, step 2 is executed, Da_sense_IP_EN is switched to 0, Da_sense_pd_assist is briefly pulled up, the output voltage of the positive line detection unit 100 is switched to the near-ground voltage, and the second output result of the comparison unit 300 is detected to determine that the universal serial interface may be in one or more states at this time.

[0145] Next, step 3 is executed, Da_vssn_IP_EN is switched to 0, Da_sense_pd_assist and Da_vssn_current_en are briefly pulled up, the output voltage of the negative line detection unit 200 is switched to the near-ground voltage, and the third output result of the comparison unit 300 is detected to determine whether there is a short circuit to the bus power supply.

[0146] Finally, step 4 is executed, Da_sense_IP_EN is switched to 1, Da_vssn_current_en is briefly pulled up, Da_SWP is briefly pulled down, the output voltage of the positive line detection unit 100 is switched to the power supply voltage, the fourth output result of the comparison unit 300 is detected, and the state of the universal serial interface is finally determined by combining the second output result.

[0147] Understandably, the duration of each signal can be flexibly configured based on actual needs to adapt to different application scenarios.

[0148] In one embodiment, such as Figure 8 As shown, the output terminal of the positive line detection unit 100 and the non-inverting input terminal of the first differential amplifier circuit 311 are grounded through the first drain resistor 710; the output terminal of the negative line detection unit 200 and the non-inverting input terminal of the second differential amplifier circuit 312 are grounded through the second drain resistor 720.

[0149] In the positive line detection unit 100, resistors are connected between the first power supply terminal 110 and the source of the first PMOS transistor 131, between the source and gate of the first PMOS transistor 131, the drain of the first PMOS transistor 131, the drain of the first NMOS transistor 121, and the drain of the second NMOS transistor 122.

[0150] In the negative line detection unit 200, resistors are connected between the second power supply terminal 210 and the source of the second PMOS transistor 232, between the source and gate of the second PMOS transistor 232, the drain of the second PMOS transistor 232, and the drain of the third NMOS transistor 223.

[0151] In the power supply unit 800, a resistor is connected between the third power supply terminal 810 and the drain of the fourth NMOS transistor 824.

[0152] See Figure 9 The figure is a flowchart of a status diagnosis method for a universal serial interface provided in an embodiment of this application. This method is applied to the status diagnosis circuit of the universal serial interface provided in any of the above embodiments, and includes:

[0153] S901: Control the output voltage of both the positive line detection unit and the negative line detection unit to be the power supply voltage, and detect the first output result of the comparison unit; if the first output result indicates that neither the positive line nor the negative line is short-circuited to ground, then execute step S902; otherwise, based on the first output result, output the general serial interface status of whether the positive line is short-circuited to ground or the negative line is short-circuited to ground.

[0154] Specifically, a local power supply can be used to control the output voltage of both the positive line detection unit and the negative line detection unit to be the power supply voltage. The comparison value sense_comp_out between the positive line interface voltage and the first reference voltage, and the comparison value vssn_comp_out between the negative line interface voltage and the first reference voltage are detected to obtain the first output result of the comparison unit.

[0155] When using bus power supply, if neither the SENSE pin nor the VSSN pin is shorted to ground, the voltage at the output of both the positive line detection unit and the negative line detection unit will be the power supply voltage.

[0156] See Figure 10 This figure is a schematic diagram of an abnormal state of a universal serial interface provided in an embodiment of this application. If the current state is equivalent to both switches S1 and S2 being open, then sense_comp_out=1 and vssn_comp_out=1; if it is equivalent to switch S1 being closed, then the SENSE pin is shorted to ground, sense_comp_out=0, and the output universal serial interface state is short to ground 0X09; if it is equivalent to switch S2 being closed, then the VSSN pin is shorted to ground, vssn_comp_out=0, and the output universal serial interface state is short to ground 0X29.

[0157] If the first output result cannot directly determine the status diagnosis result, execute step S902.

[0158] Optionally, the voltage range of the supply voltage can be detected before the first output result of the detection comparison unit 300.

[0159] For example, if 5.4V is selected as the reference threshold, and the input voltage reference selection signal vin_vref_sel=0 and the output signal after voltage division comparison ad_vin_div_comp_out=0, then it can be determined that the supply voltage Vin < 5.4V; if vin_vref_sel=1 and ad_vin_div_comp_out=0, then it can be determined that 5.4V ≤ Vin < 7.2V; if ad_vin_div_comp_out=1, then it can be determined that Vin ≥ 7.2V.

[0160] Furthermore, on the one hand, the voltage division ratio between Vin and the positive line interface voltage and the negative line interface voltage (pad input voltage) can be adjusted according to the voltage range of Vin.

[0161] For example, if Vin < 5.4V, a higher first voltage division ratio can be set, such as 0.5. This way, even at a low voltage of Vin = 3.7V, the pad input voltage can still be 1.2V, thus avoiding the comparator's inability to distinguish between normal low voltage and fault low voltage due to an excessively low sampling voltage. If 5.4V ≤ Vin < 7.2V, a slightly lower second voltage division ratio can be set, such as 0.375. This avoids both excessively low and excessively high sampling voltages that could exceed the comparator threshold. If Vin ≥ 7.2V, an even lower third voltage division ratio can be set, such as 0.3. This way, even at a high voltage of Vin = 12V, the pad input voltage is 3V, which is still within the comparator's safe range, thus making the output of the comparator unit 300 more accurate.

[0162] On the other hand, the first and second reference voltages in the comparison unit 300 can be dynamically adjusted according to the voltage range of Vin. The first reference voltage is used for comparison with the positive and / or negative line interface voltages, and the second reference voltage is used for comparison with the difference between the positive and negative line interface voltages. Therefore, in the event of input voltage fluctuations, the first and second reference voltages in the comparison unit 300 can be adaptively adjusted to improve detection accuracy through a wide voltage adaptive mechanism, reduce misjudgments caused by voltage fluctuations in the input comparison unit 300, and improve the circuit's environmental adaptability.

[0163] As an example, to further improve the accuracy of condition diagnosis results, ambient temperature can be collected by devices such as digital temperature sensors. Based on the ambient temperature, compensation methods such as lookup tables can be used to compensate for the first and second reference voltages determined according to the voltage range and voltage division ratio. This allows the fault threshold to be automatically calibrated with temperature, thereby maintaining the accuracy of condition diagnosis results in environments such as -40℃ to 150℃ and reducing frequent false alarms caused by temperature drift.

[0164] S902: Switch the output voltage of the positive line detection unit to the near-ground voltage and detect the second output result of the comparison unit.

[0165] For example, see Figure 11 This figure is a schematic diagram of abnormal states of various universal serial interfaces provided in the embodiments of this application. In this step, the output voltage of the positive line detection unit is switched to the near-ground voltage.

[0166] When powered by local power, the comparison value between the positive line interface voltage and the first reference voltage is detected to obtain the second output result of the comparison unit.

[0167] Specifically, in the case of reverse connection, the voltage of the SENSE pin will be too high due to the diode. In the case of short circuit or incorrect connection, the voltage of the SENSE pin will also be raised, thus the second output result sense_comp_out=1 will be detected. In the case of positive connection or open circuit, the SENSE pin will maintain a near-ground voltage, thus the second output result sense_comp_out=0 will be detected.

[0168] When powered by the bus power supply, the comparison value between the positive line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the second output result of the comparison unit.

[0169] Specifically, when powered by the bus power supply, the SENSE pin voltage will remain near ground only in the open circuit condition. That is, if the second output result sense_comp_out=0 is detected, it can be directly determined as an open circuit.

[0170] If the second output result `sense_comp_out=1`, the difference between the positive and negative line interface voltages is further compared with the second reference voltage, resulting in the value `sub_comp_out`. Specifically, in the case of a positive or short circuit, the voltage at the SENSE pin is close to the voltage at the VSSN pin; while in the case of a reverse or incorrect connection, there will be a large voltage difference between the SENSE pin and the VSSN pin. That is, if `sub_comp_out=0`, it indicates a positive or short circuit; if `sub_comp_out=1`, it indicates a reverse or incorrect connection.

[0171] If the second output result cannot directly determine the status diagnosis result, execute step S903.

[0172] S903: Switch the output voltage of the negative line detection unit to the near-ground voltage and detect the third output result of the comparison unit; if the third output result indicates that neither the positive line nor the negative line is short-circuited to the bus power supply, then execute step S904; otherwise, based on the third output result, output the general serial interface status of whether the positive line is short-circuited to the bus power supply or the negative line is short-circuited to the bus power supply.

[0173] For example, see Figure 12 This figure is a schematic diagram of an abnormal state of another universal serial interface provided in an embodiment of this application. In this step, the output voltage of the negative line detection unit is switched to the near-ground voltage.

[0174] When powered by local power, the comparison value between the positive line interface voltage and the first reference voltage is detected, and the comparison value between the negative line interface voltage and the first reference voltage is detected, to obtain the third output result of the comparison unit.

[0175] Specifically, at this time, the voltage of the SENSE pin and the voltage of the VSSN pin are theoretically both 0. Sense_comp_out and vssn_comp_out are detected. If sense_comp_out = 1, or sense_comp_out = 1 and vssn_comp_out = 1, then it can be considered that the current state is equivalent to switch S1 being closed, and the Universal Serial Interface (USB) state is short-circuited to the bus power supply (Short to Power 0X0A). If sense_comp_out = 0 and vssn_comp_out = 1, then it can be considered that the current state is equivalent to switch S2 being closed, and the USB state is short-circuited to the bus power supply (Short to Power 0X2A).

[0176] When powered by the bus power supply, the comparison value between the positive line interface voltage and the first reference voltage or the negative line interface voltage and the first reference voltage, as well as the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage, are detected to obtain the third output result of the comparison unit.

[0177] Specifically, if sense_comp_out=1 and vssn_comp_out=0, it can be considered that the current state is equivalent to switch S1 being closed, and the general serial interface state is short-to-power 0X0A on the positive line; if sense_comp_out=0 and vssn_comp_out=1, it can be considered that the current state is equivalent to switch S2 being closed, and the general serial interface state is short-to-power 0X2A on the negative line.

[0178] If sense_comp_out=1 and vssn_comp_out=1, then when sub_comp_out=0, it can be considered that the current state is equivalent to switch S2 being closed, and the general serial interface state is that the negative line is short-circuited to the bus power supply (Short to Power 0X2A). When sub_comp_out=1, it can be considered that the current state is equivalent to switch S1 being closed, and the general serial interface state is that the positive line is short-circuited to the bus power supply (Short to Power 0X0A).

[0179] If the third output result cannot directly determine the state diagnosis result, such as when sense_comp_out=0 and vssn_comp_out=0, execute step S904.

[0180] S904: Switch the output voltage of the positive line detection unit to the power supply voltage and detect the fourth output result of the comparison unit.

[0181] In this step, the output voltage of the positive line detection unit is switched to the supply voltage, that is, the output of the positive line detection unit is made to the first supply voltage, and the output of the positive line detection unit is made to the source of the first NMOS transistor.

[0182] When powered by local power, the comparison value between the negative line interface voltage and the first reference voltage is detected to obtain the fourth output result of the comparison unit.

[0183] Specifically, if the connection is normal, the voltage of the VSSN pin will be raised by the diode, and the fourth output result is vssn_comp_out=1; if it is shorted or incorrectly connected, the voltage of the VSSN pin will be raised by the pull-up of the SENSE pin, and the fourth output result is vssn_comp_out=1; if it is reversed or open, the voltage of the VSSN pin will be near ground, and the fourth output result is vssn_comp_out=0.

[0184] When powered by the bus power supply, the comparison value between the negative line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the fourth output result of the comparison unit.

[0185] Specifically, when powered by the bus power supply, the VSSN pin voltage will remain near ground only in the open circuit condition. That is, if the fourth output result vssn_comp_out=0 is detected, it can be directly determined as an open circuit.

[0186] If the fourth output result, `vssn_comp_out=1`, further checks the difference between the positive and negative line interface voltages and the comparison value `sub_comp_out` with the second reference voltage. Specifically, in the case of reverse connection or short circuit, the voltage at the SENSE pin is close to the voltage at the VSSN pin; while in the case of correct connection or incorrect connection, the voltage at the SENSE pin and the VSSN pin will have a larger voltage difference. That is, if `sub_comp_out=0`, it indicates reverse connection or short circuit; if `sub_comp_out=1`, it indicates correct connection or incorrect connection.

[0187] If the fourth output result cannot directly determine the status diagnosis result, execute step S905.

[0188] For example, before executing steps S902 to S904, it is possible to first select whether to use local power supply or bus power supply based on the node type corresponding to the universal serial interface, and then execute the corresponding judgment logic according to the output result of the comparison unit 300. Specifically, if the universal serial interface corresponds to a master node, local power supply is started; if the universal serial interface corresponds to a slave node, either local power supply or bus power supply can be started.

[0189] S905: Compare the second output result with the fourth output result to determine the state of the universal serial interface as positive, open, reverse, short, or incorrect.

[0190] Specifically, see Figure 13 When powered by local power, if the second output result is sense_comp_out=0 and the fourth output result is vssn_comp_out=0, the Universal Serial Interface (USB) state can be determined to be open. If the second output result is sense_comp_out=0 and the fourth output result is vssn_comp_out=1, the USB state can be determined to be connected correctly. If the second output result is sense_comp_out=1 and the fourth output result is vssn_comp_out=0, the USB state can be determined to be connected in reverse. If the second output result is sense_comp_out=1 and the fourth output result is vssn_comp_out=1, the USB state can be determined to be shorted or incorrectly connected. In this case, the result of sub_comp_out can be used for further judgment. That is, if sub_comp_out=0, it is shorted; if sub_comp_out=1, it is incorrectly connected.

[0191] See Figure 14 When powered by the bus power supply, if both the second and fourth output results sub_comp_out = 0, the Universal Serial Interface (USB) state is shorted; if both the second and fourth output results sub_comp_out = 1, the USB is connected correctly; if both the second and fourth output results sub_comp_out = 1, the USB is connected in reverse; and if both the second and fourth output results sub_comp_out = 1, the USB is connected incorrectly.

[0192] In this embodiment, power supply is prohibited when the Universal Serial Interface (USB) status is not determined to be positive. Power supply is then started after the determination result in step S805 indicates that the USB status is positive, so as to completely block the abnormal circuit path in the short circuit scenario.

[0193] Therefore, in this embodiment, the positive line detection unit and the ground network detection unit dynamically switch the output voltage based on preset rules. With the comparison unit's accurate comparison of multiple voltage signals and the comparison logic provided by this solution, complex fault types can be finely distinguished. Different connection states of the universal serial interface, including positive connection, reverse connection, incorrect connection, short circuit, short circuit to ground, and short circuit to bus power supply, can be identified. This solves the problem that traditional status diagnosis schemes can only identify whether there is an interruption, which makes fault location difficult. With the implicit logic of diagnosis before power supply, current paths are avoided before the fault is eliminated, thereby avoiding chip burnout due to overcurrent. This greatly improves the efficiency of fault diagnosis and the communication reliability of the universal serial interface.

[0194] It should be noted that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. The structural embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separate. The components indicated as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0195] The above description is merely one specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A status diagnostic circuit for a universal serial interface, characterized in that, The circuit includes: a positive line detection unit, a negative line detection unit, and a comparison unit; The output of the positive line detection unit is connected to the positive line input and the positive line interface in the comparison unit, respectively. The output of the negative line detection unit is connected to the negative line input and the negative line interface in the comparison unit, respectively. The positive line detection unit and the negative line detection unit are used to control their respective output voltages to switch between the supply voltage and the near-ground voltage based on preset state diagnosis rules. The comparison unit is used to compare the voltage of the positive line interface, the voltage of the negative line interface, and a preset reference voltage based on the output voltages provided by the positive line detection unit and the negative line detection unit, respectively; the output result of the comparison unit is used to determine the state of the universal serial interface. When the output voltages of the positive line detection unit and the negative line detection unit are both the supply voltage, if the first output result of the comparison unit indicates that neither the positive line nor the negative line is short-circuited to ground, then the output voltage of the positive line detection unit is switched to the near-ground voltage, and the second output result of the comparison unit is detected; otherwise, based on the first output result, the general serial interface status of whether the positive line is short-circuited to ground or the negative line is short-circuited to ground is output. The output voltage of the negative line detection unit is switched to near-ground voltage. If the third output result of the comparison unit indicates that neither the positive nor the negative line is short-circuited to the bus power supply, the output voltage of the positive line detection unit is switched to the supply voltage. The fourth output result of the comparison unit is detected, and based on the second output result and the fourth output result, the general serial interface status is determined to be positive, open, reverse, short-circuited, or incorrectly connected. Otherwise, based on the third output result, the general serial interface status of either the positive line short-circuited to the bus power supply or the negative line short-circuited to the bus power supply is output.

2. The circuit according to claim 1, characterized in that, The positive line detection unit includes: a first power supply terminal connected to the local power supply, a first NMOS transistor, a second NMOS transistor, a first PMOS transistor, an AND gate, a first NOT gate, a first signal input terminal, and a second signal input terminal; The first signal input terminal is connected to the first input terminal of the AND gate; The second signal input terminal is connected to the input terminal of the first NOT gate and the gate of the first NMOS transistor, respectively; The output of the first NOT gate is connected to the second input of the AND gate; The output of the AND gate is connected to the gate of the second NMOS transistor; The first power supply terminal is connected to the source and gate of the first PMOS transistor and the drain of the second NMOS transistor; The drain of the first PMOS transistor is connected to the drain of the first NMOS transistor and the output terminal of the positive line detection unit, respectively. The source of the first NMOS transistor and the source of the second NMOS transistor are grounded.

3. The circuit according to claim 1, characterized in that, The negative line detection unit includes: a second power supply terminal connected to the local power supply, a third NMOS transistor, a second PMOS transistor, and a third signal input terminal; The third signal input terminal is connected to the gate of the third NMOS transistor; The second power supply terminal is connected to the source and gate of the second PMOS transistor and the drain of the third NMOS transistor; The drain of the second PMOS transistor is connected to the output terminal of the negative line detection unit; The source of the third NMOS transistor is grounded.

4. The circuit according to claim 3, characterized in that, The negative line detection unit further includes: a current driving module; The signal output terminal of the current drive module is connected to the output terminal of the negative line detection unit, and is used to provide current based on preset state diagnosis rules to help pull down the voltage at the output terminal of the negative line detection unit.

5. The circuit according to claim 1, characterized in that, The comparison unit includes: a first differential amplifier circuit, a second differential amplifier circuit, a first differential voltage comparator, a second differential voltage comparator, a third comparator, a fourth comparator, and an OR gate; The positive input terminal of the first differential amplifier circuit, the negative input terminal of the second differential amplifier circuit, and the positive input terminal of the third comparator are connected to the output terminal of the positive line detection unit. The negative input terminal of the first differential amplifier circuit, the positive input terminal of the second differential amplifier circuit, and the positive input terminal of the fourth comparator are connected to the output terminal of the negative line detection unit. The output of the first differential amplifier circuit is connected to the non-inverting input of the first differential voltage comparator; The output of the second differential amplifier circuit is connected to the non-inverting input of the second differential voltage comparator; The negative phase input terminals of the third comparator and the fourth comparator are connected to the first reference voltage, and the negative phase input terminals of the first differential voltage comparator and the second differential voltage comparator are connected to the second reference voltage. The output of the first differential pressure comparator is connected to the first input of the OR gate, and the output of the second differential pressure comparator is connected to the second input of the OR gate.

6. The circuit according to claim 5, characterized in that, The circuit also includes a first drain resistor and a second drain resistor; The output terminal of the positive line detection unit and the non-inverting input terminal of the first differential amplifier circuit are grounded through a first drain resistor; the output terminal of the negative line detection unit and the non-inverting input terminal of the second differential amplifier circuit are grounded through a second drain resistor.

7. The circuit according to claim 1, characterized in that, The circuit also includes: a power supply unit; The output terminal of the power supply unit is connected to the positive line interface; The power supply unit is used to switch the output voltage to the power supply voltage based on preset state diagnosis rules, so as to help pull up the positive line interface voltage.

8. The circuit according to claim 7, characterized in that, The power supply unit includes: a third power supply terminal connected to the local power supply, a fourth NMOS transistor, a third PMOS transistor, a second NOT gate, and a fourth signal input terminal; The fourth signal input terminal is connected to the input terminal of the second NOT gate; The output of the second NOT gate is connected to the gate of the fourth NMOS transistor; The third power supply terminal is connected to the source and gate of the third PMOS transistor and the drain of the fourth NMOS transistor, respectively. The drain of the third PMOS transistor is connected to the output terminal of the power supply unit; The source of the fourth NMOS transistor is grounded.

9. A method for diagnosing the status of a universal serial interface, characterized in that, The method is applied to the status diagnostic circuit of the universal serial interface provided in any one of claims 1 to 8, and the method includes: The output voltages of both the positive line detection unit and the negative line detection unit are controlled to be the power supply voltage, and the first output result of the comparison unit is detected. If the first output result indicates that neither the positive line nor the negative line is short-circuited to ground, then the output voltage of the positive line detection unit is switched to the near-ground voltage, and the second output result of the comparison unit is detected; otherwise, based on the first output result, the general serial interface status of whether the positive line is short-circuited to ground or the negative line is short-circuited to ground is output. The output voltage of the negative line detection unit is switched to the near-ground voltage, and the third output result of the comparison unit is detected. If the third output result indicates that neither the positive line nor the negative line is short-circuited to the bus power supply, then the output voltage of the positive line detection unit is switched to the power supply voltage, and the fourth output result of the comparison unit is detected; otherwise, based on the third output result, the general serial interface status of either the positive line being short-circuited to the bus power supply or the negative line being short-circuited to the bus power supply is output. Compare the second output result with the fourth output result to determine the state of the universal serial interface as positive, open, reverse, short, or incorrect.

10. The method according to claim 9, characterized in that, The method further includes, before detecting the first output result of the comparison unit, ensuring that the output voltages of both the positive line detection unit and the negative line detection unit are the supply voltage, that the output voltages of both units are the supply voltage. Determine the node type corresponding to the Universal Serial Interface; If the universal serial interface corresponds to a master node, then local power supply is activated; if the universal serial interface corresponds to a slave node, then either local power supply or bus power supply is activated.

11. The method according to claim 9, characterized in that, The method further includes, before detecting the first output result of the comparison unit, ensuring that the output voltages of both the positive line detection unit and the negative line detection unit are the supply voltage, that the output voltages of both units are the supply voltage. Detect the voltage range of the supply voltage; Based on the voltage range, determine the voltage division ratio between the supply voltage and the positive line interface voltage and the negative line interface voltage.

12. The method according to claim 11, characterized in that, After determining the voltage division ratio of the supply voltage to the positive line interface voltage and the negative line interface voltage based on the voltage range, the method further includes: Collect ambient temperature; Based on the ambient temperature, the voltage range, and the voltage division ratio, a first reference voltage and a second reference voltage are determined in the comparison unit; the first reference voltage is used to compare with the positive line interface voltage and / or the negative line interface voltage, and the second reference voltage is used to compare with the difference between the positive line interface voltage and the negative line interface voltage.

13. The method according to claim 9, characterized in that, The output voltages of both the positive line detection unit and the negative line detection unit are controlled to be the supply voltage. The first output result of the comparison unit is detected, including: The output voltages of both the positive line detection unit and the negative line detection unit are controlled to be the supply voltage. The comparison values ​​of the positive line interface voltage and the first reference voltage, as well as the comparison values ​​of the negative line interface voltage and the first reference voltage, are detected to obtain the first output result of the comparison unit.

14. The method according to claim 9, characterized in that, The step of switching the output voltage of the positive line detection unit to a near-ground voltage and detecting the second output result of the comparison unit includes: Switch the output voltage of the positive line detection unit to the near-ground voltage; When powered by local power, the comparison value between the positive line interface voltage and the first reference voltage is detected to obtain the second output result of the comparison unit; When powered by the bus power supply, the comparison value between the positive line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the second output result of the comparison unit.

15. The method according to claim 9, characterized in that, The step of switching the output voltage of the negative line detection unit to a near-ground voltage and detecting the third output result of the comparison unit includes: Switch the output voltage of the negative line detection unit to a near-ground voltage; When powered by local power, the comparison value between the positive line interface voltage and the first reference voltage is detected, and the comparison value between the negative line interface voltage and the first reference voltage is detected, to obtain the third output result of the comparison unit. When powered by the bus power supply, the comparison value between the positive line interface voltage and the first reference voltage, the comparison value between the negative line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the third output result of the comparison unit.

16. The method according to claim 9, characterized in that, The step of switching the output voltage of the positive line detection unit to the supply voltage and detecting the fourth output result of the comparison unit includes: Switch the output voltage of the positive line detection unit to the power supply voltage; When powered by local power, the comparison value between the negative line interface voltage and the first reference voltage is detected to obtain the fourth output result of the comparison unit; When powered by the bus power supply, the comparison value between the negative line interface voltage and the first reference voltage, and the comparison value between the difference between the positive line interface voltage and the negative line interface voltage and the second reference voltage are detected to obtain the fourth output result of the comparison unit.

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