Time service synchronous control method for multi-sensor system

Abstract

The invention relates to the technical field of time service synchronization, in particular to a multi-sensor system time service synchronization control method, which comprises the following steps of: acquiring pulse per second and positioning data through a serial port and an SPI (Serial Peripheral Interface), monitoring pulse stability, judging positioning effectiveness and generating an evaluation result; matching a priority extraction clock source to determine a target time service source, inputting the target time service source into a fitting algorithm to generate an alignment parameter, measuring a time difference, adjusting a trigger pulse to generate a calibration signal, and transmitting the calibration signal to a core processor to synchronously record a timestamp, calculate a difference value and confirm a time service or re-test certification state; according to the method, pulse stability and positioning mark cross judgment is performed to screen a time source, priority and fitting operation are performed to improve selection accuracy, triggering and reference pulse difference measurement are corrected and aligned step by step, calibration pulse feedback and threshold comparison are performed to construct a closed-loop mechanism, and the time reference is established. Abnormal signals are suppressed to guarantee consistency, multi-source synchronization is stable and continuous, and time drift caused by single-point fluctuation is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of time synchronization technology, in particular to a multi-sensor system time synchronization control method. BACKGROUND

[0002] The field of time synchronization technology involves unified and accurate management of system time in a multi-source information collection and processing environment. Its core includes using standard time signals to achieve system-level clock alignment, completing time transfer and distribution through networks or hardware links, and performing delay compensation and error correction in a multi-node or multi-device environment to ensure that multi-sensor, multi-terminal, and multi-systems operate cooperatively under the same time base. This field covers research and application in time source acquisition, time distribution, time maintenance, and time consistency control.

[0003] Among them, the traditional multi-sensor system time synchronization control method refers to the unified calibration of external reference time signals to ensure the consistency of multi-sensor data collection time when multiple types of sensors are used together. This includes obtaining standard time through GPS receivers and distributing it to sensor nodes, or transferring timestamps through IEEE1588 precision time protocol in local area networks for calibration, or using hardware trigger pulses such as PPS signals to align sensor collection clocks. External reference time sources or network transmission mechanisms are used to complete time control and synchronization of multi-sensor systems.

[0004] Existing technologies rely heavily on a single time reference for time distribution. When the signal is blocked or fluctuates, there is a lack of multi-dimensional effectiveness judgment, making it easy to continue to use incorrect references in abnormal signal conditions, causing system time reference to deviate. Fixed time distribution strategies cannot be flexibly adjusted according to source status, leading to synchronization imbalance under multi-node conditions. The lack of difference feedback in pulse trigger methods makes it difficult to detect alignment errors in a timely manner, and cumulative offset between nodes occurs during long-term operation, affecting the time accuracy and consistency of multi-source data. SUMMARY

[0005] To solve the technical problems of existing technologies that rely heavily on a single time reference for time distribution, lack of multi-dimensional effectiveness judgment when the signal is blocked or fluctuates, and easy to continue to use incorrect references in abnormal signal conditions, causing system time reference to deviate, fixed time distribution strategies cannot be flexibly adjusted according to source status, leading to synchronization imbalance under multi-node conditions, and the lack of difference feedback in pulse trigger methods makes it difficult to detect alignment errors in a timely manner, and cumulative offset between nodes occurs during long-term operation, affecting the time accuracy and consistency of multi-source data, the present application provides a multi-sensor system time synchronization control method, comprising the following steps: To achieve the above objectives, the present invention adopts the following technical solution: a multi-sensor system timing synchronization control method, comprising the following steps: S1: Acquire the second pulse signal sequence and positioning status data through the serial port and SPI interface, monitor the pulse stability parameters, perform logical judgment on the positioning validity flag in the positioning status data, and generate a validity evaluation result; S2: Based on the effectiveness evaluation results and the preset timing priority sequence, a matching operation is performed to extract the clock source number in sequence and compare it with the corresponding state value to determine the first target timing source that meets the effectiveness conditions. The result is then input into the least squares fitting algorithm for timing path optimization to generate clock alignment parameters. S3: Extract the corresponding clock source pulse signal according to the clock alignment parameters, measure the time difference between the pulse signal and the trigger pulse of the central controller itself, adjust the trigger pulse based on the calculation result, and generate a calibration trigger pulse; S4: The calibration trigger pulse is transmitted to the core processor through the hardware interface for internal clock synchronization. After receiving the feedback pulse, the timestamp is recorded and the difference between the timestamp and the expected timestamp is calculated. When the difference is lower than the set threshold, the time synchronization is confirmed to be successful. When the difference exceeds the threshold, the retry process is triggered to generate a synchronization verification status.

[0006] As a further aspect of the present invention, the effectiveness evaluation results include pulse stability index, positioning reliability level and timing availability indicator; the clock alignment parameters include time offset, frequency deviation and phase deviation; the calibration trigger pulse includes synchronization reference signal, time difference correction signal and central control reference signal; and the synchronization verification status includes threshold difference record, success confirmation mark and retry status indicator.

[0007] As a further aspect of the present invention, the specific steps of S1 are as follows: S101: Obtain the second pulse signal sequence through the serial port and SPI interface, perform difference calculation on the time edges of adjacent pulses, compare the difference amplitude with the pulse stability change threshold, record the index of amplitude that does not exceed the threshold, and generate a pulse interval stable index set. S102: Call the pulse interval stable index set, retrieve the corresponding data frame in the positioning status data, extract the positioning validity flag bit and compare the flag value with the positioning validity status set, record the index of the valid status and reorder it in time order to obtain the positioning status valid frame sequence index; S103: Based on the valid frame sequence index of the positioning status, aggregate the corresponding status fields in the original positioning status data, call the fields of the same time period to perform consistency comparison, and if all fields meet the consistency conditions, mark them as valid periods and establish validity evaluation results.

[0008] As a further aspect of the present invention, the specific steps of S2 are as follows: S201: Based on the effectiveness evaluation result, a matching operation is performed with the preset timing priority sequence to extract the clock source number and call the corresponding status value. The status value is compared with the effectiveness evaluation threshold. If the status value is within the threshold range, the number is recorded to generate a candidate clock source number set. S202: Retrieve the status value according to the candidate clock source number set and call the validity condition judgment threshold comparison to filter the first number whose status value is within the threshold allowable range and extract the clock source information to obtain the target time synchronization source information; S203: Call the target timing source information to input the least squares fitting operation path, perform matrix operations on the time difference vector and the fitting reference sequence, retrieve the residual terms and analyze the residual value change trend, adjust the fitting path coefficients based on the residual change trend, and obtain the clock alignment parameters.

[0009] As a further aspect of the present invention, the validity evaluation threshold is the numerical limit for determining whether a clock source state value enters the candidate clock source number set. The validity condition judgment threshold is the numerical limit for judging the target time source within the candidate clock source number set.

[0010] As a further aspect of the present invention, the specific steps of S3 are as follows: S301: Extract the corresponding clock source pulse signal according to the clock alignment parameters, collect the amplitude of the pulse signal in a continuous period, arrange the collection points in time order and establish an index table, combine the index table with the time series to generate a pulse sampling sequence; S302: Based on the timestamp data of the pulse sampling sequence and the trigger pulse of the central controller itself, the index position is retrieved within the same sampling period, the time difference between the two is calculated, and the time difference is mapped in order along the time axis to obtain the time difference distribution value; S303: The time difference distribution value is compared with the trigger pulse reference value of the central controller. The trigger pulse phase correction direction is determined according to the comparison result. The phase offset is calculated and the trigger pulse output state is adjusted to generate a calibration trigger pulse.

[0011] As a further aspect of the present invention, the specific steps of S4 are as follows: S401: Based on the calibration trigger pulse and feedback pulse received by the core processor, the edge position of the feedback pulse is retrieved in the hardware interface and the arrival time parameter is extracted. The time parameter is compared with the internal clock reference value to obtain the feedback pulse timestamp. S402: Call the feedback pulse timestamp and the preset expected timestamp, calculate the difference between their numerical parameters, compare the difference with the synchronization judgment threshold, mark the time synchronization within the threshold range, mark the time offset outside the threshold range, and obtain the time difference judgment status. S403: Based on the determination result of the time difference determination status, record the success flag in the time synchronization status, trigger the retry process and update the status flag in the time offset status to obtain the synchronization verification status.

[0012] As a further aspect of the present invention, the synchronization determination threshold is a time parameter representing the allowable deviation range between the feedback pulse timestamp and the desired timestamp; The timing difference determination status is the status information marked by the comparison result of the difference between the feedback pulse timestamp and the expected timestamp relative to the synchronization determination threshold.

[0013] As a further aspect of the present invention, the method further includes step S5: S5: Using the aforementioned synchronization verification state as a benchmark, a unified trigger signal is sent to the sensor node via the TTL and RS-422 hardware interfaces. A Kalman filter algorithm is used to compensate for time drift and establish a unified time benchmark for the multi-sensor system. The unified time base includes a global timestamp, clock drift compensation, and cross-node synchronization identifier.

[0014] As a further aspect of the present invention, the specific steps of S5 are as follows: S501: Using the aforementioned synchronization verification state as a unified benchmark, trigger signals are sent to the sensor nodes via the TTL and RS-422 hardware interfaces. The pulse edge positions are recorded and sorted sequentially to generate a trigger time sequence. S502: Based on the trigger time sequence, perform differential operation on adjacent time intervals, fit the drift amount sequence, compare it with the reference trigger interval value, perform time correction based on the difference, and calculate the compensation set to obtain the drift compensation parameter set. S503: Call the drift compensation parameter set, weight and superimpose the compensation parameters with the trigger time sequence of the node item by item, so that the drift time values ​​are rearranged under the reference interval and unified indexed to establish a unified time reference for the multi-sensor system.

[0015] Compared with the prior art, the advantages and positive effects of the present invention are as follows: In this invention, real-time filtering of time source availability is achieved by cross-judging pulse stability parameters and positioning status flags. The accuracy of clock source selection is improved based on priority order and fitting calculation. A progressively corrected alignment method is formed in the time difference measurement between the trigger pulse and the reference pulse. A repeatable and verifiable closed-loop mechanism is constructed by combining calibration pulse feedback and difference threshold comparison to ensure the ability to suppress abnormal signals during time synchronization, improve the consistency of trigger rhythm and internal clock, and enable stable and continuous synchronization in multi-source environments, reducing the overall time drift caused by single-point fluctuations. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the steps of the present invention; Figure 2 This is a detailed schematic diagram of S1 of the present invention; Figure 3 This is a detailed schematic diagram of S2 of the present invention; Figure 4 This is a detailed schematic diagram of S3 of the present invention; Figure 5 This is a detailed schematic diagram of S4 of the present invention; Figure 6 This is a detailed schematic diagram of S5 of the present invention. Detailed Implementation

[0018] The technical solution of the present invention will now be described with reference to the accompanying drawings.

[0019] In embodiments of the present invention, words such as "exemplarily," "for example," etc., are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" in the present invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the word "exemplary" is intended to present the concept in a concrete manner. Furthermore, in embodiments of the present invention, the meaning expressed by "and / or" can be both, or either one.

[0020] In the embodiments of this invention, the terms "image" and "picture" may sometimes be used interchangeably. It should be noted that, without emphasizing the distinction between them, they convey the same meaning. Similarly, the terms "of," "corresponding (relevant)," and "corresponding" may sometimes be used interchangeably. It should be noted that, without emphasizing the distinction between them, they convey the same meaning.

[0021] In this embodiment of the invention, sometimes a subscript such as W1 may be written in a non-subscript form such as W1. When the difference is not emphasized, the meaning they express is the same.

[0022] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0023] Please see Figure 1 This invention provides a time synchronization control method for a multi-sensor system, comprising the following steps: S1: Acquire the second pulse signal sequence and positioning status data through the serial port and SPI interface, monitor the pulse stability parameters, perform logical judgment on the positioning validity flag in the positioning status data, and generate a validity evaluation result; S2: Based on the effectiveness evaluation results and the preset timing priority sequence, a matching operation is performed to extract the clock source number in sequence and compare it with the corresponding state value to determine the first target timing source that meets the effectiveness conditions. The result is then input into the least squares fitting algorithm for timing path optimization to generate clock alignment parameters. S3: Extract the corresponding clock source pulse signal according to the clock alignment parameters, measure the time difference between the pulse signal and the central controller's own trigger pulse, adjust the trigger pulse based on the calculation result, and generate a calibration trigger pulse; S4: Transmits the calibration trigger pulse to the core processor via the hardware interface for internal clock synchronization. After receiving the feedback pulse, it records the timestamp and calculates the difference with the expected timestamp. When the difference is lower than the set threshold, the time synchronization is confirmed to be successful. When it exceeds the threshold, the retry process is triggered to generate a synchronization verification status. S5: Use the synchronous verification status as a reference, send a unified trigger signal to the sensor node through the TTL and RS-422 hardware interfaces, use the Kalman filter algorithm to perform time drift compensation and correction, and establish a unified time reference for the multi-sensor system. The effectiveness assessment results include pulse stability index, positioning reliability level and timing availability indicator; clock alignment parameters include time offset, frequency deviation and phase deviation; calibration trigger pulses include synchronization reference signal, time difference correction signal and central control reference signal; synchronization verification status includes threshold difference record, success confirmation mark and retry status mark; unified time reference includes global timestamp, clock drift compensation and cross-node synchronization mark.

[0024] Please see Figure 2 The specific steps of S1 are as follows: S101: Obtain the second pulse signal sequence through the serial port and SPI interface, perform difference calculation on the time edges of adjacent pulses, compare the difference amplitude with the pulse stability change threshold, record the index of amplitude that does not exceed the threshold, and generate a pulse interval stable index set. The controller receives and parses the pulse-per-second (PPS) signal from the GNSS module F9P1 via the vehicle MCU's serial port and SPI interface, generating a sequence of pulse-per-second signals containing consecutive timestamps. The initial timestamp data of this sequence is recorded in nanoseconds, for example, 10 consecutive pulse timestamp data collected. The specific values ​​are listed in Table 1. The processor first reads the timestamp of the current pulse one by one, starting from the second pulse in the sequence. timestamp of the previous pulse Perform a difference operation to obtain the time interval between adjacent pulses. For example, for index 1 The pulses, whose time interval is calculated as For index is The pulses, whose time interval is calculated as This difference calculation process iterates through the entire timestamp sequence until the last pulse. Next, a preset pulse stability change threshold is called. With each calculated time interval For comparison, this threshold setting references the temperature-compensated crystal oscillator (TCXO) used in the GNSS module F9P1 within its operating temperature range (e.g., ℃ to Frequency stability specification within ℃, is ppm, considering the standard second pulse interval is ns, its maximum theoretical deviation is In addition, to address other potential signal jitter and transmission delays, an extra one is added. The margin in ns, therefore the final threshold is set. The calculation process is as follows The specific comparison operation is to calculate each time interval. With standard seconds (i.e.) The absolute difference Then determine whether the absolute difference is less than or equal to ,Right now index time interval For example, its absolute difference is calculated as follows: ,because Therefore, this time interval meets the stability requirement, and its corresponding index Recorded, or indexed. time interval For example, its absolute difference is calculated as follows: ,because This index If a value is deemed unstable and discarded, the processor will repeat this comparison and recording process for the calculated time interval, which will satisfy... The latter index of the conditional impulse pair These are collected and eventually generated into a stable index set for pulse intervals.

[0025] Table 1: GNSS Second Pulse Raw Timestamp Table As shown in Table 1, this table lists the original timestamps of 10 consecutive second pulse signals acquired from the GNSS module F9P1, based on data and The stability threshold in ns, after the processor completes the calculation and comparison, yields the pulse interval stability index set as follows: .

[0026] S102: Call the pulse interval stable index set, retrieve the corresponding data frame in the positioning status data, extract the positioning validity flag bit and compare its flag value with the positioning validity status set, record the index of the valid status and reorder it in time order, and obtain the positioning status valid frame sequence index. Call the pulse interval stable index set The system retrieves positioning status data from a cached stream in the NVIDIA Orin core board's memory using index values. This data stream is recorded synchronously with the second pulse signal, and each index uniquely corresponds to a data frame. For example, index... Corresponding data frame ,index Corresponding data frame Similarly, the controller sequentially accesses the data frames pointed to by the index, extracting the positioning validity flag from a predetermined byte position in each data frame. This flag is an unsigned 8-bit integer representing the current positioning solution status of the GNSS receiver. Next, the extracted flag value is compared with a preset set of valid positioning states. In autonomous driving scenarios, extremely high positioning accuracy is required; therefore, the set of valid positioning states is set to include only states that provide centimeter-level accuracy, i.e., RTK fixed solutions (RTKFixed), whose corresponding flag values ​​are... Assuming the pulse interval stable index set corresponds to The sequence of location validity flags extracted from each data frame is as follows: Data Frame The flag is data frame The flag is (Differential GPS), data frames The flag is data frame The flag is data frame The flag is (RTK floating-point solution), data frame The flag is data frame The flag is The comparison process involves comparing each extracted flag value with the valid values ​​in the set. Perform equality checks for indexes. Its flag value is ,judge Established, therefore record index. For indexes Its flag value is ,judge This is not valid, therefore the index is discarded. For indexes Its flag value is ,judge Established, therefore record index. For indexes Its flag value is ,judge Establish, record index For indexes Its flag value is ,judge If not valid, discard the index. For indexes Its flag value is ,judge Establish, record index For indexes Its flag value is ,judge If not valid, discard the index. Through this series of retrieval, extraction, and comparison operations, the controller selects a new subset of the index. The data frames corresponding to each index in this subset not only have stable time intervals, but their positioning status also meets the preset high-precision requirements. Finally, this newly generated index subset... A time-order reordering is performed. Since the index itself is generated in ascending time order, this step is mainly a verification check to ensure the strict temporal order of the sequence, and finally obtains a valid frame sequence index for the positioning status.

[0027] S103: Based on the valid frame sequence index of the positioning status, aggregate the corresponding status fields in the original positioning status data, call the fields of the same time period to perform consistency comparison, and if all fields meet the consistency conditions, mark them as valid periods and establish the validity evaluation results; Based on the valid frame sequence index of the location status Furthermore, the controller aggregates the state fields corresponding to the index in the multi-sensor fusion dataset. In the current autonomous vehicle embodiment, the goal of data aggregation is to aggregate the positioning state data output simultaneously from two different GNSS modules (F9P1 and F9P2). Specifically, the controller will aggregate the state fields corresponding to the index. Simultaneously extract the data frame Position coordinates of F9P1 and the position coordinates of F9P2 and index , and Performing the same operation, the next step is to invoke a consistency comparison logic to perform a consistency check on corresponding fields obtained from the two GNSS modules at the same time point (identified by the same index). The core of this check is to calculate the spatial distance between the output coordinates of the two modules and compare it with a preset consistency condition, the specific threshold of which is... It is set based on the fixed physical distance between the two GNSS antennas on the vehicle roof and the nominal accuracy of the RTK fixed solution. Assuming the physical distance between the two antennas is... The accuracy of the fixed RTK solution is meters. Centimeters, taking into account slight deformation and measurement errors during vehicle movement, the distance threshold for consistency comparison. Set as rice( (cm), meaning the spatial distance between the location points reported by the two modules cannot exceed [a certain value]. centimeters, indexed For example, assuming the latitude and longitude coordinates reported by F9P1 are converted to local Cartesian coordinates as follows: The coordinates reported by F9P2 are meters. If the distance is meters, then the distance between the two can be calculated using the Euclidean distance formula: rice; because meters less than the threshold Meters, therefore for index At this point in time, the data from the two GNSS modules meet the consistency condition; similarly, for the index... Assuming the coordinates reported by F9P1 are... Meters, F9P2 reported coordinates as meters, the calculated distance is Rice, due to Meters smaller Rice, index The data also satisfies consistency; next, we process the index. Assuming the coordinates reported by F9P1 are The coordinates reported by F9P2 are meters. meters, the calculated distance is Rice, due to Meters greater than the threshold Rice, index If the data does not meet the consistency condition, and all compared fields at a certain point in time meet the consistency condition, then that point in time is marked as a valid period. In the above example, the index... and Marked as valid period, while index It will then be marked as invalid, and the index in the valid frame sequence index of the positioning status will be used. Repeat this process to eventually establish an effectiveness assessment result that marks multiple time points as valid periods.

[0028] Please see Figure 3 The specific steps of S2 are as follows: S201: Based on the validity assessment results and the preset timing priority sequence, perform matching calculations, extract the clock source number and call the corresponding status value, compare the status value with the validity assessment threshold, and if the status value is within the threshold range, record the number and generate a candidate clock source number set. Based on the effectiveness evaluation results, the controller performs a matching operation with a preset timing priority sequence. This sequence is pre-arranged according to the inherent accuracy and reliability of multiple clock sources in the vehicle system, with the specific priorities set as follows: GNSS module F9P1 (number 1, highest priority), GNSS module F9P2 (number 2, second highest priority), SBGIMU internal clock (number 3, medium priority), and NVIDIA Orin core board internal clock (number 4, lowest priority). The controller first extracts the first clock source number in the priority sequence, i.e., number... It then calls its corresponding status value, which is a quantitative indicator calculated by statistically analyzing recent data. The clock source is determined by the number of times it is considered "valid" within a valid period evaluation window, for example, the index. and Marked as valid if in complete Within a given period window, there are a total of periods in which F9P1 and F9P2 jointly satisfy the consistency condition. Then the state values ​​of F9P1 and F9P2 are both Since the SBGIMU is an inertial measurement unit, its timing does not depend on external signals. Its state value is generated based on its internal health monitoring messages. If all its self-test items pass, it is assigned a fixed high state value, for example... The internal clock of the NVIDIA Orin core board serves as a minimum backup, and its state value is fixed at [value missing]. Next, the acquired state value is compared with a preset validity evaluation threshold. This threshold is set to filter out clock sources that are currently reliable enough. The threshold setting refers to the minimum requirements for time synchronization continuity and stability. The calculation process is as follows: It is required that... At least one in each cycle Effective time synchronization, therefore the lower threshold is set to Meanwhile, for GNSS modules, if their effective cycle count is less than... If the signal is obstructed or interfered with, its performance is considered to have degraded; therefore, a "good" range is set as follows. And an "available" range greater than or equal to 80 and less than 90, for the number (F9P1), its state value is Execute judgment The condition is met, therefore the number will be... Record the information, and then the controller will continue processing the numbers according to priority. (F9P2), its state value is also... ,judge Established, Record Number Next, process the number. (SBGIMU), its state value is ,judge Established, Record Number Final processing number (NVIDIAOrin), its state value is ,judge If the condition is not met, the number is not recorded. After traversing the entire priority sequence, the recorded numbers are summarized to generate a candidate clock source number set.

[0029] Table 2: Timing Source Status and Priority Table As shown in Table 2, this table lists the priority, number, name, and calculated state value of potential timing sources within the current evaluation window, based on data and After the processor completes the matching and comparison operations, the final set of candidate clock source numbers is determined by the validity evaluation threshold. .

[0030] S202: Retrieve the status value based on the candidate clock source number set and call the validity condition judgment threshold comparison to filter the first number whose status value is within the threshold allowable range and extract its clock source information to obtain the target time synchronization source information; Based on the candidate clock source number set Starting from the highest priority in the preset timing priority sequence [1, 2, 3, 4], each number is checked one by one to see if it exists in the candidate set. Its status value is then compared against a validity threshold. This threshold comparison is more stringent, aiming to select the optimal one from multiple reliable candidate sources as the master clock. This validity threshold is divided into two levels: the optimal threshold range. With a backup threshold range greater than or equal to 80 and less than 90, the screening process strictly follows the priority order, processing the highest priority numbers first. The controller retrieved the found number. Existing in the candidate clock source number set Then, its state value is retrieved. Compare this value with the optimal threshold range Compare and perform judgment This condition is met because of the number. If it is the first candidate that meets the optimal threshold condition, it is immediately selected as the target, and the subsequent screening and comparison process is terminated. If the state value of F9P1 is... Then the controller determines If the optimal threshold range is not met, but the backup threshold range is met, the controller will not immediately select a candidate, but will continue to check the next priority candidate (number). The algorithm checks whether each candidate meets the optimal threshold condition. Only when none of the candidates meet the optimal threshold condition will the highest priority candidate that meets the backup threshold condition be selected. In this example, due to the numbering... State value The optimal conditions are met directly, so the screening process stops here. Next, the controller extracts and numbers the data. (F9P1) The associated clock source information includes the module's device identifier, communication port address, physical pin number of its output pulse of second (PPS) signal, and the time standard followed by the time source (e.g., UTC). This series of information is integrated and packaged to obtain the target time source information.

[0031] S203: Call the target timing source information to input the least squares fitting operation path, perform matrix operations on the time difference vector and the fitting reference sequence, retrieve the residual terms and analyze the residual value change trend, adjust the fitting path coefficients based on the residual change trend, and obtain the clock alignment parameters. The target timing source information is retrieved and used as input to the least-squares fitting calculation path. This path is used to accurately calculate the phase deviation (offset) and frequency deviation (drift rate) between the local clock (NVIDIA Orin core board clock) and the target timing source (F9P1). First, within a continuous time window (e.g. (Seconds), synchronously acquiring the timestamp sequence of the local clock and the second pulse signal sequence of the F9P1, and generating a time difference vector by calculating the difference between the readings of the two clocks when each second pulse arrives. For example, in continuous The measured time differences at each second pulse moment are as follows: ns, ns, ns and ns, forming a vector At the same time, according to the collection time Construct a benchmark sequence that fits the matrix, which is represented as a matrix in matrix operations. Design Matrix The first column is all The second column is the timestamp. Then, a series of matrix operations are performed, namely, calculations. To solve for the model parameters describing linear clock skew, namely the initial offset and drift rate, through specific numerical calculations, such as... The result is: ,and The result is: Multiplying the two together yields the parameter vector. ; This indicates that the initial phase offset is ns, frequency drift rate After the calculation is completed (ns / s), the residual term for each time point is retrieved. The residual is obtained by subtracting the predicted difference calculated by the fitted model from the actual measured time difference value. For example, in At time s, the prediction difference is ns, the actual difference is If ns, then the residual is ns, the residuals of the other three points are calculated as follows: ns, ns and Next, the trend of this set of residual values ​​[-2.6, 3.3, -2.8, 2.1] will be analyzed to check whether the absolute value of the residuals exceeds the preset noise tolerance (e.g., ...). (ns), and determine whether it has a non-random pattern such as monotonically increasing or decreasing. In this example, the absolute value of the residual is less than ns. The residual value is ns, and it fluctuates randomly around zero without a clear trend. Based on this residual change trend, it is determined that the current linear fitting path is sufficient, and there is no need to adjust the fitting path coefficients, that is, there is no need to introduce higher-order nonlinear terms (such as quadratic terms to describe frequency acceleration). Finally, the calculated initial offset is... ns and frequency drift rate ns / s is the clock alignment parameter required for local clock alignment.

[0032] Please see Figure 4 The specific steps of S3 are as follows: S301: Extract the corresponding clock source pulse signal according to the clock alignment parameters, collect the amplitude of the pulse signal in a continuous period, arrange the collection points in time order and establish an index table, combine the index table with the time series to generate a pulse sampling sequence; Based on the clock alignment parameters, where the initial phase offset is ns, frequency drift rate The controller extracts the pulse-per-second (PPS) signal output by the GNSS module F9P1, which serves as the target timing source, and transmits it via a high-speed analog-to-digital converter (ADC). GHz sampling rate (i.e., per The voltage amplitude of the pulse signal (at one sampling point per second) is acquired over several consecutive cycles, with the acquisition window set before and after the expected arrival time of each second pulse. Within the range of ns, form a containing The sampling interval for each sampling point, for example, for the first second pulse, from the theoretical time point ns starts collecting data until The sampling time ends at ns, and the voltage amplitude of each sampling point is quantized and recorded. For example, for a 3.3V LVCMOS signal, below... V is denoted as logic. higher than V is denoted as logic. The states between these points represent transitional states. The collected raw data points are strictly arranged according to their chronological order of occurrence, and each sampling point is assigned a unique identifier. arrive The index is used to build a detailed index table, which not only contains the sequence number of the sampling point, but also associates it with its precise relative timestamp relative to the start point of the acquisition window and the quantized voltage amplitude. The specific acquisition data is shown in Table 3. Finally, this structured data table containing the index, relative timestamp and voltage amplitude is combined with the time series corresponding to the acquisition period (e.g., the integer second part of the GPS timestamp) to generate a high-resolution waveform profile for each second pulse, i.e., the pulse sampling sequence.

[0033] Table 3: F9P 1-second pulse signal sampling table As shown in Table 3, this table selects a portion of the data from the dense sampling of the F9P1 PPS signal during the first second pulse period, showing the voltage change of the signal near the rising edge. The complete pulse sampling sequence will contain multiple similar data segments, each corresponding to several consecutive second pulses.

[0034] S302: Based on the pulse sampling sequence and the timestamp data of the central controller's own trigger pulse, the index position is retrieved within the same sampling period, the time difference between the two is calculated, and the time difference is mapped in order along the time axis to obtain the time difference distribution value; Based on the pulse sampling sequence and the timestamp data of the internal trigger pulses generated by the high-precision timer of the central controller (NVIDIA Orin core board), time alignment calculation is performed within the same sampling period. First, the controller retrieves the rising edge position of the signal in the pulse sampling sequence. Its specific action is: from the sampling index... Begin by checking each acquired amplitude value and comparing it to a preset voltage threshold (set as the midpoint voltage for a 3.3V logic level). Compare V) and record the first amplitude from below V becomes higher than The indices of the sampling points of V are shown in Table 3. Amplitude value V, in the index Amplitude value V is still below the threshold, in the index Amplitude value V, for the first time exceeding V, therefore, the controller records the index. and and the corresponding relative time ns and ns and the acquisition amplitude V and V, the amplitude is calculated through linear interpolation to reach The precise relative time point of V is calculated as follows: ns; This time This refers to the precise arrival time of the F9P1 pulse in the current cycle. Simultaneously, the controller records the absolute timestamp of its own trigger pulse within the same cycle, assuming it is... ns, while the absolute timestamp of the F9P1 pulse is ns, then calculate the time difference between the two. ns, the controller repeats the exact same retrieval and calculation process for the next three consecutive cycles, and due to the known The frequency drift in ns / s, and the subsequent time difference are calculated sequentially as follows: ns, ns and Finally, the calculated time difference values ​​[56.4711, 105.5811, 154.6611, 203.7711] are arranged and mapped according to their occurrence time axis order to obtain the time difference distribution value.

[0035] S303: Compare the time difference distribution value with the trigger pulse reference value of the central controller, determine the trigger pulse phase correction direction based on the comparison result, calculate the phase offset and adjust the trigger pulse output state to generate a calibration trigger pulse; The array of time difference distribution values ​​is retrieved and compared with a trigger pulse reference value from the central controller, which is set to [value] under ideal synchronization conditions. ns indicates that the pulse of the central controller is perfectly aligned with the pulse of the external timing source. The comparison process specifically involves extracting the latest value from the time difference distribution, i.e. ns, and compare it with the benchmark value. The relationship between ns, due to The comparison result indicates that the trigger pulse phase of the central controller lags behind the target timing source. Therefore, the phase correction direction is determined to be advanced (negative adjustment). Before performing the adjustment, the absolute value of the difference will be... Compared to a phase adjustment dead zone threshold, which is set with reference to the minimum tolerable synchronization error and the stability requirement of avoiding frequent adjustments to minute noise, this threshold is set based on the microsecond-level synchronization accuracy required by vehicle sensors (such as cameras). ns, its calculation process ensures the effectiveness of the adjustment action, taking the synchronization accuracy requirement (e.g. ns) As a threshold, and rounded down to the nearest integer. ns, due to The adjustment action is triggered. Next, the phase offset is calculated. The calculation logic is to directly use the latest measured time difference value as the correction amount for this operation, i.e., the correction value is... ns, the controller adjusts the phase control register of its internal high-precision timer accordingly, if the current value of the register is... The new value is then set to This operation will directly change the generation time of the next trigger pulse, causing it to occur earlier. The ns output, after this adjustment is performed, the next pulse generated by the central controller is the calibration trigger pulse.

[0036] Please see Figure 5 The specific steps of S4 are as follows: S401: Based on the calibration trigger pulse and feedback pulse received by the core processor, the edge position of the feedback pulse is retrieved in the hardware interface and the arrival time parameter is extracted. The time parameter is compared with the internal clock reference value to obtain the feedback pulse timestamp. Based on the calibration trigger pulse received by the core processor NVIDIA Orin and the feedback pulse returned by the external LiDAR sensor, the processor continuously monitors the voltage level in its hardware interface (a GPIO pin that supports nanosecond-level timestamp capture). When the rising edge of the feedback pulse signal is detected, i.e., the voltage drops from below... V's logic low level transition to a value higher than When V is at a logic high level, the hardware timestamp engine immediately locks the count value of the current high-precision clock inside the processor and extracts this count value as the arrival time parameter, assuming that the phase was advanced in the previous step. If the value is ns, then the calibration trigger pulse should theoretically be in the next integer second, i.e. It is emitted at time ns, but due to a small residual error, the actual emission time is... ns, the pulse signal passes through The cable delay of ns reaches the LiDAR, and there is a delay inside the LiDAR. The processing delay is ns, and then its feedback pulse passes through another... The cable delay of ns returns to the processor, therefore the theoretical value of the pulse arrival time parameter captured by the hardware interface is... ns, the actual count value captured by the hardware Next, this time parameter is compared with an internal clock reference value, which is the start time of the current evaluation cycle, i.e., an integer number of seconds. The comparison process essentially converts an absolute timestamp into a relative time based on the start of the cycle. However, in this embodiment, the hardware directly outputs an absolute timestamp with the start time as a reference. Therefore, this step directly confirms and adopts the absolute timestamp captured by the hardware. ns, to obtain the feedback pulse timestamp.

[0037] S402: Call the feedback pulse timestamp and the preset expected timestamp, calculate the difference between the two numerical parameters, compare the difference with the synchronization judgment threshold, mark the time synchronization within the threshold range, mark the time offset outside the threshold range, and obtain the time difference judgment status. The feedback pulse timestamp is invoked, and its value is... ns, and simultaneously invokes a pre-set expected timestamp, which is set based on a known, fixed physical delay. The calculation process is as follows: the one-way transmission delay of the trigger pulse from the processor to the sensor is set to ns. ns, the internal fixed processing delay of the sensor, is specified in its datasheet. ns, and the one-way transmission delay of the feedback pulse from the sensor back to the processor, are also... ns, add the delay value to the ideal trigger time (i.e., an integer number of seconds) to obtain the desired arrival time of the feedback pulse, i.e. ns, then, the difference between the feedback pulse timestamp and the expected timestamp is calculated to obtain the deviation between the actual arrival time and the expected arrival time. ns, then take the absolute value of this difference The time stamp error is compared to a synchronization threshold, which is set to define an acceptable range of synchronization errors. This threshold is based on the timestamp alignment accuracy requirements of multi-sensor fusion algorithms. For the fusion of LiDAR and cameras in this autonomous driving application, the timestamp error needs to be controlled within a certain range. Within ns, therefore, the synchronization determination threshold is... Set as ns, the specific action of comparison is to determine Whether it holds true or not, since the condition holds true, the current state is marked as time synchronization within the threshold range. If the calculated difference is... ns, then because If the state is outside the threshold range, it will be marked as a time offset, and the time difference determination state will be obtained.

[0038] S403: Based on the determination result of the time synchronization difference, record the success flag in the time synchronization state, trigger the retry process and update the status flag in the time synchronization offset state to obtain the synchronization verification status. Based on the time synchronization difference, the controller determines the status, i.e., the "time synchronization" result. The controller then executes the subsequent status recording process. Specifically, when the result is "time synchronization," the controller writes a success identifier (a 16-bit unsigned integer with a value of 0x0001) to a predefined memory address (e.g., 0xStatus_Sync_Flag). Simultaneously, the value in the adjacent 32-bit counter address (0xStatus_Sync_Count) is incremented. Become If the timing difference determination result is "timing offset", the controller will write a failure identifier 0xEEEE to the success flag address 0xStatus_Sync_Flag and immediately trigger a retry procedure. The specific actions of this retry procedure are as follows: mark the health status of the current timing source (F9P1) as "unstable", then immediately return to the aforementioned steps. In the next processing cycle, a new target timing source is selected based on the latest status value and priority sequence of the clock source, and the entire calibration and verification process is repeated. Simultaneously, a retry count is incremented. When this count reaches... Accumulated within minutes At this time, a serious fault code will be generated and reported to the vehicle's diagnostic system. In this embodiment, since the determination status is "time synchronization", only the operations of recording the success flag and updating the counter are performed, and finally the synchronization verification status is obtained.

[0039] Please see Figure 6 The specific steps of S5 are as follows: S501: Call the synchronous verification status as a unified benchmark, send trigger signals to the sensor nodes through the TTL and RS-422 hardware interfaces, record and sort the pulse edge positions in sequence, and generate a trigger time sequence; The synchronization verification status is invoked. After confirming that its value is the success identifier 0x0001, this is used as a unified benchmark. The NVIDIA Orin core processor acts as the master clock to broadcast and distribute trigger signals to the sensor nodes in the vehicle network. During actual execution, the timer module within the processor follows a preset procedure. Hz frequency, that is, every Hz A synchronization event is generated by ns. For sensors that are physically close and have low interference requirements, such as camera A and inertial measurement unit D installed near the main controller, a trigger pulse is sent through a 3.3VTTL level GPIO pin. For sensors that are farther away or in areas with complex electromagnetic environments, such as the lidar C on the roof and camera B on the other side, a trigger signal is sent through an RS-422 differential signal driver. In each synchronization event, the hardware timestamp unit in the processor accurately records the pulse signal voltage of each signal transmission port from below... V jumped to higher than The instant of V, i.e., the rising edge of the pulse, is marked with a high-precision timestamp, for example, at the thirtieth synchronization cycle (theoretically, the time is V). When (ns), the actual trigger timestamps sent to the four sensors are recorded as follows: ns (camera A) ns (camera B) ns (LiDAR C) and ns (IMUD), the controller in a continuous Timestamp data is continuously recorded within the window of each trigger cycle, and the recorded timestamp values ​​are globally sorted according to their chronological order. At the same time, an independent, time-incrementing index list is created for the trigger time of each sensor, as shown in Table 4. Finally, the sorted and indexed timestamp data set is structured and stored to generate a trigger time series.

[0040] Table 4: Sensor Node Trigger Timestamp Table As shown in Table 4, this table lists the precise hardware timestamps of the trigger signals sent by the central processing unit to four different sensor nodes within five consecutive trigger cycles. The data forms the basis for subsequent drift calculations.

[0041] S502: Based on the trigger time series, perform differential operations on adjacent time intervals, fit the drift amount sequence, compare it with the reference trigger interval value, perform time correction based on the difference, and calculate the compensation set to obtain the drift compensation parameter set; Based on the trigger time sequence, perform differential operations independently on the timestamp sequence of each sensor node. Taking the timestamp sequence of LiDAR C as an example: [3000000025, 3100000030, 3200000040, 3300000048, 3400000055]; The controller starts from the second element of the sequence and subtracts the value of the preceding element from each element to obtain the time interval between two adjacent triggers. The first difference operation is... ns, the second time ns, the third time ns, the fourth time is Next, each calculated time interval will be compared with a reference trigger interval value, which is set based on... The trigger frequency is Hz, and its value is... The alignment process involves calculating the difference to obtain the drift amount for each interval. The drift for the first interval is: ns; The second one is ns; The third one is ns, the fourth one is ns, then, a cumulative drift sequence is fitted based on the drift amount at each interval. This is calculated by adding the drift amount of the current interval to the drift amount of the previous interval. The cumulative drift at the first time point (index 30) is... ns, the cumulative drift at the second time point (index 31) is ns, the cumulative drift at the third time point (index 32) is ns, the fourth one is ns, the fifth one is ns, thus the cumulative drift sequence of LiDAR C is obtained as [0, 5, 15, 23, 30]. Finally, a compensation set for time correction is calculated based on this drift sequence. The calculation rule is to take the negative of the cumulative drift value, that is, the compensation set of LiDAR C is [0, -5, -15, -23, -30]. This complete process will be repeated on the time series of the sensor node to obtain the drift compensation parameter set.

[0042] S503: Call the drift compensation parameter set, weight and superimpose the compensation parameters with the node's trigger time sequence item by item, so that the drift time values ​​are rearranged under the reference interval and unified indexed to establish a unified time reference for the multi-sensor system. The drift compensation parameter set is invoked, for example, the compensation set for LiDAR C is [0, -5, -15, -23, -30], and its original trigger time sequence [3000000025, 3100000030, 3200000040, 3300000048, 3400000055]. Next, corresponding items of these two sequences are weighted and superimposed item by item. The weighting operation here is equal weighting, that is, the weight coefficient is... Essentially, it involves performing algebraic summations term by term to correct the timestamps back to the ideal, evenly spaced grid. The first superposition operation is... ns, the second time ns, the third time ns, the fourth time is ns, the fifth time is After this series of operations, the original drifting timestamp sequence is rearranged into a new sequence [3000000025, 3100000025, 3200000025, 3300000025, 3400000025]. It can be observed that the time interval between the corrected timestamps is exactly equal to the reference interval value. ns, and relative to the ideal integer second time of the period (e.g. ns) has a constant offset. Finally, an index is created for the corrected timestamps, and indices 30, 31, 32, etc., are associated with the ideal trigger time. ns, ns, By linking the ns, the trigger time of each sensor node's data, after being corrected by compensation parameters, can be mapped to this unified index, thereby establishing a unified time reference for the multi-sensor system.

[0043] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for time synchronization control of a multi-sensor system, characterized in that, The method comprises the following steps: S1: Obtain the second pulse signal sequence and the positioning state data through the serial port and the SPI interface, monitor the pulse stability parameters, perform logical judgment on the positioning validity flag bit in the positioning state data, and generate the validity evaluation result; S2: Perform matching operation on the validity evaluation result and the preset time service priority sequence, sequentially extract the clock source number and compare it with the corresponding state value, determine the first target time service source that meets the validity condition, and input it into the least square fitting algorithm for time service path optimization to generate the clock alignment parameter; S3: Extract the corresponding clock source pulse signal according to the clock alignment parameter, measure the time difference between the pulse signal and the trigger pulse of the central controller, adjust the trigger pulse based on the operation result, and generate the calibration trigger pulse; S4: Transmit the calibration trigger pulse to the core processor through the hardware interface for internal clock synchronization operation, record the time stamp after receiving the feedback pulse, and perform difference calculation on the time stamp and the expected time stamp; when the difference is lower than the set threshold, it is confirmed that the time service is successful; when the threshold is exceeded, the retry process is triggered, and the synchronization verification state is generated.

2. The multi-sensor system time synchronization control method of claim 1, wherein, The validity evaluation result comprises the pulse stability index, the positioning credibility level and the time service availability identifier; the clock alignment parameter comprises the time offset, the frequency deviation and the phase deviation; the calibration trigger pulse comprises the synchronization reference signal, the time difference correction signal and the central control reference signal; and the synchronization verification state comprises the threshold difference record, the success confirmation mark and the retry state identifier.

3. The multi-sensor system time-synchronization control method of claim 1, wherein, The specific steps of S1 are as follows: S101: Obtain the second pulse signal sequence through the serial port and the SPI interface, perform difference operation on the time edges of adjacent pulses, compare the difference amplitude with the pulse stability change threshold, record the index whose amplitude does not exceed the threshold, and generate the pulse interval stability index set; S102: Call the pulse interval stability index set, retrieve the corresponding data frame in the positioning state data, extract the positioning validity flag bit, compare the flag value with the positioning validity state set, record the index in the valid state and reorder it in time sequence, obtain the positioning state valid frame sequence index; S103: According to the positioning state valid frame sequence index, aggregate the corresponding state fields in the original positioning state data, call the same time period field to perform consistency comparison, and if all fields meet the consistency condition, mark it as an effective period to establish the validity evaluation result.

4. The multi-sensor system time-synchronization control method of claim 3, wherein, The specific steps of S2 are as follows: S201: Perform matching operation on the validity evaluation result and the preset time service priority sequence, extract the clock source number, call the corresponding state value, compare the state value with the validity evaluation threshold, and if the state value is within the threshold allowable range, record the number to generate the candidate clock source number set; S202: Retrieve the state value according to the candidate clock source number set and call the validity condition judgment threshold for comparison, select the first number whose state value is within the threshold allowable range and extract the clock source information to obtain the target time service source information; S203: calling the target time source information input least squares fitting operation path, performing matrix operation on the time difference value vector and the fitting reference sequence, retrieving residual terms and analyzing residual value trend, adjusting the fitting path coefficient based on the residual trend, and obtaining clock alignment parameters.

5. The multi-sensor system time-synchronization control method of claim 4, wherein, The effectiveness evaluation threshold is a numerical limit for determining whether the clock source state value enters the candidate clock source number set; The effectiveness condition judgment threshold is a numerical limit for determining the target time source in the candidate clock source number set.

6. The multi-sensor system time-synchronous control method of claim 4, wherein, The specific steps of S3 are: S301: extracting the corresponding clock source pulse signal according to the clock alignment parameters, collecting the amplitude of the pulse signal in the continuous period, arranging the collection points in time sequence and establishing an index table, combining the index table with the time sequence, and generating a pulse sampling sequence; S302: based on the pulse sampling sequence and the timestamp data of the central controller's own trigger pulse, retrieving the index position in the same sampling period, calculating the time difference value, and mapping the time difference value in time axis sequence to obtain the time difference distribution value; S303: calling the time difference distribution value and the trigger pulse reference value of the central controller, determining the trigger pulse phase correction direction according to the comparison result, calculating and adjusting the phase offset of the trigger pulse output state, and generating a calibration trigger pulse.

7. The multi-sensor system time-synchronization control method of claim 6, wherein, The specific steps of S4 are: S401: based on the calibration trigger pulse and the feedback pulse received by the core processor, retrieving the edge position of the feedback pulse in the hardware interface and extracting the arrival time parameter, comparing the time parameter with the internal clock reference value to obtain the feedback pulse timestamp; S402: calling the feedback pulse timestamp and the preset expected timestamp, calculating the difference value of the two numerical parameters, comparing the difference value with the synchronization judgment threshold, marking time synchronization within the threshold range and time offset outside the threshold range to obtain the time difference judgment state; S403: according to the determination result of the time difference judgment state, recording the success identification in the time synchronization state and triggering the retry process and updating the state identification in the time offset state to obtain the synchronization verification state.

8. The multi-sensor system time-synchronization control method of claim 7, wherein, The synchronization judgment threshold is the allowed deviation range of the feedback pulse timestamp and the expected timestamp; The time difference judgment state is the state information marked by the comparison result of the difference value of the feedback pulse timestamp and the expected timestamp relative to the synchronization judgment threshold.

9. The multi-sensor system time-synchronization control method of claim 1, wherein, The method further comprises the S5 step: S5: calling the synchronization verification state as a reference, sending a unified trigger signal to the sensor node through the TTL and RS-422 hardware interface, using the Kalman filtering algorithm for time drift compensation and correction, and establishing a unified time reference for the multi-sensor system; The unified time reference includes global timestamp, clock drift compensation, and cross-node synchronization identification.

10. The multi-sensor system time-synchronization control method of claim 9, wherein, The specific steps of S5 are: S501: calling the synchronization verification state as a unified reference, sending a trigger signal to the sensor node through the TTL and RS-422 hardware interface, recording and sequentially sorting the pulse edge position to generate a trigger time sequence; S502: According to the trigger time sequence, the adjacent time interval is differentially operated, the drift amount sequence is fitted, and the reference trigger interval value is compared. According to the difference value, the time is corrected and the compensation set is calculated to obtain the drift compensation parameter set; S503: Call the drift compensation parameter set, add the compensation parameter to the trigger time sequence of the node item by item, rearrange the drift time value under the reference interval, and uniformly index to establish a unified time reference of the multi-sensor system.

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