Wildcard associative array data storage method, electronic device and medium

Abstract

This invention relates to the field of data storage technology, and more particularly to a wildcard associative array data storage method, electronic device, and medium. S1: Obtain the target wildcard associative array aa n and aa n The corresponding maximum bond length B n S2, Get aa n The corresponding node to be inserted, aa[i] n ;S3, is aa[i] n Set node information {P i n Q i n ,F i n}; S4, if F i n If it is the first identifier, then execute S5; if F i n If the identifier is the second one, then execute S6; S5, allocate memory for a length of B. n Space E i n , will K i n Deposit E i n In the middle, E i n Store the address in K i n In the middle, V i n Deposit into Q i n In the middle, execute S7; S6, move K i n Store P i n In the middle, V i n Deposit into Q i n In the middle, execute S7; S7, move {P i n Q i n ,F i n Insert aa n In the corresponding storage structure, this invention improves memory utilization.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data storage, in particular to a wildcard associative array data storage method, an electronic device and a medium. BACKGROUND

[0002] The associative array in SystemVerilog language is a data structure that can store ordered key-value pairs. Generally, when declaring an associative array variable, a specific key type and value type need to be given, such as: data_type aa [index_type]; There is a special type of associative array, when declaring it, only the value type is given, and the key type is represented by "*" to accept integer types of any length, such as data_type aa [*]; This special associative array is a wildcard associative array. In the prior art, sufficient memory space needs to be allocated for the wildcard associative array to store the key and value data therein. Since the specific size of the key data of the wildcard associative array cannot be predicted in advance, it is necessary to reserve a large enough memory space, usually a memory space with a maximum key length for all keys, but for the case where the key length is less than the maximum key length, memory is wasted, especially for the wildcard associative array where most keys are less than the maximum key length, and only a small part of the keys are equal to or close to the maximum key length, the memory waste is more prominent, resulting in low memory utilization. SUMMARY

[0003] The present application aims to provide a wildcard associative array data storage method, an electronic device and a medium, which improves the memory utilization.

[0004] According to the first aspect of the present application, a wildcard associative array data storage method is provided, comprising:

[0005] Step S1, obtaining a target wildcard associative array aa n and aa n corresponding to the maximum key length B n , the target wildcard associative array is a wildcard associative array with a maximum key length greater than a preset length threshold in user design, the value range of n is 1 to N, N is the total number of target wildcard associative arrays in user design, and the user design is a design written based on SystemVerilog language;

[0006] Step S2, obtaining aa n corresponding to the to-be-inserted node aa[i] n , aa[i] n ={K in ,V i n},K i n for aa[i] n corresponding key, V i n for aa[i] n corresponding value;

[0007] Step S3, setting node information {P n i n ,Q i n ,F i n},P i n for aa[i] n corresponding node key, P i n corresponding node is allocated with memory of preset length threshold, Q i n for aa[i] n corresponding node value, Q i n corresponding node is allocated with memory of preset numerical length, F i n is a key type identifier, if K i n is greater than the preset length threshold, then F i n is a first identifier, if K i n is less than or equal to the preset length threshold, then F i n is a second identifier;

[0008] Step S4, if F i n is the first identifier, then step S5 is executed, if F i n is the second identifier, then step S6 is executed;

[0009] Step S5, allocating a space E n of length B i n in the memory, storing K i n in E i n , storing the address of E i n in K i n , and storing V i ​n Deposit into Q i n In the middle, proceed to step S7;

[0010] Step S6, K i n Store in P i n In the middle, V i n Deposit into Q i n In the middle, proceed to step S7;

[0011] Step S7, {P i n Q i n ,F i n Insert aa n In the corresponding storage structure.

[0012] According to a second aspect of the present invention, an electronic device is provided, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being configured to perform the method described in the first aspect of the present invention.

[0013] According to a third aspect of the present invention, a computer-readable storage medium is provided, storing computer-executable instructions for performing the method described in the first aspect of the present invention.

[0014] Compared with existing technologies, this invention has significant advantages and beneficial effects. Through the above technical solution, the wildcard associative array data storage method, electronic device, and medium provided by this invention achieve considerable technological advancement and practicality, and have broad industrial application value. It has at least the following beneficial effects:

[0015] This invention can effectively reduce the memory used to store wildcard associative array data, thereby significantly improving the memory utilization rate of storing wildcard associative array data. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 A flowchart illustrating the wildcard associative array data storage method provided in this embodiment of the invention. DETAILED DESCRIPTION

[0018] The technical solutions in the embodiments of the present application will be apparently and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all the other embodiments obtained by a person skilled in the art without any creative work fall within the protection scope of the present application.

[0019] The embodiments of the present application provide a wildcard associative array data storage method, as shown in the following formula (1): Figure 1 The method comprises the following steps.

[0020] Step S1, obtaining a target wildcard associative array aa n and aa n corresponding maximum key length B n , the target wildcard associative array is a wildcard associative array with a maximum key length greater than a preset length threshold in a user design, the value range of n is 1 to N, N is the total number of target wildcard associative arrays in the user design, and the user design is a design written based on a SystemVerilog language.

[0021] Preferably, the preset length threshold is set as a computer addressing space size. If the computer addressing space size is 64 bits, the preset length threshold can be set as 64 bits. If the computer addressing space size is 32 bits, the preset length threshold can be set as 32 bits.

[0022] Step S2, obtaining aa n corresponding to-be-inserted node aa[i] n , aa[i] n ={K i n ,V i n},K i n is a key (Key) corresponding to aa[i] n , and V i n is a value (Value) corresponding to aa[i] n .

[0023] It should be noted that the length of the key in a wildcard associative array is not fixed, but the length of the value is fixed. Therefore, in the process of storing wildcard associative array data, it is sufficient to allocate a fixed length of memory space for all values ​​without optimization. This embodiment of the invention mainly focuses on optimizing the memory allocation of the key in the process of storing wildcard associative array data.

[0024] Step S3, for aa[i] n Set node information {P i n Q i n ,F i n}, P i n for aa[i] n The key of the corresponding node, P i n A corresponding memory space of length equal to a preset length threshold is allocated, Q i n for aa[i] n The value of the corresponding node, Q i n A corresponding memory space of a preset length, F, is allocated. i n For key type identifier, if K i n If the length of F is greater than the preset length threshold, then F i n As the first identifier, if K i n If the length of F is less than or equal to a preset length threshold, then F i n This is the second identifier.

[0025] Step S4, if F i n If F is the first identifier, then proceed to step S5. i n If it is the second identifier, then proceed to step S6.

[0026] Step S5: Allocate a memory space of length B. n Space E i n , will K i n Deposit E i n In the middle, E i n Store the address in K i n In the middle, V in Store in Q i n In this case, step S7 is executed.

[0027] Step S6, store K i n Store in P i n In this case, store V i n Store in Q i n In this case, step S7 is executed.

[0028] It should be noted that P i n is used to store aa[i] n The key of the corresponding node, P i n may be set to a pointer with a length of a preset length threshold. When F i n is the second identifier, K i n is directly stored in the pointer of P i n In this case, the key (Key) corresponding to aa[i] n and aa[i] n are consistent in the storage structure corresponding to aa n , without the need for additional allocation of memory space, saving memory space. When F i n is the first identifier, the memory space of P i n is not enough to store the key (Key) corresponding to aa[i] n Therefore, a space E n with a length of B i is further allocated in the memory through step S5. n i Store K n i in E n i , and then store the address of E n i in K n i , that is, the pointer of P n points to E i n In this case, the key (Key) corresponding to aa[i] n and aa[i] n are inconsistent in the storage structure corresponding to aa n

[0029] Step S7, {P i n Q i n ,F i n Insert aa n In the corresponding storage structure.

[0030] It should be noted that aa n The corresponding storage structure can be set as a tree storage structure or a regular array storage structure, etc.

[0031] As one embodiment, step S1 includes:

[0032] Step S11: Traverse the user design to obtain each wildcard associative array and the maximum key length corresponding to each wildcard associative array.

[0033] Specifically, each wildcard associative array and the maximum key length corresponding to each wildcard associative array can be stored in a preset mapping table (map).

[0034] Step S12: Analyze each wildcard association array one by one. If the corresponding maximum key length is greater than the preset length threshold, then the wildcard association array is determined as the target wildcard; otherwise, the wildcard association array is determined as a non-target wildcard.

[0035] It should be noted that wildcard associative arrays with a maximum key length greater than a preset length threshold are first optimized as target wildcard associative arrays with a maximum key length greater than the preset length threshold. Non-target wildcard associative arrays can have their key type memory length uniformly set to the preset length threshold. Compared to setting it to the maximum key length of all wildcard associative arrays, this significantly reduces memory allocation and improves memory utilization for storing wildcard associative array data. Furthermore, as an embodiment, step S12 further includes:

[0036] Step S13: Set the key type memory length for each non-target wildcard to the corresponding maximum key length.

[0037] Setting the length of each non-target wildcard to the memory length of the corresponding maximum key type can further reduce memory allocation and improve memory utilization for storing wildcard associative array data.

[0038] As one embodiment, step S7 includes:

[0039] Step S71: Set j=1, then execute step S72.

[0040] Where j is the first aa n The corresponding node sequence number in the storage structure, aan The nodes can be numbered in sequence in the corresponding storage structure, and the in-sequence traversal is implemented in the traversal process.

[0041] Step S72, judging whether the current aa n The key type identifier of the jth node in the corresponding storage structure is compared with F i n If they are the same, step S73 is executed, otherwise, step S76 is executed. If they are the same, step S73 is executed, otherwise, step S76 is executed.

[0042] It should be noted that if the key type identifiers are different, it is impossible that the node is the same as the {P i n Q i n F i n} information, so the node can be directly skipped and the next node is traversed. If the key type identifiers are the same, the key value actually corresponding to the jth node needs to be further judged. i n If they are the same, it is not necessary to indicate the current aa n The corresponding storage structure should exist the node corresponding to the {P i n Q i n F i n}, and it is not necessary to be repeatedly inserted, otherwise, the {P i n Q i n F i n} needs to be inserted into the current aa n corresponding storage structure.

[0043] Step S73, if F i n is the first identifier, step S74 is executed, if F i n is the second identifier, step S75 is executed.

[0044] Step S74, the key stored in the address in the key of the jth node is obtained first, and then the key value is read from the address stored in the key of the jth node. i n If they are the same, the {P i n Q i n F i n} is not inserted, and the process is ended, otherwise, step S76 is executed.

[0045] It should be noted that if F i n is the first identification, it means that the key type identification of the current node being judged is also the first identification, and therefore only address information is stored in the key of the current node being judged, and not the corresponding key value, so the address stored in the key of the jth node is first obtained, the key value is read from the address stored in the key of the jth node, and then compared with K i n for comparison.

[0046] Step S75, the key value is directly read from the key of the jth node and compared with K i n for comparison. If they are the same, {P i n , Q i n , F i n} is not inserted, and the flow ends, otherwise, step S76 is executed.

[0047] It should be noted that if F i n is the second identification, it means that the key type identification of the current node being judged is also the second identification, and therefore the corresponding key value is stored in the key of the current node being judged, so the key value is directly read from the key of the jth node and compared with K i n for comparison.

[0048] Step S76, if j i n , Q i n , F i n} is inserted into aa n , the corresponding storage structure, M is the total number of nodes in the current aa n , corresponding storage structure.

[0049] It should be noted that when all nodes in the current aa n , corresponding storage structure are traversed and no node corresponding to K i n is found, it means that there is no {P n , Q i n , F i n} stored in the current aa i , corresponding storage structure, and therefore {P n , Q i n , F in ,F i n}insert aa n corresponding storage structure, and the insertion order is stored in aa n corresponding storage structure, and the insertion order is stored in aa n corresponding storage structure.

[0050] aa n After the corresponding storage structure is established, the node in the corresponding storage structure can be accessed based on aa n corresponding storage structure, and the insertion order is stored in aa

[0051] Step S100, obtaining aa n corresponding storage structure.

[0052] In this embodiment, the node to be accessed can be directly specified, and then aa n corresponding storage structure.

[0053] Step S200, if the key type identifier in the node information to be accessed is the first identifier, step S300 is executed, and if the key type identifier is the second identifier, step S400 is executed.

[0054] Step S300, first, the storage address in the key of the node information to be accessed is obtained, and then the key value is read from the storage address in the key of the node information to be accessed as a return value for return, and the process is ended.

[0055] It should be noted that if the key type identifier in the node information to be accessed is the first identifier, only the address information is stored in the key of the node to be accessed, and not the corresponding key value, so the storage address in the key of the node information to be accessed is first obtained, and then the key value is read from the storage address in the key of the node information to be accessed, and the key value is determined as the return value corresponding to the node to be accessed.

[0056] Step S400, directly reading the key value from the key of the node information to be accessed as a return value for return, and ending the process.

[0057] It should be noted that if the key type identifier in the node information to be accessed is the second identifier, the key value is stored in the key of the node to be accessed, so the key value is directly read from the key of the node information to be accessed, and the key value is determined as the return value corresponding to the node to be accessed.

[0058] The embodiment of the application can effectively reduce the memory for storing wildcard associative array data, thereby significantly improving the memory utilization rate of the wildcard associative array data.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0060] It is noted that some embodiments are described as processes depicted as flow diagrams. Although each can describe the operations as a sequential process, many of the operations can be performed in parallel, concurrently or simultaneously. In addition, the order of the operations can be re-arranged. A process can be terminated when its operations are completed, but could also occur under some other event, such as, but not limited to, the process timing out. A process might or might not have a return operation, and can or can not be reentrant. A process can correspond to a procedure, function, routine, subroutine, subprogram, etc.

[0061] An electronic device is also provided, including: at least one processor; and a memory connected with the at least one processor in communication; wherein the memory stores instructions executed by the at least one processor, and the instructions are configured to perform the method according to the embodiments of the application.

[0062] A computer readable storage medium is also provided, storing computer executable instructions, and the computer executable instructions are configured to perform the method according to the embodiments of the application.

[0063] The above descriptions are only preferred embodiments of the present application and are not intended to limit the present application in any form. Although the present application has been disclosed as the above preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make some minor changes or modifications to the above disclosed technical contents without departing from the technical solution of the present application, and any simple modification, equivalent change and modification made according to the technical essence of the present application to the above embodiments are still within the scope of the technical solution of the present application.

Claims

1. A wildcard associative array data storage method, characterized by, Comprising: Step S1, obtaining a target wildcard association array aa n and aa n Corresponding maximum key length B n The target wildcard association array is a wildcard association array in a user design whose maximum key length is greater than a preset length threshold, n is in a range of 1 to N, N is a total number of target wildcard association arrays in the user design, and the user design is a design written based on a SystemVerilog language. Step S2, obtain aa n The corresponding node to be inserted, aa[i] n , aa[i n ={K i n V i n }, K i n for aa[i] n The corresponding key, V i n for aa[i] n The corresponding value; Step S3, aa[i] is set n Set node information {P i n Q i n F i n}, P i n aa[i] is set n Key of the corresponding node, P i n Memory of a length of a preset length threshold is allocated, Q i n aa[i] is set n Value of the corresponding node, Q i n Memory of a length of a preset value length is allocated, F i n Key type identifier, if K i n The length of K i n First identifier, if K i n The length of K i n Second identifier; Step S4, if F i n is the first identity, then step S5 is performed, if F i n is the second identity, then step S6 is performed; Step S5, allocate a space E of length B in memory n i n Store K in E i n i n Store the address of E in K i n i n Store V in Q i n i n Perform step S7​​​​ Step S6, store K i n in P i n in V i n in Q i n Step S7 is executed. Step S7, inserting {P i n Q i n F i n} into aa n corresponding storage structure.

2. The method of claim 1, wherein, the step S1 comprises: Step S11, traversing the user design to obtain each wildcard associated array and the maximum key length corresponding to each wildcard associated array; Step S12, analyzing each wildcard associated array one by one, if the corresponding maximum key length is greater than the preset length threshold, determining the wildcard associated array as the target wildcard, otherwise, determining the wildcard associated array as the non-target wildcard.

3. The method of claim 2, wherein, the step S12 further comprises: Step S13, setting the length of the key type memory length of each non-target wildcard as the corresponding maximum key length.

4. The method of claim 1, wherein, the step S7 comprises: Step S71, setting j=1, and executing step S72; Step S72, judging whether the current aa n The key type identifier of the jth node in the corresponding storage structure corresponds to F i n If yes, step S73 is executed, otherwise, step S76 is executed. Step S73, if F i n is the first identity, then step S74 is performed, if F i n is the second identity, then step S75 is performed; Step S74, first acquire the address stored in the key of the jth node, and then read out the key value from the address stored in the key of the jth node i n If the comparison is the same, then no longer insert {P i n Q i n F i n}, end the process, otherwise, step S76 will be executed; Step S75, read out the key value from the key of the jth node directly and compare with K i n If not, insert {P, K} into the jth node i n If not, insert {P, K} into the jth node i n If not, insert {P, K} into the jth node i n If not, insert {P, K} into the jth node} and end the flow, otherwise, execute step S76; Step S76, if j < M, set j = j + 1, return to execute step S72, if j = M, insert {P i n ,Q i n ,F i n} into aa n M is the total number of nodes in the corresponding storage structure. n M is the total number of nodes in the corresponding storage structure.

5. The method of claim 1, wherein, the method further comprises: Step S100, acquiring aa n Corresponding storage structure to be accessed node information; Step S200, if the key type identifier in the to-be-accessed node information is the first identifier, executing step S300, and if it is the second identifier, executing step S400; Step S300, first obtaining the storage address of the key in the to-be-accessed node information, then reading out the key value from the storage address of the key in the to-be-accessed node information as the return value for return, and ending the process; Step S400, directly reading out the key value from the key in the to-be-accessed node information as the return value for return, and ending the process.

6. The method of claim 1, wherein, the preset length threshold is set as the computer addressing space size.

7. An electronic device, comprising: Comprising: at least one processor; and a memory connected in communication with the at least one processor; wherein the memory stores instructions executed by the at least one processor, the instructions are set to execute the method of any one of the preceding claims 1-6.

8. A computer-readable storage medium, characterized in that, Computer executable instructions are stored, and the computer executable instructions are used to execute the method of any one of the preceding claims 1-6.

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