Biochip for focusing electric field and manufacturing method thereof

Abstract

The invention discloses a biochip for focusing an electric field and a manufacturing method thereof, the biochip comprises a semiconductor insulation base layer, a conductive layer and an optional gold plating layer, the base layer is provided with array meshes, the conductive layer is attached to the side walls of the meshes and the bottom surface of the base layer and is conducted, and gaps are reserved between the meshes to separate independent electrode units. The manufacturing method comprises the steps of substrate selection, electrochemical corrosion / laser etching processing of the vertical through hole, three-stage cleaning, ultrasonic permeation coating of the conductive layer, step-by-step baking, laser positioning polishing and electroplating of the gold-plated layer. By means of multi-electrode collaborative focusing and low energy, high field intensity can be achieved, the cell fatality rate and skin irritation can be reduced, the focusing precision and the deep field intensity stability can be improved, the process is simplified, mass production is easy, and the method is suitable for transdermal drug delivery and skin beautifying scenes.

Description

Technical Field

[0001] This invention relates to the field of biochips, and more particularly to a biochip for focusing an electric field and a method for fabricating the same. Background Technology

[0002] With the proposal and in-depth research of the "drilling through the wall" theoretical model of skin electroporation, electroporation technology has been widely used in transdermal drug delivery, cosmetic dermatology, and other scenarios. Its core mechanism is to use high-voltage pulses as a "drill" to act on the stratum corneum barrier (with a resistance as high as 100-1000kΩ・cm²) composed of keratinocytes (bricks) and intercellular lipids (mortar), causing the lipid layer to undergo physical reconstruction and form nanoscale instantaneous pores. This allows for the efficient transdermal delivery of drugs / ingredients by breaking through the skin barrier, without directly affecting the living cell membrane.

[0003] However, in traditional electroporation technology, while high-voltage pulses penetrate the stratum corneum, they also damage the cell membranes of some living cells, leading to cell death. This high cell mortality rate not only affects the efficacy of skin rejuvenation and transdermal drug delivery but also further reduces treatment effectiveness due to the effects of exogenously introduced molecules. Furthermore, the electric field generated by high-voltage pulses stimulates the dilation of capillaries in the dermis, causing erythema and even mild swelling, severely impacting the user's experience and comfort.

[0004] Therefore, there is an urgent need to develop a new biochip structure and its fabrication method to solve these problems of traditional electroporation technology and improve the application effect of electroporation technology in fields such as skin care and transdermal drug delivery. Summary of the Invention

[0005] To address the aforementioned problems, this invention provides a biochip for focusing an electric field and a method for fabricating the same. To achieve the above objectives, this invention employs the following technical solutions: The first aspect of this invention provides a biochip for focusing an electric field, comprising: A semiconductor insulating base layer 1, wherein a plurality of arrayed mesh holes 11 are provided on the semiconductor insulating base layer 1; The conductive layer 2 is attached to the sidewall of the mesh 11 and the bottom surface of the semiconductor insulating base layer 1, and the conductive layer 2 on the sidewall of the mesh 11 is in communication with the conductive layer 2 on the bottom surface of the semiconductor insulating base layer 1.

[0006] Preferably, the top surface of the conductive layer 2 on the sidewall of the mesh 11 is flush with the top surface of the semiconductor insulating base layer 1.

[0007] Preferably, a gap 3 is left between adjacent meshes 11; the distance between the holes of adjacent meshes 11 is 100 nanometers to 500 micrometers.

[0008] Preferably, the semiconductor insulating base layer 1 divides the biochip into multiple arrayed electrode units 100 through gaps 3. Each electrode unit 100 includes an insulating core layer portion 101 and a conductive layer portion 102 covering the sidewalls and bottom surface of its corresponding insulating core layer portion 101. The gaps 3 are either empty or filled with conductive material.

[0009] Preferably, the biochip further includes a gold-plated layer 5 formed on the top surface of the conductive layer 2 on the sidewall of the mesh 11, wherein the top surface of the gold-plated layer 5 is planar.

[0010] In a second aspect, the present invention provides a method for fabricating a biochip for focusing an electric field, for fabricating the biochip described in the first aspect, comprising the following steps: S1. Select a substrate made of insulating or semiconductor material as the substrate for the semiconductor insulating base layer; S2. Multiple vertical through holes are processed on the substrate selected in step S1 using electrochemical etching or laser engraving processes. S3. Fix the semiconductor insulating base layer with the processed vertical through hole, apply conductive material to the surface of the semiconductor insulating base layer, so that the conductive material is evenly attached to the inside of the vertical through hole and the bottom and top surfaces of the substrate, so as to realize the conductivity between the conductive layer inside the vertical through hole and the conductive layer on the bottom surface of the substrate. S4. Polish the conductive layer on the top surface of the semiconductor insulating substrate to remove the top conductive layer, so that the top surface of the conductive layer of the vertical through hole is flush with the top surface of the semiconductor insulating substrate.

[0011] Preferably, step S2 includes: S21. Custom tooling fixture, wherein the tooling fixture has a built-in soft support structure; S22. Vacuum adsorption is used to fix the semiconductor insulating substrate to the surface of the soft support structure of the tooling fixture, and the uneven substrate is corrected by the plane correction plate of the tooling fixture. S23. Multiple vertical through holes are created on the corrected semiconductor insulating substrate by electrochemical etching or laser engraving.

[0012] Preferably, step S3 includes: S31. Using customized tooling fixtures, fix the semiconductor insulating base layer with vertical through holes; S32. Use a mesh plate that facilitates the penetration of conductive materials to cover the semiconductor insulating base layer; S33. Apply conductive material to the surface of the semiconductor insulating substrate through the mesh plate, and penetrate it into the vertical through-holes, the bottom surface of the substrate, and the top surface of the substrate through ultrasonic vibration, so as to make the conductive material evenly distributed. S34. The conductive layer is shaped by baking in an oven; Step S3 further includes: Before applying the conductive material, the semiconductor insulating substrate is subjected to a three-stage cleaning process: degreasing, impurity removal, and oxide layer removal. After applying the conductive material, the coating adhesion is enhanced by baking at progressively higher temperatures. After applying the conductive layer, a progressively higher temperature baking process is used to achieve a high degree of adhesion of the coating to the surface of the insulating base layer.

[0013] Preferably, step S4 includes: S41. Scan the surface height of the conductive layer on the top surface of the semiconductor insulating substrate using a laser sensor, generate a three-dimensional image, and program the polishing path. S42. Use a high-precision grinding machine to grind and polish, control the grinding depth and flatness deviation, and finely grind the remaining conductive layer on the top surface to ensure that the top surface of the conductive layer of the vertical through hole is flush with the top surface of the semiconductor insulating base layer after grinding.

[0014] Preferably, after step S4, the method further includes: S5. Cover the top surface of the exposed vertical through-hole conductive layer with a gold plating layer, immerse the semiconductor insulating substrate in the gold plating solution and electroplat it, so that the gold adheres to the top surface of the exposed conductive layer.

[0015] Compared with the prior art, the beneficial effects of the present invention are: 1. The biochip in this case uses an array of electrode units and an insulating gap to isolate the structure. When multiple electrodes work together, the electric field forms a constructive interference superposition in the target area (such as the stratum corneum) and a destructive interference in the non-target area. Only a low energy input of 0.5J / cm² is required to achieve a local field strength of more than 50V / cm. The cell lethality rate is reduced from more than 20% to less than 5%, completely avoiding skin erythema and swelling caused by high energy. At the same time, energy waste is reduced, thermal effects are reduced, and active ingredients (such as drugs and beauty essences) are not deactivated.

[0016] 2. This design utilizes a mesh spacing of 100 nanometers to 500 micrometers to precisely match the nanoscale gaps in the stratum corneum and the distribution of superficial dermal cells, enabling bidirectional adaptation for transdermal and deep-layer effects. Simultaneously, each additional pair of electrode units improves focusing accuracy by 15%, with deviations controlled within 8%, avoiding exposure of non-target tissues and meeting the precise electroporation needs of complex skin areas such as the face and joints.

[0017] 3. The manufacturing method in this case involves a simple process of substrate selection, through-hole processing, conductive material application, and top surface grinding. Vertical through-holes are created using electrochemical etching or laser engraving. The conductive material is then applied to adhere to the inside of the through-holes and the bottom and top surfaces of the substrate, ensuring conductivity. Finally, the top conductive layer is removed by grinding. On the one hand, the manufacturing method has fewer steps and does not require complex molds, enabling the production of biochips. Moreover, electrochemical etching and laser engraving processes offer high precision and are easy to mass-produce, stably producing uniform vertical through-holes and reducing production difficulty and cost. Simultaneously, the combined operation of coating and top surface grinding ensures uniform adhesion of the conductive layer and precisely achieves the structural requirement of retaining only the conductive layer inside the through-holes and on the bottom surface of the substrate while removing the top conductive layer. This ensures that the top surface of the conductive layer in the through-holes is flush with and at the same height as the top surface of the substrate, guaranteeing the structural foundation for multi-electrode collaboration from the manufacturing end. This lays a precise structural foundation for the subsequent formation of a focused electric field and effectively avoids the electric field dispersion problem caused by uneven conductive layer coverage and height differences in traditional processes. Thus, the biochip fabrication method in this case produces a biochip structure that meets the requirements of low-energy focusing, achieving low-voltage and high-field-strength performance. This indirectly solves the problem of cell and skin damage caused by traditional high-voltage operation. While ensuring the focusing electric field effect of the biochip, it also takes into account the economy of large-scale production and the safety of application. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the structure of the biochip in Embodiment 1 of this case.

[0019] Figure 2 yes Figure 1 Enlarged diagram of point C.

[0020] Figure 3 yes Figure 1 A schematic diagram of the structure under the AA cross-sectional view.

[0021] Figure 4 yes Figure 3 Enlarged diagram of point B.

[0022] Figure 5 This is a schematic diagram of a single electrode unit with a gold-plated layer added in Embodiment 1 of this case.

[0023] Figure 6 This is Example 1 of the case. Figure 4 A schematic diagram showing the addition of a gold plating layer to the base material. Detailed Implementation

[0024] The following examples further illustrate the features and other related characteristics of the present invention in detail, to facilitate understanding by those skilled in the art: Example 1 like Figures 1 to 6 As shown, a biochip for focusing an electric field includes: A semiconductor insulating substrate 1, which is made of insulating material or semiconductor material, and has an array of distributed mesh holes 11. A conductive layer 2 is attached to the sidewall of the mesh 11 and the bottom surface of the semiconductor insulating base layer 1, and the conductive layer 2 on the sidewall of the mesh 11 is in communication with the conductive layer 2 on the bottom surface of the semiconductor insulating base layer 1. In a specific implementation, the top surface of the semiconductor insulating base layer 1 is not covered by the conductive layer 2, and the top surface of the conductive layer 2 on the sidewall of the mesh 11 is flush with the top surface of the semiconductor insulating base layer 1, so as to form a focused electric field through the distribution of the mesh 11 and the conductive layer 2.

[0025] like Figure 5 In a preferred embodiment, the semiconductor insulating base layer 1 divides the biochip into multiple arrayed electrode units 100 through gaps 3. Each electrode unit 100 includes an insulating core layer portion 101 and a conductive layer portion 102 covering the sidewalls and bottom surfaces of its corresponding insulating core layer portion 101.

[0026] As described above, compared to existing technologies such as traditional single / bipolar planar electrodes and fully encapsulated conductive layer substrates, the biochip used in this invention for focusing electric fields is based on a semiconductor insulating substrate made of insulating or semiconductor materials. A multi-electrode collaborative framework is constructed through an array of mesh openings and a conductive layer attached to the sidewalls of the mesh openings and the bottom surface of the substrate. Through multi-electrode collaborative driving, the electric field forms a constructive interference superposition in the target area (such as the stratum corneum), generating a high local field strength without the need for traditional high-energy input. This significantly reduces the damage of high energy to living cells, lowering cell mortality and ensuring the efficacy of skin rejuvenation and transdermal drug delivery. Simultaneously, it avoids erythema and swelling caused by high-energy stimulation of dermal capillaries, significantly improving user comfort. Furthermore, this invention utilizes the gaps in the semiconductor insulating substrate to divide the chip into multiple arrayed electrode units. The insulating core layer and the conductive layer form independent electrode units, with adjacent units isolated by gaps, effectively avoiding electrode crosstalk. Moreover, the array layout provides a basis for expanding the number of electrodes. Each additional pair of electrode units can reduce the focusing range and improve focusing accuracy through the synergistic superposition of electric fields from multiple electrodes, thus solving the defects of traditional technology such as electric field dispersion and poor targeting that make non-target tissues susceptible to damage.

[0027] In a preferred embodiment, the top surface of the conductive layer 2 and the top surface of the semiconductor insulating base layer 1 are planar and flush (flatness deviation ≤ 10 nanometers). This ensures a highly uniform surface of the biochip, making it more comfortable for the user to touch and avoiding electric field concentration caused by local protrusions, further reducing the probability of local erythema and swelling on the skin. At the same time, it ensures the precision of the electric field acting on the stratum corneum without causing additional damage to deep living cells.

[0028] In one specific implementation, the gap 3 is either empty or filled with conductive material. The center-to-center distance between adjacent mesh holes 11 is 100 nanometers to 500 micrometers; that is, the spacing between adjacent holes of mesh 11 is 100 nanometers to 500 micrometers. When the gap 3 is filled with conductive material, the conductive material is not connected to the conductive layer of the electrode units on both sides. Specifically, an extremely thin insulating layer can be reserved between the conductive material and the electrode unit, and then the conductive material can be controlled by the process to fill only the gap and not directly contact the conductive layer of the electrode units on both sides. However, it can be selectively connected by an external circuit (such as setting lead contacts at the chip edge) to form an auxiliary current path. When it is necessary to enhance the field strength of a specific deep area of ​​the skin (such as the superficial dermis), a weak current can be input to the conductive material of the gap through the auxiliary path to generate a supplementary electric field, which is superimposed with the main electric field of the electrode unit to further offset the deep attenuation.

[0029] Thus, when the gaps are empty, the overall weight and manufacturing cost of the chip can be further reduced, and the gaps can provide insulation, enhancing the isolation effect of adjacent electrode units and preventing current crosstalk. When the gaps are filled with conductive material, electrode isolation can be ensured while the structural advantages can be expanded through the properties of the conductive material, serving as an auxiliary current path to supplement the electric field. In addition, the center-to-center distance between adjacent meshes of 100 nanometers to 500 micrometers is suitable for the nanoscale gaps (100-500 nanometers) of intercellular lipids in the stratum corneum, allowing for precise action on the stratum corneum barrier to form instantaneous channels; it can also cover the cell distribution density of the superficial dermis (covering multiple dermal cells within 500 micrometers), meeting the needs of electroporation at different depths. Compared to traditional electrodes without a fixed spacing (which are prone to insufficient field strength due to excessive spacing and energy concentration damage due to excessive spacing), this spacing range can take into account both transdermal and superficial dermal effects under low energy input, further broadening the application scenarios of electroporation technology.

[0030] like Figure 4 or Figure 5 As shown, the mesh is typically annular grooves, and the conductive layer 2 is U-shaped, covering the sidewalls and bottom surface of the semiconductor insulating base layer 1 corresponding to the electrode. Part of the conductive layer 2 at the edge is L-shaped. Thus, this invention clearly defines the electrode unit as having an internal insulating core and annular conductive layer structure, with adjacent units isolated by insulating gaps. A directional electric field (released towards the skin) can be formed through the annular conductive layer, and the insulating core prevents current leakage to the center, making each unit an independent micro-directional electrode. When multiple units are distributed in an array, the electric field can be synergistically superimposed and focused, achieving high local field strength (without high voltage) under low energy input, thus improving transdermal drug delivery efficiency while avoiding damage to living cells and capillaries from high voltage.

[0031] like Figure 5 and Figure 6As shown, in another specific embodiment, the biochip further includes a gold-plated layer 5 formed on the top surface of the conductive layer 2 on the sidewall of the mesh 11, wherein the top surface of the gold-plated layer 5 is planar. In a specific implementation, the gold-plated layer 5 may only cover the top surface of the conductive layer 2; in a more preferred embodiment, when the gap is empty, the gold-plated layer 5 not only covers the top surface of the conductive layer 2 on the sidewall of the mesh, but also extends to cover a 1-3 μm sidewall region beyond the top surface of the conductive layer 2, forming a 'brim-like' structure. This increases the contact area between the gold-plated layer and the skin, while avoiding the problem of easy oxidation at the junction of the conductive layer and the insulating layer on the sidewall of the mesh. When the gap is filled with conductive material, the gold-plated layer 5 not only covers the top surface of the conductive layer 2 on the sidewall of the mesh, but also extends to cover the top surface of the gap, working together with the gap to increase the contact area between the gold-plated layer and the skin. In this way, the antioxidant properties of gold can maintain the conductivity stability of the electrode for a long time, avoiding the need to increase the voltage to maintain the field strength due to electrode oxidation. From the perspective of long-term use, this continuously avoids the risks of cell death and skin discomfort caused by high voltage. At the same time, the flat top surface of the gold plating layer ensures that the gold plating layer adheres evenly to the skin surface, avoiding poor local contact caused by surface protrusions or depressions.

[0032] Example 2 A method for fabricating a biochip for focusing an electric field includes the following steps: S1. Select a substrate made of insulating or semiconductor material as the substrate for the semiconductor insulating base layer; S2. Multiple vertical through holes are processed on the substrate selected in step S1 using electrochemical etching or laser engraving processes. S3. Fix the semiconductor insulating base layer with the processed vertical through hole, apply conductive material to the surface of the semiconductor insulating base layer, so that the conductive material is evenly attached to the inside of the vertical through hole and the bottom and top surfaces of the substrate, so as to realize the conductivity between the conductive layer inside the vertical through hole and the conductive layer on the bottom surface of the substrate. S4. Polish the conductive layer on the top surface of the semiconductor insulating substrate to remove the top conductive layer, so that the top surface of the conductive layer of the vertical through hole is flush with the top surface of the semiconductor insulating substrate.

[0033] Specifically, the mesh described in Embodiment 1 is different from the vertical through hole in Embodiment 2. The vertical through hole is a vertical through hole extending from the top surface of the semiconductor insulating substrate to the bottom surface; the mesh described in Embodiment 1 is an annular groove composed of a vertical through hole on one side, a channel on the bottom surface of the semiconductor insulating substrate, and an adjacent vertical through hole on the other side; or it is an L-shaped groove composed of a vertical through hole on one side and a channel on the bottom surface of the semiconductor insulating substrate.

[0034] As described above, the manufacturing method of Embodiment 2 in this case involves a simple process of substrate selection, through-hole processing, conductive material coating, and top surface grinding. Vertical through-holes are created by electrochemical etching or laser engraving. The conductive material is then coated to adhere to the inside of the through-hole and the bottom and top surfaces of the substrate, creating a conductive connection. Finally, the top conductive layer is removed by grinding. On the one hand, the manufacturing method has fewer process steps and does not require complex molds, thus enabling the production of biochips. Moreover, electrochemical etching and laser engraving processes are highly precise and easy to mass-produce, stably producing uniform vertical through-holes and reducing production difficulty and cost. At the same time, the combined operation of coating and top surface grinding ensures uniform adhesion of the conductive layer and precisely achieves the structural requirement of retaining only the conductive layer inside the through-hole and the bottom surface of the substrate while removing the top conductive layer. This makes the top surface of the conductive layer of the through-hole flush with and at the same height as the top surface of the substrate, ensuring the structural foundation for multi-electrode collaboration from the manufacturing end. This lays a precise structural condition for the subsequent formation of a focused electric field and effectively avoids the problem of electric field dispersion caused by uneven coverage and height differences of the conductive layer in traditional processes. Thus, the biochip fabrication method in this case produces a biochip structure that meets the requirements of low-energy focusing, achieving low-voltage and high-field-strength performance. This indirectly solves the problem of cell and skin damage caused by traditional high-voltage operation. While ensuring the focusing electric field effect of the biochip, it also takes into account the economy of large-scale production and the safety of application.

[0035] In a preferred embodiment, step S2 includes: S21. Custom tooling fixture, wherein the tooling fixture has a built-in soft support structure; the soft support structure may be a silicone pad, or a flexible film such as a polyimide film (PI film) or a polytetrafluoroethylene film (PTFE film).

[0036] S22. Vacuum adsorption is used to fix the semiconductor insulating substrate to the surface of the soft support structure of the tooling fixture, and the uneven substrate is corrected by the plane correction plate of the tooling fixture. S23. Multiple vertical through holes are created on the corrected semiconductor insulating substrate by electrochemical etching or laser engraving. In specific implementation, air holes are provided in the planar correction plate, and a vacuum is drawn through the air holes to make the surface of the semiconductor insulating substrate tightly adhere to the planar correction plate, ensuring the flatness of the substrate during processing.

[0037] As mentioned above, the manufacturing process often involves problems such as uneven and fragile insulating substrates, leading to processing difficulties and a high number of defective products. The manufacturing method in this case involves customizing tooling fixtures and creating a flexible support structure within the tooling fixtures. This allows for easy drilling of the insulating substrate and protects the product from breakage. The flexible support prevents the substrate from cracking. At the same time, a planar correction plate eliminates unevenness in the substrate, ensuring accurate positioning of the through holes. This results in uniform and regularly arranged array mesh sizes, providing a precise structural foundation for multi-electrode collaborative focusing and avoiding the need for high-voltage adjustment of the electric field due to structural deviations.

[0038] In a preferred embodiment, step S3 includes: S31. Using customized tooling fixtures, fix the semiconductor insulating base layer with vertical through holes; S32. Use a mesh plate that facilitates the penetration of conductive materials to cover the semiconductor insulating base layer; S33. Apply conductive material to the surface of the semiconductor insulating substrate through the stencil, and use 20-50kHz ultrasonic vibration to penetrate into the vertical through-holes, the bottom surface of the substrate, and the top surface of the substrate to ensure uniform distribution of the conductive material. In practice, the non-perforated area of ​​the stencil (i.e., the part covering the semiconductor insulating substrate) does not completely block the material from covering the top surface. A small gap is left between the non-perforated area and the top surface of the substrate. When applying the material, some material will penetrate through the gap between the non-perforated area of ​​the stencil and the top surface under the action of gravity and ultrasonic vibration. A small amount of conductive material is allowed to penetrate, but the conductive material is prevented from accumulating too thickly on the top surface.

[0039] As mentioned above, uneven conductive layers and omissions in certain areas are common problems during the manufacturing process. The method in this case uses a customized tooling fixture to fix the insulating base layer to the fixture, which facilitates the accurate coverage of the conductive material mesh on the insulating base layer. Then, the conductive material is applied through the mesh. Finally, ultrasonic vibration is used to ensure that the conductive material is evenly and densely distributed on the surface of the insulating base layer.

[0040] In a preferred embodiment, step S3 further includes: Before applying the conductive material, the semiconductor insulating substrate is subjected to a three-stage cleaning process: degreasing, impurity removal, and oxide layer removal. After applying the conductive material, the coating adhesion is enhanced by progressively high-temperature baking. The conductive layer is then applied through a progressively high-temperature baking process to ensure that the coating adheres well to the surface of the insulating substrate. Specifically, the progressively high-temperature baking process involves first pre-baking at 80-100℃ for 30 minutes, then curing at 150-180℃ for 60 minutes, and finally stabilizing at 200-220℃ for 30 minutes.

[0041] As mentioned above, uneven conductive layers and their tendency to detach during manufacturing often lead to unstable electric fields requiring high voltage maintenance. This invention addresses this issue with a refined manufacturing process involving three-stage cleaning (degreasing / removing impurities / removing oxide layers), ultrasonic penetration, and progressively high-temperature baking. First, the three-stage cleaning removes surface obstacles, ensuring a tight adhesion of the conductive layer and preventing conductive breaks caused by detachment, eliminating the need for high-voltage compensation. Next, ultrasonic penetration ensures the conductive layer evenly covers the sidewalls and bottom of the through-holes, preventing weak electric fields caused by areas lacking the conductive layer. Finally, progressive baking enhances adhesion, ensuring long-term durability without detachment, again without the need for high voltage maintenance. Thus, this manufacturing method guarantees a uniform and robust conductive layer throughout the entire process, ensuring a stable electric field that can be focused with low energy, avoiding damage caused by high voltage.

[0042] In a preferred embodiment, step S4 includes: Step S4 includes: S41. Scan the surface height of the conductive layer on the top surface of the semiconductor insulating substrate using a laser sensor, generate a three-dimensional image, and program the polishing path. S42. A high-precision grinding machine with a positioning accuracy of ±0.5μm is used for grinding and polishing, controlling the grinding depth to 1-5μm and the flatness deviation to <10 nanometers. Fine grinding is performed on the remaining conductive layer on the top surface to ensure that the top surface of the conductive layer of the vertical through-hole is flush with the top surface of the semiconductor insulating substrate after grinding. Furthermore, before step S4, the conductive layer on the top surface of the semiconductor insulating substrate can be coarsely ground to remove 60%-70% of its thickness. This coarse grinding allows for the rapid removal of most of the top conductive layer, reducing the workload and time required for subsequent fine grinding, while also reducing the risk of surface damage to the substrate caused by the need to remove the entire conductive layer at once.

[0043] As mentioned above, the manufacturing process may involve issues such as residual or over-polished conductive layer on the top surface. Residue can lead to short circuits in the electrodes (requiring high voltage to separate the electric field), while over-polishing can result in electrode loss (requiring high voltage compensation). This invention utilizes a laser positioning and scanning process combined with a high-precision grinding machine. First, laser positioning ensures precise grinding paths to avoid residue or over-polishing. Then, the high-precision grinding machine ensures the top surface of the conductive layer is flush with the substrate, thus preventing electric field concentration. This achieves consistent electrode height and an intact conductive layer, eliminating the need for high-voltage adjustments to correct electric field deviations and indirectly reducing cell and skin discomfort caused by traditional high-voltage methods.

[0044] In a preferred embodiment, the method further includes the following step after step S4: S5. Cover the top surface of the exposed vertical via's conductive layer with a gold plating layer. Immerse the semiconductor insulating substrate in the gold plating solution and perform electroplating, allowing the gold to adhere to the top surface of the exposed conductive layer, with the top surface of the gold plating layer being flat. Specifically, when immersing the semiconductor insulating substrate in the gold plating solution, the conductive layer of the vertical via is used as the cathode and the gold as the anode. A direct current is applied for electroplating, allowing the gold to adhere to the top surface of the exposed conductive layer. The thickness of the gold plating layer is 0.1 to 1 micrometer. Thus, the excellent conductivity and chemical stability of the gold plating layer reduce the contact resistance between the conductive layer and the skin, reducing energy loss and ensuring efficient electric field transmission to the target area. Simultaneously, it prevents the conductive layer from oxidizing and corroding due to long-term contact with skin sweat and air, extending the chip's lifespan.

[0045] In summary, this invention discloses a biochip for focusing an electric field and its fabrication method. The biochip includes a semiconductor insulating substrate, a conductive layer, and an optional gold-plated layer. The substrate has an array of mesh openings, and the conductive layer is attached to the sidewalls of the mesh openings and the bottom surface of the substrate, and is conductive. Gaps are left between the mesh openings to separate independent electrode units. The fabrication method includes substrate selection, electrochemical etching / laser engraving of vertical through-holes, three-stage cleaning, ultrasonic penetration coating of the conductive layer, step-by-step baking, laser positioning and polishing, and electroplating of the gold layer. Through multi-electrode synergistic focusing, high field strength can be achieved with low energy, reducing cell lethality and skin irritation, improving focusing accuracy and deep field strength stability. Furthermore, the process is simplified and easy to mass-produce, making it suitable for transdermal drug delivery and cosmetic skin applications.

[0046] As stated above, this case protects a biochip for focusing an electric field and its manufacturing method. All technical solutions that are the same as or similar to this case should be considered to fall within the protection scope of this case.

Claims

1. A biochip for focusing an electric field, characterized in that, include: A semiconductor insulating substrate (1) is provided with a plurality of arrayed mesh holes (11). A conductive layer (2) is attached to the sidewall of the mesh (11) and the bottom surface of the semiconductor insulating base layer (1), and the conductive layer (2) on the sidewall of the mesh (11) is in communication with the conductive layer (2) on the bottom surface of the semiconductor insulating base layer (1).

2. The biochip according to claim 1, characterized in that, The top surface of the conductive layer (2) on the sidewall of the mesh (11) is flush with the top surface of the semiconductor insulating base layer (1).

3. The biochip according to claim 1, characterized in that, A gap (3) is left between adjacent meshes (11); the distance between the holes of adjacent meshes (11) is 100 nanometers to 500 micrometers.

4. The biochip according to claim 3, characterized in that, The semiconductor insulating base layer (1) divides the biochip into multiple arrayed electrode units (100) through gaps (3). Each electrode unit (100) includes an insulating core layer portion (101) and a conductive layer portion (102) covering the sidewalls and bottom surface of its corresponding insulating core layer portion (101). The gaps (3) are either empty or filled with conductive material.

5. The biochip according to claim 1, characterized in that, The biochip also includes a gold-plated layer (5) formed on the top surface of a conductive layer (2) on the sidewall of the mesh (11), wherein the top surface of the gold-plated layer (5) is planar.

6. A method for fabricating a biochip for focusing an electric field, characterized in that, The method for fabricating the biochip according to any one of claims 1-5 includes the following steps: S1. Select a substrate made of insulating or semiconductor material as the substrate for the semiconductor insulating base layer; S2. Multiple vertical through holes are processed on the substrate selected in step S1 using electrochemical etching or laser engraving processes. S3. Fix the semiconductor insulating base layer with the processed vertical through hole, apply conductive material to the surface of the semiconductor insulating base layer, so that the conductive material is evenly attached to the inside of the vertical through hole and the bottom and top surfaces of the substrate, so as to realize the conductivity between the conductive layer inside the vertical through hole and the conductive layer on the bottom surface of the substrate. S4. Polish the conductive layer on the top surface of the semiconductor insulating substrate to remove the top conductive layer, so that the top surface of the conductive layer of the vertical through hole is flush with the top surface of the semiconductor insulating substrate.

7. The method for fabricating a biochip for focusing an electric field according to claim 6, characterized in that, Step S2 includes: S21. Custom tooling fixture, wherein the tooling fixture has a built-in soft support structure; S22. Vacuum adsorption is used to fix the semiconductor insulating substrate to the surface of the soft support structure of the tooling fixture, and the uneven substrate is corrected by the plane correction plate of the tooling fixture. S23. Multiple vertical through holes are created on the corrected semiconductor insulating substrate by electrochemical etching or laser engraving.

8. The method for fabricating a biochip for focusing an electric field according to claim 6, characterized in that, Step S3 includes: S31. Using customized tooling fixtures, fix the semiconductor insulating base layer with vertical through holes; S32. Use a mesh plate that facilitates the penetration of conductive materials to cover the semiconductor insulating base layer; S33. Apply conductive material to the surface of the semiconductor insulating substrate through the mesh plate, and penetrate it into the vertical through-holes, the bottom surface of the substrate, and the top surface of the substrate through ultrasonic vibration, so as to make the conductive material evenly distributed. S34. The conductive layer is shaped by baking in an oven; Step S3 further includes: Before applying the conductive material, the semiconductor insulating substrate is subjected to a three-stage cleaning process: degreasing, impurity removal, and oxide layer removal. After applying the conductive material, the coating adhesion is enhanced by baking at progressively higher temperatures. After applying the conductive layer, a progressively higher temperature baking process is used to achieve a high degree of adhesion of the coating to the surface of the insulating base layer.

9. The method for fabricating a biochip for focusing an electric field according to claim 6, characterized in that, Step S4 includes: S41. Scan the surface height of the conductive layer on the top surface of the semiconductor insulating substrate using a laser sensor, generate a three-dimensional image, and program the polishing path. S42. Use a high-precision grinding machine to grind and polish, control the grinding depth and flatness deviation, and finely grind the remaining conductive layer on the top surface to ensure that the top surface of the conductive layer of the vertical through hole is flush with the top surface of the semiconductor insulating base layer after grinding.

10. The method for fabricating a biochip for focusing an electric field according to claim 6, characterized in that, The process after step S4 also includes: S5. Cover the top surface of the exposed vertical through-hole conductive layer with a gold plating layer, immerse the semiconductor insulating substrate in the gold plating solution and electroplat it, so that the gold adheres to the top surface of the exposed conductive layer.

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