Radar system with interference detection and test method

Abstract

The present disclosure relates to a radar system and a related method, wherein the radar system includes test circuitry and a controller. The controller causes the test circuitry to inject a first pair of test tones having a first test tone frequency and a first test tone amplitude into the first and second receiver modules; receiving first and second output signals from the first and second receiver modules, respectively; detecting interference based on the first pair of test tones and the first and second output signals; in response to detecting the interference, modifying the first test tone frequency to produce a second test tone frequency; in response to detecting the interference, the test circuitry is caused to inject a second pair of test tones having the second test tone frequency into the first receiver module and the second receiver module.

Description

Technical Field

[0001] The embodiments of the subject matter described herein generally relate to radar systems, such as automotive radar systems, including integrity testing procedures for such radar systems. Background Technology

[0002] Automotive radar solutions for Advanced Driver Assistance Systems (ADAS) are currently being deployed on a large scale and are typically implemented as long-range radar (LRR) or short-range radar (SRR) applications. Both applications generally use frequency-modulated continuous wave (FMCW) modulation technology to identify objects, such as vehicles or pedestrians, near the radar system. These radar systems typically utilize millimeter-wave (mmWave) frequencies to transmit and receive radar signals.

[0003] Automotive radar systems and their associated signals are susceptible to interference, which can originate from other automotive radar systems or other sources. This interference can pose a challenge when attempting to accurately and adequately process reflected radar signals. For example, with the increased use of automotive radar systems, the likelihood of experiencing inter-radar interference on the road increases, potentially reducing the performance of automotive radar detection systems. When a radar system experiences interference due to signals from other radar systems, its detection performance deteriorates. This interference can also affect the integrity testing process of the radar system. Summary of the Invention

[0004] Various exemplary embodiments are presented below. Some simplifications and omissions may be made in the following examples, which are intended to highlight and illustrate some aspects of the various exemplary embodiments, and are not intended to limit the scope.

[0005] In one or more embodiments, a radar system includes a plurality of receiver modules; a test circuit system configured to inject test tones into at least a first receiver module and a second receiver module of the plurality of receiver modules; and a controller configured to, for performing a test process, cause the test circuit system to inject a first pair of test tones having a first test tone frequency and a first test tone amplitude into each of the first receiver module and the second receiver module; receive from the first receiver module a first output signal generated in response to the first pair of test tones; receive from the second receiver module a second output signal generated in response to the first pair of test tones; detect interference based on the first pair of test tones, the first output signal, and the second output signal; modify the first test tone frequency to generate a second test tone frequency in response to detecting the interference; and cause the test circuit system to inject a second pair of test tones having the second test tone frequency into the first receiver module and the second receiver module in response to detecting the interference.

[0006] In one or more embodiments, the first receiver module includes a first low-noise amplifier (LNA), the second receiver module includes a second LNA, and the test circuitry is configured to inject the test tone at the inputs of the first LNA and the second LNA.

[0007] In one or more embodiments, the first test pitch amplitude includes a first amplitude of the first test pitch in the first pair of test pitches and a second amplitude of the second test pitch in the first pair of test pitches, the first output signal includes a first output pitch and a second output pitch, the second output signal includes a third output pitch and a fourth output pitch, and the controller is configured to detect the interference based on the first test pitch amplitude and based on the amplitudes of the first output pitch, the second output pitch, the third output pitch, and the fourth output pitch.

[0008] In one or more embodiments, to detect the interference, the controller is configured to perform interference detection on the first receiver module by: determining a first ratio of: a second ratio of the first amplitude of the first test tone to the second amplitude of the second test tone; and a third ratio of the amplitudes of the first output tone and the second output tone; and comparing the first ratio with a predetermined threshold range. To detect the interference, the controller is further configured to perform interference detection on the second receiver module by: determining a fourth ratio of: a second ratio of the first amplitude of the first test tone to the second amplitude of the second test tone; and a fifth ratio of the amplitudes of the third output tone and the fourth output tone; and comparing the fourth ratio with the predetermined threshold range. To detect the interference, the controller is further configured to determine that either the first ratio or the fourth ratio is outside the predetermined threshold range.

[0009] In one or more embodiments, the controller is further configured to cause the test circuitry to inject a third pair of test tones having a second test tone amplitude into the first receiver module and the second receiver module; determine, based on a third output signal generated by the first receiver module in response to the third pair of test tones and a fourth output signal generated by the second receiver module in response to the third pair of test tones, that interference at the first receiver module and the second receiver module is within a predetermined threshold range; and, in response to determining that interference at the first receiver module and the second receiver module is within the predetermined threshold range, cause the test circuitry to inject a fourth pair of test tones having a third test tone amplitude into the first receiver module and the second receiver module.

[0010] In one or more embodiments, the controller is further configured to: determine a gain mismatch between the first receiver module and the second receiver module in response to determining, based on the output signals generated by the first receiver module and the second receiver module in response to the fourth pair of test tones, that interference at the first receiver module and the second receiver module is within the predetermined threshold range.

[0011] In one or more embodiments, the test procedure is performed once after the chirped sequence is transmitted during each of a plurality of radar cycles of the radar system.

[0012] In an example embodiment, a method includes performing a test process for a radar system by: injecting a first pair of test tones having a first test tone frequency and a first test tone amplitude into each of a first receiver module and a second receiver module of the radar system by a test circuit system of the radar system; receiving a first output signal generated in response to the first pair of test tones from the first receiver module by a controller of the radar system; receiving a second output signal generated in response to the first pair of test tones from the second receiver module by the controller; detecting interference by the controller based on the first pair of test tones, the first output signal, and the second output signal; modifying the first test tone frequency to generate a second test tone frequency by the controller in response to detecting the interference; and injecting a second pair of test tones having the second test tone frequency into the first receiver module and the second receiver module by the test circuit system in response to the controller detecting the interference.

[0013] In one or more embodiments, injecting the first pair of test tones includes: injecting the first pair of test tones into a first low-noise amplifier (LNA) of the first receiver module by the test circuit system; and injecting the first pair of test tones into a second LNA of the second receiver module by the test circuit system.

[0014] In one or more embodiments, the first test pitch amplitude includes a first amplitude of the first test pitch in the first pair of test pitches and a second amplitude of the second test pitch in the first pair of test pitches, the first output signal includes a first output pitch and a second output pitch, the second output signal includes a third output pitch and a fourth output pitch, and detecting the interference includes: the controller detecting the interference based on the first test pitch amplitude and based on the amplitudes of the first output pitch, the second output pitch, the third output pitch, and the fourth output pitch.

[0015] In one or more embodiments, detecting the interference further includes performing interference detection on the first receiver module by: the controller determining a first ratio of the amplitude of the first test tone to the amplitude of the second test tone; and a third ratio of the amplitudes of the first output tone to the second output tone; and the controller comparing the first ratio with a predetermined threshold range. Detecting the interference further includes performing interference detection on the second receiver module by: the controller determining a fourth ratio of the amplitude of the first test tone to the amplitude of the second test tone; and a fifth ratio of the amplitudes of the third output tone to the fourth output tone; and the controller comparing the fourth ratio with the predetermined threshold range. Detecting the interference further includes the controller determining that either the first ratio or the fourth ratio is outside the predetermined threshold range.

[0016] In one or more embodiments, the method further includes: injecting a third pair of test tones having a second test tone amplitude into the first receiver module and the second receiver module by the test circuit system; determining, by the controller, that interference at the first receiver module and the second receiver module is within a predetermined threshold range based on a third output signal generated by the first receiver module in response to the third pair of test tones and a fourth output signal generated by the second receiver module in response to the third pair of test tones; and injecting a fourth pair of test tones having a third test tone amplitude into the first receiver module and the second receiver module in response to determining that interference at the first receiver module and the second receiver module is within the predetermined threshold range.

[0017] In one or more embodiments, the method further includes: determining, by the controller, interference at the first receiver module and the second receiver module within a predetermined threshold range based on output signals generated by the first receiver module and the second receiver module in response to the fourth pair of test tones; and determining gain mismatch between the first receiver module and the second receiver module.

[0018] In one or more embodiments, the method further includes: transmitting a chirped sequence by the radar system during each of a plurality of radar cycles; and performing the test procedure once after transmitting the chirped sequence during each of the plurality of radar cycles.

[0019] In an example embodiment, a radar front-end circuit system includes: a test circuit system configured to inject test tones into at least a first receiver module and a second receiver module; and a controller configured to: cause the test circuit system to inject a first pair of test tones having a first test tone frequency and a first test tone amplitude into each of the first receiver module and the second receiver module; receive from the first receiver module a first output signal generated in response to the first pair of test tones; receive from the second receiver module a second output signal generated in response to the first pair of test tones; detect interference based on the first pair of test tones, the first output signal, and the second output signal; modify the first test tone frequency to generate a second test tone frequency in response to detecting the interference; and cause the test circuit system to inject a second pair of test tones having the second test tone frequency into the first receiver module and the second receiver module in response to detecting the interference.

[0020] In one or more embodiments, the first receiver module includes a first low-noise amplifier (LNA), the second receiver module includes a second LNA, and the test circuitry is configured to inject the test tone at the inputs of the first LNA and the second LNA.

[0021] In one or more embodiments, the first test pitch amplitude includes a first amplitude of the first test pitch in the first pair of test pitches and a second amplitude of the second test pitch in the first pair of test pitches, the first output signal includes a first output pitch and a second output pitch, the second output signal includes a third output pitch and a fourth output pitch, and the controller is configured to detect the interference based on the first test pitch amplitude and based on the amplitudes of the first output pitch, the second output pitch, the third output pitch, and the fourth output pitch.

[0022] In one or more embodiments, to detect the interference, the controller is configured to perform interference detection on the first receiver module by: determining a first ratio of: a second ratio of the first amplitude of the first test tone to the second amplitude of the second test tone; and a third ratio of the amplitudes of the first output tone and the second output tone; and comparing the first ratio with a predetermined threshold range. To detect the interference, the controller is further configured to perform interference detection on the second receiver module by: determining a fourth ratio of: a second ratio of the first amplitude of the first test tone to the second amplitude of the second test tone; and a fifth ratio of the amplitudes of the third output tone and the fourth output tone; and comparing the fourth ratio with the predetermined threshold range. To detect the interference, the controller is further configured to determine that either the first ratio or the fourth ratio is outside the predetermined threshold range.

[0023] In one or more embodiments, the controller is further configured to cause the test circuitry to inject a third pair of test tones having a second test tone amplitude into the first receiver module and the second receiver module; determine, based on a third output signal generated by the first receiver module in response to the third pair of test tones and a fourth output signal generated by the second receiver module in response to the third pair of test tones, that interference at the first receiver module and the second receiver module is within a predetermined threshold range; and, in response to determining that interference at the first receiver module and the second receiver module is within the predetermined threshold range, cause the test circuitry to inject a fourth pair of test tones having a third test tone amplitude into the first receiver module and the second receiver module.

[0024] In one or more embodiments, the controller is further configured to: determine a gain mismatch between the first receiver module and the second receiver module in response to determining, based on the output signals generated by the first receiver module and the second receiver module in response to the fourth pair of test tones, that interference at the first receiver module and the second receiver module is within the predetermined threshold range. Attached Figure Description

[0025] A more complete understanding of the subject matter can be obtained by referring to the detailed description and claims when considered in conjunction with the following accompanying drawings, wherein the same reference numerals refer to similar elements throughout the drawings. Elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. The drawings, together with the detailed description, are incorporated into and form part of this specification and are used to further illustrate examples, embodiments, etc., and to interpret various principles and advantages according to this disclosure, wherein:

[0026] Figure 1 Radar systems according to various embodiments are shown, which can be configured to perform integrity tests with interference detection and avoidance as part of the built-in self-test (BIST);

[0027] Figure 2 Various embodiments of a radar system for operation (e.g.) are illustrated. Figure 1 An illustrative process flow for methods of (radar systems), including BIST and reconfiguration processes;

[0028] Figure 3 The diagram illustrates a BIST circuit system injecting a test signal into a radar system (e.g., as part of an integrity test process with interference detection and avoidance) according to various embodiments. Figure 1 In the two receiver modules of the radar system; and

[0029] Figure 4 An illustrative process flow is shown for a method of integrity testing with interference detection and avoidance according to various embodiments, including injecting a test signal into a radar system (e.g., Figure 1 (In the radar system) two or more receiver modules. Detailed Implementation

[0030] The following detailed description is illustrative in nature and is not intended to limit the embodiments described herein or the use of such embodiments. Furthermore, it is not intended to be construed as being bound by any express or implied theory presented in the foregoing technical field, background art, or the following detailed description.

[0031] For the sake of simplicity and clarity, the accompanying drawings illustrate a general construction. Descriptions and details of well-known features and techniques may be omitted from the following detailed description to avoid unnecessarily obscuring this disclosure. For example, the dimensions of some elements or regions in the drawings may be enlarged relative to other elements or regions to aid in understanding the embodiments described herein.

[0032] The terms “first,” “second,” “third,” “fourth,” etc. (if any) used in the specification and claims may be used to distinguish similar elements and are not necessarily used to describe a particular order or chronological sequence. It should be understood that such terms are interchangeable where appropriate, allowing the embodiments described herein to operate, for example, in an order different from that shown or described herein. Furthermore, the terms “comprise / include,” “having,” and any variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. As used herein, the terms “generally,” “substantially,” “largely,” and “substantially” mean sufficient to practically achieve the stated purpose, and minor defects (if present) are not important to the stated purpose.

[0033] In accordance with these principles, when used to refer to measurable quantities (including, but not limited to, dimensions), these terms mean that the quantity is equal to the stated value, subject to acceptable tolerances of any method or apparatus chosen for manufacturing the described structure or measuring the described quantity or dimension. Unless otherwise stated, directional references such as “top,” “bottom,” “left,” “right,” “above,” “below,” etc., are not intended to claim any preferred orientation, but are illustrative of the orientation of one or more corresponding figures for illustrative purposes. As used herein, the terms “exemplary” and “example” mean “used as an example, instance, or illustration.” Any embodiment described herein as exemplary or illustrative should not necessarily be construed as preferred or advantageous over other embodiments. Additionally, certain terms may be used herein for reference only and are therefore not intended to be restrictive.

[0034] In this document, elements, nodes, or features are sometimes referred to as “connected” or “coupled” together. As used herein, unless explicitly stated otherwise, “connected” means that one element is directly engaged to (or directly connected to) another element in an electrical or non-electrical manner, and not necessarily mechanically engaged to (or directly connected to) another element. Similarly, unless explicitly stated otherwise, “coupled” means that one element is directly or indirectly engaged to (or directly or indirectly connected to) another element in an electrical or non-electrical manner, and not necessarily mechanically engaged to (or directly or indirectly connected to) another element. Therefore, although the schematic illustrations shown in the accompanying drawings depict exemplary arrangements of elements, additional intermediate elements, devices, features, or components may be present in one or more embodiments of the depicted subject matter.

[0035] The various embodiments described herein relate to radar systems, such as automotive radar systems, configured to perform a receiver module integrity test process with interference detection and avoidance (e.g., as part of a built-in self-test (BIST) process). The radar system is configured to detect interfering signals (e.g., radar signals generated by other nearby radar systems) by injecting a test tone into two or more receiver modules under test and analyzing the output signals generated by the receiver modules to determine whether there are interfering signals that non-negligibly affect the output signals. When one or more interfering signals are detected based on interference levels in the output signals being outside a threshold range, the radar system can be configured to “avoid” the interfering signals by modifying the frequency of the injected test tone.

[0036] Conventional radar systems typically perform periodic self-tests to ensure the proper functioning of components in the transmit and receive chains. For example, such conventional radar systems often include receiver (RX) to RX phase difference and gain difference tests as part of this periodic integrity self-test to ensure proper functioning and accuracy of the radar system. These gain and phase difference tests are usually performed by injecting a single test tone into the mixer input of the active receive chain. However, performing this test by injecting the test tone at the mixer input may omit certain parts of the receive chain, such as the low-noise amplifier (LNA) at the receive chain input, and therefore does not verify the integrity of the entire receive chain.

[0037] The embodiments described herein address these challenges by injecting test tones at the input of the low-noise amplifier (LNA) of the active receiver module of a radar system as part of an integrity testing process (e.g., RX-to-RX gain difference testing). This provides greater coverage of the radar system's receiver chain compared to the conventional approach of injecting a single test signal at the mixer input. A potential drawback of performing test tone injection at the LNA is increased sensitivity to external interference signals (e.g., from nearby external radar systems, such as radar systems of nearby vehicles), which may undesirably reduce the reliability of integrity test results. To address this potential drawback, the embodiments described herein perform an interference detection and avoidance process as part of an integrity testing process, such as an RX-to-RX gain difference test, by injecting multiple (e.g., two) test tones with different amplitudes and frequencies into the LNAs of multiple active receiver modules under test, and then comparing the ratio of the amplitudes of the injected test tones (sometimes referred to herein as the "test tone ratio") with the ratio of the amplitudes of the output signals provided at the output of the receiver modules (sometimes referred to herein as the "output tone ratio"). If, for one or more of the receiver modules under test, the determined test tone ratio and output tone ratio are significantly different (e.g., the ratio of the test tone ratio to the output tone ratio exceeds or otherwise falls outside a predetermined threshold range), this can indicate a relatively high detected interference level at least at or near the test tone frequency. In response to the detection of an interference signal based on the comparison of the test tone ratio and the output tone ratio, a test tone with a modified frequency can be injected again in an attempt to avoid the interference signal.

[0038] For example, in one or more embodiments of the RX-RX gain difference test process, during the initial interference detection test, a first test tone and a second test tone can be generated with initial amplitude and frequency, and a combination of the first and second test tones can be injected into the corresponding inputs of the LNAs of two or more receiver modules of the radar system (e.g., where the first and second test tones are injected simultaneously, sometimes referred to herein as the sum of the first and second test tones). In one or more embodiments, the first and second test tones can be generated and injected by a BIST circuitry system included in the radar system. After the injection of the first and second test tones, the expected output signal of each receiver module can be a combination (e.g., a sum) of the first and second output tones. For each receiver module, the controller of the radar system can determine, based on the corresponding output signal, whether the ratio of the amplitudes of the first and second test tones is significantly different from the ratio of the amplitudes of the first and second output tones output by said receiver module. In one or more embodiments, such amplitudes of the test tones and output tones can be peak voltage amplitudes. This determination can be performed by comparing the ratio of the test pitch ratio to the output pitch ratio (e.g., in decibels) with a predetermined threshold range. In one or more embodiments, if the output pitch ratio differs significantly from the test pitch ratio, indicating that an interference signal may be affecting the output pitch, an additional interference detection test can be performed, in which a new pair of test pitches is generated and injected at a modified frequency.

[0039] In one or more embodiments, if the output tone ratio and the test tone ratio are not significantly different (e.g., based on a comparison of these ratios with a predetermined threshold range), this indicates that there may be no interfering signal at or near any of the test tone frequencies. To improve the accuracy and stability of the interference detection and avoidance process, after initially determining that no interfering signal is detected based on an initial test tone injection, the radar system can be configured to modify the test tone amplitude and then perform an additional interference detection test, wherein the test tone injection is performed using the modified test tone amplitude. By repeating the interference detection test with a different test tone amplitude after initially determining that no interfering signal is detected in this manner, the radar system can avoid the possibility of "false negative" results during the interference detection and avoidance process.

[0040] When the radar system determines (and in one or more embodiments, confirms through additional interference detection tests with different test tone amplitudes) that no interference signal affects the output signal generated by the receiver modules after the test tone injection, the radar system can be configured to perform RX-to-RX gain difference determination. For example, the radar system can determine the gain mismatch between these receiver modules based on the corresponding output signals generated by one or more pairs of receiver modules during the most recent interference detection test in the interference detection and avoidance process.

[0041] Figure 1 A schematic diagram of a radar system 100 is shown, which includes a radar device 102 (sometimes referred to herein as "radar communication circuitry system 102" or "radar front-end circuitry system 102") connected to a radar microcontroller and processing unit (MCPU) 104. The radar system 100 may include a built-in self-test (BIST) circuitry system 144 (sometimes referred to herein as "test circuitry system 144") configured by a controller 146 to perform an integrity test process, which includes interference detection and avoidance processes as part of a periodic (e.g., per cycle) integrity test process, wherein the BIST circuitry system 144 injects a test signal, which may include a first test tone and a second test tone, into the input of a low-noise amplifier 140 of two or more receiver modules 128. For example, controller 146 may be configured to compare a corresponding ratio (“output tone ratio”) of the amplitude (e.g., peak voltage) of the output tone at the output of receiver module 128 to a ratio (“test tone ratio”) of the amplitude (e.g., peak voltage) of the injected test tone to determine the presence of an interfering signal that affects the output tone. According to various embodiments, controller 146 may include, for example, any suitable controller, microcontroller, computer processing circuitry system, computer processing platform, etc., and may be implemented using hardware, software, or any suitable combination of hardware and software. In response to detecting an interfering signal affecting the output tone in this manner, controller 146 may modify the frequency of the test tone to “avoid” the interfering signal. Embodiments of this integrity testing process and the interference detection and avoidance process are described in more detail below.

[0042] In one or more embodiments, radar system 100 may be a multiple-input multiple-output (MIMO) radar system, such as a linear frequency modulation (LFM) MIMO radar system (e.g., an LFM automotive MIMO radar system). In one or more embodiments, radar device 102 may include radar front-end hardware. In one or more embodiments, radar device 102 may be embodied as a line-replaceable unit (LRU) or modular component designed for rapid replacement at the operating location. Similarly, radar MCPU 104 may be embodied as a line-replaceable unit (LRU) or modular component. Although a single or monostatic radar device is shown, it should be understood that additional distributed radar devices can be used to form a distributed or multistatic radar. Additionally, the depicted radar system 100 may be implemented as an integrated circuit, wherein, depending on the application, radar device 102 and radar MCPU 104 are formed on separate integrated circuits (chips) or on a single chip. According to various embodiments, radar system 100 may be implemented as part of an automotive system, such as an advanced driver assistance system (ADAS) for a vehicle, like vehicle 150. It should be understood that the components of the radar system 100 may be distributed on or within the vehicle 150 at various locations (e.g., the antenna may be located at one or more front, rear, or side panels of the vehicle 150, the front or rear bumper of the vehicle 150, or other suitable locations on the vehicle 150, or a combination of these locations; the processing circuitry, transmitter module, and receiver module may be located at one or more locations within the vehicle 150).

[0043] The radar device 102 includes one or more transmitting antenna elements 126 (sometimes referred to herein as “transmitting antenna 126”) and receiving antenna elements 142 (sometimes referred to herein as “receiving antenna 142”) respectively connected to one or more radio frequency (RF) transmitter (TX) modules 118 and receiver (RX) modules 128. Each transmitting antenna 126 and TX module 118 may be designated herein as TX1, TX2, TX3, ... TX m The corresponding transmit channel in the transmit channel group is associated with "m", where "m" is the total number of transmit (TX) channels. Each receive antenna 142 and RX module 128 can be associated with a channel designated herein as RX1, RX2, RX3, ... RX nThe corresponding receive channels in the receive channel group are associated, where "n" is the number of receive (RX) channels. As a non-limiting example, a radar device (e.g., radar device 102) may include separate antenna elements (e.g., antenna element 126) respectively connected to four transmitter modules (e.g., transmitter module 118) and sixteen receiver modules (e.g., receiver module 128). These numbers of transmitter and receiver antenna elements and modules are intended to be illustrative and not limiting; other numbers of these elements are possible in one or more other embodiments, such as four transmitter modules 118 and six receiver modules 128, or a single transmitter module 118 and / or a single receiver module 128. Radar device 102 includes a chirp generator 116 configured to supply a chirped input signal to the transmitter modules 118. To this end, the chirp generator 116 is configured to receive input program and control signals from the MCPU 104 via a digital-to-analog converter (DAC) 114, including, as a non-limiting example, a reference local oscillator (LO) signal, a chirp start trigger signal, and a program control signal. The chirp generator 116 is configured to generate a chirp signal and transmit it to the transmitter module 118 for transmission via the transmit antenna element 126. In one or more embodiments, each transmitter module 118 includes an RF conditioning module 122, which can be configured to filter the chirp signal. In one or more embodiments, the RF conditioning module 122 may include one or more frequency multipliers configured to increase the frequency of the chirp signal output by the chirp generator 116. Each transmitter module 118 includes a power amplifier 124 configured to amplify the filtered chirped signal before it is provided to and transmitted via one or more corresponding transmit antenna elements 126. In this document, the transmitted chirped signal is sometimes referred to as the “transmit signal”.

[0044] Radar signals transmitted by transmitter module 118 and transmitting antenna 126 can be reflected by objects in the environment of radar device 102, and a portion of the reflected radar signal (sometimes referred to herein as a “return signal” or “reflection”) is received by receiving antenna element 142 at radar device 102. In one or more embodiments, the reflected radar signal received via one of the receiving antenna elements 142 and a corresponding one in receiver module 128 corresponds to a chirp signal transmitted via one of the transmitting antennas 126 and a corresponding transmitter module 118, and such received radar signal may be referred herein as a “chirp,” “chirp signal,” or “received chirp signal.” Such received chirp signal may include interference components attributable to one or more interference signals in the environment of radar system 100. At each receiver module 128, the received (RF) antenna signal is amplified by low-noise amplifier (LNA) 140 and then fed to mixer 138, where the antenna signal is mixed with the transmitted chirp signal generated by RF conditioning module 122. The resulting intermediate frequency (IF) signal is fed to a high-pass filter (HPF) 136. The resulting filtered signal is then fed to a variable gain amplifier 134, which amplifies the resulting filtered signal before feeding it to a low-pass filter (LPF) 132. This re-filtered signal is then fed to an analog-to-digital converter (ADC) 130 and output as a digital signal by each receiver module 128 (e.g., to a signal processor 110 of the MCPU 104). In this way, the receiver module 128 compresses echoes with various delays into multiple sinusoidal tones, the frequencies of which correspond to the round-trip delays of the echoes.

[0045] In radar system 100, radar MCPU 104 can be connected and configured to supply input control signals to radar device 102 and receive digital output signals generated by receiver module 128 from radar device 102. In one or more embodiments, radar MCPU 104 includes radar controller 108 and signal processor 110 (sometimes referred to herein as "signal processing circuitry 110"), either or both of which can be embodied as a microcontroller unit or other processing unit. According to various embodiments, MCPU 104, radar controller 108, and signal processor 110 each include or are implemented by a computer processing circuitry system. Radar controller 108 can receive data from radar device 102 (e.g., from receiver module 128) and can control radar parameters of radar device 102, such as frequency band, length of each radar frame, etc., via DAC 114. For example, DAC 114 can be used to adjust the radar chirp signal output from chirp generator 116 included in radar device 102. Signal processor 110 can be configured and arranged for signal processing tasks, such as, but not limited to, object recognition, interference mitigation, calculation of distance or range to a detected object, calculation of the radial velocity of a detected object, and calculation of the angle of arrival (AoA) of a signal reflected by a detected object. In this document, the term "AoA" or "angle of arrival" refers to the angle of a reflected signal (e.g., a radar signal) incident on an antenna array. Signal processor 110 can provide calculated values ​​associated with such calculations to storage device 112 and / or other systems via interface 106.

[0046] As a non-limiting example, interface 106 enables MCPU 104 to communicate with other systems via local area networks and wide area networks, the Internet, automotive communication buses, and / or other types of wired or wireless communication systems. In one or more embodiments, MCPU 104 can provide calculated values ​​to other systems via interface 106, such as radar-camera-lidar fusion systems; automated driving assistance systems including parking, braking, or lane change assist features; etc. Storage device 112 can be used to store instructions from MCPU 104, received data from radar device 102, calculated values ​​from signal processor 110, etc. Storage device 112 can be any suitable storage medium, such as volatile or non-volatile computer-readable memory.

[0047] To control the transmitter module 118, the radar controller 108 may be configured, for example, to generate transmitter input signals, such as program, control trigger, reference local oscillator (LO) signal, calibration signal, and spectrum shaping signal (e.g., ramp generation in the case of frequency modulated continuous wave (FMCW) radar). The radar controller may be configured, for example, to receive data signals for RF (radio frequency) circuit enable sequences, sensor signals, and / or register programming or state machine signals.

[0048] At each receiver module 128, a digital output signal (e.g., as an ADC sample generated by ADC 130) is generated from the returned signal (i.e., the reflected radar signal received via RX module 128) for digital processing by signal processor 110 to construct and accumulate a multiple-input multiple-output (MIMO) array vector output forming a MIMO aperture for computing plots or graphs for AoA estimation and object trajectories. For example, upon receiving the raw ADC sample from ADC 130 of receiver module 128, signal processor 110 may perform one or more interference suppression processes on the digital output signal (e.g., the interference suppression process may include one or more recursive thresholding processes described herein) before processing the obtained interference-suppressed ADC sample using one or more Fast Fourier Transform (FFT) modules or Discrete Fourier Transform (DFT) modules (e.g., Fast Time (Range) FFT modules and Slow Time (Doppler) FFT modules). In one or more embodiments, processing of the interference-suppressed ADC samples by a fast-time FFT module generates a range chirped antenna cube (RCAC), and subsequent processing of the RCAC by a slow-time (Doppler) FFT module generates a range Doppler antenna cube (RDAC) (e.g., including a range Doppler response map for each RX antenna). Signal processor 110 can then perform constant false alarm rate (CFAR) detection on the range Doppler antenna cube to detect peaks in the RDAC. Signal processor 110 can further process the RDAC based on the detected peaks to construct a MIMO array vector, which is then processed to perform AoA estimation and object tracking. MCPU 104 can then output the resulting object trajectory (e.g., via interface 106) to other automotive computing or user interface devices for further processing or display.

[0049] Controller 146 may include an input coupled to the outputs of two or more ADCs 130 of two or more receiver modules 128. BIST circuitry 144 may include at least one input coupled to at least one output of controller 146 and may include the outputs of two or more LNAs 140 coupled to two or more receiver modules 128. BIST circuitry 144 may include any suitable combination of controller circuitry, digital-to-analog converter (DAC) circuitry, frequency multiplier circuitry, signal filtering circuitry, amplifier circuitry, phase-rotating circuitry, low-dropout (LDO) voltage regulator circuitry, or other circuitry suitable for generating test signals (e.g., "test tones") at various selectable amplitudes (e.g., peak voltages) and frequencies. According to various embodiments, the amplitude and frequency of a given test tone generated by BIST circuitry 144 may be programmably selected, may be selected based on control signals received from controller 146, or may be programmably selected based on control signals received from controller 146.

[0050] For example, during each radar cycle, the BIST circuitry 144 can be configured to generate a first test tone and a second test tone and provide (e.g., inject) them to the inputs of two or more LNAs 140 as part of an integrity test process, such as an RX-to-RX gain difference test process, wherein each of the first and second test tones can be generated by the BIST circuitry 144 at different frequencies and amplitudes, respectively. In one or more embodiments, the frequency and amplitude of the test tones injected by the BIST circuitry 144 can be selected based on control signals provided by the controller 146. In one or more embodiments, the frequency and amplitude of the first and second test tones initially injected by the BIST circuitry 144 can be based on predefined initial frequency and amplitude values ​​for an initial interference detection test. In one or more embodiments, the frequency and amplitude of the test tones subsequently injected by the BIST circuitry 144 during subsequent steps of the same interference detection and avoidance process can be modified based on the output tones provided at the outputs of two or more receiver modules 128, as described in more detail below.

[0051] In one or more embodiments, controller 146 and BIST circuitry 144 may be configured to perform one or more integrity test procedures, such as RX-RX gain difference testing or RX-RX phase difference testing. To verify the effectiveness of one or more such integrity test procedures, controller 146 may be configured to detect whether an external interference signal significantly affects the output tone generated in response to test tones injected in multiple interference detection tests. For example, BIST circuitry 144 may be configured to inject a first pair of test tones with initial frequencies and amplitudes at the inputs of LNA 140 of two or more receiver modules 128. Controller 146 may receive ADC samples from ADC 130, which represent the output signal at the end of the receive chain of receiver module 128 (e.g., in this example, the signal provided at the input of ADC 130). Controller 146 may be configured to determine, based on the received ADC samples, whether the output signal generated by receiver module 128 based on the injected pair of test tones is significantly affected by an interference signal (e.g., an external signal emitted by other nearby radar systems). For example, controller 146 can be configured to determine the level of interference from such interference signal by comparing the ratio of the amplitudes of the first tone and the second tone (“test tone ratio”) with the ratio of the amplitudes of the two tones of each output signal (“output tone ratio”), wherein each output signal is intended to include two tones.

[0052] In response to determining that the level of interference present in the output signal is outside a predetermined threshold range based on a comparison of the test tone ratio and the output tone ratio, the controller 146 may attempt to avoid the interference signal by configuring the BIST circuitry 144 to modify the frequency of the test tone (i.e., the "test tone frequency"). The controller 146 may then cause the BIST circuitry 144 to perform an additional interference detection test, wherein the BIST circuitry 144 injects another pair of test tones at the modified test tone frequency, and the controller 146 compares the test tone ratio with the output tone ratio determined during the additional interference detection test to evaluate the interference level. In one or more embodiments, the controller 146 may continue to modify the test tone frequency and perform additional interference detection tests, wherein the paired test tones are injected at the modified test tone frequency, until the controller 146 determines that the interference level is within the predetermined threshold range or until a predetermined time limit has elapsed.

[0053] In response to determining that the level of interference present in the output signal is sufficiently low based on a comparison of the test tone ratio with the output tone ratio determined during a given interference detection test (e.g., based on a threshold comparison, explained in more detail below), the controller 146 and the BIST circuitry 144 can proceed to subsequent steps of the integrity test procedure (e.g., determining the gain mismatch between paired receiver modules in the case of an RX-to-RX gain difference test). In this way, the controller 146 and the BIST circuitry 144 can mitigate the impact of interference signals on the integrity test procedure performed by the BIST circuitry 144.

[0054] In one or more embodiments, in response to controller 146 initially determining that the interference level of the output signal is within a predetermined threshold range based on a comparison of the test tone ratio with the output tone ratio determined during a given interference detection test, controller 146 can be configured to cause BIST circuitry 144 to modify the amplitude of the test tone (“test tone amplitude”). Controller 146 can then cause BIST circuitry 144 to perform an additional interference detection test, wherein BIST circuitry 144 injects another pair of test tones with the modified test tone amplitude, and controller 146 compares the corresponding test tone ratio with the obtained output tone ratio determined during the additional interference detection test to evaluate the interference level. By repeating the test tone injection and interference detection test with different test tone amplitudes after initially determining that the interference signal does not significantly affect the output tone, the likelihood of false negative results in the interference detection test can be advantageously reduced, thereby improving the accuracy and stability of the interference detection and avoidance process. The following is in conjunction with… Figure 3 and 4 An example embodiment of an interference detection and avoidance process that can be performed by radar system 100 or other suitable radar system (e.g., as part of an integrity test process or other BIST process) is described in more detail.

[0055] Figure 2 An illustrative process flow of method 200 is shown, which illustrates a radar front-end (RFE) radar cycle including the execution of one or more BIST procedures. The BIST procedures may include one or more integrity test procedures, such as RX-to-RX gain difference testing. The integrity test procedures may include interference detection and avoidance procedures (e.g., as a non-limiting example, ...). Figure 4 (An embodiment of method 400). Method 200 can use the RFE circuitry of a radar system according to one or more embodiments (e.g., Figure 1 The radar system 100 includes a radar front-end circuit system 102 to perform this operation. The radar system may include a BIST circuit system (e.g., Figure 1 BIST circuit system 144) and controller (e.g., Figure 1 (Controller 146). Reference Figure 1 The method 200 describes the components of the radar system 100. However, it should be understood that this is illustrative and not limiting, at least because other suitable radar systems can be used to perform method 200 in one or more other embodiments.

[0056] In block 202, the radar front-end circuitry 102 performs a calibration process (e.g., the calibration process may include phase calibration, frequency calibration, gain calibration or other suitable calibration process).

[0057] In block 204, radar front-end circuitry 102 transmits a chirp sequence (e.g., a radar chirp signal sequence) via transmitter module 118 and transmit antenna 126, and receives reflections of the transmitted chirp via receiver module 128 and receive antenna 142. Reflections of the transmitted chirp can be reflected by one or more objects in the environment of radar system 100. Such reflections are sometimes referred to herein as “reflected radar signals.”

[0058] In block 206, after transmitter module 118 and transmit antenna 126 have transmitted the chirped sequence and receiver module 128 and receive antenna 142 have received the corresponding reflections, radar front-end circuitry system 102 performs one or more BIST procedures. Such BIST procedures may include one or more integrity test procedures, such as RX-RX gain difference testing or RX-RX phase difference testing between two or more receiver modules of receiver module 128.

[0059] In one or more embodiments, the radar front-end circuitry 102 may be configured to perform one or more interference detection and avoidance processes (e.g., corresponding to...) before performing an RX-to-RX gain difference test between two or more receiver modules in receiver module 128 in block 206. Figure 4 (An embodiment of method 400). As part of the interference detection and avoidance process, the radar front-end circuitry 102 may inject a pair of test tones into two or more receiver modules 128 at varying amplitudes, frequencies, or both, and may compare the ratio of the injected test tones with the output tone ratio of each receiver module under test to determine whether an external interfering radar signal significantly affects the output signal (and thus may undesirably affect the result of the gain mismatch determination between receiver modules), as described below. Figure 3 and 4 The example explains this in more detail.

[0060] In one or more embodiments, during the interference detection and avoidance process, the radar front-end circuitry can be configured to perform gain mismatch calculations as part of an RX-RX gain difference test between two or more pairs of receiver modules 128 under test. This calculation can be based on the output tone generated by those receiver modules in a recent interference detection test (i.e., an interference detection test in which the controller 146 determines the output tone is not significantly affected by the interference signal). By performing the interference detection and avoidance process as part of the RX-RX gain difference test in this manner, interference signals can be avoided, thereby advantageously preventing or mitigating the negative impact on the accuracy and reliability of the RX-RX gain difference test caused by such interference signals.

[0061] In block 208, the radar front-end circuitry 102 can be reconfigured or can remain idle until method 200 returns to block 202 (e.g., in block 202, a recalibration of the radar front-end circuitry can be performed).

[0062] Figure 3 An illustrative block diagram 300 is shown, representing tone injection that can be performed as part of an integrity testing process. (See attached diagram.) Figure 1 The elements of the radar system 100 in FIG300 are described herein, and the same reference numerals are used to denote the same elements. However, it should be understood that this is illustrative and not limiting, at least in one or more other embodiments, other suitable radar systems may be used to perform the test signal (e.g., “test tone”) injection process and one or more associated integrity test processes (e.g., RX to RX gain difference test) shown in FIG300.

[0063] Figure 300 illustrates a first receiver module 128-1 and a second receiver module 128-2. In one or more embodiments, the receiver module may include... Figure 1 The receiver module 128 of the radar system. The BIST circuit system 144 and the controller circuit system 146 can be configured to perform an interference detection and avoidance process before performing an RX-to-RX gain difference test.

[0064] Using conventional methods to perform RX-to-RX gain difference testing, the gain mismatch between the first receiver module and the second receiver module will be calculated according to Equation 1:

[0065]

[0066] GainMM 12This refers to the gain mismatch between the first and second receiver modules. VIN1 is the amplitude (e.g., peak voltage) of the signal input to the LNA of the first receiver module, VIN2 is the amplitude (e.g., peak voltage) of the signal input to the LNA of the second receiver module, VOUT1 is the amplitude (e.g., peak voltage) of the signal output by the first receiver module given the input signal VIN1, and VOUT2 is the amplitude (e.g., peak voltage) of the signal output by the second receiver module given the input signal VIN2. Given VIN1 = VIN2, it means the input signal amplitudes are equal, and the gain mismatch can be calculated based on the ratio of the first output signal amplitude VOUT1 to the second output signal amplitude VOUT2.

[0067] However, in the presence of significant interference signals, this calculation no longer accurately reflects the gain mismatch between receiver modules, as shown in Equation 2:

[0068]

[0069] Here, interf1 represents the amplitude of the interference signal received at the first receiver module, and interf2 represents the amplitude of the interference signal received at the second receiver module. Typically, in the presence of external interference, interf1 is not equal to interf2, making VIN1 + interf1 not equal to VIN2 + interf2. As shown in Equation 2, the contribution of the interference signal causes the result of the gain mismatch calculation to not accurately reflect the actual gain mismatch between the first and second receiver modules, which is undesirable.

[0070] According to embodiments herein, interference in the output signal can be detected by injecting a pair of test tones instead of a single test tone, and when interference is detected, such interference from external interference signals that may affect the RX-RX gain difference test can be mitigated or avoided by modifying the frequencies of the injected test tones (e.g., VIN1, VIN2 in Equations 1 and 2) to further deviate from the frequency of the interference signal. For example, the BIST circuit system 144 and controller 146 can perform interference detection and avoidance processes to mitigate the effects of interference signals on, for example, the RX-RX gain difference test. In one or more embodiments, to perform the interference detection and avoidance processes, the BIST circuit system 144 and controller 146 can be configured to perform multiple interference detection tests. When performing an interference detection test, the BIST circuit system can inject a pair of test tones TONEA and TONEB into the input of the LNA 140 of each receiver module under test (in this example, receiver modules 128-1 and 128-2). BIST circuitry 144 can be configured to inject each pair of test tones simultaneously, such that the combined signal injected into each LNA 140 is given as TONEA + TONEB. Each of receiver modules 128-1 and 128-2 can use various elements of the receiver chain (e.g., LNA 140, mixer 138, HPF 136, variable gain amplifier 134, and LPF 132, as non-limiting examples) to process the injected signal TONEA + TONEB to produce an output signal. It is contemplated that each output signal generated by a receiver module based on the injected test tones includes a pair of output tones VOUTA and VOUTB, which are received at the input of ADC 130. Here, the output tones generated by receiver module 128-1 are given as VOUT1A and VOUT1B, and the output signal is given as VOUT1A + VOUT1B. Here, the output tones generated by receiver module 128-2 are given as VOUT2A and VOUT2B, and the output signal is given as VOUT2A+VOUT2B.

[0071] Under conditions unaffected by external signals, the expected test tone ratio is equal to the output tone ratio of the output tones of each of receiver module 128-1 and receiver module 128-2, as shown in Equation 3:

[0072]

[0073] However, interference signals with frequencies similar to any one or two of the test tones may affect the amplitude of the output tone. Equation 4 illustrates an example of how interference can affect the output tone ratio at the output of receiver module 128-1:

[0074]

[0075] Where VOUT1A and VOUT1B are the expected output tones, and interf is the interference component attributable to one or more interference signals received at the antenna of receiver module 128-1. During each interference detection test, given a pair of injected test tones TONEA and TONEB, controller 146 of a given receiver module can be configured to perform interference detection calculations to determine the interference level of a particular pair of output tones VOUTA and VOUTB, the interference level including the interference component. In one or more embodiments, controller 146 may receive ADC samples from ADC 130 and may determine the output tone amplitude based on the received ADC samples. Controller 146 can then perform interference detection calculations according to Equation 5 to determine whether significant interference has affected the output tone by comparing the logarithmic ratio of test tone ratio TONEA / TONEB to the logarithmic ratio of output tone ratio VOUTA / VOUTB.

[0076]

[0077] In the example of Equation 5, sometimes referred to herein as "interference detection calculation," the ratio of the test pitch ratio to the output pitch ratio is converted to decibels (dB), and the result is compared to a predetermined threshold range between TH1 dB and TH2 dB, where TH1 represents the upper limit of the predetermined threshold range and TH2 represents the lower limit of the predetermined threshold range. In one or more embodiments, TH1 = 1 dB and TH2 = -1 dB, but this should be understood as an illustrative and non-limiting example such that other suitable upper and lower thresholds may be used to implement the predetermined threshold range according to one or more other embodiments.

[0078] In one or more embodiments, if the determined ratio of the test pitch ratio to the output pitch ratio is within a predetermined threshold range (between 1 dB and -1 dB in one or more embodiments), the difference between the test pitch ratio and the output pitch ratio is relatively small, such that the interference level is considered relatively low or "insignificant." That is, given such a condition, no interference signal is considered to significantly affect the output pitch.

[0079] If the determined ratio of the test pitch ratio to the output pitch ratio is outside a predetermined threshold range (greater than 1 dB or less than -1 dB in one or more embodiments), the difference between the test pitch ratio and the output pitch ratio is relatively large, making the interference level considered relatively high or "significant". That is, given such a condition, one or more interference signals are considered to significantly affect the output pitch.

[0080] In one or more embodiments, at the start of the interference detection and avoidance process, an initial interference detection test is performed, wherein the BIST circuitry 144 can be configured to inject a first pair of test tones into the LNA 140 of the receiver modules 128-1 and 128-2. For example, the BIST circuitry 144 can output a first test tone (e.g., TONEA) of the first pair of test tones at a first frequency and a first amplitude (e.g., peak voltage). The BIST circuitry 144 can output a second test tone (e.g., TONEB) of the first pair of test tones at a second frequency and a second amplitude (e.g., peak voltage) different from the first frequency and the first amplitude. The injected first pair of test tones can be processed by the receiver chain of each of receiver modules 128-1 and 128-2 (e.g., as a non-limiting example, where the receiver chain includes LNA 140, mixer 138, HPF 136, variable gain amplifier 134, and LPF 132) to generate a first output signal including a first pair of output tones (e.g., VOUT1A+VOUT1B) output by receiver module 128-1 and a second output signal including a second pair of output tones (e.g., VOUT2A+VOUT2B) output by receiver module 128-2. The ADC 130 of each of receiver modules 128-1 and 128-2 can receive the corresponding output signal, perform analog-to-digital conversion of the output signal, and provide the converted output signal to controller 146 (e.g., as an ADC sample).

[0081] For each of the first and second output signals, controller 146 can determine the amplitude of each pair of output tones based on the corresponding ADC sampling, and subsequently perform a corresponding interference detection calculation. For example, controller 146 can use the test tone ratio of the first pair of test tones and the output tone ratio of the first pair of output tones to perform an interference detection calculation according to Equation 5 to perform an interference detection calculation for the first output signal. Controller 146 can use the test tone ratio of the first pair of test tones and the output tone ratio of the second pair of output tones to perform an interference detection calculation according to Equation 5 to perform an interference detection calculation for the second output signal.

[0082] In response to the determination that the ratio of the test tone ratio to the output tone ratio is outside a predetermined threshold range in either the first or second output signal, thereby indicating that interference has been detected, the controller 146 can be configured to modify the test tone frequency (e.g., increase or decrease the test tone frequency by a predetermined amount, as described above). The controller 146 and the BIST circuitry 144 can then perform an additional interference detection test, wherein the BIST circuitry 144 injects a second pair of test tones characterized by the modified test tone frequency, and can perform an interference detection calculation based on the test tone ratio of the second pair of test tones and the output tone ratio of the resulting output signals generated at the first receiver module 128-1 and the second receiver module 128-2 in response to the injection of the second pair of test tones (e.g., according to Equation 5). Whenever interference is detected as a result of the interference detection test, the controller 146 and the BIST circuitry 144 can be configured to perform an additional interference detection test in such a manner that the test tone frequency is further modified. Such a configuration can cause the controller 146 and the BIST circuit system 144 to repeatedly modify the test tone frequency and perform an interference detection test at the modified test tone frequency until no interference is detected in either output signal as a result of the interference detection calculation, or until a predetermined amount of time has elapsed.

[0083] In one or more embodiments, controller 146 may be configured to require that no interference be detected in two consecutive interference detection tests prior to performing gain mismatch detection, each interference detection test using a different test tone amplitude. Such a requirement can advantageously reduce the likelihood that a “false negative” result from a single interference detection test could impair the accuracy and reliability of subsequent integrity testing process steps (e.g., RX-to-RX gain difference testing process steps, such as gain mismatch calculation). For example, in response to determining that the ratio of the test tone ratio to the output tone ratio is within a predetermined threshold range for both output signals during a given interference detection test, indicating that no interference was detected, and additionally in response to determining that interference was detected in an interference detection test immediately preceding the given interference detection test, controller 146 may be configured to modify the test tone amplitude (e.g., increase or decrease the test tone amplitude by a predetermined amount, such as 10 dBm as a non-limiting example), while maintaining the test tone frequency the same as when no interference was detected. Then, the controller 146 and the BIST circuit system 144 can perform additional interference detection tests, wherein the BIST circuit system 144 injects an additional pair of test tones with a modified test tone amplitude (but the same test tone frequency), and can perform interference detection calculations based on the test tone ratio of the additional pair of test tones and the output tone ratio of the resulting output signals generated at the first receiver module 128-1 and the second receiver module 128-2 in response to the injection of the additional pair of test tones (e.g., according to Equation 5).

[0084] In response to determining that interference was detected as a result of the additional interference detection test, controller 146 and BIST circuitry 144 may modify the test tone frequency again and perform the additional interference detection test as described above. In response to determining that no interference was detected as a result of the additional interference detection test, controller 146 and BIST circuitry 144 may stop the interference detection test, and controller 146 may continue the RX-RX gain difference test by determining the gain mismatch between the first receiver module 128-1 and the second receiver module 128-2 based on the output signal from the additional interference detection test (i.e., the output signal from the most recent interference detection test). In one or more embodiments, the gain mismatch calculation may be performed by controller 146 according to Equation 1 above.

[0085] Figure 4 An example of an integrity testing process that may include interference detection and avoidance processes (such as those described in this example) is shown.

[0086] Figure 4 An illustrative process flow of method 400 is shown, through which the circuitry of the radar system (e.g., Figure 1 and 3The radar system 100's BIST circuitry 144 and controller 146 can perform an RX-RX gain difference test, including an interference detection and avoidance process according to embodiments herein. In one or more embodiments, method 400 can be performed as part of the BIST process (e.g., as a non-limiting example, ...). Figure 2 Method 200 (box 206) is executed once per radar cycle. See here for reference. Figure 1 The method 400 describes the components of the radar system 100. However, it should be understood that this is illustrative and not limiting, at least because other suitable radar systems can be used to perform method 400 in one or more other embodiments.

[0087] In box 402, controller 146 initializes variable i and initializes the test tone amplitude and test tone frequency. In this example, variable i is initialized to the value 0. As a non-limiting example, controller 146 may initialize a first test tone frequency with a first frequency value between 76 GHz and 77 GHz, and may initialize a second test tone frequency with a second frequency value between 76 GHz and 77 GHz, wherein the first frequency value and the second frequency value are offset by a frequency difference in the range of approximately 100 kHz to approximately 20 MHz. As a non-limiting example, controller may initialize the first test tone amplitude to a first amplitude value of 0 dBm, and may initialize the second test tone amplitude to a second amplitude value of 10 dBm.

[0088] Here, the “test tone frequency” of a specific test tone refers to the center frequency of the test tone. In one or more embodiments, modifying the test tone frequency may include increasing or decreasing each test tone frequency by a predetermined amount, said predetermined amount may be between 100 kHz and 20 MHz (e.g., 1 MHz as a non-limiting example), but it should be understood that, according to one or more other embodiments, the predetermined amount may be a frequency outside this range. In one or more embodiments, as a non-limiting example, the initial frequency and modified frequency of the test tone injected by the BIST circuit system 144 may be between 76 GHz and 77 GHz.

[0089] In block 404, controller 146 causes BIST circuitry 144 to inject test tones into at least two receiver modules in receiver module 128 with defined test tone amplitude and test tone frequency. Each receiver module 128 under test can receive the simultaneously injected pair of test tones from BIST circuitry 144 at, for example, an input of the LNA 140 of the receiver module. During the first iteration corresponding to the initial interference detection test, the defined test tone amplitude and test tone frequency correspond to the initial test tone amplitude and test tone frequency defined in block 402. During subsequent iterations, corresponding to additional interference detection tests performed after the initial interference detection test, the defined test tone amplitude or test tone frequency may differ from the initial test tone amplitude or test tone frequency due to modification of the test tone frequency in block 412 or modification of the test tone amplitude in block 416 as described below.

[0090] In block 406, controller 146 determines the output tone amplitudes of each pair of output tones included in the output signal generated by each receiver module under test, wherein the receiver module generates the output signal in response to an injected test tone. For example, controller 146 may receive a digital representation (e.g., an ADC sample) of the output signals generated by the receiver modules, wherein each output signal is intended to include two (e.g., a pair) output tones that may be mixed or otherwise combined.

[0091] In block 408, controller 146 performs an interference detection calculation for each receiver module under test, based on the ratio of the test tone ratio to the output tone ratio of the receiver module. For example, the test tone ratio may be given as the amplitude of a first injected test tone (e.g., TONEA) divided by the amplitude of a second injected test tone (e.g., TONEB). The output tone ratio may be given as the amplitude of a first output tone of the output signal generated by the receiver module divided by the amplitude of a second output tone of the output signal. In one or more embodiments, the interference detection calculation for a given receiver module may be performed by controller 146 as a comparison of the ratio of the test tone ratio to the output tone ratio of the given receiver module (in decibels) with a predetermined threshold range. In one or more embodiments, the interference detection calculation may be performed by controller 146 according to Equation 5 above.

[0092] The controller 146 can determine whether interference is detected based on the results of these interference calculations. For example, the controller 146 can determine that interference is detected by determining that the ratio of the test tone ratio to the output tone ratio of any receiver module under test is outside a predetermined threshold range. For example, the controller 146 can determine that no interference is detected in response to determining that each ratio of the test tone ratio to the output tone ratio of each receiver module under test is within a predetermined threshold range.

[0093] In block 410, if controller 146 determines that interference is detected in block 408, then method 400 proceeds to block 412. Otherwise, if controller 146 determines that no interference is detected in block 408, then method 400 proceeds to block 414.

[0094] In block 412, in response to interference detected in block 410, controller 146 resets the value of i (e.g., to zero) and modifies (e.g., increases or decreases a predetermined frequency amount) the defined test tone frequency to be used when injecting the test tone during the next iteration in block 404. Method 400 then returns to block 404 to inject a pair of test tones (at the newly modified defined test tone frequencies) into the receiver module under test to begin additional iterations of the interference detection test.

[0095] In block 414, in response to no interference detected in block 410, controller 146 determines whether i = n, where n is a predetermined value used to track the number of sequential interference detection tests in which no interference was detected. In one or more embodiments where i is reinitialized to zero, n may be equal to 1, such that two sequential interference tests in which no interference was detected are required to determine gain mismatch in block 418. Alternatively, n may be equal to a number greater than 1, such that more than two sequential interference tests in which no interference was detected are required to determine gain mismatch in block 418.

[0096] If i ≠ n, then method 400 proceeds to box 416. If i = n, then method 400 proceeds to box 418.

[0097] In block 416, in response to controller 146 determining i ≠ n, controller 146 increments i by 1 and modifies (e.g., increases or decreases) one or both of the defined test tone amplitudes to be used when injecting the test tone in block 404. Method 400 then returns to block 404 to inject a pair of test tones (with the newly modified defined test tone amplitude and candidate test tone frequency) into the receiver module under test to initiate additional interference detection testing. By modifying the test tone amplitude in this way and performing one or more additional interference detection tests with the modified test tone amplitude, the probability of non-interference "false negative" determinations can be advantageously avoided.

[0098] In block 418, in response to controller 146 determining i = n, controller 146 may determine that the current test tone frequency is acceptable, and controller 146 may determine the gain mismatch between receiver modules by performing a gain mismatch calculation (e.g., according to Equation 1 above) based on the output signal of the receiver modules determined during a recently performed interference detection test. In one or more embodiments, in block 418, controller 146 may store the current test tone frequency in memory.

[0099] Although the operations of the methods herein are shown and described in a specific order, the order of operations of each method may be changed such that some operations may be performed in reverse order, or that some operations may be performed at least partially concurrently with other operations. In one or more other embodiments, instructions or sub-operations of different operations may be implemented in an intermittent and / or alternating manner.

[0100] It should also be noted that at least some operations of the methods described herein can be implemented using software instructions stored on a computer-usable storage medium for execution by a computer. For example, embodiments of a computer program product include a computer-usable storage medium for storing a computer-readable program. A computer-usable or computer-readable storage medium can be an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system (or device or apparatus). Examples of non-transitory computer-usable and computer-readable storage media include semiconductor or solid-state memory, magnetic tape, removable computer disks, random access memory (RAM), read-only memory (ROM), rigid disks, and optical disks.

[0101] Alternatively, the embodiments described herein can be implemented entirely in hardware or in implementations that include both hardware and software elements. In software-based embodiments, the software may include, but is not limited to, firmware, resident software, microcode, or other suitable software.

[0102] As used herein, the terms “circuit” and “circuit system,” including the term “processing circuit system” and related terms, refer to any suitable combination of analog or digital circuit elements, hardware, firmware, software, etc.; including but not limited to application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), microcontrollers, and microprocessors. It should be understood that the term “circuit system” encompasses non-volatile and volatile memory devices, including but not limited to random access memory (RAM), read-only memory (ROM), etc., which can be implemented using any suitable means, such as SRAM, DRAM, or magnetic storage devices as non-limiting examples. Following these principles, it should be understood that references to “processor” or “processing circuit system” can include means in which a general-purpose computing device includes or is otherwise coupled to memory storing machine-readable instructions configured to cause the processing circuit system to perform the described actions. As a non-limiting example, such instructions can be stored as instructions in a human-readable high-level programming language that are interpreted or compiled into object code or machine language, or they can be stored directly in a low-level language such as object code or machine language or another suitable representation.

[0103] It should be further understood that, unless otherwise expressly stated, features such as processing circuitry, memory, and related circuitry and devices can be implemented by any suitable combination of one or more localized devices, including but not limited to distributed systems formed by multiple different devices communicating with each other via direct electrical communication connections, wireless communication connections, and public or private communication networks including the Internet. It will also be understood that processing circuitry and related devices can be implemented by one or more physical machines or by virtual machines, including but not limited to virtualized computing environments provided within “cloud” computing environments or other virtualized systems.

[0104] While at least one exemplary embodiment has been presented in the detailed description above, it should be understood that numerous variations exist. It should also be understood that the exemplary embodiments described herein are not intended to limit the scope, applicability, or configuration of the claimed subject matter in any way. Rather, the detailed description above will provide those skilled in the art with a convenient roadmap for implementing one or more of the described embodiments. It should be understood that various changes can be made to the function and arrangement of the elements without departing from the scope defined by the claims, including equivalents known and foreseeable at the time of filing this patent application.

Claims

1. A radar system, characterized in that, include: Multiple receiver modules; Test circuit system, the test circuit system being configured to: The test tone is injected into at least the first and second receiver modules of the plurality of receiver modules; as well as The controller, in order to execute the test process, is configured to: The test circuit system injects a first pair of test tones having a first test tone frequency and a first test tone amplitude into each of the first receiver module and the second receiver module; Receive a first output signal generated in response to the first pair of test tones from the first receiver module; Receive a second output signal generated in response to the first pair of test tones from the second receiver module; Interference is detected based on the first pair of test tones, the first output signal, and the second output signal; In response to the detection of the interference, the first test tone frequency is modified to generate a second test tone frequency; as well as In response to the detection of the interference, the test circuit system injects a second pair of test tones having the second test tone frequency into the first receiver module and the second receiver module.

2. The radar system according to claim 1, characterized in that, The first test tone amplitude includes a first amplitude of the first test tone in the first pair of test tones and a second amplitude of the second test tone in the first pair of test tones, the first output signal includes a first output tone and a second output tone, the second output signal includes a third output tone and a fourth output tone, and the controller is configured to detect the interference based on the first test tone amplitude and based on the amplitudes of the first output tone, the second output tone, the third output tone and the fourth output tone.

3. The radar system according to claim 2, characterized in that, In order to detect the interference, the controller is configured to: The first receiver module is subjected to interference detection through the following operations: Determine the first ratio for the following items: The second ratio of the first amplitude of the first test pitch to the second amplitude of the second test pitch; and The third ratio of the amplitudes of the first output pitch and the second output pitch; and Compare the first ratio with a predetermined threshold range; The second receiver module is subjected to interference detection through the following operations: Determine the fourth ratio for the following items: The second ratio of the first amplitude of the first test pitch to the second amplitude of the second test pitch; and The fifth ratio of the amplitudes of the third output tone and the fourth output tone; and Compare the fourth ratio with the predetermined threshold range; as well as Determine that either the first ratio or the fourth ratio is outside the predetermined threshold range.

4. The radar system according to claim 1, characterized in that, The controller is further configured to: The test circuit system injects a third pair of test tones with a second test tone amplitude into the first receiver module and the second receiver module; Based on the third output signal generated by the first receiver module in response to the third pair of test tones and the fourth output signal generated by the second receiver module in response to the third pair of test tones, it is determined that the interference at the first receiver module and the second receiver module is within a predetermined threshold range; as well as In response to determining that interference at the first receiver module and the second receiver module is within the predetermined threshold range, the test circuit system injects a fourth pair of test tones having a third test tone amplitude into the first receiver module and the second receiver module.

5. A method, characterized in that, include: The radar system testing process is performed through the following steps: The test circuit system of the radar system injects a first pair of test tones having a first test tone frequency and a first test tone amplitude into each of the first receiver module and the second receiver module of the radar system; The controller of the radar system receives a first output signal generated in response to the first pair of test tones from the first receiver module; The controller receives a second output signal generated in response to the first pair of test tones from the second receiver module; The controller detects interference based on the first pair of test tones, the first output signal, and the second output signal; In response to detecting the interference, the controller modifies the first test tone frequency to generate a second test tone frequency; as well as In response to the controller detecting the interference, the test circuit system injects a second pair of test tones having the second test tone frequency into the first receiver module and the second receiver module.

6. The method according to claim 5, characterized in that, The first test pitch amplitude includes the first amplitude of the first test pitch in the first pair of test pitches and the second amplitude of the second test pitch in the first pair of test pitches; the first output signal includes the first output pitch and the second output pitch; the second output signal includes the third output pitch and the fourth output pitch; and detecting the interference includes: The controller detects the interference based on the amplitude of the first test pitch and based on the amplitudes of the first output pitch, the second output pitch, the third output pitch, and the fourth output pitch.

7. The method according to claim 6, characterized in that, Detecting the interference also includes: The first receiver module is subjected to interference detection through the following operations: The controller determines a first ratio of the following: The second ratio of the first amplitude of the first test pitch to the second amplitude of the second test pitch; and The third ratio of the amplitudes of the first output pitch and the second output pitch; and The controller compares the first ratio with a predetermined threshold range; The second receiver module is subjected to interference detection through the following operations: The controller determines a fourth ratio for the following: The second ratio of the first amplitude of the first test pitch to the second amplitude of the second test pitch; and The fifth ratio of the amplitudes of the third output tone and the fourth output tone; and The controller compares the fourth ratio with the predetermined threshold range; and The controller determines that either the first ratio or the fourth ratio is outside the predetermined threshold range.

8. The method according to claim 5, characterized in that, In addition, including: The test circuit system injects a third pair of test tones with a second test tone amplitude into the first receiver module and the second receiver module; The controller determines that the interference at the first receiver module and the second receiver module is within a predetermined threshold range based on a third output signal generated by the first receiver module in response to the third pair of test tones and a fourth output signal generated by the second receiver module in response to the third pair of test tones. as well as In response to determining that the interference at the first receiver module and the second receiver module is within the predetermined threshold range, the test circuit system injects a fourth pair of test tones with a third test tone amplitude into the first receiver module and the second receiver module.

9. A radar front-end circuit system, characterized in that, include: Test circuit system, the test circuit system being configured to: The test tone is injected into at least the first receiver module and the second receiver module; as well as The controller, in order to execute the test process, is configured to: The test circuit system injects a first pair of test tones having a first test tone frequency and a first test tone amplitude into each of the first receiver module and the second receiver module; Receive a first output signal generated in response to the first pair of test tones from the first receiver module; Receive a second output signal generated in response to the first pair of test tones from the second receiver module; Interference is detected based on the first pair of test tones, the first output signal, and the second output signal; In response to the detection of the interference, the first test tone frequency is modified to generate a second test tone frequency; as well as In response to the detection of the interference, the test circuit system injects a second pair of test tones having the second test tone frequency into the first receiver module and the second receiver module.

10. The radar front-end circuit system according to claim 9, characterized in that, The controller is further configured to: The test circuit system injects a third pair of test tones with a second test tone amplitude into the first receiver module and the second receiver module; Based on the third output signal generated by the first receiver module in response to the third pair of test tones and the fourth output signal generated by the second receiver module in response to the third pair of test tones, it is determined that the interference at the first receiver module and the second receiver module is within a predetermined threshold range; as well as In response to determining that interference at the first receiver module and the second receiver module is within the predetermined threshold range, the test circuit system injects a fourth pair of test tones having a third test tone amplitude into the first receiver module and the second receiver module.

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