NAND guiding method and device based on bad block management

Abstract

The invention discloses an NAND guide method and device based on bad block management, and provides a method for using an NAND FLASH as a guide function storage medium under the limitation of factors such as processor and FLASH model selection, single board layout, cost and the like, so that the hardware model selection range is expanded, the hardware design is facilitated, and the single board cost is reduced. Meanwhile, on the basis of the current situation of NAND FLASH, a zeroth block storage guide function core is fully used, a mechanism that the number of mirror images in multiple areas and the number of redundant blocks in each area can be dynamically set according to factors such as single board starting time, performance and ECC capacity is adopted, and a block-by-block bad block detection and bad block jumping mechanism is added when a guide function solidification version is sintered and a guide function is loaded in real time. A hardware timer and a mark function are introduced, a function of identifying an effective data area in a plurality of general transaction flow mirror image areas and a plurality of other dependent file areas is realized, effective data are dynamically loaded, and the problem that a guide function stored in NAND FLASH cannot be guided due to data damage caused by bad blocks of the NAND FLASH and bad blocks generated in a subsequent use process is solved.

Description

Technical Field

[0001] This invention relates to the field of NAND boot technology, and specifically to a NAND boot method, device, and storage medium based on bad block management. Background Technology

[0002] In embedded devices such as those used in electronics, computers, and communications, which involve complex operating systems and services, large external storage is required to store the corresponding versions due to the large number of chips involved, complex hardware power-up sequences, strict service power-up sequences, and typically very large system and service versions. Considering version persistence, boot time, access performance, and cost, the common practice is to use a three-tier storage model: processor cache, main memory, and external storage. System and service versions are usually stored in the more cost-effective external storage. Before loading the version from external storage, a dedicated boot module is needed to perform functions such as processor initialization and mode configuration, memory initialization, external device initialization, and loading the version from external storage into main memory for execution.

[0003] These boot modules need to be stored in external storage media, commonly NOR flash and NAND flash, depending on the processor's specifications. NOR flash has a low bit error rate, high unit storage cost, and slow write speed, while NAND flash is the opposite: low unit storage cost and fast write speed, but a higher bit error rate. Because of the high bit error rate of NAND flash, and since the boot module is a crucial module, data instability on it can lead to serious problems such as the device being unable to load the system and service versions, and in more severe cases, may render the device unusable. Therefore, for scenarios where NAND flash is chosen as the boot storage medium, the primary issue is resolving the high bit error rate problem of NAND flash.

[0004] Currently, NOR flash is commonly used as the storage medium for boot modules. However, in practice, due to limitations such as processor and flash selection, board layout, and cost, scenarios using NAND flash as the boot storage medium still exist. Conventional NAND flash bad block management functions can identify bad blocks, but when a block changes from normal to bad, the data stored on that block becomes inaccessible, causing subsequent boot failure. Furthermore, current NAND flash manufacturers only guarantee that the zeroth block is free of bad blocks at the time of manufacture; the remaining blocks are not guaranteed to be normal at the time of manufacture. Conventional NAND flash bad block management mechanisms store bad block information for the entire NAND flash in a designated block. However, when that designated block also becomes bad during use, the NAND flash bad block information is lost, leading to the catastrophic consequence of the boot module, which relies on this function, being unable to correctly access the NAND flash data blocks. Summary of the Invention

[0005] The present invention proposes a NAND boot method and device based on bad block management, which can at least solve one of the technical problems in the background art.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A NAND boot method based on bad block management includes boot function reconstruction activities, boot function version creation activities, boot function version solidification activities, and boot function version real-time loading activities. The bootstrap function refactoring activities include: condensing core functions based on NAND FLASH block size, building a dynamic selection of loading region transaction flow that depends on hardware timers and marking functions, building other general transaction flows, and sorting out other dependent files.

[0007] The bootloader version creation activity primarily involves dividing the core functionality, general transaction flows, and other dependent binary files (such as firmware) into regions that are multiples of the block size and merging them into a single bootloader version for use in the firmware creation activity. This mainly includes: creating a core functionality region with a unique NAND flash block size; creating multiple general transaction flow mirror regions; and creating multiple mirror regions for other dependent binary files. Redundant blocks are allocated to each region according to the required number of fault-tolerant bad blocks. After determining the number and size of the aforementioned regions, the start and end addresses and size of each region are fixed and used as parameters for the real-time loading of the bootloader version. This allows the loading process to dynamically address valid bootloader data blocks based on identified bad blocks.

[0008] The bootloader version hardening activity is the process of burning the binary file containing redundant blocks (multi-region image and core area) generated in the previous version creation activity into the NAND flash using a burning tool. In this activity, the burning tool checks each page and block according to the NAND flash specifications to determine if it contains bad blocks. The multi-region image, redundant blocks, and core area are burned bit by bit into the NAND flash. When a bad block is encountered, the burning tool, according to the specifications, skips the bad block size and continues burning on new, normal blocks until the entire binary file generated in the hardening activity is burned.

[0009] The real-time loading activities of the boot function mainly include: core area loading, dynamic selection of loading area, hardware timer function setting, image selection mark setting, bad block detection, skipping bad block loading of data blocks, dynamic loading of other files such as firmware, and execution of other transaction flows.

[0010] Specifically, a NAND boot method based on bad block management according to the present invention includes the following steps: Based on the NAND FLASH specifications and the confirmed block size, the boot functions are reorganized into a core boot function. Core functions such as processor initialization, memory initialization, external NAND FLASH device initialization, and dynamic selection of load region transaction flows relying on hardware timers and flags are consolidated into a single functional area, and the generated binary file is controlled within the NAND FLASH block size. The general workflow for establishing the bootstrap function includes initializing other external hardware devices, network protocols, jump functions, etc., and organizing other dependent files. A binary firmware version of the boot function is created, consisting of one boot core area, multiple general transaction flow mirror areas, multiple other dependent file mirror areas, and a certain amount of redundant data blocks reserved in each area. The number of general transaction flow mirror areas, multiple other dependent file mirror areas, and the number of redundant data blocks in each area can be dynamically adjusted based on the board's reliability requirements, processor and NAND flash ECC capabilities, boot time, and performance requirements. After confirming the number of mirror areas and the number of redundant blocks, the start and end addresses and size of each area are fixed. The binary firmware version is sintered into the NAND flash memory using a sintering device. The sintering device is capable of identifying the NAND flash model, page size, block size, and other parameters. It also has the ability to identify bad blocks block by block and skip bad blocks based on block size and out-of-band (OOB) data size. The sintering device reads the binary firmware version block by block, starting from block zero. According to the NAND flash specifications, it reads the OOB flag of the current block to determine if it is a bad block. If not, the read data is written to the current block; if it is a bad block, it skips to the next block and continues checking until a good data block is found. The read data is then written, and this process is repeated until the entire binary firmware version is read and written. After the device is powered on, it reads the zeroth core data area of ​​the NAND FLASH. The device executes the instructions and data read from the zeroth core data area to initialize the processor memory and some peripherals. At the same time, it starts the hardware boot function timer, reads the hardware flag, and selects an available mirror from multiple general transaction flow mirror areas according to the flag, and records and transmits the base address and size of the mirror. Based on the base address and size of the transmitted image, the NAND FLASH access address is set to the base address of the image. Then, according to the NAND FLASH specification, the OOB flag of the current block is read, and the current block is checked block by block to see if it is a bad block. If it is a bad block, the process jumps to the next data block according to the block size and OOB size, continuing to check for bad blocks until a normal block is detected. The number of skipped bad blocks is recorded, and the normal block data is loaded into memory. The base address of the image is added to the number of normal blocks read and the number of skipped bad blocks. The base address of the next data block is calculated based on the block size and OOB size. This process is repeated until the data read is the size of the image or exceeds the sum of the binary size of the image area and redundant blocks, at which point reading and loading stop. If data of the image size is read, the loaded general business flow image data is executed. If a problem occurs during execution, the hardware general transaction flow image area selectability flag is moved to the next selectable image area. If the read data exceeds the sum of the image area binary size and the redundant block, the hardware general transaction flow image area selectability flag is moved to the next selectable image area, and the board is restarted to re-execute steps 6) to 8). For other dependent file image data, select an available image from multiple other dependent file image areas based on hardware flags, and record and transfer the base address and size of the image; For the base address of the transmitted image, load other file image data as per step 7).

[0011] If a problem occurs during execution, the selectable flag for other file image data image areas will be moved to the next selectable image area; For boot modules that have multiple other file areas as dependencies, steps 9) to 10) are executed repeatedly until all dependent files are loaded. The system loads the dependent data into the file area and then guides the execution of other functions of the module. Once the boot process is complete, the hardware timer is disabled before jumping to the system image, and the process jumps to the system version. If the boot process fails, the device will restart when the hardware timer expires. Repeat steps 6) to (14) until all optional partitions have been tried.

[0012] In another aspect, the present invention also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to perform the steps of the method described above.

[0013] In another aspect, the present invention also discloses a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor performs the steps of the method described above.

[0014] As can be seen from the above technical solutions, the NAND boot method and apparatus based on bad block management of the present invention provides a method for using NAND FLASH as the boot function storage medium under the constraints of processor and FLASH selection, board layout, cost, and other factors. This expands the range of hardware selection, facilitates hardware design, reduces board cost, and enhances product competitiveness. Simultaneously, based on the current state of NAND FLASH, the present invention fully utilizes the zeroth block to store the boot function core and adopts a mechanism that dynamically sets the number of multi-region mirrors and the number of redundant blocks in each region according to factors such as board startup time, performance, and ECC capability. It adds a block-by-block bad block detection and bad block skipping mechanism during the burning of the boot function module's solidified version and the real-time loading of the boot function. It introduces hardware timers and flag functions to achieve the function of identifying valid data areas in multiple general transaction flow mirror areas and multiple other dependent file areas, dynamically loading valid data, and solving the problem of data corruption and boot failure caused by bad blocks in the NAND FLASH stored in the NAND FLASH due to its own bad blocks and bad blocks generated during subsequent use. The solution using the zeroth block storage boot function core ensures the normal booting of the single board's core functions, effectively avoiding the problem of the single board becoming unresponsive due to bad blocks. Redundancy of the general transaction flow mirror area and other dependent file areas can prevent boot failures caused by bad blocks during the boot process. Both greatly improve the stability of the product. At the same time, the amount of redundancy can be dynamically set according to factors such as the single board's startup time, performance, and ECC capability, achieving a balance between stability, cost, and startup time. Attached Figure Description

[0015] Figure 1 This is a diagram of the binary file structure of the present invention; Figure 2 This is a flowchart of the present invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0017] like Figure 2 As shown, the present invention discloses a highly reliable NAND boot method and apparatus based on bad block management, comprising: boot function reconstruction activity, boot function version creation activity, boot function version solidification activity, and boot function version real-time loading activity.

[0018] Specifically, it includes the following steps: 1) The bootloader refactoring activity includes: reorganizing the bootloader functionality into a bootloader core, general transaction flow, and other dependent files. The processor initialization, memory initialization, external storage initialization, CPLD initialization, and dynamic selection of load regions transaction flows are reorganized and consolidated into the bootloader core. Other peripherals such as network ports, solid-state drives, NAND flash data loading, network protocols, version download and decompression, and jump processes are reorganized and consolidated into general transaction flows. Other dependent files are uniformly consolidated. 2) The boot function version creation activity includes: dynamically setting the number of multi-zone images and the number of redundant blocks in each zone according to factors such as single-board startup time, performance, and ECC capability, and creating a binary hard file containing multiple general transaction flow image zones, multiple general transaction flow zones, multiple other dependent file zones, and a core zone, and recording the start and end addresses and size of each zone.

[0019] 3) The bootloader version burning process includes: using a burning device capable of identifying the NAND FLASH model, page size, block size, and other parameters. Starting from block zero, this device reads the first byte of the first OOB area of ​​the current block according to the NAND FLASH specifications. If it is not 0xff, it is a bad block. If it is a bad block, it jumps to the next data block based on the block size and OOB size, continuing to check for bad blocks, skipping bad blocks, and continuing until a good data block is found. Data is then written and read, and this process is repeated until the entire binary burned version is read and written, thus realizing the function of burning the binary burned file to the NAND FLASH.

[0020] 4) The real-time loading activity of the boot function version includes: core area loading, dynamic selection of the loading mirror area using hardware timers and flag functions, bad block detection and bad block skipping loading of each mirror area and other file areas, execution of the loaded data stream, and completion of the boot function. The device executes the instructions and data read from the zeroth core data area, simultaneously starts the hardware CPLD boot function timer, reads the mirror flag stored in the CPLD, and selects an available mirror from multiple general transaction flow mirror areas according to the flag. Bad blocks are detected and skipped according to the NAND FLASH specification. If a problem occurs during the execution process, the hardware general transaction flow mirror area selectable flag is moved to the next selectable mirror area. If the read data exceeds the sum of the binary size of the mirror area and the redundant blocks, the hardware general transaction flow mirror area selectable flag is moved to the next selectable mirror area, and the board is restarted. For other dependent file image data areas, an available image is selected from multiple other dependent file image areas. The detection and bad block skipping process is then executed. If a problem occurs during execution, the CPLD's selectable other file image data area flag is set to the next selectable image area. After execution, the dependent data in the file area is loaded, and the execution of other functions of the boot module continues. Once the boot process is complete, the hardware timer is disabled before jumping to the system image, and execution jumps to the system version. If booting fails, the device restarts when the hardware timer expires.

[0021] The following description uses a NAND flash memory with a capacity of 4Gb, page size of 2048K-Byte + 128-Byte, block size of (2K+128) bytes * 128, and 8-bit ECC capability, as an example, to illustrate the boot function of partial block storage starting from address zero, and the hardware timer and flag functions implemented using a CPLD. (1) Reconstruct the implementation of the boot function module code, and generate a binary file with a block size of less than 2K*128 bytes by concentrating the processor initialization, memory initialization, external storage initialization, CPLD initialization, and dynamic selection of loading region transaction streams; (2) Reconstruct the implementation of the boot function module code, and generate binary files by treating other peripherals such as network ports, solid-state drives, NAND FLASH data loading, network protocols, version download and decompression, and jump processes as general transaction flows; (3) Store the firmware file that the network port initialization depends on as a separate part of the boot function firmware version in the location specified in the firmware version; (4) Based on the ECC capability of 8 bits, startup time requirements, general transaction flow area size, and network interface firmware size, the solidified version mode is designed as follows: one core area, three transaction flow image areas, and three other dependent file image areas. Each transaction flow image area and other dependent file image areas are redundantly configured with four blocks. (5) Press Figure 1 The present invention provides a binary file configuration diagram of a highly reliable NAND boot method and apparatus based on bad block management, which generates a binary boot function firmware version file; (6) Use the developed sintering device to sinter the binary hardened version into the NAND FLASH. This sintering device has the ability to identify the NAND FLASH model, page size, block size, and other parameters. It also has the ability to identify bad blocks block by block and skip bad blocks by block size and OOB size. The sintering device reads the binary hardened version block by block. Starting from the zeroth block, it reads the OOB flag of the current block according to the NAND FLASH specification to determine whether the current block is a bad block. If it is not a bad block, it writes the read data into the current block. If it is a bad block, it jumps to the next block and continues to check until a good data block is found. The read data is then written and the loop continues until the entire binary hardened version is read and written. (7) After the device is powered on, read the zeroth core data area of ​​the NAND FLASH; (8) The device executes the instructions and data of the zeroth core data area read, realizes the processor memory initialization and some peripheral initialization, and at the same time starts the hardware CPLD boot function timer, reads the image mark stored in the CPLD, and selects an available image from multiple general transaction flow image areas according to the mark, and records and transmits the base address and size of the image. (9) After setting the NAND FLASH access address to the base address of the transmitted image according to the base address and size of the image, read the first byte of the first OOB area of ​​the current block according to the NAND FLASH specification. If it is not 0xff, it is a bad block. If it is a bad block, jump to the next data block according to the block and OOB size, and continue to check whether it is a bad block until a normal block is detected. Record the number of bad blocks skipped and load the normal block data into memory. Add the base address of the image to the number of normal blocks read and the number of bad blocks skipped, calculate the base address of the next data block according to the block and OOB size, and repeat until the data of the image size is read or the binary size of the image area and the sum of the redundant blocks are exceeded, then stop reading and loading. (10) If data of the image size is read, the loaded general business flow image data is executed. If a problem occurs during execution, the hardware general transaction flow image area selectability flag is moved to the next selectable image area. If the read data exceeds the sum of the image area binary size and the redundant block, the hardware general transaction flow image area selectability flag is moved to the next selectable image area, and the board is restarted; (11) For other file image data containing network interface firmware, select an available image from multiple other dependent file image areas according to the CPLD flag, and record and transmit the base address and size of the image; (12) For the base address of the transmitted image, load the other file image data according to step (9). If a problem occurs during execution, the flag for other file image data image areas in the CPLD is set to the next optional image area; (13) For boot modules that have multiple other file areas as dependencies, repeat steps (11) to (12) until all dependent files are loaded; (14) After the dependent data loaded into the file area is completed, continue to guide the execution of other functions of the module; (15) Once the boot process is complete, the hardware timer is disabled before jumping to the system image, and the process jumps to the system version. If the boot process fails, the device will restart when the hardware timer expires. (16) Repeat steps (7) to (15) until all optional partitions have been tried.

[0022] In summary, the high-reliability NAND boot method and apparatus based on bad block management provided by this invention offers a method for using NAND FLASH as the boot function storage medium under constraints such as processor and FLASH selection, board layout, and cost. This expands the range of hardware selection, facilitates hardware design, and reduces board costs. Furthermore, based on the current state of NAND FLASH, this invention fully utilizes the zeroth block to store the boot function core and employs a mechanism that dynamically sets the number of multi-region mirrors and the number of redundant blocks per region based on factors such as board startup time, performance, and ECC capability. It incorporates a block-by-block bad block detection and bad block skipping mechanism during boot function module solidification and real-time boot function loading, and introduces hardware timers and flag functions to solve the problem of data corruption and boot failure caused by bad blocks in the NAND FLASH itself and subsequent bad blocks generated during use.

[0023] In another aspect, the present invention also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to perform the steps of the method described above.

[0024] In another aspect, the present invention also discloses a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor performs the steps of the method described above.

[0025] It is understood that the systems, devices, and storage media provided in the embodiments of the present invention correspond to the methods provided in the embodiments of the present invention, and the explanations, examples, and beneficial effects of the relevant content can be referred to the corresponding parts of the above methods.

[0026] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk (SSD)).

[0027] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0028] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0029] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A NAND booting method based on bad block management, characterized in that, The boot function reconstruction activity, the boot function version making activity, the boot function version solidification activity, and the boot function real-time loading activity are included. The boot function reconstruction activity includes core function set based on NAND FLASH block size, construction of dynamic selection loading area transaction flow of dependent hardware timer and marking function, construction of other general transaction flow, and combing of other dependent files. The boot function version making activity includes merging of core function, general transaction flow, other dependent binary files, and firmware into a boot function version for block size integer division area for use in the solidification activity. The boot function version solidification activity is the process of using sintering tools to program the binary files generated in the previous stage, version making activity, into the NAND FLASH. The boot function real-time loading activity includes core area loading, dynamic selection loading area, hardware timing function setting, mirror selection marking setting, bad block detection, bad block skipping loading data block, and dynamic loading of other files including firmware and other transaction flow execution. 2.The NAND booting method based on bad block management according to claim 1, wherein: The boot function version making activity further includes creation of a unique core function area of NAND FLASH block size, creation of a plurality of general transaction flow mirror areas, and creation of a plurality of other dependent binary file mirror areas. Each area is allocated redundant blocks according to the required number of tolerable bad blocks. After the number and size of the areas are determined, the start and end addresses and size of each area are solidified as parameters for the boot function version real-time loading activity, for the loading process to dynamically address the effective boot function data block in combination with the recognized bad blocks. 3.The NAND booting method based on bad block management according to claim 2, characterized in that: In the boot function version solidification activity, the sintering tools judge whether each page and block is a bad block according to the specification book of the NAND FLASH, and program the multi-mirror area, redundant block, and core area into the NAND FLASH bit by bit; when a bad block is encountered, the sintering tools skip the bad block size and continue programming on the new normal block until the entire binary file generated in the solidification activity is programmed. 4.The NAND booting method based on bad block management according to claim 3, characterized in that: The process specifically includes the following steps: Step 1: According to the block size in the NAND FLASH specification book, the boot function is re-intensified to form a boot function core; the processor initialization, memory initialization, external NAND FLASH device initialization, and dynamic selection loading area transaction flow of dependent hardware timer and marking function are intensively collected into a function area, and the generated binary file is controlled within the NAND FLASH block size; Step 2: Construction of boot function general transaction flow: initialization of other external hardware devices, network protocol, jump function, and combing of other dependent files; Step 3: According to a boot core area, a plurality of general transaction flow mirror areas, a plurality of other dependent file mirror areas, and a certain number of redundant data blocks reserved for each area, a boot function binary solidification version is made; Step 4: The binary solidification version is sintered to the NAND FLASH by a sintering device; Step 5: After the device is powered on, the core data area of the zeroth block of the NAND FLASH is read; Step 6: The device executes the read zeroth block core data area instruction and data, realizes processor memory initialization, part of peripheral initialization, starts the hardware boot function timer, reads the hardware flag, and selects an available image from multiple general transaction flow image areas according to the flag, records and transmits the base address and size of the image; Step 7: According to the base address and size of the transmitted image, set the NAND FLASH access address to the base address of the image, read the OOB flag of the current block according to the NAND FLASH specification, detect whether the current block is a bad block block by block, if it is a bad block, skip to the next data block according to the block and OOB size, continue to detect whether it is a bad block, until a normal block is detected, record the number of bad blocks skipped, and load the normal block data to the memory; Step 8: If the data of the size of the image is read, the general transaction flow image data is loaded; If an error occurs during execution, set the hardware general transaction flow image area selectable flag to the next selectable image area; If the read data exceeds the sum of the binary size and the redundant block of the image area, set the hardware general transaction flow image area selectable flag to the next selectable image area, and restart the single board to execute steps 6-8 again; Step 9: For other file image data that exists in dependence, select an available image from multiple other dependent file image areas according to the hardware flag, record and transmit the base address and size of the image; Step 10: Load other file image data according to the base address of the transmitted image according to step 7; If an error occurs during execution, set the other file image data image area selectable flag to the next selectable image area; Step 11: For the boot module that has multiple other file area dependencies, execute steps 9-10 in a loop until all dependent files are loaded; Step 12: Execute the data loaded to the file area dependency, and continue to execute other functions of the boot module; Step 13: The boot function is completed, the hardware timer is turned off before jumping to the system image, and jumps to the system version execution; if the boot fails, the hardware timer is restarted when the timer is empty; Step 14: Execute steps 6-14 in a loop until all selectable partitions are tried.

5. The bad block management based NAND booting method of claim 4, wherein: In step 3, multiple general transaction flow image areas, multiple other dependent file image areas, and the number of redundant data blocks in each area are also included, which can be dynamically adjusted according to the reliability requirements of the single board, the processor and NAND FLASH ECC capability, the startup time and performance requirements; After confirming the number of each image area and the number of redundant blocks, the start and end addresses and size of each area are solidified. 6.The NAND booting method based on bad block management according to claim 5, characterized in that: Step 4 includes, The sintering device has the ability to identify the model of NAND FLASH, the size of each page, the size of each block, and other parameters; at the same time, it has the ability to identify bad blocks block by block and skip bad blocks according to block size and OOB size; The sintering device reads the binary solidification version block by block, starting from the zeroth block, reads the OOB flag of the current block according to the NAND FLASH specification book to determine whether the current block is a bad block, if it is not a bad block, the read data is written into the current block, if it is a bad block, it jumps to the next block and continues to detect until a good data block is found, the read data is written, and the cycle is repeated until the entire binary solidification version is read and written.

7. The bad block management based NAND booting method of claim 6, wherein: Step 7 further comprises, The base address of the mirror plus the number of normal blocks read and the number of bad blocks skipped, the next data block base address is calculated according to the block and OOB size, and the cycle is executed until the size of the mirror data is read or the sum of the binary size and the redundant block of the mirror area is exceeded, then the reading and loading is stopped.

8. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that, The computer program, when executed by the processor, causes the processor to perform the steps of the method of any one of claims 1 to 7.

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