Nitride epitaxial wafer, preparation method of nitride epitaxial wafer and Micro-LED

Abstract

The invention provides a nitride epitaxial wafer, a preparation method of the nitride epitaxial wafer and a Micro-LED. The nitride epitaxial wafer comprises a heterogeneous substrate, a composite column structure, a nitride buffer layer, an n-type nitride layer, a light-emitting layer and a p-type nitride layer. The composite column structures are distributed on the surface of one side of the heterogeneous substrate at intervals, and each composite column structure comprises a plurality of composite Si nano columns and a composite nano layer wrapping the surfaces of the composite Si nano columns; the composite Si nano column comprises a first composite Si nano column and a second composite Si nano column; the height of the first composite Si nanorod is different from that of the second composite Si nanorod; the nitride buffer layer covers the composite column structure, and the surface of one side, far away from the substrate, of the nitride buffer layer is a horizontal plane; the light-emitting layer comprises at least one light-emitting unit, and each light-emitting unit comprises an In-containing quantum well layer and a nitride quantum barrier layer which are arranged in a stacked mode. According to the invention, the brightness, electric leakage and ESD antistatic release performance of the nitride epitaxial wafer can be improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a nitride epitaxial wafer, a method for preparing a nitride epitaxial wafer, and a Micro-LED. Background Technology

[0002] Because nitride single-crystal materials are scarce in nature, and the growth of single-crystal nitrides is extremely difficult, the growth of nitride materials mainly employs heteroepitaxial growth. Currently, the most mature epitaxial growth techniques for preparing nitride materials are all heteroepitaxial growth techniques. However, due to the lattice and thermal expansion mismatch between the growth substrate and the epitaxial layer, the grown crystal material has a high dislocation density and high stress, making it prone to warping cracks. The lattice constants and thermal mismatches between different materials generate dislocations or defects that extend upwards with the growth of the epitaxial layer. These dislocations act as non-radiative recombination centers during device operation, affecting device efficiency. Simultaneously, they act as leakage channels, increasing leakage current and causing rapid device aging, impacting device efficiency and lifespan, thus limiting their application in the semiconductor electronics field. Furthermore, with the unprecedented development of high-end applications, there is a growing demand for reducing defects in the epitaxial layer, and existing processes are insufficient to meet these increasingly stringent requirements.

[0003] Therefore, reducing the dislocation density during heteroepitaxial growth is of great significance for accelerating the industrial application of nitride materials. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide a nitride epitaxial wafer, a method for preparing the nitride epitaxial wafer, and a Micro-LED. In the nitride epitaxial wafer provided by the present invention, the composite pillar structure enhances the lateral epitaxial growth of the nitride buffer layer, delays the merging process of its lateral epitaxial growth surface, thereby allowing dislocations within it to fully redirect and self-annihilate, resulting in a high-quality nitride buffer layer. This reduces the probability of dislocations extending upwards to the light-emitting layer, reduces leakage current channels, enhances radiative recombination, and thus improves the brightness, leakage current, and ESD antistatic discharge performance of the nitride epitaxial wafer.

[0005] To achieve this objective, the present invention adopts the following technical solution:

[0006] In a first aspect, the present invention provides a nitride epitaxial wafer, the nitride epitaxial wafer comprising a heterogeneous substrate, a composite pillar structure, a nitride buffer layer, an n-type nitride layer, a light-emitting layer and a p-type nitride layer stacked together;

[0007] The composite pillar structure is distributed at intervals on one side surface of the heterogeneous substrate, and the composite pillar structure includes multiple composite Si nanopillars and a composite nanolayer covering the surface of the composite Si nanopillars.

[0008] The composite Si nanopillars include a first composite Si nanopillar and a second composite Si nanopillar spaced apart; the first composite Si nanopillar includes a first Si nanopillar and a first metal nitride semi-ellipsoid disposed on the top of the first Si nanopillar, and the second composite Si nanopillar includes a second Si nanopillar and a second metal nitride semi-ellipsoid disposed on the top of the second Si nanopillar; the first composite Si nanopillar and the second composite Si nanopillar have different heights.

[0009] The nitride buffer layer covers the composite pillar structure, and the surface of the nitride buffer layer away from the substrate is a horizontal plane;

[0010] The light-emitting layer includes at least one light-emitting unit, which includes an In-containing quantum well layer and a nitride quantum barrier layer stacked together.

[0011] In the nitride epitaxial wafer provided by this invention, the composite pillar structure enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface. This allows the dislocations inside to fully redirect and self-annihilate, resulting in a high-quality nitride buffer layer. This reduces the probability of dislocations extending upward to the light-emitting layer, reduces leakage current channels, and enhances radiative recombination, thereby improving the brightness, leakage current, and ESD antistatic discharge performance of the nitride epitaxial wafer.

[0012] In this invention, the first and second composite Si nanopillars have different heights. This design, on the one hand, increases the probability of dislocations of varying degrees extending and distributing during the growth of the nitride buffer layer becoming in-plane tilted in the thickness direction, reducing the likelihood of dislocations in the nitride buffer layer extending upwards to the light-emitting layer, effectively improving the impact performance of high-voltage electrostatic discharge. Moreover, it effectively suppresses the extension of small dislocations located at the bottom of the nitride buffer layer in the thickness direction, improving the leakage current performance at the bottom of the epitaxial wafer and effectively improving the impact performance of low-voltage electrostatic discharge. On the other hand, it effectively utilizes the relaxation between the Si nanopillars and the metal nitride semi-ellipsoids in the thickness direction to reduce stress, improve the near-bulk quality of the light-emitting layer, thereby improving the brightness, leakage current, and ESD antistatic discharge performance of the epitaxial wafer.

[0013] Preferably, the composite nanolayer comprises a metal nitride layer and a dielectric layer. The metal nitride layer covers the surfaces of the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid. The dielectric layer comprises a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed on the outer wall of the first Si nanopillar and the second Si nanopillar, and the second dielectric layer is disposed on a heterogeneous substrate between adjacent first composite Si nanopillars and second composite Si nanopillars.

[0014] In this invention, the metal nitride layer acts as a nucleation and aggregation layer for the growth of the nitride buffer layer. The first and second dielectric layers prevent the nitride buffer layer from forming a metal-Si intersoluble structure with the Si nanopillars during growth, thus avoiding the formation of vacancy defects in the nitride buffer layer and reducing the leakage current performance of the epitaxial wafer. The composite nanolayer constructed by the three layers can enhance the lateral epitaxial growth of the nitride buffer layer and delay the merging process of its lateral epitaxial growth surface. This allows the dislocations inside to fully redirect and self-annihilate, reducing the probability of dislocations extending upward to the light-emitting layer, reducing the leakage current channel, enhancing radiative recombination, and thus improving the photoelectric performance of the nitride epitaxial wafer.

[0015] Preferably, the heterogeneous substrate includes any one of a sapphire substrate, a silicon carbide substrate, or a Si substrate.

[0016] Preferably, the height of the first composite Si nanopillar is greater than the height of the second composite Si nanopillar.

[0017] Preferably, the ratio of the height of the central axis of the cross section of the first metal semi-ellipsoid to that of the second metal semi-ellipsoid is (2-10):1, for example, it can be 2:1, 3:1, 4:1, 5:1, 6:1, 7:1, 8:1, 9:1 or 10:1, etc.

[0018] In this invention, if the ratio of the central axis height of the cross-section of the first metal semi-ellipsoid to that of the second metal semi-ellipsoid is too large, it will cause an excessive difference in the growth rate of the first Si nanopillar and the second Si nanopillar, ultimately making it impossible to effectively utilize the height difference. This results in dislocations that are extended to varying degrees during the growth of the nitride buffer layer not having a greater chance of in-plane tilting in the thickness direction. If the ratio of the central axis height of the cross-section of the first metal semi-ellipsoid to that of the second metal semi-ellipsoid is too small, it will cause an excessively low difference in the incorporation of Si atoms into the active sites on the surfaces of the first and second metal semi-ellipsoids. This will cause an excessively low difference in the growth rate of the first Si nanopillar and the second Si nanopillar, ultimately preventing the formation of a height difference in the Si nanopillars.

[0019] Preferably, the heights of the first Si nanopillar and the second Si nanopillar are independently 100-500 nm, for example, 100 nm, 200 nm, 300 nm, 400 nm or 500 nm, etc., and the height ratio of the first Si nanopillar to the second Si nanopillar is (1.2-2):1, for example, 1.2:1, 1.3:1, 1.4:1, 1.5:1, 1.6:1, 1.7:1, 1.8:1, 1.9:1, 2:1 or 2:1, etc.

[0020] In this invention, if the height ratio of the first Si nanopillar to the second Si nanopillar is too large or too small, the height difference cannot be effectively utilized, resulting in dislocations that extend to different degrees during the growth of the nitride buffer layer not having a greater chance of in-plane tilting in the thickness direction, thus failing to effectively reduce dislocation extension in the nitride buffer layer.

[0021] Preferably, both the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid are made of AlN.

[0022] Preferably, the metal nitride layer is of the same type as the first metal nitride semi-ellipsoid or the second metal nitride semi-ellipsoid.

[0023] Preferably, the thickness of the metal nitride layer is 10-100 nm, for example, it can be 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm or 100 nm.

[0024] Preferably, the dielectric layer comprises a SiN layer.

[0025] Preferably, the thickness of the first dielectric layer is 2-50 nm, for example, it can be 2 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm or 50 nm.

[0026] Preferably, the thickness of the second dielectric layer is 2-50 nm, for example, it can be 2 nm, 5 nm, 10 nm, 20 nm, 30 nm, 40 nm or 50 nm.

[0027] Preferably, the nitride buffer layer comprises a GaN buffer layer.

[0028] Preferably, the n-type nitride layer comprises an n-type GaN layer.

[0029] Preferably, the n-type nitride layer is doped with Si, and the Si doping concentration is 1 × 10⁻⁶. 18 -5×10 19 cm -3 For example, it could be 1×10 18 cm -3 3×10 18 cm -3 5×10 18 cm -3 7×10 18 cm -3 1×10 19 cm -3 2×10 19 cm -3 3×10 19 cm -34×10 19 cm -3 Or 5×10 19 cm -3 wait.

[0030] Preferably, the In-containing quantum well layer comprises an InGaN quantum well layer.

[0031] Preferably, the nitride quantum barrier layer comprises a GaN quantum barrier layer.

[0032] Preferably, in one of the light-emitting units, the thickness of the In-containing quantum well layer is 0.5-5 nm, for example, it can be 0.5 nm, 1 nm, 1.5 nm, 2 nm, 2.5 nm, 3 nm, 3.5 nm, 4 nm, 4.5 nm or 5 nm, and the thickness of the nitride quantum barrier layer is 6-25 nm, for example, it can be 6 nm, 8 nm, 10 nm, 13 nm, 15 nm, 18 nm, 20 nm, 22 nm or 25 nm.

[0033] Preferably, the number of light-emitting units is 2-12, for example, 2, 4, 6, 8, 10 or 12.

[0034] Preferably, the thickness of the p-type nitride layer is 50-300 nm, for example, it can be 50 nm, 75 nm, 100 nm, 125 nm, 150 nm, 175 nm, 200 nm, 225 nm, 250 nm, 275 nm or 300 nm.

[0035] Preferably, the p-type nitride layer comprises a p-type GaN layer.

[0036] Preferably, the p-type nitride layer is doped with Mg, and the doping concentration of Mg is 1×10⁻⁶. 19 -5×10 20 cm -3 For example, it could be 1×10 19 cm -3 3×10 19 cm -3 5×10 19 cm -3 7×10 19 cm -3 9×10 19 cm -3 1×10 20 cm -3 2×10 20 cm -3 3×10 20 cm -3 4×10 20 cm-3 Or 5×10 20 cm -3 wait.

[0037] In a second aspect, the present invention provides a method for preparing a nitride epitaxial wafer as described in the first aspect, the method comprising the following steps:

[0038] A composite pillar structure is grown on a heterogeneous substrate; wherein the composite pillar structure is spaced apart on one side surface of the heterogeneous substrate, and the composite pillar structure includes a plurality of composite Si nanopillars and a composite nanolayer covering all the composite Si nanopillars; the composite Si nanopillars include first composite Si nanopillars and second composite Si nanopillars spaced apart; the first composite Si nanopillar includes a first Si nanopillar and a first metal nitride semi-ellipsoid disposed on the top of the first Si nanopillar, and the second composite Si nanopillar includes a second Si nanopillar and a second metal nitride semi-ellipsoid disposed on the top of the second Si nanopillar; the first composite Si nanopillars and the second composite Si nanopillars have different heights.

[0039] A nitride buffer layer, an n-type nitride layer, a light-emitting layer, and a p-type nitride layer are sequentially grown on the composite column structure.

[0040] Preferably, the growth method of the composite column structure includes the following steps:

[0041] Multiple first metal microspheres and multiple second metal microspheres are grown in an array on the heterogeneous substrate.

[0042] A Si source is introduced to transform the first and second metal microspheres into the first and second composite Si nanopillars, respectively. This invention utilizes the dissolution and precipitation of Si nanopillar material atoms within a micro / nano liquid metal structure, followed by axial growth to form composite nanopillars. Specifically, Si atoms required for Si nanopillars are introduced onto the surface of the metal microspheres, and these Si atoms dissolve and precipitate within the metal microspheres, continuing to grow to form Si nanopillars.

[0043] The first metal semi-ellipsoid and the second metal semi-ellipsoid are transformed into the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid, respectively. The metal nitride layer is coated on the surface of the first metal semi-ellipsoid and the second metal semi-ellipsoid. At the same time, a first dielectric layer is formed on the outer wall of the Si nanopillar, and a second dielectric layer is formed on the heterogeneous substrate between the adjacent first composite Si nanopillar and the second composite Si nanopillar, to obtain a composite nanolayer.

[0044] Preferably, the growth method of the array of multiple first metal microspheres and multiple second metal microspheres includes:

[0045] Under conditions of 500-1000℃ (e.g., 500℃, 600℃, 700℃, 800℃, 900℃, or 1000℃), a first metal capping layer is grown on one side surface of the heterogeneous substrate, and then annealed for 50-300s (e.g., 50s, 75s, 100s, 125s, 150s, 175s, 200s, 225s, 250s, 275s, or 300s) to form a plurality of first metal microspheres with a height of 10-100nm (e.g., 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, or 100nm).

[0046] Under conditions of 500-1000℃ (e.g., 500℃, 600℃, 700℃, 800℃, 900℃, or 1000℃), a second metal capping layer is grown on one side surface of the heterogeneous substrate and annealed for 60-450s (e.g., 60s, 80s, 100s, 150s, 200s, 250s, 300s, 350s, 400s, or 450s), forming a plurality of second metal microspheres with a height of 10-100nm (e.g., 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, or 100nm).

[0047] The present invention achieves a height difference between the first metal microsphere and the second metal microsphere through the above-described process, thereby resulting in a height difference between the subsequently formed first Si nanopillar and the second Si nanopillar.

[0048] Preferably, the specific methods for transforming the first metal microspheres and the second metal microspheres into the first composite Si nanopillars and the second composite Si nanopillars, respectively, include:

[0049] A Si source is introduced into a heterogeneous substrate having multiple first metal microspheres and multiple second metal microspheres arranged in an array and maintained for a first set time.

[0050] Interrupt the flow of the Si source and maintain it for a second set time.

[0051] Repeat the above steps to form a plurality of first composite Si nanopillars and a plurality of second composite Si nanopillars spaced apart on the surface of the heterogeneous substrate.

[0052] This invention deposits Si on the surface of metal microspheres to form a metal-Si eutectic structure. During the periodic alternation process, by interrupting the Si introduction and under the action of heat treatment, the Si atoms are fully dissolved on the surface of the metal microspheres, which allows the Si atoms to be continuously and uniformly precipitated. On the one hand, a flat Si nanopillar is obtained, and on the other hand, the surface is prevented from forming a free-moving Si atom enrichment on the surface of the metal microspheres. Free-moving Si atoms will affect the doping of the nitride buffer layer as dopants, and will also cause light absorption in the direction of light directed toward the substrate as impurities.

[0053] Preferably, the specific methods for transforming the first metal microspheres and the second metal microspheres into the first composite Si nanopillars and the second composite Si nanopillars, respectively, include:

[0054] Under conditions of 500-1000℃ (e.g., 500℃, 600℃, 700℃, 800℃, 900℃, or 1000℃), a Si source with a flow rate of 20-200 sccm (e.g., 20 sccm, 50 sccm, 75 sccm, 100 sccm, 125 sccm, 150 sccm, 175 sccm, or 200 sccm) is introduced onto a heterogeneous substrate having multiple first metal microspheres and multiple second metal microspheres arranged in an array, and maintained for 10-100s (e.g., 10s, 20s, 30s, 40s, 50s, 60s, 70s, 80s, 90s, or 100s).

[0055] Under conditions of 500-1000℃ (e.g., 500℃, 600℃, 700℃, 800℃, 900℃, or 1000℃, etc.), the flow of the Si source is interrupted and maintained for 10-180s (e.g., 10s, 30s, 50s, 70s, 80s, 100s, 120s, 140s, 160s, or 180s, etc.).

[0056] Repeat the above steps 100-1000 times (e.g., 100, 200, 250, 300, 350, 400, 450, 500, 550, 600, 650, 700, 750, 800, 850, 900, 950, or 1000 times, etc.) to form a plurality of first composite Si nanopillars and a plurality of second composite Si nanopillars spaced apart on the surface of the heterogeneous substrate.

[0057] Preferably, the metal nitride layer is an AlN layer, the dielectric layer includes a first dielectric layer and a second dielectric layer, both of which are SiN layers, and the growth method of the composite nanolayer includes:

[0058] Under conditions of 600-1250℃ (e.g., 600℃, 700℃, 800℃, 900℃, 1000℃, or 1200℃, etc.), an N source with a flow rate of 1-100slm (e.g., 1slm, 10slm, 30slm, 50slm, 70slm, 80slm, 90slm, or 100slm, etc.) is introduced and maintained for 100-600s (e.g., 100s, 150s, 200s, 250s, 300s, 3...). (e.g., 50s, 400s, 450s, 500s, 550s, or 600s) to transform the first metal semi-ellipsoid and the second metal semi-ellipsoid into the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid, respectively, and to coat and grow the AlN layer on the surface of the first metal semi-ellipsoid and the second metal semi-ellipsoid, while forming the first dielectric layer on the outer wall of the Si nanopillar and forming the second dielectric layer on the heterogeneous substrate between adjacent composite Si nanopillars.

[0059] The present invention can form a composite pillar structure through N source treatment, which can enhance the lateral epitaxial growth of the nitride buffer layer, delay the merging process of its lateral epitaxial growth surface, thereby allowing the dislocations inside to fully turn and self-annihilate, reducing the probability of dislocations extending upward to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, and thus improving the photoelectric performance of the nitride epitaxial wafer.

[0060] Preferably, the method for growing the nitride buffer layer includes:

[0061] Under conditions of 900-1200℃ (e.g., 900℃, 950℃, 1000℃, 1050℃, 1100℃, 1150℃, or 1200℃), a Ga source with a flow rate of 100-500 sccm (e.g., 100 slm, 150 slm, 200 slm, 250 slm, 300 slm, 350 slm, 400 slm, 450 slm, or 500 slm) and an N source with a flow rate of 20-100 slm (e.g., 20 slm, 30 slm, 50 slm, 70 slm, 80 slm, 90 slm, or 100 slm) are introduced to grow a nitride buffer layer on the surface of the composite pillar structure.

[0062] Preferably, the method for growing the n-type nitride layer includes:

[0063] Under conditions of 900-1200℃ (e.g., 900℃, 950℃, 1000℃, 1050℃, 1100℃, 1150℃, or 1200℃, etc.), a Ga source with a flow rate of 100-500 sccm (e.g., 100 slm, 150 slm, 200 slm, 250 slm, 300 slm, 350 slm, 400 slm, 450 slm, or 500 slm, etc.) and a flow rate of 20-100 slm (e.g., 20 slm, 30 slm, 50 slm, etc.) are introduced. An N source with a flux of 70 slm, 80 slm, 90 slm, or 100 slm (e.g., 10 slm, 20 slm, 30 slm, 50 slm, 70 slm, 80 slm, 90 slm, or 100 slm) and a Si source with a flux of 10-100 sccm (e.g., 10 slm, 20 slm, 30 slm, 50 slm, 70 slm, 80 slm, 90 slm, or 100 slm) are stacked on the surface of the nitride buffer layer to grow an n-type nitride layer with a thickness of 2-5 μm (e.g., 2 μm, 3 μm, 4 μm, or 5 μm). The n-type nitride layer is doped with Si at a concentration of 1 × 10⁻⁶. 18 -5×10 19 cm -3 .

[0064] Preferably, the method for growing the light-emitting layer includes:

[0065] (1) Under the condition of a temperature of 650-850℃ (e.g., 650℃, 700℃, 750℃, 800℃ or 850℃, etc.), a Ga source with a flow rate of 10-300 sccm (e.g., 10 sccm, 50 sccm, 100 sccm, 150 sccm, 200 sccm, 250 sccm or 300 sccm, etc.), an In source with a flow rate of 500-2000 sccm (e.g., 500 sccm, 750 sccm, 1000 sccm, 1250 sccm or 1500 sccm, etc.) and an N source with a flow rate of 10-100 slm (e.g., 10 slm, 30 slm, 50 slm, 70 slm, 80 slm, 90 slm or 100 slm, etc.) are introduced to grow an In-containing quantum well layer with a thickness of 0.5-5 nm on the surface of the n-type nitride layer.

[0066] (2) Under the condition of 700-950℃ (e.g., 700℃, 800℃, 900℃ or 950℃, etc.), a Ga source with a flow rate of 10-300 sccm (e.g., 10 sccm, 50 sccm, 100 sccm, 150 sccm, 200 sccm, 250 sccm or 300 sccm, etc.) and an N source with a flow rate of 10-100 slm (e.g., 10 sccm, 30 sccm, 50 sccm, 70 sccm, 80 sccm, 90 sccm or 100 sccm, etc.) are introduced to grow a GaN quantum barrier layer with a thickness of 6-25 nm on the surface of the In quantum well layer.

[0067] (3) Using the In-containing quantum well layer and GaN quantum barrier layer as a light-emitting unit, the steps (1) and (2) are performed alternately in a periodic cycle to obtain the light-emitting layer.

[0068] Preferably, the method for growing the p-type GaN layer includes:

[0069] Under conditions of 850-1050℃ (e.g., 850℃, 900℃, 950℃, 1000℃, or 1050℃, etc.), a Ga source with a flow rate of 10-1000 sccm (e.g., 10 sccm, 100 sccm, 300 sccm, 500 sccm, 700 sccm, 800 sccm, 900 sccm, or 1000 sccm, etc.) and a flow rate of 20-100 slm (e.g., 20 slm, 30 slm, 50 slm, 70 slm, 80 slm, etc.) is introduced. A 50-300 nm thick p-type GaN layer is grown on the surface of the light-emitting layer using an N source with a flux of 200-2000 sccm (e.g., 200 sccm, 350 sccm, 500 sccm, 750 sccm, 1000 sccm, 1250 sccm, 1500 sccm, 1750 sccm, or 2000 sccm, etc.). The p-type nitride layer is doped with Mg at a doping concentration of 1 × 10⁻⁶. 19 -5×10 20 cm -3 .

[0070] Thirdly, the present invention provides a Micro-LED, the Micro-LED comprising a nitride epitaxial wafer as described in the first aspect.

[0071] The numerical range described in this invention includes not only the point values ​​listed above, but also any point values ​​within the numerical ranges not listed above. Due to space limitations and for the sake of brevity, this invention will not exhaustively list all the specific point values ​​included in the range.

[0072] Compared with the prior art, the present invention has the following beneficial effects:

[0073] In the nitride epitaxial wafer provided by this invention, the composite pillar structure enhances the lateral epitaxial growth of the nitride buffer layer and delays the merging process of its lateral epitaxial growth surface. This allows the dislocations inside to fully redirect and self-annihilate, obtaining a high-quality growth template for the nitride buffer layer. This reduces the probability of dislocations extending upward to the light-emitting layer, reduces leakage current channels, and enhances radiative recombination, thereby improving the brightness, leakage current, and ESD antistatic discharge performance of the epitaxial wafer.

[0074] In this invention, the first and second composite Si nanopillars have different heights. This design, on the one hand, increases the probability of in-plane tilting of dislocations that extend to different degrees during the growth of the nitride buffer layer in the thickness direction. This not only reduces the probability of dislocations in the nitride buffer layer extending upwards to the light-emitting layer, effectively improving the impact performance of high-voltage electrostatic discharge, but also effectively suppresses the extension of small dislocations located at the bottom of the nitride buffer layer in the thickness direction, improving the leakage current performance at the bottom of the epitaxial wafer and effectively improving the impact performance of low-voltage electrostatic discharge. On the other hand, the relaxation between the Si nanopillars and the metal nitride semi-ellipsoid can be effectively utilized in the thickness direction to reduce stress and improve the near-bulk quality of the light-emitting layer, thereby improving the brightness, leakage current, and ESD antistatic discharge performance of the epitaxial wafer. Attached Figure Description

[0075] Figure 1 This is a schematic diagram of the structure of the nitride epitaxial wafer provided by the present invention.

[0076] Wherein, 1-sapphire substrate; 21-first composite Si nanopillar; 211-first Si nanopillar; 212-first metal nitride semi-ellipsoid; 22-second composite Si nanopillar; 221-second Si nanopillar; 222-second metal nitride semi-ellipsoid; 23-metal nitride layer; 24-first dielectric layer; 25-second dielectric layer; 3-nitride buffer layer; 4-n-type nitride layer; 5-light-emitting layer; 6-p-type nitride layer. Detailed Implementation

[0077] The technical solution of the present invention will be further illustrated below through specific embodiments. Those skilled in the art should understand that the embodiments described are merely illustrative of the present invention and should not be construed as limiting the invention in any way.

[0078] Example 1

[0079] Please see Figure 1 , Figure 1This is a schematic diagram of the structure of the nitride epitaxial wafer provided by the present invention. The nitride epitaxial wafer includes a sapphire substrate 1, a composite pillar structure, a nitride buffer layer 3, an n-type nitride layer 4, a light-emitting layer 5, and a p-type nitride layer 6 stacked together.

[0080] The composite pillar structure is spaced apart on one side surface of the sapphire substrate 1. The composite pillar structure includes multiple composite Si nanopillars and a composite nanolayer covering the surface of the composite Si nanopillars.

[0081] The composite Si nanopillars include a first composite Si nanopillar 21 and a second composite Si nanopillar 22 spaced apart; the first composite Si nanopillar 21 includes a first Si nanopillar 211 and a first metal nitride semi-ellipsoid 212 disposed on the top of the first Si nanopillar 211, and the second composite Si nanopillar 22 includes a second Si nanopillar 221 and a second metal nitride semi-ellipsoid 222 disposed on the top of the second Si nanopillar 221.

[0082] Furthermore, the height of the first composite Si nanopillar 21 is greater than the height of the second composite Si nanopillar 22. The ratio of the height of the central axis of the cross section of the first metal nitride semi-ellipsoid 212 to that of the second metal nitride semi-ellipsoid 222 is 2.5:1. The height of the first Si nanopillar 211 is 600 nm, the height of the second Si nanopillar 221 is 400 nm, and the height ratio of the first Si nanopillar 211 to that of the second Si nanopillar 221 is 1.5:1. The material of both the first metal nitride semi-ellipsoid 212 and the second metal nitride semi-ellipsoid 222 is AlN.

[0083] The composite nanolayer includes a metal nitride layer 23 and a dielectric layer. The metal nitride layer 23 is coated on the surfaces of the first metal nitride semi-ellipsoid 212 and the second metal nitride semi-ellipsoid 222, and is made of AlN with a thickness of 50 nm. The dielectric layer includes a first dielectric layer 24 and a second dielectric layer 25. The first dielectric layer 24 is disposed on the outer wall of the first Si nanopillar 211 and the second Si nanopillar 221, and the second dielectric layer 25 is disposed on the sapphire substrate 1 between adjacent first composite Si nanopillar 21 and second composite Si nanopillar 22. The first dielectric layer 24 and the second dielectric layer 25 are both made of SiN, and the thickness of the first dielectric layer 24 is 20 nm and the thickness of the second dielectric layer 25 is 20 nm.

[0084] The nitride buffer layer 3 covers the composite pillar structure, and the surface of the nitride buffer layer 3 away from the substrate is horizontal; the nitride buffer layer 3 is a GaN buffer layer.

[0085] The n-type nitride layer 4 is an n-type GaN layer with a thickness of 3 μm. It is doped with Si at a concentration of 5 × 10⁻⁶. 18 cm -3 .

[0086] The light-emitting layer 5 includes 10 light-emitting units. Each light-emitting unit includes an In-containing quantum well layer and a nitride quantum barrier layer stacked together. The In-containing quantum well layer is an InGaN quantum well layer with a thickness of 3 nm; the nitride quantum barrier layer is a GaN quantum barrier layer with a thickness of 12 nm.

[0087] p-type nitride layer 6 is a p-type GaN layer with a thickness of 100 nm; p-type nitride layer 6 is doped with Mg element, and the Mg doping concentration is 5 × 10⁻⁶. 19 cm -3 .

[0088] This embodiment also provides a method for preparing the above-mentioned nitride epitaxial wafer, which includes the following steps:

[0089] (1) Provide a 4-inch sapphire substrate 1.

[0090] (2) Growing multiple first metal microspheres and multiple second metal microspheres arranged in an array on a sapphire substrate 1, the specific steps of which include:

[0091] (a) A first Al metal capping layer is grown on one side surface of a sapphire substrate 1 at a temperature of 900°C and annealed for 150s to form multiple first Al metal microspheres with a height of 50nm.

[0092] (b) A second Al metal capping layer was grown on one side surface of the sapphire substrate 1 at a temperature of 900°C and annealed for 170s to form multiple second Al metal microspheres with a height of 20nm.

[0093] (3) The first Al metal microspheres and the second Al metal microspheres are respectively transformed into the first composite Si nanopillars 21 and the second composite Si nanopillars 22. The specific steps include:

[0094] (s1) At a temperature of 900℃, a SiH4 source with a flow rate of 125ccm is introduced into a sapphire substrate 1 having multiple first metal microspheres and multiple second metal microspheres arranged in an array, and maintained for 45s.

[0095] (s2) The SiH4 source is interrupted and maintained at a temperature of 900℃ for 90s.

[0096] (s3) Repeat steps (s1) and (s2) 400 times to form a plurality of first composite Si nanopillars 21 and a plurality of second composite Si nanopillars 22 spaced apart on the surface of the sapphire substrate 1.

[0097] (4) At a temperature of 1050℃, an NH3 source with a flow rate of 55slm is introduced and maintained for 245s, so that the first metal semi-ellipsoid and the second metal semi-ellipsoid are transformed into the first metal nitride semi-ellipsoid 212 and the second metal nitride semi-ellipsoid 222, respectively. An AlN layer is grown on the surface of the first metal nitride semi-ellipsoid 212 and the second metal nitride semi-ellipsoid 222. At the same time, a first dielectric layer 24 is formed on the outer wall of the first Si nanopillar 211 and the second Si nanopillar 221, and a second dielectric layer 25 is formed on the sapphire substrate 1 between the adjacent first composite Si nanopillar 21 and the second composite Si nanopillar 22. The material of the first dielectric layer 24 and the second dielectric layer 25 is SiN.

[0098] (5) At a temperature of 1070℃, a TMGa source with a flow rate of 200 sccm and an NH3 source with a flow rate of 50 slm are introduced to cover the surface of the sapphire substrate 1 with a composite pillar structure and to grow a nitride buffer layer 3 made of GaN.

[0099] (6) At a temperature of 1080℃, a TEGa source with a flow rate of 220 sccm, an NH3 source with a flow rate of 55 slm, and a SiH4 source with a flow rate of 70 sccm are introduced to grow an n-type nitride layer 4 with a thickness of 3 μm and made of n-type GaN on the surface of the nitride buffer layer 3. The n-type nitride layer 4 is doped with Si element, and the Si element doping concentration is 5 × 10⁻⁶. 18 cm -3 .

[0100] (7) Steps (i)-(ii) are performed 10 times in a cyclical manner on the surface of the n-type nitride layer 4 to obtain the light-emitting layer 5.

[0101] The light-emitting layer 5 comprises 10 light-emitting units, the fabrication of which is shown below:

[0102] (i) At a temperature of 750°C, a TEGa source with a flow rate of 157 sccm, a TMIn source with a flow rate of 1700 sccm, and an NH3 source with a flow rate of 70 slm are introduced to grow an In-containing quantum well layer (denoted as InGaN quantum well layer) with a thickness of 3 nm on the surface of the n-type nitride layer 4.

[0103] (ii) At a temperature of 825°C, a TEGa source with a flow rate of 200 sccm and an NH3 source with a flow rate of 70 slm are introduced to grow a 12 nm thick quantum barrier layer (denoted as GaN quantum barrier layer) on the surface of the InGaN quantum well layer, thereby obtaining a light-emitting unit.

[0104] (8) At a temperature of 950℃, a TEGa source with a flow rate of 720 sccm, an NH3 source with a flow rate of 50 slm, and a Cp2Mg source with a flow rate of 1000 sccm are introduced to grow a 100 nm thick p-type nitride layer 6 of GaN on the surface of the light-emitting layer 5. The doping concentration of Mg in the p-type nitride layer 6 is 5 × 10⁻⁶. 19 cm -3 .

[0105] Example 2

[0106] This embodiment provides a nitride epitaxial wafer, which includes a sapphire substrate, a composite pillar structure, a nitride buffer layer, an n-type nitride layer, a light-emitting layer, and a p-type nitride layer stacked together.

[0107] The composite pillar structure is spaced apart on one side surface of the sapphire substrate 1. The composite pillar structure includes multiple composite Si nanopillars and a composite nanolayer covering the surface of the composite Si nanopillars.

[0108] The composite Si nanopillars include a first composite Si nanopillar and a second composite Si nanopillar spaced apart. The first composite Si nanopillar includes a first Si nanopillar and a first metal nitride semi-ellipsoid disposed on top of the first Si nanopillar. The second composite Si nanopillar includes a second Si nanopillar and a second metal nitride semi-ellipsoid disposed on top of the second Si nanopillar. The height of the first composite Si nanopillar is greater than the height of the second composite Si nanopillar. The ratio of the height of the cross-sectional mid-axis of the first metal nitride semi-ellipsoid to that of the second metal nitride semi-ellipsoid is 5:1. The height of the first Si nanopillar is 600 nm, and the height of the second Si nanopillar is 500 nm. The height ratio of the first Si nanopillar to the second Si nanopillar is 1.2:1. Both the first and second metal nitride semi-ellipsoids are made of AlN.

[0109] The composite nanolayer comprises a metal nitride layer and a dielectric layer. The metal nitride layer is coated on the surfaces of a first metal nitride hemisphere and a second metal nitride hemisphere, and is made of AlN with a thickness of 10 nm. The dielectric layer comprises a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed on the outer wall of the Si nanopillars, and the second dielectric layer is disposed on a sapphire substrate between adjacent composite Si nanopillars. Both the first and second dielectric layers are made of SiN, and the thickness of the first dielectric layer is 10 nm, and the thickness of the second dielectric layer is 10 nm.

[0110] The nitride buffer layer covers the composite pillar structure, and the surface of the nitride buffer layer away from the substrate is horizontal; the nitride buffer layer is a GaN buffer layer.

[0111] The n-type nitride layer is an n-type GaN layer with a thickness of 3 μm. The n-type nitride layer is doped with Si, and the Si doping concentration is 1 × 10⁻⁶. 18 cm -3 .

[0112] The light-emitting layer includes 10 light-emitting units, each of which includes an In-containing quantum well layer and a nitride quantum barrier layer stacked together. The In-containing quantum well layer is an InGaN quantum well layer with a thickness of 0.5 nm; the nitride quantum barrier layer is a GaN quantum barrier layer with a thickness of 6 nm.

[0113] The p-type nitride layer is a p-type GaN layer with a thickness of 50 nm; the p-type nitride layer is doped with Mg, and the Mg doping concentration is 1 × 10⁻⁶. 19 cm -3 .

[0114] This embodiment also provides a method for preparing the above-mentioned nitride epitaxial wafer, which includes the following steps:

[0115] (1) Provide a 4-inch sapphire substrate.

[0116] (2) Growing multiple first metal microspheres and multiple second metal microspheres arranged in an array on a sapphire substrate, the specific steps of which include:

[0117] (a) A first Al metal capping layer is grown on one side surface of a sapphire substrate at a temperature of 500°C and annealed for 300s to form multiple first Al metal microspheres with a height of 100nm.

[0118] (b) A second Al metal capping layer was grown on one side surface of a sapphire substrate at a temperature of 500°C and annealed for 450s to form multiple second Al metal microspheres with a height of 20nm.

[0119] (3) The first Al metal microspheres and the second Al metal microspheres are transformed into the first composite Si nanopillars and the second composite Si nanopillars, respectively. The specific steps include:

[0120] (s1) At a temperature of 500℃, a SiH4 source with a flow rate of 20 sccm is introduced into a sapphire substrate having multiple first metal microspheres and multiple second metal microspheres arranged in an array, and maintained for 100s.

[0121] (s2) The SiH4 source is interrupted and maintained at a temperature of 500℃ for 180s.

[0122] (s3) Repeat steps (s1) and (s2) 1000 times to form multiple first composite Si nanopillars and multiple second composite Si nanopillars spaced apart on the surface of the sapphire substrate.

[0123] (4) At a temperature of 600°C, an NH3 source with a flow rate of 10 slm is introduced and maintained for 500 s, so that the first metal semi-ellipsoid and the second metal semi-ellipsoid are transformed into the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid, respectively. An AlN layer is grown on the surface of the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid. At the same time, a first dielectric layer is formed on the outer wall of the first Si nanopillar and the second Si nanopillar, and a second dielectric layer is formed on the sapphire substrate between the adjacent first composite Si nanopillar and the second composite Si nanopillar. The material of the first dielectric layer and the second dielectric layer is SiN.

[0124] (5) At a temperature of 900℃, a TMGa source with a flow rate of 100 sccm and an NH3 source with a flow rate of 20 slm are introduced to cover the surface of the sapphire substrate with a composite pillar structure with a GaN nitride buffer layer.

[0125] (6) At a temperature of 900℃, a TEGa source with a flow rate of 100 sccm, an NH3 source with a flow rate of 20 slm, and a SiH4 source with a flow rate of 10 sccm are introduced to grow an n-type nitride layer with a thickness of 3 μm and made of n-type GaN on the surface of the nitride buffer layer. The n-type nitride layer is doped with Si element, and the Si doping concentration is 1×10⁻⁶. 18 cm -3 .

[0126] (7) Perform steps (i)-(ii) 10 times in a cyclical manner on the surface of the n-type nitride layer to obtain the luminescent layer.

[0127] The light-emitting layer comprises 10 light-emitting units, and the fabrication of the light-emitting units is shown below:

[0128] (i) At a temperature of 650°C, a TEGa source with a flow rate of 10 sccm, a TMIn source with a flow rate of 500 sccm, and an NH3 source with a flow rate of 10 slm are introduced to grow an In-containing quantum well layer (denoted as InGaN quantum well layer) with a thickness of 0.5 nm on the surface of an n-type nitride layer.

[0129] (ii) At a temperature of 700°C, a TEGa source with a flow rate of 10 sccm, a TMAl source with a flow rate of 10 sccm, and an NH3 source with a flow rate of 10 slm are introduced to grow a quantum barrier layer (denoted as GaN quantum barrier layer) with a thickness of 6 nm on the surface of the InGaN quantum well layer, thereby obtaining a light-emitting unit.

[0130] (8) At a temperature of 850℃, a TEGa source with a flow rate of 10 sccm, an NH3 source with a flow rate of 20 slm, and a Cp2Mg source with a flow rate of 200 sccm are introduced to grow a 50 nm thick p-type GaN layer on the surface of the light-emitting layer. The p-type nitride layer is doped with Mg, and the doping concentration of Mg is 1×10⁻⁶. 19 cm -3 .

[0131] Example 3

[0132] This embodiment provides a nitride epitaxial wafer, which includes a sapphire substrate, a composite pillar structure, a nitride buffer layer, an n-type nitride layer, a light-emitting layer, and a p-type nitride layer stacked together.

[0133] The composite pillar structure is spaced apart on one side surface of the sapphire substrate 1. The composite pillar structure includes multiple composite Si nanopillars and a composite nanolayer covering the surface of the composite Si nanopillars.

[0134] The composite Si nanopillars include a first composite Si nanopillar and a second composite Si nanopillar spaced apart. The first composite Si nanopillar includes a first Si nanopillar and a first metal nitride semi-ellipsoid disposed on top of the first Si nanopillar. The second composite Si nanopillar includes a second Si nanopillar and a second metal nitride semi-ellipsoid disposed on top of the second Si nanopillar. The height of the first composite Si nanopillar is greater than the height of the second composite Si nanopillar. The ratio of the height of the cross-sectional mid-axis of the first metal nitride semi-ellipsoid to that of the second metal nitride semi-ellipsoid is 10:1. The height of the first Si nanopillar is 800 nm, and the height of the second Si nanopillar is 400 nm. The height ratio of the first Si nanopillar to the second Si nanopillar is 2:1. Both the first and second metal nitride semi-ellipsoids are made of AlN.

[0135] The composite nanolayer comprises a metal nitride layer and a dielectric layer. The metal nitride layer is coated on the surfaces of a first metal nitride hemisphere and a second metal nitride hemisphere, and is made of AlN with a thickness of 100 nm. The dielectric layer comprises a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed on the outer wall of the Si nanopillars, and the second dielectric layer is disposed on a sapphire substrate between adjacent composite Si nanopillars. Both the first and second dielectric layers are made of SiN, and the thickness of the first dielectric layer is 50 nm, and the thickness of the second dielectric layer is 50 nm.

[0136] The nitride buffer layer covers the composite pillar structure, and the surface of the nitride buffer layer away from the substrate is horizontal; the nitride buffer layer is a GaN buffer layer.

[0137] The n-type nitride layer is an n-type GaN layer with a thickness of 5 μm. The n-type nitride layer is doped with Si, and the Si doping concentration is 5 × 10⁻⁶. 19 cm -3 .

[0138] The light-emitting layer includes 10 light-emitting units, each of which includes an In-containing quantum well layer and a nitride quantum barrier layer stacked together. The In-containing quantum well layer is an InGaN quantum well layer with a thickness of 5 nm; the nitride quantum barrier layer is a GaN quantum barrier layer with a thickness of 25 nm.

[0139] The p-type nitride layer is a p-type GaN layer with a thickness of 300 nm; the p-type nitride layer is doped with Mg, and the Mg doping concentration is 5 × 10⁻⁶. 20 cm -3 .

[0140] This embodiment also provides a method for preparing the above-mentioned nitride epitaxial wafer, which includes the following steps:

[0141] (1) Provide a 4-inch sapphire substrate.

[0142] (2) Growing multiple first metal microspheres and multiple second metal microspheres arranged in an array on a sapphire substrate, the specific steps of which include:

[0143] (a) A first Al metal capping layer is grown on one side surface of a sapphire substrate at a temperature of 1000°C and annealed for 50s to form multiple first Al metal microspheres with a height of 100nm.

[0144] (b) A second Al metal capping layer was grown on one side surface of a sapphire substrate at a temperature of 1000°C and annealed for 60s to form multiple second Al metal microspheres with a height of 10nm.

[0145] (3) The first Al metal microspheres and the second Al metal microspheres are transformed into the first composite Si nanopillars and the second composite Si nanopillars, respectively. The specific steps include:

[0146] (s1) At a temperature of 1000℃, a SiH4 source with a flow rate of 200 sccm is introduced into a sapphire substrate having multiple first metal microspheres and multiple second metal microspheres arranged in an array, and maintained for 10s.

[0147] (s2) At a temperature of 1000℃, the flow of the SiH4 source is interrupted and maintained for 10s.

[0148] (s3) Repeat steps (s1) and (s2) 100 times to form multiple first composite Si nanopillars and multiple second composite Si nanopillars spaced apart on the surface of the sapphire substrate.

[0149] (4) At a temperature of 1250°C, an NH3 source with a flow rate of 100 slm is introduced and maintained for 100 s, so that the first metal semi-ellipsoid and the second metal semi-ellipsoid are transformed into the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid, respectively. An AlN layer is grown on the surface of the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid. At the same time, a first dielectric layer is formed on the outer wall of the first Si nanopillar and the second Si nanopillar, and a second dielectric layer is formed on the sapphire substrate between the adjacent first composite Si nanopillar and the second composite Si nanopillar. The material of the first dielectric layer and the second dielectric layer is SiN.

[0150] (5) At a temperature of 1200℃, a TMGa source with a flow rate of 500 sccm and an NH3 source with a flow rate of 100 slm are introduced to cover the surface of the sapphire substrate with a composite pillar structure with a GaN nitride buffer layer.

[0151] (6) At a temperature of 1200℃, a TEGa source with a flow rate of 500 sccm, an NH3 source with a flow rate of 100 slm, and a SiH4 source with a flow rate of 100 sccm are introduced to grow an n-type nitride layer with a thickness of 5 μm and made of n-type GaN on the surface of the nitride buffer layer. The n-type nitride layer is doped with Si element, and the Si doping concentration is 5 × 10⁻⁶. 19 cm -3 .

[0152] (7) Perform steps (i)-(ii) 10 times in a cyclical manner on the surface of the n-type nitride layer to obtain the luminescent layer.

[0153] The light-emitting layer comprises 10 light-emitting units, and the fabrication of the light-emitting units is shown below:

[0154] (i) At a temperature of 850°C, a TEGa source with a flow rate of 300 sccm, a TMIn source with a flow rate of 2000 sccm, and an NH3 source with a flow rate of 100 slm are introduced to grow an In-containing quantum well layer (denoted as InGaN quantum well layer) with a thickness of 0.5-5 nm on the surface of an n-type nitride layer.

[0155] (ii) At a temperature of 950°C, a TEGa source with a flow rate of 300 sccm, a TMAl source with a flow rate of 100 sccm, and an NH3 source with a flow rate of 100 slm are introduced to grow a 25 nm thick quantum barrier layer (denoted as GaN quantum barrier layer) on the surface of the InGaN quantum well layer to obtain a light-emitting unit.

[0156] (8) At a temperature of 1050℃, a TEGa source with a flow rate of 1000 sccm, an NH3 source with a flow rate of 100 slm, and a Cp2Mg source with a flow rate of 2000 sccm are introduced to grow a 300 nm thick p-type GaN layer of GaN material on the surface of the light-emitting layer. The p-type nitride layer is doped with Mg element, and the doping concentration of Mg element is 5 × 10⁻⁶. 20 cm -3 .

[0157] Example 4

[0158] The difference between this embodiment and Embodiment 1 is that the ratio of the height of the central axis of the cross section of the first metal semi-ellipsoid to that of the second metal semi-ellipsoid is 1.5:1. The other preparation methods and parameters are the same as those in Embodiment 1, and will not be repeated here.

[0159] Example 5

[0160] The difference between this embodiment and Embodiment 1 is that the ratio of the height of the central axis of the cross section of the first metal semi-ellipsoid to that of the second metal semi-ellipsoid is 15:1. The other preparation methods and parameters are the same as those in Embodiment 1, and will not be repeated here.

[0161] Example 6

[0162] The difference between this embodiment and Embodiment 1 is that the height ratio of the first Si nanopillar to the second Si nanopillar is 1.1:1. The rest of the preparation methods and parameters are the same as in Embodiment 1, and will not be repeated here.

[0163] Example 7

[0164] The difference between this embodiment and Embodiment 1 is that the height ratio of the first Si nanopillar to the second Si nanopillar is 3:1. The rest of the preparation methods and parameters are the same as in Embodiment 1, and will not be repeated here.

[0165] Comparative Example 1

[0166] The difference between this comparative example and Example 1 is that the first composite Si nanopillar and the second composite Si nanopillar have the same height, the cross-sectional central axis heights of the first metal semi-ellipsoid and the second metal semi-ellipsoid are the same, and the heights of the first Si nanopillar and the second Si nanopillar are the same. The remaining preparation methods and parameters are consistent with those of Example 1 and will not be repeated here.

[0167] The emission wavelength (WLD) and wavelength uniformity (std) of the nitride epitaxial wafers prepared in Examples 1-7 and Comparative Example 1 were tested using a photoluminescence analyzer. The full width at half maximum (FWHM) of the (102) crystal plane and the wavelength FWHM of the epitaxial wafers were measured using a high-resolution X-ray diffractometer. The nitride epitaxial wafers prepared in the examples and comparative examples were then fabricated into Micro-LEDs, and their performance was tested using LED spot testing equipment. The test parameters included brightness (Lop), ESD yield, IR yield, and wavelength drift (ΔWLD). The test results are shown in Table 1.

[0168] Table 1

[0169]

[0170] The above test data reveals that:

[0171] Examples 1-3 have low wavelength uniformity (std), (102) half-width, and wavelength half-width (HW), and also have higher brightness, higher ESD yield, and higher IR yield. In the nitride epitaxial wafer provided by the present invention, the composite pillar structure strengthens the lateral epitaxial growth of the nitride buffer layer, delays the merging process of its lateral epitaxial growth surface, thereby allowing the dislocations inside to fully turn and self-annihilate, overcoming the problem of high dislocation density during the growth of nitride materials, obtaining a high-quality nitride buffer layer growth template, thereby reducing the probability of dislocations extending upward to the light-emitting layer, reducing leakage channels, enhancing radiative recombination, thereby improving the brightness, leakage current, and ESD antistatic release performance of the epitaxial wafer, and effectively utilizing the relaxation between Si nanopillars and the metal semi-ellipsoidal structure to reduce stress, reducing the wavelength half-width and wavelength drift ΔWLD, and improving the monochromaticity and stability of the LED wavelength.

[0172] Compared to Examples 1-3, in Examples 4-7, the wavelength uniformity (std), (102) half-width, and wavelength half-width (HW) are all increased, while the brightness (Lop), ESD yield, and IR yield are all decreased. Example 4 results in a low difference in the incorporation of Si atoms into active sites on the surfaces of the first and second metal semi-ellipsoids, causing the first and second Si nanopillars to fail to form a height difference. Example 5 results in a large difference in the growth rates of the first and second Si nanopillars, ultimately failing to effectively utilize the height difference, leading to a lack of probability for dislocations of varying degrees of extension during the growth of the nitride buffer layer to tilt in the thickness direction. In Examples 6 and 7, an excessively large or small height ratio between the first and second Si nanopillars will also prevent the effective utilization of the height difference, resulting in a lack of probability for dislocations of varying degrees of extension during the growth of the nitride buffer layer to tilt in the thickness direction, thus failing to effectively reduce dislocation extension in the nitride buffer layer.

[0173] Compared to Example 1, Comparative Example 1 showed increased wavelength uniformity (std), (102) half-width, and wavelength half-width (HW), but significantly reduced brightness (Lop), ESD yield, and IR yield. This indicates that it cannot effectively utilize the relaxation between Si nanopillars and metal nitride semi-ellipsoids of different heights in the thickness direction to reduce stress and improve the near-body quality of the light-emitting layer, thereby improving the brightness, leakage current, and ESD antistatic release performance of the epitaxial wafer.

[0174] The applicant declares that the present invention is illustrated by the above embodiments, but the present invention is not limited to the above process steps, that is, it does not mean that the present invention must rely on the above process steps to be implemented. Those skilled in the art should understand that any improvements to the present invention, equivalent substitutions of the raw materials used in the present invention, addition of auxiliary components, selection of specific methods, etc., all fall within the protection scope and disclosure scope of the present invention.

Claims

1. A nitride epitaxial wafer, characterized in that, The nitride epitaxial wafer includes a heterogeneous substrate, a composite pillar structure, a nitride buffer layer, an n-type nitride layer, a light-emitting layer, and a p-type nitride layer stacked together. The composite pillar structure is distributed at intervals on one side surface of the heterogeneous substrate, and the composite pillar structure includes multiple composite Si nanopillars and a composite nanolayer covering the surface of the composite Si nanopillars. The composite Si nanopillars include a first composite Si nanopillar and a second composite Si nanopillar spaced apart; the first composite Si nanopillar includes a first Si nanopillar and a first metal nitride semi-ellipsoid disposed on the top of the first Si nanopillar, and the second composite Si nanopillar includes a second Si nanopillar and a second metal nitride semi-ellipsoid disposed on the top of the second Si nanopillar; the first composite Si nanopillar and the second composite Si nanopillar have different heights. The nitride buffer layer covers the composite pillar structure, and the surface of the nitride buffer layer away from the substrate is a horizontal plane; The light-emitting layer includes at least one light-emitting unit, which includes an In-containing quantum well layer and a nitride quantum barrier layer stacked together.

2. The nitride epitaxial wafer according to claim 1, characterized in that, The composite nanolayer includes a metal nitride layer and a dielectric layer. The metal nitride layer covers the surfaces of the first metal nitride hemisphere and the second metal nitride hemisphere. The dielectric layer includes a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed on the outer wall of the first Si nanopillar and the second Si nanopillar. The second dielectric layer is disposed on the heterogeneous substrate between adjacent first composite Si nanopillars and second composite Si nanopillars. Preferably, the heterogeneous substrate includes any one of a sapphire substrate, a silicon carbide substrate, or a Si substrate; Preferably, the height of the first composite Si nanopillar is greater than the height of the second composite Si nanopillar; Preferably, the ratio of the height of the central axis of the cross section of the first metal nitride semi-ellipsoid to that of the second metal nitride semi-ellipsoid is (2-10):1; Preferably, the heights of the first Si nanopillar and the second Si nanopillar are independently 100-500 nm, and the height ratio of the first Si nanopillar to the second Si nanopillar is (1.2-2):1; Preferably, both the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid are made of AlN. Preferably, the metal nitride layer is of the same type as the first metal nitride semi-ellipsoid or the second metal nitride semi-ellipsoid; Preferably, the thickness of the metal nitride layer is 10-100 nm; Preferably, the dielectric layer comprises a SiN layer; Preferably, the thickness of the first dielectric layer is 2-50 nm; Preferably, the thickness of the second dielectric layer is 2-50 nm; Preferably, the nitride buffer layer comprises a GaN buffer layer; Preferably, the n-type nitride layer comprises an n-type GaN layer; Preferably, the n-type nitride layer is doped with Si, and the Si doping concentration is 1×10⁻⁶. 18 -5×10 19 cm -3 ; Preferably, the In-containing quantum well layer comprises an InGaN quantum well layer; Preferably, the nitride quantum barrier layer comprises a GaN quantum barrier layer; Preferably, in one of the light-emitting units, the thickness of the In-containing quantum well layer is 0.5-5 nm, and the thickness of the nitride quantum barrier layer is 6-25 nm; Preferably, the number of light-emitting units is 2-12; Preferably, the thickness of the p-type nitride layer is 50-300 nm; Preferably, the p-type nitride layer comprises a p-type GaN layer; Preferably, the p-type nitride layer is doped with Mg, and the doping concentration of Mg is 1×10⁻⁶. 19 -5×10 20 cm -3 .

3. A method for preparing a nitride epitaxial wafer as described in claim 1 or 2, characterized in that, The preparation method includes the following steps: A composite pillar structure is grown on a heterogeneous substrate; wherein the composite pillar structure is spaced apart on one side surface of the heterogeneous substrate, and the composite pillar structure includes a plurality of composite Si nanopillars and a composite nanolayer covering all the composite Si nanopillars; the composite Si nanopillars include first composite Si nanopillars and second composite Si nanopillars spaced apart; the first composite Si nanopillar includes a first Si nanopillar and a first metal nitride semi-ellipsoid disposed on top of the first Si nanopillar, and the second composite Si nanopillar includes a second Si nanopillar and a second metal nitride semi-ellipsoid disposed on top of the second Si nanopillar; the first composite Si nanopillars and the second composite Si nanopillars have different heights. A nitride buffer layer, an n-type nitride layer, a light-emitting layer, and a p-type nitride layer are sequentially grown on the composite column structure.

4. The preparation method according to claim 3, characterized in that, The method for growing the composite column structure includes the following steps: A plurality of first metal microspheres and a plurality of second metal microspheres are grown in an array on the heterogeneous substrate; A Si source is introduced to transform the first metal microsphere and the second metal microsphere into the first composite Si nanopillar and the second composite Si nanopillar, respectively. The first metal semi-ellipsoid and the second metal semi-ellipsoid are transformed into the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid, respectively. The metal nitride layer is coated on the surface of the first metal semi-ellipsoid and the second metal semi-ellipsoid. At the same time, a first dielectric layer is formed on the outer wall of the Si nanopillar, and a second dielectric layer is formed on the heterogeneous substrate between the adjacent first composite Si nanopillar and the second composite Si nanopillar, to obtain a composite nanolayer.

5. The preparation method according to claim 4, characterized in that, The growth method of the array of multiple first metal microspheres and multiple second metal microspheres includes: Under a temperature of 500-1000℃, a first metal capping layer is grown on one side surface of the heterogeneous substrate and annealed for 50-300s to form the plurality of first metal microspheres with a height of 10-100nm. A second metal capping layer is grown on one side surface of the heterogeneous substrate at a temperature of 500-1000℃ and then annealed for 60-450s to form the plurality of second metal microspheres with a height of 10-100nm.

6. The preparation method according to claim 4 or 5, characterized in that, The specific methods for transforming the first metal microspheres and the second metal microspheres into the first composite Si nanopillars and the second composite Si nanopillars, respectively, include: A Si source is introduced into a heterogeneous substrate having multiple first metal microspheres and multiple second metal microspheres arranged in an array and maintained for a first set time. Interrupt the flow of the Si source and maintain it for a second set time; Repeat the above steps to form a plurality of first composite Si nanopillars and a plurality of second composite Si nanopillars spaced apart on the surface of the heterogeneous substrate.

7. The preparation method according to claim 6, characterized in that, The specific methods for transforming the first metal microspheres and the second metal microspheres into the first composite Si nanopillars and the second composite Si nanopillars, respectively, include: At a temperature of 500-1000℃, a Si source with a flow rate of 20-200 sccm is introduced into a heterogeneous substrate having multiple first metal microspheres and multiple second metal microspheres arranged in an array, and maintained for 10-100 s. The Si source is interrupted and maintained at a temperature of 500-1000℃ for 10-180 seconds. Repeat the above steps 100-1000 times to form a plurality of first composite Si nanopillars and a plurality of second composite Si nanopillars spaced apart on the surface of the heterogeneous substrate.

8. The preparation method according to any one of claims 4-7, characterized in that, The metal nitride layer is an AlN layer, the dielectric layer includes a first dielectric layer and a second dielectric layer, both of which are SiN layers, and the growth method of the composite nanolayer includes: Under conditions of 600-1250℃, an N source with a flow rate of 1-100slm is introduced and maintained for 100-600s, so that the first metal semi-ellipsoid and the second metal semi-ellipsoid are transformed into the first metal nitride semi-ellipsoid and the second metal nitride semi-ellipsoid, respectively, and the AlN layer is grown on the surface of the first metal semi-ellipsoid and the second metal semi-ellipsoid. At the same time, the first dielectric layer is formed on the outer wall of the Si nanopillar, and the second dielectric layer is formed on the heterogeneous substrate between adjacent composite Si nanopillars. Preferably, the method for growing the nitride buffer layer includes: Under conditions of 900-1200℃, a Ga source with a flow rate of 100-500 sccm and an N source with a flow rate of 20-100 slm are introduced to grow a nitride buffer layer on the surface of the composite pillar structure. Preferably, the method for growing the n-type nitride layer includes: Under conditions of 900-1200℃, a Ga source with a flow rate of 100-500 sccm, an N source with a flow rate of 20-100 slm, and a Si source with a flow rate of 10-100 sccm are introduced to grow an n-type nitride layer with a thickness of 2-5 μm on the surface of the nitride buffer layer. The n-type nitride layer is doped with Si element, and the Si doping concentration is 1×10⁻⁶. 18 -5×10 19 cm -3 .

9. The preparation method according to any one of claims 4-8, characterized in that, The method for growing the light-emitting layer includes: (1) Under the condition of 650-850℃, a Ga source with a flow rate of 10-300sccm, an In source with a flow rate of 500-2000sccm, and an N source with a flow rate of 10-100slm are introduced to grow an In-containing quantum well layer with a thickness of 0.5-5nm on the surface of the n-type nitride layer. (2) Under the condition of 700-950℃, a Ga source with a flow rate of 10-300sccm and an N source with a flow rate of 10-100slm are introduced to grow a GaN quantum barrier layer with a thickness of 6-25nm on the surface of the In quantum well layer. (3) Using the In-containing quantum well layer and GaN quantum barrier layer as a light-emitting unit, the steps (1) and (2) are performed alternately in a periodic cycle to obtain the light-emitting layer; Preferably, the method for growing the p-type GaN layer includes: Under conditions of 850-1050℃, a Ga source with a flow rate of 10-1000 sccm, an N source with a flow rate of 20-100 slm, and a Mg source with a flow rate of 200-2000 sccm are introduced to grow a p-type GaN layer with a thickness of 50-300 nm on the surface of the light-emitting layer. The p-type nitride layer is doped with Mg element, and the doping concentration of Mg element is 1×10⁻⁶. 19 -5×10 20 cm -3 .

10. A Micro-LED, characterized in that, The Micro-LED includes a nitride epitaxial wafer as described in any one of claims 1-3.

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