Method for determining quantum circuit and method for observing high-order polynomial function

Abstract

The embodiment of the invention discloses a quantum circuit determination method, a method for observing a non-standard quadratic function, a method for observing a high-degree polynomial function and related devices. The method comprises the following steps: acquiring an auxiliary quantum register and a target quantum register; enabling a Hadamard gate to act on the auxiliary quantum register, enabling a target quantum logic gate controlled by the auxiliary quantum register to act on the target quantum register, and enabling the Hadamard gate to act on the auxiliary quantum register in sequence to obtain a first target quantum circuit; and the first target quantum circuit is used for determining an observation value of a real part of a linear polynomial function according to the observation probability of the quantum state of the auxiliary quantum register. By adopting the embodiment of the invention, any one-degree polynomial function can be observed, so that a quantum circuit can be designed in the quantum computer, a non-standard quadratic function and a high-degree polynomial function can be observed, and the hardware function of the quantum computer can be perfected.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to a method for determining quantum circuits, a method for observing non-standard quadratic functions, a method for observing high-order polynomial functions, and related apparatus. Background Technology

[0002] The general form of a quadratic function is f(x) = x T Ax+b T Let x + c be the vector A, where x is an n-dimensional vector, A is an n×n matrix, b is an n-dimensional vector, and c is a constant. Quadratic functions are an important concept in linear algebra, representing a mapping from vectors to real numbers. They are fundamental to the study of matrix theory and geometric spaces. In optimization theory, quadratic programming is a common type of optimization problem, with its objective function being a quadratic function. These problems have wide applications in economics, engineering, and other fields. In control system theory, the stability of a system is analyzed by constructing Lyapunov functions (usually positive definite quadratic functions).

[0003] The Hadamard-Test and Swap-Test circuits are existing and commonly used quantum circuits that can respectively implement the quadratic function f =<x|U|x> and f = ||<x|y> || 2 The observations are given by U, where U is a unitary matrix. For example, in the Hadamard-Test, if we let U = A, we can observe the first term x of the quadratic function. T The observation of Ax shows that both the Hadamard-Test and Swap-Test circuits can only observe specific quadratic functions. For non-standard quadratic functions, such as linear functions, current quantum computers are powerless due to a lack of corresponding hardware circuit design. Quantum computers are still in a period of rapid development, and how to design a circuit to observe linear functions within a quantum computer is a pressing technical problem that needs to be solved. Summary of the Invention

[0004] This application provides a method for determining a quantum circuit, a method for observing non-standard quadratic functions, a method for observing high-order polynomial functions, and related devices. These methods enable the observation of any first-order polynomial function, thereby facilitating the design of a quantum circuit in a quantum computer to observe non-standard quadratic functions and high-order polynomial functions, and improving the hardware functionality of the quantum computer.

[0005] The first aspect of this application provides a method for determining a quantum circuit, characterized in that it includes:

[0006] Acquire the auxiliary quantum register and the target quantum register;

[0007] A first target quantum circuit is obtained by sequentially applying a Hadamard gate to the auxiliary quantum register, applying a target quantum logic gate controlled by the auxiliary quantum register to the target quantum register, and applying a Hadamard gate to the auxiliary quantum register. The first target quantum circuit is used to determine the observed value of the real part of a linear function based on the observation probability of the quantum state of the auxiliary quantum register. The target quantum logic gate includes a first quantum logic gate, a second quantum logic gate, and a third quantum logic gate cascaded in sequence. The first quantum logic gate is used to encode the unknown quantity in the linear function, the second quantum logic gate is determined according to the form of the linear function, and the third quantum logic gate is used to generate a superposition state with equal probability.

[0008] Furthermore, after applying the Hadamard gate to the auxiliary quantum register and before applying the target quantum logic gate controlled by the auxiliary quantum register to the target quantum register, the method further includes:

[0009] Applying the S-gate to the auxiliary quantum register yields a second target quantum circuit. This second target quantum circuit is used to determine the observed value of the imaginary part of the linear function based on the observation probability of the quantum state of the auxiliary quantum register. The unitary matrix equivalent to the S-gate is:

[0010]

[0011] A second aspect of this application provides a method for observing non-standard quadratic functions, including:

[0012] A control signal is generated according to the Hadama test circuit and the first target quantum circuit determined as described in the first aspect or the second target quantum circuit determined as described in the first aspect;

[0013] The quantum states in the auxiliary quantum register and the target quantum register in the quantum chip are evolved by controlling the control signal.

[0014] The observation probability of the quantum state of the auxiliary quantum register is obtained by measuring the measurement signal of the auxiliary quantum register.

[0015] The observed value of the real or imaginary part of the non-standard quadratic function is determined based on the observed probability.

[0016] Specifically, the generation of the control signal based on the Hadamard test circuit and the first target quantum circuit determined as described in the first aspect includes:

[0017] Generate a first control signal corresponding to the Hadamard test circuit, and generate a second control signal corresponding to the first target quantum circuit determined by the method described in the first aspect;

[0018] The process of controlling the evolution of quantum states in the auxiliary quantum register and the target quantum register in the quantum chip via the control signal includes:

[0019] The quantum states in the auxiliary quantum register and the target quantum register in the quantum chip are evolved according to the first control signal and the second control signal, respectively.

[0020] Specifically, the generation of the control signal based on the Hadamard test circuit and the first target quantum circuit determined as described in the first aspect includes:

[0021] Control signals are generated based on the Hadama test circuit, the first target quantum circuit determined by the method as described in the first aspect, and the quantum adder.

[0022] A third aspect of this application provides a method for observing high-order polynomial functions, including:

[0023] Determine the function type of each term in the higher-order polynomial function, where the function type includes linear functions and quadratic functions;

[0024] The quantum circuit corresponding to each function is determined according to the function type. The linear function corresponds to the first target quantum circuit determined by the method described in the first aspect or the second target quantum circuit determined by the method described in the first aspect. The quadratic function corresponds to the Hadamard test circuit.

[0025] The observation value of the higher-order polynomial function is determined based on the quantum circuit.

[0026] A fourth aspect of this application provides a device for determining a quantum circuit, comprising:

[0027] The register acquisition unit is used to acquire the auxiliary quantum register and the target quantum register;

[0028] A circuit determination unit is used to sequentially apply a Hadamard gate to the auxiliary quantum register, apply a target quantum logic gate controlled by the auxiliary quantum register to the target quantum register, and apply a Hadamard gate to the auxiliary quantum register to obtain a first target quantum circuit. The first target quantum circuit is used to determine the observed value of the real part of a linear function based on the observation probability of the quantum state of the auxiliary quantum register. The target quantum logic gate includes a first quantum logic gate, a second quantum logic gate, and a third quantum logic gate cascaded in sequence. The first quantum logic gate is used to encode the unknown quantity in the linear function, the second quantum logic gate is determined according to the form of the linear function, and the third quantum logic gate is used to generate a superposition state with equal probability.

[0029] A fifth aspect of this application provides an apparatus for observing non-standard quadratic functions, comprising:

[0030] A control signal generation unit is used to generate a control signal based on a Hadamard test circuit and a first target quantum circuit determined as described in the first aspect or a second target quantum circuit determined as described in the first aspect.

[0031] A quantum state evolution unit is used to control the evolution of quantum states in the auxiliary quantum register and the target quantum register in the quantum chip through the control signal;

[0032] An observation probability determination unit is used to measure the auxiliary quantum register based on a measurement signal to obtain the observation probability of the quantum state of the auxiliary quantum register.

[0033] An observation determination unit is used to determine the observed value of the real or imaginary part of the non-standard quadratic function based on the observation probability.

[0034] A sixth aspect of this application provides an apparatus for observing high-order polynomial functions, comprising:

[0035] The function type determination unit is used to determine the function type of each term in the higher-order polynomial function, wherein the function type includes linear functions and quadratic functions;

[0036] A circuit determination unit is used to determine the quantum circuit corresponding to each function according to the function type, wherein the linear function corresponds to a first target quantum circuit determined by the method described in the first aspect or a second target quantum circuit determined by the method described in the first aspect, and the quadratic function corresponds to a Hadamard test circuit.

[0037] An observation determination unit is used to determine the observation value of the higher-order polynomial function based on the quantum circuit.

[0038] A seventh aspect of this application provides an electronic device, including: a processor and a memory;

[0039] The processor is connected to a memory, wherein the memory is used to store computer programs and the processor is used to invoke the computer programs to perform the methods described in any of the first to sixth aspects of the embodiments of this application.

[0040] A fifth aspect of this application provides a computer-readable storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, perform the method described in any one of the first to sixth aspects of this application.

[0041] This application provides a method for determining a quantum circuit, in which a target quantum logic gate controlled by an auxiliary quantum register is applied to a target quantum register, wherein the first quantum logic gate U x Acting on |0>, it is used to encode the unknown x in a linear function, thereby realizing U x Preparation of |0<; Third quantum logic gate U H It acts on <0| to generate a superposition state <+| with equal probability, thereby realizing <0|U H =<+|;Second quantum logic gate U i The form is determined based on a linear function, and then the operation is performed using a second quantum logic gate to achieve the desired result. Thus, U is satisfied. i It is a first-order polynomial of the independent variable x of the unitary operator, realizing the preparation of a first-order function. This quantum circuit can be used to determine the observed value of the real part of any first-order polynomial function based on the observation probability of the quantum state of the auxiliary quantum register. This is beneficial to designing a quantum circuit in a quantum computer to observe non-standard quadratic functions and higher-order polynomial functions, thereby improving the hardware functions of the quantum computer. Attached Figure Description

[0042] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 An example system block diagram is shown for a method for determining a quantum circuit, a method for observing a non-standard quadratic function, and a method for observing a higher-order polynomial function provided in one embodiment of this application.

[0044] Figure 2A A schematic diagram of the structure of the Hadamard-Test circuit for measuring the real part of a standard quadratic function according to an embodiment of this application is shown;

[0045] Figure 2B A schematic diagram of the structure of the Hadamard-Test circuit for measuring the imaginary part of a standard quadratic function according to an embodiment of this application is shown;

[0046] Figure 3 A schematic diagram of the structure of a SWAP-Test circuit for measuring a perfect square function provided in one embodiment of this application is shown;

[0047] Figure 4A flowchart illustrating a method for determining a quantum circuit according to an embodiment of this application is shown;

[0048] Figure 5 This invention provides a schematic diagram of the structure of a quantum circuit for observing the real part of a linear function according to an embodiment of this application.

[0049] Figure 6 A flowchart illustrating a method for determining a quantum circuit according to another embodiment of this application is shown;

[0050] Figure 7 A flowchart illustrating a method for observing non-standard quadratic functions according to an embodiment of this application is shown;

[0051] Figure 8 A flowchart illustrating a method for observing high-order polynomial functions according to an embodiment of this application is shown;

[0052] Figure 9 A schematic diagram of the structure of a quantum circuit for observing high-order polynomial functions according to an embodiment of this application is shown;

[0053] Figure 10 A schematic diagram of the structure of a quantum circuit determination device provided in one embodiment of this application is shown;

[0054] Figure 11 A schematic diagram of a device for observing non-standard quadratic functions provided in one embodiment of this application is shown;

[0055] Figure 12 This invention provides a schematic diagram of the structure of a device for observing high-order polynomial functions according to an embodiment of the present application.

[0056] Figure 13 A schematic diagram of the structure of a computer device provided in one embodiment of this application is shown. Detailed Implementation

[0057] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0058] Classical computers use transistors to encode information in binary data, such as bits, where each bit can represent a value of 1 or 0. These 1s and 0s act as switches to drive the functions of a classical computer. If there are n bits of data, there are 2^n possible classical states, and one state is represented at a time.

[0059] Quantum computers use quantum processors that operate on data represented by qubits, also known as quantum bits. A single qubit can represent the classical binary states "0" or "1", or a superposition of "0" and "1". Because it can represent a superposition of "0" and "1", a qubit can represent both "0" and "1" states simultaneously. For example, if there are n bits of data, then 2^n qubits can represent n bits of data. n A quantum state can be represented simultaneously. Furthermore, qubits in a superposition can be correlated with each other, a phenomenon known as entanglement, where the state of one qubit (whether 1, 0, or both) depends on the state of another qubit, and more information can be encoded within two entangled qubits. Based on the principles of superposition and entanglement, qubits enable quantum computers to perform functions that might be relatively complex and time-consuming for classical computers.

[0060] Please refer to Figure 1 This illustrates an example system block diagram of a method for determining quantum circuits, a method for observing non-standard quadratic functions, and a method for observing higher-order polynomial functions, provided in one embodiment of this application. System 100 may be a hybrid computing system comprising a combination of one or more quantum computers, quantum systems, and / or classical computers. Figure 1 In the example shown, system 100 may include a quantum system 110 and a classical computer 120. In one implementation, the quantum system 110 and the classical computer 120 may be configured to communicate via one or more wired and / or wireless connections (e.g., wireless networks). The quantum system 110 may include a quantum chipset consisting of one or more quantum chips, comprising various hardware components for processing data encoded in qubits. The quantum chipset may be a quantum computing core surrounded by infrastructure to protect the quantum chips from electromagnetic noise sources, mechanical vibration sources, heat sources, and other noise sources that can degrade the performance of the quantum chips. The classical computer 120 may be electronically integrated with the quantum system 110 via any suitable wired and / or wireless electronic connection.

[0061] exist Figure 1 In the example shown, quantum system 110 can be any suitable set of components capable of performing quantum operations on a physical system. Quantum operations, such as quantum gate operations, manipulate the quantum states of qubits to evolve and / or become entangled. Figure 1In the illustrated example embodiment, the quantum system 110 may include a measurement and control unit 111, an interface 112, and a quantum chip 113. In some embodiments, all or part of each of the measurement and control unit 111, interface 112, and quantum chip 113 may be located in a cryogenic environment to facilitate the performance of quantum operations. The quantum chip 113 may be any hardware capable of processing information using quantum states. This hardware may include multiple qubits and means for coupling or entanglement of the qubits to process information using quantum states. Qubits may include, but are not limited to, charge qubits, flux qubits, phase qubits, spin qubits, and ion qubits. The quantum chip may include a set of quantum logic gates configured to perform quantum logic operations on the qubits stored in a quantum register. The quantum gates may include one or more single-qubit gates, two-qubit gates, and / or other multi-qubit gates.

[0062] The measurement and control unit 111 can be any combination of digital computing devices capable of performing quantum computing (e.g., executing quantum circuits) in conjunction with interface 112. This digital computing device may include a digital processor and memory for storing and executing quantum instructions using interface 112. The digital computing device may also include a communication protocol device for receiving instructions and sending the results of the performed quantum computing to a classical computer. Additionally, the digital computing device may include a communication interface having interface 112. In one embodiment, the measurement and control unit 111 may be configured to receive classical instructions (e.g., from classical computer 120) and convert these classical instructions into measurement and control instructions for interface 112. The measurement and control instructions provided by the measurement and control unit 111 to interface 112 may be, for example, digital signals indicating which quantum gates in a quantum gate array need to be applied to the qubits to perform a specific function. Interface 112 may be configured to convert these digital signals into analog signals (e.g., analog pulses of microwave pulses), which can be used to apply quantum gates to the qubits to manipulate the interactions between the qubits.

[0063] Interface 112 may be a classical-quantum interface, comprising a combination of devices capable of receiving instructions from the integrated measurement and control unit 111 and converting those instructions into a means for implementing quantum operations. In one embodiment, interface 112 may convert instructions from the integrated measurement and control unit 111 into drive signals capable of driving or manipulating qubits, and / or applying quantum gates to qubits. Additionally, interface 112 may be configured to convert signals received from the quantum chip 113 into digital signals capable of being processed and transmitted by the integrated measurement and control unit 111. Devices included in interface 112 may include, but are not limited to, digital-to-analog converters, analog-to-digital converters, waveform generators, attenuators, amplifiers, optical fibers, lasers, and filters. Interface 112 may further include circuitry configured to measure multiple qubits after the application of quantum gates, wherein the measurements may produce results represented in classical bits. Each measurement performed by interface 112 may be read out to a device connected to the quantum system 110, such as a classical computer 120. The multiple measurement results provided by interface 112 may represent probabilistic results.

[0064] The classical computer 120 can include hardware components such as a processor and storage devices (e.g., including memory devices and classical registers) for processing data encoded in classical bits. In one embodiment, the classical computer 120 can be configured to provide the quantum system 110 with various control signals, instructions, and data encoded in classical bits. Further, quantum states measured by the quantum system 110 can be read out by the classical computer 120, and the classical computer 120 can store the measured quantum states as classical bits in classical registers. In one embodiment, the classical computer 120 can be any suitable combination of computer-executable hardware and / or computer-executable software capable of executing the preparation module 121 to perform quantum computation using data stored in the data storage module 122 as part of the construction and computation. The data storage module 122 can be a repository for data to be analyzed using quantum computing algorithms and the results of that analysis. The preparation module 121 can be a program or module capable of preparing classical data from the data storage module 122 as part of a quantum circuit implementation. Preparation module 121 can be instantiated as part of a larger algorithm, such as an application programming interface (API) function call, or by resolving hybrid classical-quantum computing into aspects of quantum and classical computing. For example, preparation module 121 can generate instructions for creating quantum circuits using quantum gates. In an embodiment, such instructions can be stored by the measurement and control unit 111 and can be instantiated by components of interface 112 to execute, enabling quantum operations of quantum gates to be performed on quantum chip 113.

[0065] The classic computer 120 may be a laptop computer, desktop computer, vehicle-integrated computer, smart mobile device, tablet device, and / or any other suitable classic computing device. Additionally or alternatively, the classic computer 120 may also operate as part of a cloud computing service model, such as Software as a Service (SaaS), Platform as a Service (PaaS), or Infrastructure as a Service (IaaS). The classic computer 120 may also reside in a cloud computing deployment model, such as a private cloud, community cloud, public cloud, or hybrid cloud.

[0066] The general form of a quadratic function is f(x) = x T Ax+b T x+c, where x is an n-dimensional vector, A is an n×n matrix, b is an n-dimensional vector, and c is a constant. For the first term:

[0067]

[0068] The Hadamard-Test is a quantum algorithm used to determine the phase of a quantum state relative to a reference state. It is a key subroutine in many quantum algorithms, such as quantum phase estimation. The Hadamard-Test works by applying a unitary operation to the quantum state controlling a single bit. After applying the unitary operation, we apply another Hadamard transform to the control bit and measure it against a standard basis. By repeating the Hadamard-Test multiple times and averaging the results, we can estimate the phase of the target bit relative to the reference state.

[0069] The Hadamard-Test circuit is an existing and commonly used quantum circuit that can be used to implement the quadratic function f = ...<x|U|x> The observations are given, where U equals matrix A in the quadratic function, requiring U to be a specific unitary operator. For the real part of , the Hadamard-Test circuit is as follows: Figure 2A As shown. In the diagram, H represents the Hadamard door. U x It is an encoding circuit of |x>, with U x |0>=|x>. The quantum state after the above circuit has run is:

[0070]

[0071] The probabilities of observing the first bit being 0 and 1 are as follows:

[0072]

[0073] It is obvious that P(0) - P(1) =<x|U|x> .

[0074] For the imaginary part of f, the Hadamard-Test circuit is as follows: Figure 2B As shown. Where the S-gate is...

[0075]

[0076] The Swap Test is a technique commonly used to compare the similarity between vectors. This test constructs a circuit containing the target state and uses quantum interference to measure the inner product between these states, thus achieving a similarity between f = |||.<x|y> || 2 The observations are defined in the Swap-Test, where x and y are unknowns. For example, if |x>=|y> and the function is in the real number field, |x>=[x1,x2], then the observable function of Swap-Test is [x1,x2]. It is a quartic function. If |y> is a constant vector, for example, |y>=[a1,a2], then the observable function of Swap-Test is g=(a1x2+a2x2). 2 It is a quadratic function. In short, the Swap-Test function observes a perfect square function.

[0077] like Figure 3 As shown, Figure 3 A schematic diagram of a SWAP-Test circuit for measuring perfect square functions according to an embodiment of this application is shown. x It is the encoding circuit of |x>, U y It is an encoding circuit of |y>, with U y |0>=|y>。 The quantum state after the above circuit has run is:

[0078]

[0079] The probabilities of observing the first bit being 0 and 1 are as follows:

[0080]

[0081] It is obvious that P(0) - P(1) = ||<x|y> || 2 .

[0082] It can be seen that both the Hadamard-Test circuit and the Swap-Test circuit can only observe specific quadratic functions. For non-standard quadratic functions, such as linear functions like x1+x2 and x1x2, current quantum computers lack the corresponding hardware circuit design and therefore cannot perform the corresponding types of calculations.

[0083] Based on this, embodiments of this application provide a method for determining quantum circuits, a method for observing non-standard quadratic functions, a method for observing high-order polynomial functions, and related apparatus.

[0084] Please refer to Figure 4 This document illustrates a flowchart of a method for determining a quantum circuit according to an embodiment of this application. This method can be applied to computer devices, which refer to electronic devices capable of data computation and processing. For example, the executing entity for each step could be... Figure 1 The method can include the following steps: (The example shown is a quantum computer or a classical computer.)

[0085] Step 401: Obtain the auxiliary quantum register and the target quantum register;

[0086] Step 402: Apply a Hadamard gate to the auxiliary quantum register in sequence, apply a target quantum logic gate controlled by the auxiliary quantum register to the target quantum register, and apply a Hadamard gate to the auxiliary quantum register to obtain a first target quantum circuit. The first target quantum circuit is used to determine the observed value of the real part of a linear function based on the observation probability of the quantum state of the auxiliary quantum register. The target quantum logic gate includes a first quantum logic gate, a second quantum logic gate, and a third quantum logic gate cascaded in sequence. The first quantum logic gate is used to encode the unknown quantity in the linear function, the second quantum logic gate is determined according to the form of the linear function, and the third quantum logic gate is used to generate a superposition state with equal probability.

[0087] A quantum register is a fundamental component of a quantum computer; it is a collection of at least one qubit. An auxiliary quantum register consists of one qubit. The target quantum register consists of n qubits, where n is determined by the number of bits required to encode the unknown variable x.

[0088] Any linear polynomial function f can be written in the following form

[0089] f=<+|D|x>#(6)

[0090] Here, |+> represents a vector with all elements equal, and D is a diagonal matrix. For example, a linear binomial function f = 2x1 + 5x2 can be written as...

[0091]

[0092] For the aforementioned linear polynomial function, the diagonal matrix can definitely be decomposed into a linear combination of unitary matrices. U i That is, the second quantum logic gate is determined according to the form of a linear function, where L is the number of terms in its decomposition, and a i This is the coefficient for each term.

[0093] like Figure 5As shown, it illustrates a schematic diagram of the structure of a quantum circuit for observing the real part of a linear function according to an embodiment of this application. <+|U i |x> satisfies U i It is a first-order polynomial of the independent variable x of the unitary operator, with the initial quantum state being

[0094] First, after passing through the H gate, the quantum state becomes:

[0095]

[0096] The second step involves controlled U H U i U x The quantum state becomes:

[0097]

[0098] The third step involves passing through the H gate, where the quantum state becomes...

[0099]

[0100] The probabilities of obtaining a result of 0 and 1 when observing the first qubit in the above quantum state (i.e., the qubit in the auxiliary register) are as follows:

[0101]

[0102] Obviously there is

[0103] P(0)-P(1)=<+|U H U i U x |0> n |x>=N(f)#(12)

[0104] As can be seen, the method for determining a quantum circuit provided in this application applies a target quantum logic gate controlled by an auxiliary quantum register to the target quantum register, where the first quantum logic gate U... x Acting on |0>, it is used to encode the unknown x in a linear function, thereby realizing U x Preparation of |0>; Third quantum logic gate U H It acts on <0| to generate a superposition state <+| with equal probability, thereby realizing <0|U H =<+|;Second quantum logic gate U i The form is determined based on a linear function, and then the operation is performed using a second quantum logic gate to achieve the desired result. Thus, U is satisfied. iIt is a first-order polynomial of the independent variable x of the unitary operator, realizing the preparation of a first-order function. This quantum circuit can be used to determine the observed value of the real part of any first-order polynomial function based on the observation probability of the quantum state of the auxiliary quantum register. This is beneficial to designing a quantum circuit in a quantum computer to observe non-standard quadratic functions and higher-order polynomial functions, thereby improving the hardware functions of the quantum computer.

[0105] Please refer to Figure 6 This illustrates a flowchart of a method for determining a quantum circuit according to another embodiment of this application. This method can be applied to computer devices, which refer to electronic devices capable of data computation and processing. For example, the entity executing each step can be... Figure 1 The method can include the following steps: (The example shown is a quantum computer or a classical computer.)

[0106] Step 601: Obtain the auxiliary quantum register and the target quantum register;

[0107] Step 602: Apply a Hadamard gate to the auxiliary quantum register, apply an S gate to the auxiliary quantum register, apply a target quantum logic gate controlled by the auxiliary quantum register to the target quantum register, and apply a Hadamard gate to the auxiliary quantum register to obtain a second target quantum circuit. The second target quantum circuit is used to determine the observed value of the imaginary part of the linear function based on the observation probability of the quantum state of the auxiliary quantum register. The target quantum logic gate includes a first quantum logic gate, a second quantum logic gate, and a third quantum logic gate cascaded in sequence. The first quantum logic gate is used to encode the unknown quantity in the linear function, the second quantum logic gate is determined according to the form of the linear function, and the third quantum logic gate is used to generate a superposition state with equal probability.

[0108] Among them, according to Figure 6 The steps outlined in the document can be used to design a quantum circuit for observing the imaginary part of a linear function. For specific implementation details, please refer to [link / reference needed]. Figure 3 and Figure 5 I won't go into details again.

[0109] Please refer to Figure 7 This document illustrates a flowchart of a method for observing non-standard quadratic functions according to an embodiment of this application. This method can be applied to computer devices, which refer to electronic devices capable of data computation and processing. For example, the executing entity for each step could be... Figure 1 The method can include the following steps: (The example shown is a quantum computer or a classical computer.)

[0110] Step 701: Based on the Hadamard test circuit and as shown... Figure 5 The first target quantum circuit shown, or as... Figure 6 The second target quantum circuit shown generates control signals;

[0111] Step 702: Control the evolution of the quantum states in the auxiliary quantum register and the target quantum register in the quantum chip through the control signal;

[0112] Step 703: Measure the auxiliary quantum register according to the measurement signal to obtain the observation probability of the quantum state of the auxiliary quantum register;

[0113] Step 704: Determine the observed value of the real or imaginary part of the non-standard quadratic function based on the observed probability.

[0114] Where the real part is used to observe the non-standard quadratic function, then according to the Hadamard test circuit and such Figure 5 The first target quantum circuit shown generates a control signal; if it is used to observe the imaginary part of a non-standard quadratic function, then according to the Hadamard test circuit and such... Figure 6 The second target quantum circuit shown generates a control signal. The following details each step for observing the real part of a non-standard quadratic function; for the specific steps for observing the imaginary part of a non-standard quadratic function, please refer to the embodiments of this application and the above embodiments.

[0115] Specifically, the method based on the Hadamard test circuit and such Figure 5 The first target quantum circuit shown generates control signals, including:

[0116] Generate the first control signal corresponding to the Hadamard test circuit, and generate, as shown in the figure Figure 5 The second control signal corresponding to the first target quantum circuit shown;

[0117] Specifically, the step of controlling the evolution of quantum states in the auxiliary quantum register and the target quantum register in the quantum chip through the control signal includes:

[0118] The quantum states in the auxiliary quantum register and the target quantum register in the quantum chip are evolved according to the first control signal and the second control signal, respectively.

[0119] Specifically, the step of measuring the auxiliary quantum register based on the measurement signal to obtain the observation probability of the quantum state of the auxiliary quantum register includes:

[0120] The auxiliary quantum register is measured based on the first measurement signal to obtain the first observation probability of the quantum state of the auxiliary quantum register;

[0121] The auxiliary quantum register is measured based on the second measurement signal to obtain the second observation probability of the quantum state of the auxiliary quantum register.

[0122] Specifically, determining the observed value of the real part of the non-standard quadratic function based on the observed probability includes:

[0123] The observed value of the real part of the quadratic function is determined according to the first observation probability, and the observed value of the real part of the linear function is determined according to the second observation probability.

[0124] The sum of the observed value of the real part of the quadratic function, the observed value of the real part of the linear function, and the value of the constant term is determined as the observed value of the real part of the non-standard quadratic function. The value of the constant term does not include unknown quantities, so it does not need to be obtained through a quantum computer.

[0125] As can be seen, in the application embodiment, the observed values ​​of the linear and quadratic functions are determined by two quantum circuits respectively, and then the two observed values ​​are summed by classical calculation. This method has shallow quantum circuit depth, the auxiliary quantum register and the target quantum register can be reused, and the number of qubits required is small, which is more user-friendly for the current NISQ era, but it cannot be observed through a single quantum circuit.

[0126] In another specific implementation, the method based on the Hadamard test circuit and such Figure 5 The first target quantum circuit shown generates control signals, including:

[0127] According to the Haddam test circuit, such as Figure 5 The first target quantum circuit and quantum adder shown generate control signals.

[0128] As can be seen, in the application embodiment, the entire quantum circuit is directly obtained by summing the linear and quadratic functions determined by the two quantum circuits respectively using a quantum adder. This method results in a deeper quantum circuit compared to the previous embodiment, but the target quantum register cannot be reused, and a larger number of qubits are required. This is not very user-friendly for the current NISQ era, but observation can be performed using a single quantum circuit.

[0129] The Hadamard-Test circuit and the Swap-Test circuit can respectively realize the observation of different forms of quadratic functions. The Hadamard-Test circuit realizes f i = <x|U i The observation of |x>, here limited to U i It must be a unitary operator. The application scope of the Hadamard-Test circuit is extended somewhat; for example, the objective function g can be written as...

[0130] g =<x|A|x> #(13)

[0131] Here, A is a general matrix, if A can be decomposed into a unitary matrix U.l linear combination The objective function can then be written as

[0132]

[0133] At this point, observation can be performed using the Hadamard-Test circuit. <x|U i The values ​​of |x> are summed to obtain the value of the objective function g. A total of L such observations are required.

[0134] If the objective function is not a quadratic function, but can be written as

[0135]

[0136] or

[0137]

[0138] Then by observing each f i By multiplying these values, we can obtain the value of an even-degree function of a specific form. A total of L or LK such observations are required.

[0139] The Swap-Test circuit is used to observe the quadratic function in the form f = |||<x|y> || 2 In particular, when |x> and |y> are both real numbers,

[0140] Please refer to Figure 8 This document illustrates a flowchart of a method for observing high-order polynomial functions according to an embodiment of this application. This method can be applied to computer devices, which refer to electronic devices capable of data computation and processing. For example, the executing entity for each step can be... Figure 1 The method can include the following steps: (The example shown is a quantum computer or a classical computer.)

[0141] Step 801: Determine the function type of each term in the higher-order polynomial function, where the function type includes linear functions and quadratic functions;

[0142] Step 802: Determine the quantum circuit corresponding to each function based on the function type, where the linear function corresponds to, for example: Figure 5 The first target quantum circuit shown is or Figure 5 The second target quantum circuit shown corresponds to the Hadamard test circuit for the quadratic function.

[0143] Step 803: Determine the observed value of the higher-order polynomial function based on the quantum circuit.

[0144] The following example uses a cubic polynomial function f = f0f1. Assuming f0 is a quadratic function and f1 is a linear function, the corresponding quantum circuit structure is shown below. Figure 9 As shown.

[0145] The initial quantum state is For simplicity, we will use one qubit in the target quantum register as an example.

[0146] First, after passing through the H gate, the quantum state becomes:

[0147]

[0148] The second step, through U x The gate, the quantum state becomes:

[0149]

[0150] Third, after passing through the controlled U0 gate, the quantum state becomes:

[0151]

[0152] Fourth step, through controlled U H U1U x The gate, the quantum state becomes:

[0153]

[0154] Fifth step, after passing through the H gate, the quantum state becomes:

[0155]

[0156] The probability of obtaining a result of 0 when observing the first bit of the above quantum state is (let U = U). H U1U x )

[0157]

[0158] Obviously there is

[0159] P(0)-P(1)=2P(0)-1=N(<x|U0|x> <+|U1|x>)=N(f)#(23)

[0160] As can be seen, compared to the Hadamard-Test circuit and the Swap-Test circuit, which can only observe the values ​​of even-order functions of a specific form, the embodiments of this application can observe the values ​​of even-order functions conforming to U. i The value of a polynomial function of any degree is observed for unitary operator conditions, whether it is odd or even degree.

[0161] Furthermore, determining the observed value of the higher-order polynomial function based on the quantum circuit can be as follows: Figure 7 As described in the embodiment, each quantum circuit corresponding to each term is run separately, and then all observations are multiplied by classical calculation methods. Alternatively, the same auxiliary register can be used, and the controlled unitary gates in the Hadamard test circuit can be replaced with the controlled unitary gates determined for each term. The gates are then applied to their corresponding target registers in the order of each term, and the auxiliary registers are then observed.

[0162] It can be seen that if each term in a high-order polynomial function shares the same auxiliary register, it is possible to obtain the value of any high-order polynomial function in a single observation. However, the Hadamard-Test circuit and the Swap-Test circuit require observation L or LK times, and can only be even-order functions of a specific form.

[0163] Figure 10 A schematic diagram of a quantum circuit determination device according to an embodiment of this application is shown. The device includes:

[0164] Register acquisition unit 1001 is used to acquire the auxiliary quantum register and the target quantum register;

[0165] The circuit determination unit 1002 is used to sequentially apply a Hadamard gate to the auxiliary quantum register, apply a target quantum logic gate controlled by the auxiliary quantum register to the target quantum register, and apply a Hadamard gate to the auxiliary quantum register to obtain a first target quantum circuit. The first target quantum circuit is used to determine the observed value of the real part of a linear function based on the observation probability of the quantum state of the auxiliary quantum register. The target quantum logic gate includes a first quantum logic gate, a second quantum logic gate, and a third quantum logic gate cascaded in sequence. The first quantum logic gate is used to encode the unknown quantity in the linear function, the second quantum logic gate is determined according to the form of the linear function, and the third quantum logic gate is used to generate a superposition state with equal probability.

[0166] Figure 11 A schematic diagram of a device for observing non-standard quadratic functions according to an embodiment of this application is shown. The device includes:

[0167] Control signal generation unit 1101, used to generate signals according to the Hadamard test circuit and such Figure 5 The first target quantum circuit shown, or as... Figure 6 The second target quantum circuit shown generates control signals;

[0168] The quantum state evolution unit 1102 is used to control the evolution of quantum states in the auxiliary quantum register and the target quantum register in the quantum chip through the control signal;

[0169] The observation probability determination unit 1103 is used to measure the auxiliary quantum register according to the measurement signal to obtain the observation probability of the quantum state of the auxiliary quantum register;

[0170] The observation determination unit 1104 is used to determine the observation value of the real part or imaginary part of the non-standard quadratic function based on the observation probability.

[0171] Figure 12 A schematic diagram of a device for observing high-order polynomial functions according to an embodiment of this application is shown. The device includes:

[0172] The function type determination unit 1201 is used to determine the function type of each term in the higher-order polynomial function, wherein the function type includes linear functions and quadratic functions;

[0173] Circuit determination unit 1202 is used to determine the quantum circuit corresponding to each term of the function according to the function type, wherein the linear function corresponds to, for example, the quantum circuit corresponding to ... Figure 5 The first target quantum circuit shown, or as... Figure 6 The second target quantum circuit shown corresponds to the Hadamard test circuit for the quadratic function.

[0174] The observation determination unit 1203 is used to determine the observation value of the higher-order polynomial function based on the quantum circuit.

[0175] Figure 13 The diagram illustrates the structure of a computer device according to an embodiment of this application, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the functions of the computer system described in any of the above embodiments: the method for determining quantum circuits, the method for observing non-standard quadratic functions, and the method for observing high-order polynomial functions.

[0176] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the functions of the computer system described in any of the above embodiments: the method for determining quantum circuits, the method for observing non-standard quadratic functions, and the method for observing higher-order polynomial functions.

[0177] This application also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform the functions of the computer system described in any of the above embodiments: the method for determining quantum circuits, the method for observing non-standard quadratic functions, and the method for observing higher-order polynomial functions.

[0178] It is understood that the specific examples in this application are only intended to help those skilled in the art better understand the implementation methods of this application, and are not intended to limit the scope of the invention.

[0179] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this application in any way.

[0180] It is understood that the various implementation methods described in this application can be implemented individually or in combination, and the implementation methods in this application are not limited in this respect.

[0181] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0182] It is understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0183] It is understood that the memory in the embodiments of this application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Specifically, non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0184] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0185] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0186] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0187] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0188] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0189] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0190] The above are merely specific embodiments of this application, but the scope of protection of this invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this invention should be determined by the scope of the claims.

Claims

1. A method of determining a quantum circuit, characterized by, The method comprises the following steps: An auxiliary quantum register and a target quantum register are acquired; A Hadamard gate is sequentially applied to the auxiliary quantum register, a target quantum logic gate controlled by the auxiliary quantum register is applied to the target quantum register, and a Hadamard gate is applied to the auxiliary quantum register to obtain a first target quantum circuit, the first target quantum circuit is used to determine an observation value of a real part of a linear function according to an observation probability of a quantum state of the auxiliary quantum register, the target quantum logic gate comprises a first quantum logic gate, a second quantum logic gate and a third quantum logic gate which are sequentially cascaded, the first quantum logic gate is used to encode an unknown quantity in the linear function, the second quantum logic gate is determined according to a form of the linear function, and the third quantum logic gate is used to generate an equal-probability superposition state.

2. The method of claim 1, wherein, After the Hadamard gate is applied to the auxiliary quantum register, and before the target quantum logic gate controlled by the auxiliary quantum register is applied to the target quantum register, the method further comprises the following steps: An S gate is applied to the auxiliary quantum register to obtain a second target quantum circuit, the second target quantum circuit is used to determine an observation value of an imaginary part of the linear function according to an observation probability of a quantum state of the auxiliary quantum register, and a unitary matrix equivalent to the S gate is:

3. A method for observing a non-standard quadratic function, characterized by, The method comprises the following steps: A control signal is generated according to a Hadamard test circuit and the first target quantum circuit determined by the method of claim 1 or the second target quantum circuit determined by the method of claim 2; Quantum states in the auxiliary quantum register and the target quantum register in a quantum chip are evolved by the control signal; An observation probability of a quantum state of the auxiliary quantum register is measured according to a measurement signal; An observation value of a real part or an imaginary part of the non-standard quadratic function is determined according to the observation probability.

4. The method of claim 3, wherein, The control signal is generated according to the Hadamard test circuit and the first target quantum circuit determined by the method of claim 1, and the control signal comprises the following steps: A first control signal corresponding to the Hadamard test circuit is generated, and a second control signal corresponding to the first target quantum circuit determined by the method of claim 1 is generated; The quantum states in the auxiliary quantum register and the target quantum register in the quantum chip are evolved according to the first control signal and the second control signal, respectively. The control signal is generated according to the Hadamard test circuit and the first target quantum circuit determined by the method of claim 1, and the control signal comprises the following steps:

5. The method of claim 3, wherein, The control signal is generated according to the Hadamard test circuit, the first target quantum circuit determined by the method of claim 1 and a quantum adder. The method comprises the following steps:

6. A method for observing a high-order polynomial function, characterized by, A function type of each term in the high-order polynomial function is determined, and the function type comprises a linear function and a quadratic function; ​ determine a quantum circuit corresponding to each term of the high-degree polynomial function according to the function type, wherein the linear function corresponds to the first target quantum circuit determined by the method in claim 1 or the second target quantum circuit determined by the method in claim 2, and the quadratic function corresponds to a Hadamard test circuit; determine an observation value of the high-degree polynomial function according to the quantum circuit.

7. A device for determining a quantum circuit, characterized in that, The method comprises the following steps: a register obtaining unit is configured to obtain an auxiliary quantum register and a target quantum register; a circuit determining unit is configured to sequentially apply a Hadamard gate to the auxiliary quantum register, apply a target quantum logic gate controlled by the auxiliary quantum register to the target quantum register, and apply a Hadamard gate to the auxiliary quantum register to obtain a first target quantum circuit, wherein the first target quantum circuit is used to determine an observation value of a real part of a linear function according to an observation probability of a quantum state of the auxiliary quantum register, the target quantum logic gate comprises a first quantum logic gate, a second quantum logic gate and a third quantum logic gate connected in sequence, the first quantum logic gate is used to encode an unknown quantity in the linear function, the second quantum logic gate is determined according to a form of the linear function, and the third quantum logic gate is used to generate an equal-probability superposition state.

8. An apparatus for observing a non-standard quadratic function, comprising: The method comprises the following steps: a control signal generating unit is configured to generate a control signal according to a Hadamard test circuit and the first target quantum circuit determined by the method in claim 1 or the second target quantum circuit determined by the method in claim 2; a quantum state evolution unit is configured to control quantum states in the auxiliary quantum register and the target quantum register in a quantum chip to evolve through the control signal; an observation probability determining unit is configured to measure the auxiliary quantum register according to a measurement signal to obtain an observation probability of a quantum state of the auxiliary quantum register; an observation value determining unit is configured to determine an observation value of a real part or an imaginary part of the non-standard quadratic function according to the observation probability.

9. An apparatus for observing a high-order polynomial function, characterized by comprising: The method comprises the following steps: a function type determining unit is configured to determine a function type of each term in the high-degree polynomial function, wherein the function type comprises a linear function and a quadratic function; a circuit determining unit is configured to determine a quantum circuit corresponding to each term of the high-degree polynomial function according to the function type, wherein the linear function corresponds to the first target quantum circuit determined by the method in claim 1 or the second target quantum circuit determined by the method in claim 2, and the quadratic function corresponds to a Hadamard test circuit; an observation value determining unit is configured to determine an observation value of the high-degree polynomial function according to the quantum circuit.

10. An electronic device, comprising: The method comprises the following steps: a processor and a memory; the processor and the memory are connected, wherein the memory is configured to store a computer program, and the processor is configured to invoke the computer program to execute the method in any one of claims 1 or 2, 3-5 or 6.

11. A computer readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program comprises program instructions, which, when executed by a processor, execute the method in any one of claims 1 or 2, 3-5 or 6.

Images