A high-noise wafer map mixed defect decoupling identification method based on defect prototype inversion
By constructing a grain diagram structure and a graph neural network model, and combining structural consistency scoring and noise masking, decoupled identification of mixed defects is achieved, solving the problem of unstable identification in high-noise scenarios in existing wafer diagram defect identification methods, and improving the robustness and accuracy of identification.
CN121810704BActive Publication Date: 2026-06-26DONGHUA UNIV
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- DONGHUA UNIV
- Filing Date
- 2026-03-12
- Publication Date
- 2026-06-26
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Figure CN121810704B_ABST
Abstract
The application provides a high-noise wafer map mixed defect decoupling identification method based on defect prototype inversion, which realizes spatial decoupling and reliable identification of mixed defects in a high-noise environment through wafer map structure modeling, multi-scale structure consistency scoring function and defect prototype inversion mechanism. The application first constructs a structural graph expression form of a wafer map, and extracts node embedding features containing neighborhood statistical information; secondly, a structure consistency scoring function is introduced to quantify the local structure stability of nodes at different scales, and a noise perception mask is generated in combination with a judgment standard; then, based on the structure reliable area, the prototype representation of various defects is constructed, and a prototype matching and response mechanism is designed; finally, a joint optimization strategy is adopted to improve the discriminability and robustness of mixed defect identification. Compared with existing methods, the application can improve the mixed defect identification accuracy and interpretability in a high-noise background, and is suitable for an intelligent wafer map defect detection system in a semiconductor manufacturing process.
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Citation Information
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