Dual random dithering circuit and method

Abstract

This application provides a dual-random frequency dithering circuit and method. The circuit includes: a pseudo-random signal generation module for generating two pseudo-random control signals; a triangular wave generation module; a cooperative modulation module connected between the pseudo-random signal generation module and the triangular wave generation module, used to dynamically modulate at least one operating parameter of the triangular wave generation module according to the pseudo-random control signals, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness; and a hybrid frequency control module for generating a hybrid control signal according to the pseudo-random control signals and the digital control signals, controlling the frequency of the oscillator to change randomly within a predetermined range to generate a frequency dithering clock signal. This application organically combines triangular wave modulation and random modulation to form a cooperative modulation mechanism, avoiding the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering, and can provide excellent EMI suppression effect for automotive-grade DC-DC chips to the greatest extent.

Description

Technical Field

[0001] This application belongs to the field of power device measurement technology, and in particular relates to a dual random frequency dithering circuit and method. Background Technology

[0002] In the field of switching power supply (DC-DC) chips, electromagnetic interference (EMI) is a crucial and strictly controlled indicator, especially in automotive-grade applications where electromagnetic environments are sensitive and safety standards are stringent. EMI refers to the mutual interference phenomenon that occurs between electromagnetic fields and circuits, or between different circuits, due to various reasons. EMI can be generated through electromagnetic radiation, electromagnetic induction, or electromagnetic coupling, and may lead to problems such as degraded equipment performance, signal distortion, and communication interruptions. In severe cases, it may even cause equipment damage or safety accidents.

[0003] Currently, frequency dithering is mainly used at the circuit level to reduce EMI. However, existing single frequency dithering techniques all have significant shortcomings. Triangular wave dithering suffers from periodicity, making it unsuitable for multi-resolution bandwidth RBW testing and potentially generating audible noise. Random dithering suffers from uncertainty due to its randomness and insufficient low-frequency energy dispersion. Neither technique can independently and reliably meet the automotive-grade application requirements for low EMI across the entire frequency band, with low peak values ​​and no noise.

[0004] The foregoing statements are for informational purposes only and are not intended to provide background information in connection with this application. Unless otherwise stated herein, the content described in this section is not prior art to the rest of this application. Summary of the Invention

[0005] The dual random frequency dithering circuit and method proposed in this invention organically combine triangular wave modulation and random modulation to form a cooperative modulation mechanism, which avoids the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering. It can "smoothly spread" the switching noise energy over a wider frequency band, and can achieve excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, and achieves complementary and superior performance.

[0006] According to a first aspect of the embodiments of this application, a dual random frequency dithering circuit is provided, comprising:

[0007] The pseudo-random signal generation module is used to generate two pseudo-random control signals;

[0008] The triangular wave generation module is used to generate digital control signals with triangular wave changing trends;

[0009] The collaborative modulation module is connected between the pseudo-random signal generation module and the triangular wave generation module. It is used to receive the pseudo-random control signal and dynamically modulate at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness.

[0010] The hybrid frequency control module is used to generate a hybrid control signal based on the pseudo-random control signal and the digital control signal, and control the frequency of the oscillator to change randomly within a predetermined range to generate a jitter clock signal.

[0011] In some embodiments of this application, the mixing and frequency control module includes a mixing unit;

[0012] The mixing unit is used to receive pseudo-random control signals and digital control signals output by the triangular wave generation module, and to perform logical mixing to output a mixed control signal.

[0013] In some embodiments of this application, the cooperative modulation module includes a triangular reference frequency random selection module, which randomly selects one of a plurality of candidate clock signals according to a pseudo-random control signal as the input clock signal FTri of the triangular wave generation module.

[0014] In some embodiments of this application, the triangular wave generation module includes:

[0015] The frequency divider chain is used to receive the input clock signal Ftri output by the cooperative modulation module and divide it to generate a frequency divider signal; the frequency divider signal includes at least a first frequency divider signal, a second frequency divider signal, a third frequency divider signal, and a control frequency divider signal with the lowest frequency.

[0016] A phase selection circuit is used to receive a control frequency division signal at its selection terminal, and its multiple data input terminals respectively receive a first frequency division signal, a second frequency division signal, a third frequency division signal and their respective inverted signals;

[0017] Among them, the control frequency division signal is used to control the phase selection circuit to alternately output the original phase or the reverse phase of the first frequency division signal, the second frequency division signal and the third frequency division signal in each control cycle, so as to synthesize a digital control signal.

[0018] In some embodiments of this application, the cooperative modulation module further includes a synchronization unit;

[0019] The synchronization unit receives control frequency division signals at its clock end, receives pseudo-random control signals at its data end, outputs updated pseudo-random control signals at its output end, and connects the output to the triangular reference frequency random selection module.

[0020] The synchronization unit is triggered in each cycle of the control frequency division signal to output an updated pseudo-random control signal to the triangular reference frequency random selection module, so as to randomly change the frequency of the input clock signal (FTri) in each triangular wave cycle.

[0021] In some embodiments of this application, the mixing unit is an adder network used to perform bit-by-bit XOR and carry operations on the pseudo-random control signal and the multi-bit digital control signal output by the triangular wave generation module to generate a mixed control signal.

[0022] In some embodiments of this application, the hybrid frequency control module further includes:

[0023] Synchronous trigger group, used to synchronize mixed control signals under the system master clock;

[0024] The current control array consists of multiple controlled current sources, and the control terminal of each controlled current source receives the output of each bit of the synchronous trigger group.

[0025] The sum of the controlled current sources is used to control the charging current of the oscillator, thereby linearly modulating the frequency of the jitter clock signal.

[0026] According to a second aspect of the embodiments of this application, a switching power supply chip is provided, including the dual random frequency dithering circuit as described above, wherein the frequency dithering clock signal is used to control the switching frequency of the switching power supply chip.

[0027] According to a third aspect of the embodiments of this application, a dual random frequency dithering method is provided, comprising the following steps:

[0028] Generate two pseudo-random control signals;

[0029] A digital control signal with a triangular wave variation trend is generated by the triangular wave generation module;

[0030] The system receives a pseudo-random control signal and dynamically modulates at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness.

[0031] The pseudo-random control signal is logically mixed with the digital control signal to obtain the hybrid control signal;

[0032] A hybrid control signal is generated based on the pseudo-random control signal and the digital control signal to control the frequency of the oscillator to change randomly within a predetermined range in order to generate a jitter clock signal.

[0033] According to a fourth aspect of the embodiments of this application, a dual random frequency dithering device is provided, comprising: a storage unit for storing executable instructions;

[0034] And a processing unit, which is connected to the memory to execute executable instructions to complete the double random frequency dithering method.

[0035] The present application discloses a dual-random frequency dithering circuit and method. The circuit includes: a pseudo-random signal generation module for generating two pseudo-random control signals; a triangular wave generation module for generating a digital control signal with a triangular wave variation trend; a cooperative modulation module connected between the pseudo-random signal generation module and the triangular wave generation module for receiving the pseudo-random control signal and dynamically modulating at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness; and a hybrid frequency control module for generating a hybrid control signal according to the pseudo-random control signal and the digital control signal, controlling the frequency of the oscillator to change randomly within a predetermined range to generate a frequency dithering clock signal.

[0036] This application combines triangular wave modulation with random modulation to form a cooperative modulation mechanism, which avoids the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering. It can "smoothly spread" the switching noise energy over a wider frequency band, and can achieve excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, and achieves complementary and superior performance. Attached Figure Description

[0037] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0038] Figure 1 The diagram shows a module schematic of a dual random frequency dithering circuit according to an embodiment of this application;

[0039] Figure 2 The diagram shows a circuit diagram of a dual random frequency dithering circuit according to an embodiment of this application;

[0040] Figure 3 The diagram shows the frequency variation under dual random frequency dithering according to an embodiment of this application;

[0041] Figure 4 The diagram shows a schematic representation of a switching power supply chip according to an embodiment of this application.

[0042] Figure 5 The diagram shows a structural schematic of a dual random frequency dithering method according to an embodiment of this application;

[0043] Figure 6The diagram shows a structural schematic of a dual random frequency dithering device according to an embodiment of this application. Detailed Implementation

[0044] Regarding this application, existing single frequency dithering techniques all have significant shortcomings: 1. The disadvantage of triangular wave frequency dithering lies in its periodicity, which makes it unsuitable for multi-resolution bandwidth RBW testing and may generate audible noise; 2. The disadvantage of random frequency dithering lies in the uncertainty brought about by its randomness and its insufficient dispersion of low-frequency energy. Neither can independently and reliably meet the low EMI requirements of automotive-grade applications for full-band, low-peak, and noise-free operation.

[0045] Therefore, the starting point of this application is to overcome the shortcomings of the prior art. This application creatively proposes a dual random frequency dithering technique that combines triangular wave modulation and random modulation.

[0046] This application does not involve simple superposition, but rather uses a collaborative modulation mechanism to modulate the parameters (such as frequency or amplitude) of another triangular wave signal with a random signal, thereby generating a composite modulation signal that is neither completely periodic nor completely random.

[0047] This application cleverly avoids the periodicity and randomness of triangular wave frequency dithering, and can "smoothly spread" the switching noise energy over a wider frequency band, thereby achieving excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, achieving complementary and superior performance.

[0048] This application proposes a dual random frequency dithering technique that organically combines triangular wave modulation and random modulation to form a cooperative modulation mechanism, specifically including:

[0049] 1. Composite Modulation Signal Generation: By modulating the frequency or amplitude of another triangular wave signal with a random signal, a modulation signal that is neither completely periodic nor completely random is generated.

[0050] 2. Multi-level mixing and synchronization control: The selection of the triangular wave reference frequency is controlled by a pseudo-random signal, and the random signal is mixed with the triangular wave output through a three-level adder mixing network, and then output to the frequency control module through a synchronization mechanism.

[0051] 3. Dynamic frequency randomization: Each triangular wave cycle changes randomly, achieving a "smooth smearing" of the frequency and effectively dispersing the energy spectrum.

[0052] Compared with existing technologies, it has the following technical advantages:

[0053] 1) Full-band EMI suppression: Stable and excellent EMI suppression can be achieved in multiple RBW test bands such as AM and FM.

[0054] 2) No periodic noise: Avoids audible noise that may be caused by triangular wave dithering.

[0055] 3) Uniform energy distribution: The switching noise energy is uniformly distributed over a wider frequency band through a dual random mechanism.

[0056] 4) Suitable for automotive-grade applications: meets stringent requirements for high reliability, low noise, and full-frequency compliance.

[0057] The implementation process includes:

[0058] First, generate pseudo-random signals: use m-sequences to generate random control signals Da and Db.

[0059] Secondly, the triangular reference frequency is randomly selected: through the MUX 4-to-1 module, the frequency division signal is randomly selected by Da and Db as the input frequency FTri of the triangular wave generation module.

[0060] Then, triangular wave generation and synchronization are performed:

[0061] The FTri is divided to generate multiple phase signals; the DFF synchronization mechanism ensures that the frequency of each triangular wave cycle changes randomly.

[0062] Next, regarding random mixing and frequency control:

[0063] A three-stage adder network is used to mix Da, Db, and the triangular wave output. The mixed output is then synchronized to control the OSC current source array, dynamically adjusting the oscillation frequency.

[0064] The final output is a switching frequency that varies randomly within a set range, achieving wideband dispersion of EMI energy.

[0065] The dual random frequency dithering circuit and method of this invention organically combine triangular wave modulation and random modulation to form a cooperative modulation mechanism, which avoids the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering. It can "smoothly spread" the switching noise energy over a wider frequency band, and can achieve excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, and achieves complementary and superior performance.

[0066] To make the technical solutions and advantages of the embodiments of this application clearer, the exemplary embodiments of this application will be described in further detail below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not an exhaustive list of all embodiments. It should be noted that, unless otherwise specified, the embodiments and features in the embodiments of this application can be combined with each other.

[0067] Example 1

[0068] For details not disclosed in the dual random frequency dithering circuit of this embodiment, please refer to the specific implementation of the dual random frequency dithering method in other embodiments.

[0069] Figure 1 The diagram shows a schematic of a dual random frequency dithering circuit according to an embodiment of this application.

[0070] like Figure 1 As shown, an embodiment of this application provides a dual random frequency dithering circuit, comprising:

[0071] The pseudo-random signal generation module 10 is used to generate two pseudo-random control signals.

[0072] The triangular wave generation module 20 is used to generate a digital control signal with a triangular wave changing trend.

[0073] The cooperative modulation module 30 is connected between the pseudo-random signal generation module and the triangular wave generation module. It is used to receive the pseudo-random control signal and dynamically modulate at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness.

[0074] The hybrid frequency control module 40 is used to generate a hybrid control signal based on the pseudo-random control signal and the digital control signal, and control the frequency of the oscillator to change randomly within a predetermined range to generate a jitter clock signal.

[0075] In a preferred implementation, the triangular wave generation module 20 includes:

[0076] A frequency divider chain is used to divide the input clock signal FTri to generate a frequency divider signal; the frequency divider signal includes at least a first frequency divider signal, a second frequency divider signal, a third frequency divider signal, and a control frequency divider signal with the lowest frequency.

[0077] A phase selection circuit is used to receive a control frequency division signal at its selection terminal, and its multiple data input terminals respectively receive a first frequency division signal, a second frequency division signal, a third frequency division signal and their respective inverted signals;

[0078] Among them, the control frequency division signal is used to control the phase selection circuit to alternately output the original phase or the reverse phase of the first frequency division signal, the second frequency division signal, and the third frequency division signal in each control cycle, so as to synthesize a digital control signal.

[0079] For example, a frequency divider chain is used to divide the input frequency FTri of the triangular wave generation module 20 into FTri / 2, FTri / 4, FTri / 8 and FTri / 16; the phase selection circuit is controlled by FTri / 16 to select the output FTri / 2, FTri / 4, FTri / 8 or their inverted signals as triangular modulation signals.

[0080] In a preferred embodiment, the cooperative modulation module 30 includes a triangular reference frequency random selection module 31, which is used to randomly select one of multiple candidate clock signals according to a pseudo-random control signal as the input clock signal FTri of the triangular wave generation module.

[0081] In a preferred embodiment, the cooperative modulation module 30 further includes a synchronization unit 32; the synchronization unit 32 is used to receive control frequency division signals at its clock end, receive pseudo-random control signals at its data end, and its output end is connected to the triangular reference frequency random selection module.

[0082] The synchronization unit is triggered in each cycle of the control frequency division signal to output an updated pseudo-random control signal and output it to the triangular reference frequency random selection module to randomly change the frequency of the input clock signal (FTri) in each triangular wave cycle.

[0083] In a preferred embodiment, the mixing and frequency control module 40 includes a mixing unit 41; the mixing unit is used to receive pseudo-random control signals and digital control signals output by the triangular wave generation module, and to perform logical mixing to output a mixed control signal.

[0084] Specifically, the mixing unit 41 is an adder network used to perform bit-by-bit XOR and carry operations on the pseudo-random control signal and the multi-bit digital control signal output by the triangular wave generation module to generate a mixed control signal.

[0085] Preferably, the pseudo-random signal generation module uses the longest linear feedback shift register sequence to generate random signals, and two of the registers output two random control signals Da and Db.

[0086] A three-stage adder network includes:

[0087] The first stage is a half adder, with inputs Da and the first triangular modulation signal MUX1, and outputs K1 and carry CO1;

[0088] The second stage is a full adder, with inputs Db, the second triangular modulation signal MUX2, and carry CO1, and outputs K2 and carry CO2.

[0089] The third stage is a half adder, with the input being the third triangular modulation signal MUX3 and the carry CO2, and the output being K3 and the carry K4.

[0090] In a preferred embodiment, the mixing and frequency control module 40 further includes:

[0091] A synchronous trigger group, connected to the adder network, receives mixed control signals and is used to synchronize the mixed control signals under the system master clock;

[0092] The current control array consists of multiple controlled current sources, and the control terminal of each controlled current source receives the output of each bit of the synchronous trigger group.

[0093] The sum of the controlled current sources is used to control the charging current of the oscillator, thereby linearly modulating the frequency of the jitter clock signal.

[0094] For example, it includes two flip-flops, whose clock signal is the FTri / 16 signal output by the triangular wave generation module, and whose data input is random control signals Da and Db. The output is used to control the triangular reference frequency random selection module to ensure that the input frequency changes randomly in each triangular wave cycle.

[0095] Figure 2 The diagram shows a circuit diagram of a dual random frequency dithering circuit according to an embodiment of this application.

[0096] like Figure 2 The dual random frequency dithering circuit of the present application embodiment is further illustrated as shown.

[0097] A high-frequency signal FH is generated by a small oscillator OSC (oscillator). After passing through a frequency divider, two signals are generated: one is a low-frequency signal used to generate triangular dithering, and the other is a higher-frequency signal used to generate pseudo-random dithering.

[0098] 1. Pseudo-random signal generation module 10.

[0099] The higher frequency signal in the frequency division signal received by the frequency divider is generated by the longest linear feedback shift register sequence (m sequence). Two random control signals Da and Db are output from two of the registers for subsequent randomization control.

[0100] The clock for the M-sequence is provided by a fixed high-frequency clock, ensuring the stable generation of the random sequence.

[0101] 2. Triangular reference frequency random selection module 31.

[0102] like Figure 2 The high-frequency signal FH shown is divided by a series of logic gates to generate four frequencies with fixed division ratios: div10, div12, div14, and div16. These four signals are used as input signals to a 4-to-1 frequency selector MUX (Multiplexer). Da and Db, generated by the pseudo-random frequency dithering, are used as selection signals. The output signal Ftri is used as the input frequency to a triangle wave generator TG (Triangle Generate).

[0103] The input frequency FTri is a square wave clock signal, but its frequency value (f=1 / period) varies randomly.

[0104] The waveform of the input frequency FTri is a square wave, and its frequency parameters are modulated by a random sequence (Da, Db) randomly selected from div10, div12, div14, div16.

[0105] 3. Triangular wave generation module 20 Figure 2 A triangular wave generator.

[0106] The triangular wave generation module 20 is used to generate a digital stepped triangular wave signal based on the input clock signal FTri. The frequency value of the input clock FTri is dynamically selected by a pseudo-random signal. The triangular wave generation module includes a frequency divider chain and a phase selection circuit. By dividing FTri and periodically reversing the phase of the multiple frequency divider signals, a digital control code with a triangular wave changing trend is synthesized.

[0107] Regarding the frequency divider chain, the input frequency FTri of the triangle wave generator TG (Triangle Generate) is divided to generate FTri / 2, FTri / 4, FTri / 8, and FTri / 16.

[0108] Regarding the phase selection circuit, FTri / 16 is the control signal, which serves as the selection signal for the three 2-to-1 MUXs. When FTri / 16 is 1, the three selectors select FTri / 2, FTri / 4, and FTri / 8; when FTri / 16 is 0, the three selectors select the opposite values ​​of FTri / 2, FTri / 4, and FTri / 8. The outputs of the three MUXs are MUX1 (FTri / 2), MUX2 (FTri / 4), and MUX3 (FTri / 8).

[0109] Regarding the synchronization mechanism, it is used to ensure that the period of each triangular frequency is variable. The FTri / 16 signal generated by the triangular wave period is used as the clock signal of DFF<1:0>, and Da and Db generated by pseudo-random dithering are used as the input signals of DFF<1:0>. The signal output by DFF can then be input into the aforementioned triangular reference frequency random selection module, which ensures that each triangular dithering frequency changes randomly in each period.

[0110] 4. Hybrid and frequency control module 40.

[0111] The mixing and frequency control module 40 includes a mixing unit 41, which employs a three-stage adder network.

[0112] The signals (K1, K2, K3, K4) output by this adder network, after being synchronized by a D flip-flop and controlled by a current source, exhibit an overall trend of "step-like rise" and "step-like fall" in their digital code values, i.e., a digitized, step-like triangular wave. The code value of this "digital triangular wave" then controls the current source, thereby linearly changing the oscillator frequency and ultimately achieving "analog triangular wave trajectory" jitter of the switching frequency.

[0113] like Figure 2 The adder shown combines two random bits and three periodic bits (from a triangular wave) through a simple adder network to generate a 4-bit control signal for modulating the oscillator current. This combination increases the randomness and complexity of the output frequency variation, thereby better dispersing EMI energy.

[0114] This application weights and combines two random signals and three triangular wave-derived signals to generate a 4-bit control code. This control code is then used to control a current source array, thereby modulating the oscillator frequency. Since the input signals contain both random and periodic components, and through weighting and combination, the output control code is neither completely random nor completely periodic, but a mixture of both. This helps achieve the goal of "dual-random frequency dithering," i.e., generating frequency dithering that is neither completely periodic nor completely random, thereby optimizing EMI suppression.

[0115] Regarding hybrid networks with three-stage adders:

[0116] Input signals: pseudo-random signals Da, Db; outputs of the triangular module MUX1, MUX2, MUX3.

[0117] First stage (half adder 1): Input: Da + MUX1; Output: K1 = Da XOR MUX1, carry CO1.

[0118] Second stage (full adder): Input: Db + MUX2 + CO1; Output: K2 = Db XOR MUX2 XOR CO1, carry CO2.

[0119] Third stage (half adder 2): Input: MUX3 + CO2; Output: K3 = MUX3 XOR CO2, carry K4 for synchronization and frequency control.

[0120] The four output signals K1, K2, K3, and K4 are fed into a synchronous D flip-flop (DFF). The synchronous clock uses clk generated by the OSC chip to ensure that the frequency of each clk is random within a certain range.

[0121] Simultaneously, the output signal of the synchronous D flip-flop (DFF) controls the current source array of the OSC: each control bit corresponds to a current source, and the current sources achieve precise current control through a current mirror structure. Changes in current directly alter the charging speed of the oscillator, thereby controlling the output frequency.

[0122] Specifically, the outputs K1-K4 first pass through the flip-flops, serving as the input signals (D terminal) of the flip-flops. The chip's clock is used as the trigger condition to ensure that the frequency of each cycle of the chip's clock is random.

[0123] The outputs of the four D flip-flops control the switching of four current channels (I1, I1 / 2, I1 / 4, I1 / 8). These four current channels, plus an Iref, generate a total current I that charges the capacitor. The magnitude of the current directly affects the charging speed of the capacitor, thereby controlling the frequency.

[0124] Regarding the synchronization mechanism of this application, the mechanism uses a synchronization register (DFF) triggered by the periodic signal (FTri / 16) of the triangular wave itself to tightly couple the update of the pseudo-random signal (Da, Db) with the frequency selection (MUX4 to 1) of the triangular wave generation module in terms of timing.

[0125] DFF<1:0> consists of two DFFs (D flip-flops). Da and Db are the outputs of two random signals, which are respectively input to the two D flip-flops. The output is used as the selection signal for a MUX 4-to-1 selector.

[0126] The MUX4-to-1 selector takes four input signals and randomly outputs one as the input frequency Ftri of the delta module. Ftri is then divided to generate the frequency of the delta signal, which is Ftri / 16. After one complete cycle of Ftri / 16, the rising edge of the next Ftri / 16 triggers the DFF<1:0> mechanism, causing the two DFFs to output a new signal. This new signal is then selected from the four inputs of the MUX4-to-1 selector and input to the delta module, thus generating a new Ftri / 16.

[0127] The following provides an example illustrating the timing relationship and working process of the synchronization mechanism in this application.

[0128] Step 1: Working within the triangular wave period.

[0129] Within the current FTri / 16 cycle, Sel[1:0] remains a fixed value (assuming it is 01).

[0130] The MUX 4-to-1 selector continuously outputs the corresponding frequency signal (e.g., div12) as the current FTri_current based on Sel[1:0]=01.

[0131] The triangular wave generation module generates the current stepped triangular wave based on FTri_current, and continuously generates the FTri_current / 16 signal internally.

[0132] Step 2: End of cycle and trigger.

[0133] The current triangular wave period ends, and FTri_current / 16 generates a rising edge.

[0134] This rising edge is simultaneously delivered to two locations: 1. Inside the triangular wave generation module: When FTri_current / 16 is high, it's the rising segment; when it's low, it's the falling segment. Internally, it's a 2-to-1 selector. A high level selects the normal output of F / 8, F / 4, and F / 2, while a low level selects the inverted output of F / 8, F / 4, and F / 2 (adding an inverter to the normal output). 2. The clock input of the synchronous DFF: triggers the DFF to sample.

[0135] Step 3: Sampling and updating of random signals.

[0136] At the instant the rising edge of FTri / 16 arrives, DFF samples the Da and Db signals on its data terminal D at this moment.

[0137] Since Da and Db come from independent pseudo-random sequences, their values ​​at this time are random (e.g., Da=1, Db=0).

[0138] DFF latches these two random values ​​and updates its output Q with the new selection signal Sel[1:0] = {Db, Da} = 10.

[0139] Figure 3 The diagram shows the frequency variation under dual random frequency dithering according to an embodiment of this application.

[0140] like Figure 3As shown, the frequency variation diagram under dual random frequency dithering ultimately generates a stepped triangular wave signal, resulting in a smoother and more uniform frequency distribution, thus more effectively dispersing the energy of electromagnetic interference. By periodically switching the phase, excessive energy accumulation at a specific frequency can be avoided, reducing EMI peaks.

[0141] The dual random dithering technology of this application, through an innovative hybrid architecture, adds randomization to the traditional triangular dithering, which can provide excellent EMI suppression for automotive-grade DC-DC chips to the greatest extent.

[0142] A dual-random frequency dithering circuit according to this application includes: a pseudo-random signal generation module for generating two pseudo-random control signals; a triangular wave generation module for generating a digital control signal with a triangular wave variation trend; a cooperative modulation module connected between the pseudo-random signal generation module and the triangular wave generation module for receiving the pseudo-random control signal and dynamically modulating at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness; and a hybrid frequency control module for generating a hybrid control signal according to the pseudo-random control signal and the digital control signal, controlling the frequency of the oscillator to change randomly within a predetermined range to generate a frequency dithering clock signal.

[0143] This application combines triangular wave modulation with random modulation to form a cooperative modulation mechanism, which avoids the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering. It can "smoothly spread" the switching noise energy over a wider frequency band, and can achieve excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, and achieves complementary and superior performance.

[0144] Example 2

[0145] This application also provides a switching power supply chip. For details not disclosed in the switching power supply chip of this embodiment, please refer to the specific implementation of the dual random frequency dithering circuit and method in other embodiments.

[0146] Figure 4 The diagram shows a schematic of a switching power supply chip according to an embodiment of this application.

[0147] like Figure 4 As shown, a switching power supply chip according to an embodiment of this application includes a dual random frequency dithering circuit in any of the embodiments, wherein the frequency dithering clock signal is used to control the switching frequency of the switching power supply chip.

[0148] The switching power supply chip of this invention organically combines triangular wave modulation and random modulation to form a cooperative modulation mechanism, which avoids the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering. It can "smoothly spread" the switching noise energy over a wider frequency band, and can achieve excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, and achieves complementary and superior performance.

[0149] Example 3

[0150] This application also provides a dual random frequency dithering method. For details not disclosed in the dual random frequency dithering method of this embodiment, please refer to the specific implementation of the dual random frequency dithering circuit in other embodiments.

[0151] Figure 5 The diagram shows a structural schematic of a dual random frequency dithering method provided according to an embodiment of this application.

[0152] like Figure 5 As shown, a dual-random frequency dithering method according to an embodiment of this application includes the following steps:

[0153] S1: Generate two pseudo-random control signals;

[0154] S2: Receive pseudo-random control signal and dynamically modulate at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness.

[0155] S3: Generates a digital control signal with a triangular wave variation trend;

[0156] S4: Generate a mixed control signal based on the pseudo-random control signal and the digital control signal, and control the frequency of the oscillator to change randomly within a predetermined range to generate a jitter clock signal.

[0157] In a preferred implementation, at least one operating parameter of the triangular wave generation module in S3, which is dynamically modulated based on the pseudo-random control signal, includes:

[0158] Based on the pseudo-random control signal, a base clock frequency is randomly selected from multiple candidate frequencies.

[0159] Based on the fundamental clock frequency, digital control signals are synthesized through frequency division and periodic phase reversal operations;

[0160] The low-frequency control signal used to trigger phase reversal triggers a frequency random selection based on the updated pseudo-random control signal every time it completes one cycle.

[0161] The dual-random frequency dithering method of the present invention includes: S1: generating two pseudo-random control signals; S2: generating a digital control signal with a triangular wave variation trend; S3: receiving the pseudo-random control signal and dynamically modulating at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness; S4: generating a hybrid control signal according to the pseudo-random control signal and the digital control signal, controlling the frequency of the oscillator to change randomly within a predetermined range to generate a frequency dithering clock signal.

[0162] This application embodiment organically combines triangular wave modulation and random modulation to form a cooperative modulation mechanism, which avoids the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering. It can "smoothly spread" the switching noise energy over a wider frequency band, and can achieve excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, and achieves complementary and superior performance.

[0163] Example 4

[0164] This embodiment provides another dual-random frequency dithering device. For details not disclosed in the dual-random frequency dithering device of this embodiment, please refer to the specific implementation of the dual-random frequency dithering method or system in other embodiments.

[0165] Figure 6 The diagram shows a structural schematic of a dual random frequency dithering device according to an embodiment of this application.

[0166] like Figure 6 As shown, the dual random frequency dithering device 400 includes: a storage unit 402 for storing executable instructions; and a processing unit 401 for connecting to the storage unit 402 to execute the executable instructions to complete the dual random frequency dithering method.

[0167] Those skilled in the art will understand that the illustration Figure 6 This is merely an example of a dual random frequency dithering device 400 and does not constitute a limitation on the dual random frequency dithering device 400. It may include more or fewer components than shown, or combine certain components, or different components. For example, the dual random frequency dithering device 400 may also include input / output devices, network access devices, buses, etc.

[0168] The processing unit 401 (Central Processing Unit, CPU) can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processing unit 401 can be any conventional processor. The processing unit 401 is the control center of the dual random frequency dithering device 400, connecting all parts of the dual random frequency dithering device 400 through various interfaces and lines.

[0169] Storage unit 402 can be used to store computer-readable instructions. Processing unit 401 implements various functions of the dual random frequency dithering device 400 by running or executing the computer-readable instructions or modules stored in storage unit 402 and calling the data stored in storage unit 402. Storage unit 402 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the dual random frequency dithering device 400, etc. In addition, storage unit 402 may include hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, read-only memory (ROM), random access memory (RAM), or other non-volatile / volatile storage devices.

[0170] If the module integrated into the dual random frequency dithering device 400 is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by instructing related hardware through computer-readable instructions. The computer-readable instructions can be stored in a computer-readable storage medium, and when executed by a processor, the computer-readable instructions can implement the steps of the various method embodiments described above.

[0171] Example 5

[0172] This embodiment provides a computer-readable storage medium having a computer program stored thereon; the computer program is executed by a processor to implement the double random frequency dithering method in other embodiments.

[0173] In summary, the dual-random frequency dithering system and storage medium of this application generate two pseudo-random control signals; generate a digital control signal with a triangular wave variation trend; receive the pseudo-random control signal and dynamically modulate at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness; logically mix the pseudo-random control signal and the digital control signal to obtain a hybrid control signal; generate the hybrid control signal according to the pseudo-random control signal and the digital control signal to control the frequency of the oscillator to change randomly within a predetermined range, thereby generating a frequency dithering clock signal.

[0174] This application combines triangular wave modulation with random modulation to form a cooperative modulation mechanism, which avoids the periodicity of triangular wave frequency dithering and the uncertainty of random frequency dithering. It can "smoothly spread" the switching noise energy over a wider frequency band, and can achieve excellent and stable EMI suppression in test frequency bands with different RBW requirements such as AM and FM. At the same time, it effectively eliminates the audible noise risk caused by periodic modulation, and achieves complementary and superior performance.

[0175] Those skilled in the art will understand that the terminology used in this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The singular forms “a,” “the,” and “the” as used in this invention and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0176] It should be understood that although the terms first, second, third, etc., may be used in this invention to describe various information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, first information may also be referred to as second information without departing from the scope of this invention, and similarly, second information may also be referred to as first information. Depending on the context, the word "if" as used herein may be interpreted as "when," "when," or "in response to a determination."

[0177] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0178] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A dual random frequency dithering circuit, characterized in that, include: The pseudo-random signal generation module is used to generate two pseudo-random control signals; The triangular wave generation module is used to generate digital control signals with triangular wave changing trends; A collaborative modulation module is connected between the pseudo-random signal generation module and the triangular wave generation module, and is used to dynamically modulate at least one operating parameter of the triangular wave generation module according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness. The hybrid frequency control module is used to generate a hybrid control signal based on the pseudo-random control signal and the digital control signal, thereby controlling the frequency of the oscillator to change randomly within a predetermined range to generate a jitter clock signal. The coordinated modulation module includes: The triangular reference frequency random selection module is used to randomly select one of multiple candidate clock signals according to the pseudo-random control signal as the input clock signal (FTri) of the triangular wave generation module. The synchronization unit receives a control frequency division signal from the inside of the triangular wave generation module at its clock end, receives the pseudo-random control signal at its data end, and its output end is connected to the triangular reference frequency random selection module. Each cycle of the control frequency division signal triggers the synchronization unit to output an updated pseudo-random control signal, thereby randomly changing the frequency of the input clock signal (FTri) within each triangular wave cycle.

2. The dual random frequency dithering circuit according to claim 1, characterized in that, The triangular wave generation module includes: The frequency divider chain is used to receive the input clock signal (FTri) output by the cooperative modulation module and divide it to generate a frequency divider signal; the frequency divider signal includes at least a first frequency divider signal, a second frequency divider signal, a third frequency divider signal, and a control frequency divider signal with the lowest frequency. A phase selection circuit is used to receive the control frequency division signal through a selection terminal, and to receive the first frequency division signal, the second frequency division signal, the third frequency division signal and their respective inverted signals through multiple data input terminals. The control frequency division signal is used to control the phase selection circuit to alternately output the original phase or the reverse phase of the first frequency division signal, the second frequency division signal and the third frequency division signal in each control cycle, so as to synthesize the digital control signal.

3. The dual random frequency dithering circuit according to claim 1, characterized in that, The hybridization and frequency control module includes a hybridization unit; The mixing unit is used to receive the pseudo-random control signal and the digital control signal output by the triangular wave generation module, and to perform logical mixing to output a mixed control signal.

4. The dual random frequency dithering circuit according to claim 3, characterized in that, The mixing unit is an adder network used to perform bit-by-bit XOR and carry operations on the pseudo-random control signal and the multi-bit digital control signal output by the triangular wave generation module to generate a mixed control signal.

5. The dual random frequency dithering circuit according to claim 1, characterized in that, The hybrid and frequency control module also includes: Synchronous trigger group, used to synchronize mixed control signals under the system master clock; The current control array consists of multiple controlled current sources, and the control terminal of each controlled current source receives the output of each bit of the synchronous trigger group. The sum of the controlled current sources is used to control the charging current of the oscillator, thereby linearly modulating the frequency of the jitter clock signal.

6. A switching power supply chip, characterized in that, Includes a dual random frequency dithering circuit as described in any one of claims 1-5, wherein the frequency dithering clock signal is used to control the switching frequency of the switching power supply chip.

7. A dual-random frequency dithering method, applied to the dual-random frequency dithering circuit according to any one of claims 1-5, characterized in that, Includes the following steps: Generate two pseudo-random control signals; A digital control signal with a triangular wave variation trend is generated by the triangular wave generation module; The pseudo-random control signal is received, and at least one operating parameter of the triangular wave generation module is dynamically modulated according to the pseudo-random control signal, so that the time-domain characteristics of the digital control signal output by the triangular wave generation module have both periodicity and randomness. The pseudo-random control signal is logically mixed with the digital control signal to obtain a hybrid control signal; A hybrid control signal is generated based on the pseudo-random control signal and the digital control signal, thereby controlling the frequency of the oscillator to change randomly within a predetermined range to generate a jitter clock signal.

8. A dual random frequency dithering device, characterized in that, include: Storage unit, used to store executable instructions; And a processing unit, configured to connect to a memory to execute executable instructions to complete the dual random frequency dithering method as described in claim 7.

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