Capability block based neutral atomic quantum processor virtualization scheduling method

Abstract

The embodiment of the application relates to the technical field of quantum computing and quantum processor resource management, and provides a neutral atom quantum processor virtualization scheduling method based on a capability block, which comprises the following steps: receiving and analyzing a quantum algorithm task, and extracting a structural feature set; converting the structural feature set into an algorithm capability image based on a feature and capability mapping rule; acquiring a capability block resource pool containing multiple capability blocks and block capability images of the capability blocks; performing capability matching on the algorithm capability image and the block capability images, and judging a covering relationship; determining candidate capability blocks based on the covering relationship and performing feasibility judgment; performing cross-zone combination search on the candidate capability block set, and constructing candidate block combinations; performing cost evaluation on each candidate block combination; selecting a target block combination based on the combination cost, constructing a virtual processor description object, and outputting the virtual processor description object to an execution layer. Therefore, the implementability and scalability of a complex quantum algorithm on a large-scale neutral atom quantum processor are realized.

Description

Technical Field

[0001] This invention relates to the field of quantum computing and quantum processor resource management technology, and in particular to a virtualization scheduling method for neutral atom quantum processors based on capability blocks. Background Technology

[0002] Neutral atom quantum processors typically capture and manipulate a large number of atoms using optical tweezers arrays and leverage Rydberg interactions to achieve coupling and entanglement evolution between qubits. As quantum processors continue to scale up and their system engineering becomes more sophisticated, multiple independently schedulable or differentially run resource regions often exist within the processor. These different regions exhibit significant differences in the number of available atoms, achievable interaction forms, effective connectivity structures, supported gate depth / simulation duration, rearrangement and routing capabilities, readout methods, and throughput.

[0003] In the aforementioned resource landscape characterized by multiple regions and capabilities, the executability, success rate, and execution cost of the same quantum algorithm task may vary significantly across different regions. Furthermore, the capability requirements of some tasks may not be met independently by a single region, necessitating complementary capabilities and collaborative execution across multiple regions.

[0004] In existing technologies, task execution for large-scale quantum processors typically employs fixed topology mapping, predefined partitioning, or static resource allocation to directly map algorithmic tasks to specified physical regions for execution, or relies on a few rules (such as gate set support, connectivity, or maximum depth) to filter resources.

[0005] However, the above solutions generally suffer from the following problems: First, there is a lack of a unified, stable, and evolvable abstract description between algorithm task requirements and hardware resource capabilities, and the scheduling logic is easily strongly bound to specific device parameters; Second, when there are multiple regions with significantly different capabilities within the processor, it is difficult to automatically filter, combine, and interpret candidate execution regions; Third, there is a lack of a unified cost evaluation and selection mechanism, making it difficult to perform cost-driven optimization selection among multiple feasible execution schemes; Fourth, the scheduling results usually lack a standardized description of the execution carrier, which is not conducive to decoupling the scheduling layer from the execution layer, nor to task reproduction, auditing, and engineering expansion.

[0006] In neutral atom quantum processors, due to physical constraints such as the size of the atom array, the effective coupling range, the blocking radius, the rearrangement cost, and the distribution of measurement and control resources, some quantum algorithm tasks rely on multiple capability dimensions during execution. These capability dimensions are often dispersed in different resource regions in physical implementation, making it technically impossible for a single physical region to simultaneously meet all the capability requirements of the algorithm.

[0007] In the above situation, existing scheduling schemes based on fixed partitions or rule-based filtering cannot automatically determine the complementary relationship between multiple resource regions without introducing human intervention, nor can they form a unified resource carrier that can be directly used for execution, thus limiting the feasibility of complex algorithm tasks on large-scale neutral atom quantum processors.

[0008] Therefore, there is an urgent need for a quantum processor virtualization scheduling scheme that can model algorithm requirements and hardware capabilities in a unified manner, and can complete capability matching, feasibility determination, cost evaluation and execution carrier output under heterogeneous capability conditions in multiple regions. Summary of the Invention

[0009] This invention provides a neutral atom quantum processor virtualization scheduling method based on capability blocks to address the shortcomings of existing technologies, such as the lack of a unified abstract description between algorithm task requirements and hardware resource capabilities, the difficulty in automated screening and combination under multi-region heterogeneous capability conditions, the lack of a unified cost evaluation and selection mechanism, and the lack of a standardized execution carrier for scheduling results leading to tight coupling between the scheduling layer and the execution layer. This invention achieves a unified abstract expression of algorithm requirements and hardware capabilities, automated screening and cross-regional combination under multi-region heterogeneous capability conditions, cost-driven optimization selection, and quantum task virtualization execution that decouples the scheduling layer and the execution layer through virtual processor description objects.

[0010] This invention provides a method for virtualizing and scheduling neutral atom quantum processors based on capability blocks, comprising:

[0011] Receive quantum algorithm tasks, convert the quantum algorithm tasks into standardized task description objects, parse the standardized task description objects, and extract a set of structural features related to hardware execution;

[0012] Based on preset feature and capability mapping rules, the set of structural features is converted into an algorithm capability profile;

[0013] Obtain a capability block resource pool, which includes multiple capability blocks and a block capability profile corresponding to each capability block. The capability block is a resource unit abstracted from schedulable execution capabilities.

[0014] The algorithm capability profile is matched with the block capability profile to determine the coverage relationship between the block capability profile and the algorithm capability profile.

[0015] Based on the coverage relationship, candidate capability blocks that can be matched are determined, and the feasibility of the candidate capability blocks is determined to obtain a set of candidate capability blocks;

[0016] Perform a cross-regional combination search on the candidate capability block set to construct a candidate block combination that satisfies the capability profile of the algorithm;

[0017] Cost evaluation is performed on each of the candidate block combinations, and the combination cost is calculated.

[0018] Based on the combined cost, a target block combination is selected, a virtual processor description object is constructed, and the virtual processor description object is output to the execution layer to execute the quantum algorithm task.

[0019] In one possible implementation, the method further includes:

[0020] The system receives quantum algorithm tasks and converts them into standardized task description objects. The standardized task description objects include algorithm identifiers, input scale information, objective function or constraint information, algorithm representation information, and hardware execution preference information. The algorithm representation information includes at least one of quantum circuit representation, Hamiltonian representation, impulse or analog representation.

[0021] The standardized task description object is parsed to extract a set of structural features related to hardware execution. The set of structural features includes at least one of the following: the required number of logical qubits or active atoms, two-qubit interaction graph or effective connectivity requirements, gate depth or number of evolution layers, parallelism requirements, measurement readout mode, rearrangement or routing complexity, pulse or analog Hamiltonian type, timing window and control bandwidth requirements, and noise or error tolerance threshold.

[0022] In one possible implementation, the method further includes:

[0023] Based on preset feature and capability mapping rules, the set of structural features is mapped to an algorithm capability profile. The algorithm capability profile is a multi-dimensional capability vector or a multi-dimensional capability range, used to describe the minimum requirements and acceptable range of the algorithm for multi-dimensional capabilities. The multi-dimensional capabilities include at least one of the following: atomic capacity capability, connectivity or coupling capability, gate depth or evolution capability, rearrangement and routing capability, timing and synchronization capability, control and calibration capability, measurement and readout capability, and cross-regional communication and data backhaul capability.

[0024] In one possible implementation, the method further includes:

[0025] The block capability profile is used to describe the available upper limit, available range, available mode and constraints of the corresponding capability block in multiple capability dimensions.

[0026] When the capability dimension is represented by a level, determine whether the capability level of the block capability profile in the corresponding dimension is higher than or equal to the lowest level of the algorithm capability profile;

[0027] When the capability dimension is represented by an interval, determine whether the available interval of the block capability profile covers or includes the required interval of the algorithm capability profile;

[0028] When there are pattern constraints in the capability dimension, determine whether the block capability profile supports the capability pattern specified by the algorithm capability profile or the set of allowed patterns.

[0029] In one possible implementation, the method further includes:

[0030] The capability dimensions of the block capability profile are filtered to cover the candidate capability blocks of the algorithm capability profile;

[0031] The feasibility of the candidate capability blocks is determined by topological reachability constraints, parallel conflict constraints caused by blocking radius constraints, readout conflict constraints, control resource conflict constraints, and timing window constraints, resulting in a set of candidate capability blocks.

[0032] In one possible implementation, the method further includes:

[0033] The cross-regional combination search includes set-coverage combination, phased combination, capability-dimension combination, or progressive expansion combination; the candidate block combination consists of multiple capability blocks with complementary capabilities, which together cover the minimum requirements of the algorithm capability profile;

[0034] Using the capability dimension as a constraint target, the candidate capability blocks are combined to jointly cover the minimum requirements of the algorithm capability profile, resulting in a set-coverage candidate block combination.

[0035] Alternatively, to address the changing capability requirements at different execution stages of the algorithm, different subsets of candidate capability blocks can be selected to form a staged virtual processor, resulting in a staged candidate block combination.

[0036] Alternatively, for different capability dimensions, candidate capability blocks that meet the requirements are selected separately, and the combinations are checked for consistency to obtain a combination of candidate blocks based on capability dimensions.

[0037] Alternatively, candidate combinations can be expanded progressively based on a key dimension priority strategy, and coverage and feasibility checks can be performed on the candidate combinations after each expansion. Candidate combinations that pass the checks can be used as progressively expanded candidate block combinations.

[0038] In one possible implementation, the method further includes:

[0039] Cost evaluation is performed on each of the candidate block combinations. The cost evaluation includes at least one of the following: cross-regional communication cost, cross-regional routing or reordering cost, mapping and compilation complexity cost, serialization cost caused by parallel conflicts, read throughput cost, control resource consumption cost, and reliability loss cost.

[0040] Output interpretable cost decomposition results, which are used to explain the selection of target block combinations.

[0041] In one possible implementation, the method further includes:

[0042] Based on the combined cost, a target block combination is selected from the candidate block combinations, and a virtual processor description object is constructed. The virtual processor description object includes at least the selected capability block identifier set, the connection relationship between blocks, the effective resource subset within the block, the mapping result from the algorithm task to the block, the execution stage division information, and the interface parameters for the execution layer. The interface parameters include the job input format, control instruction entry, status feedback channel, result data channel, and error feedback specification.

[0043] In one possible implementation, the method further includes:

[0044] The algorithm capability profile is matched with the block capability profile by jointly determining the key dimension constraints and non-key dimension constraints.

[0045] The process of matching the algorithm capability profile with the block capability profile through joint determination of key dimension constraints and non-key dimension constraints includes:

[0046] When any key dimension of the block capability profile does not meet the minimum requirements of the algorithm capability profile, the corresponding candidate capability block is determined not to be covered and is removed.

[0047] When the block capability profile is insufficient in only non-critical dimensions, the corresponding candidate capability blocks are marked as conditional coverage, and are processed in conjunction with compensation costs or risk penalties during the feasibility determination or cost assessment stage.

[0048] In one possible implementation, the method further includes:

[0049] The cross-regional combined search also includes a combined consistency check, which includes: determining whether the candidate blocks meet the preset connectivity and reachability conditions.

[0050] Alternatively, determine whether there is resource overlap between candidate blocks leading to conflicting resource usage;

[0051] Alternatively, determine whether the collaborative execution of candidate blocks meets the preset timing window or synchronization constraints;

[0052] Alternatively, determine whether the number of interactions between candidate blocks or the number of cross-block connections does not exceed a preset threshold.

[0053] In one possible implementation, the method further includes:

[0054] The interface parameters in the virtual processor description object include:

[0055] The job input format defines the encapsulation structure and transmission protocol for algorithm task data.

[0056] The control instruction entry point specifies the interface address and invocation method for the execution layer to call control instructions;

[0057] Status feedback channel defines the feedback path and format of status information during execution;

[0058] The results data channel defines the output format and transmission method of measurement and calculation results;

[0059] Error feedback specifications define error codes, error levels, and exception handling procedures.

[0060] In one possible implementation, the method further includes:

[0061] The virtual processor description object is associated with and archived with the task execution results, running logs and cost evaluation results to establish a task scheduling file;

[0062] Based on the task scheduling archive, task reproduction, scheduling auditing, and subsequent optimization are performed. The subsequent optimization includes cost model updates, mapping rule adjustments, and strategy parameter optimization.

[0063] The present invention also provides a neutral atom quantum processor virtualization scheduling device based on capability blocks, comprising the following modules:

[0064] The task access and feature extraction module is used to receive quantum algorithm tasks, convert the quantum algorithm tasks into standardized task description objects, parse the standardized task description objects, and extract a set of structural features related to hardware execution.

[0065] The algorithm capability profile generation module is used to convert the set of structural features into an algorithm capability profile based on preset feature and capability mapping rules.

[0066] The capability block resource pool module is used to obtain the capability block resource pool, which includes multiple capability blocks and the block capability profile corresponding to each capability block. The capability block is a resource unit abstracted from schedulable execution capabilities.

[0067] The matching and filtering module is used to perform capability matching between the algorithm capability profile and the block capability profile, and to determine the coverage relationship between the block capability profile and the algorithm capability profile.

[0068] The matching and filtering module is further configured to determine candidate capability blocks that pass the capability matching based on the coverage relationship, and to make a feasibility judgment on the candidate capability blocks to obtain a set of candidate capability blocks.

[0069] The combined search module is used to perform cross-regional combined search on the candidate capability block set to construct a combination of candidate blocks that satisfies the algorithm capability profile;

[0070] The cost evaluation module is used to evaluate the cost of each candidate block combination and calculate the combination cost.

[0071] The virtual processor construction module is used to select a target block combination based on the combined cost, construct a virtual processor description object, and output the virtual processor description object to the execution layer to execute the quantum algorithm task.

[0072] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the capability block-based neutral atom quantum processor virtualization scheduling method as described above.

[0073] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the capability block-based neutral atom quantum processor virtualization scheduling method as described above.

[0074] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the capability block-based neutral atom quantum processor virtualization scheduling method as described above.

[0075] The present invention provides a method for virtualizing and scheduling neutral atom quantum processors based on capability blocks. This method receives quantum algorithm tasks, converts them into standardized task description objects, parses these standardized task description objects to extract a set of structural features related to hardware execution, and converts these structural feature sets into algorithm capability profiles based on preset feature-capability mapping rules. It then acquires a capability block resource pool, which includes multiple capability blocks and corresponding block capability profiles for each capability block. Each capability block is a resource unit abstracted from schedulable execution capabilities. Finally, it maps the algorithm capability profiles to the corresponding block capability profiles. The block capability profile is used for capability matching to determine the coverage relationship between the block capability profile and the algorithm capability profile. Based on the coverage relationship, candidate capability blocks that pass the capability matching are determined, and the feasibility of the candidate capability blocks is judged to obtain a set of candidate capability blocks. Cross-regional combination search is performed on the set of candidate capability blocks to construct candidate block combinations that satisfy the algorithm capability profile. Cost evaluation is performed on each candidate block combination to calculate the combination cost. Based on the combination cost, a target block combination is selected, and a virtual processor description object is constructed. The virtual processor description object is output to the execution layer to execute the quantum algorithm task. Compared with the shortcomings of the prior art, such as the lack of a unified abstract description between algorithm task requirements and hardware resource capabilities, the difficulty in automatic screening and combination under multi-regional heterogeneous capability conditions, the lack of a unified cost evaluation and selection mechanism, and the lack of a standardized execution carrier for scheduling results leading to tight coupling between the scheduling layer and the execution layer, this solution achieves a unified abstract expression of algorithm requirements and hardware capabilities, automatic screening and cross-regional combination under multi-regional heterogeneous capability conditions, cost-driven optimization selection, and quantum task virtualization execution that decouples the scheduling layer and the execution layer through a virtual processor description object. Attached Figure Description

[0076] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0077] Figure 1 This is a flowchart illustrating the virtualization scheduling method for neutral atom quantum processors based on capability blocks provided by the present invention.

[0078] Figure 2 This is a schematic diagram of quantum algorithm analysis and structural feature extraction provided by the present invention.

[0079] Figure 3 This is a schematic diagram of the quantum algorithm mapping mechanism and capability profile provided by the present invention.

[0080] Figure 4 This is a schematic diagram of the capability block resource pool and its structure provided by the present invention.

[0081] Figure 5 This is a schematic diagram of the block selection, feasibility judgment and cost evaluation process based on algorithm capability profiling provided by the present invention.

[0082] Figure 6 This is a schematic diagram of the virtual processor construction process provided by the present invention.

[0083] Figure 7 This is a schematic diagram of the structure of the neutral atom quantum processor virtualization scheduling device based on capability blocks provided by the present invention.

[0084] Figure 8 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0085] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0086] To facilitate understanding of the embodiments of the present invention, further explanations and descriptions will be provided below with reference to the accompanying drawings and specific embodiments. These embodiments do not constitute a limitation on the embodiments of the present invention.

[0087] Figure 1 This is a flowchart illustrating the virtualization scheduling method for neutral atom quantum processors based on capability blocks provided by the present invention, as shown below. Figure 1 As shown, the method includes the following:

[0088] S11. Receive the quantum algorithm task, convert the quantum algorithm task into a standardized task description object, parse the standardized task description object, and extract the set of structural features related to hardware execution.

[0089] The embodiments of the present invention mainly realize the automatic selection, combination and output of standardized execution carriers under the condition of heterogeneous capabilities in multiple regions. The embodiments of the present invention introduce the dynamic abstraction of "capability blocks" and the "cross-regional combination" mechanism, which solves the problem of heterogeneous multi-regional collaborative scheduling that cannot be handled by the prior art.

[0090] Specifically, such as Figure 2 The diagram shown illustrates the quantum algorithm analysis and structural feature extraction. This step is the initial stage of the scheduling process, mainly involving the access and feature extraction of the quantum algorithm task.Figure 2 This paper illustrates the overall process of a quantum algorithm task from input to structural feature extraction, including the basic information preparation stages of algorithm representation parsing, structural feature set generation, and capability dimension mapping. The structural feature set describes the resource requirements of the algorithm at the hardware execution level. These structural features may include circuit structure features, Hamiltonian structure features, connectivity requirements, parallelism requirements, measurement readout requirements, timing requirements, and noise tolerance requirements. First, the system receives the user-submitted quantum algorithm task and converts it into a standardized task description object. This standardized task description object includes algorithm identifier, input size information, objective function or constraint information, algorithm representation information, and hardware execution preference information. The algorithm representation information can be at least one of quantum circuit representation, Hamiltonian representation, impulse representation, or analog representation.

[0091] Subsequently, the standardized task description object is parsed to extract a set of structural features related to hardware execution. This set of structural features includes at least one of the following: the required number of logical qubits or active atoms, two-qubit interaction graphs or effective connectivity requirements, gate depth or number of evolution layers, parallelism requirements, measurement readout mode, rearrangement or routing complexity, type of impulse or analog Hamiltonian, timing window and control bandwidth requirements, and noise or error tolerance thresholds. For circuit-type tasks, structural features may include the number of logical qubits, two-qubit gate interaction graphs, gate depth, parallelism, measurement mode, etc.; for analog or Hamiltonian-type tasks, structural features may include Hamiltonian term type, scope of action, required evolution time, timing constraints, and sampling strategies, etc.

[0092] S12. Based on preset feature and capability mapping rules, the set of structural features is converted into an algorithm capability profile. In this embodiment of the invention, the algorithm capability profile is used to describe the resource capability requirements of quantum algorithm tasks on quantum processors in a unified capability space. The algorithm capability profile can be represented as a multi-dimensional capability vector or a multi-dimensional capability interval, where each dimension of capability corresponds to a type of execution capability of the quantum processor.

[0093] The capability dimension describes the categories of capabilities a quantum processor needs to execute quantum algorithms, such as... Figure 2 The capability dimensions include, but are not limited to, atomic capacity capability (H), connectivity or coupling capability (C), gate depth or evolution capability (D), rearrangement and routing capability (A), timing and synchronization capability (R), control and calibration capability (T), measurement and readout capability (Ctrl), and cross-regional communication and data backhaul capability (M).

[0094] In some capability dimensions, capability requirements can be represented by capability levels. Capability levels are used to indicate the strength or scale of a certain capability dimension. For example, they can be divided into different levels such as L1, L2, L3, and L4, where the higher the level, the stronger the corresponding capability.

[0095] In some capability dimensions, capability requirements can also be represented by capability ranges. Capability ranges are used to represent the range of capabilities that the algorithm can accept in that capability dimension, such as the form [min, max], where min represents the minimum capability requirement and max represents the maximum acceptable capability range.

[0096] By using the unified description of the aforementioned capability dimensions, capability levels, or capability ranges, different types of quantum algorithm tasks can be mapped to a unified capability space, thereby achieving a unified abstract expression between algorithm requirements and hardware capabilities.

[0097] like Figure 3 The diagram illustrates the quantum algorithm mapping mechanism and capability profile. This step achieves the abstract transformation from algorithm structural features to capability requirements. Based on preset feature and capability mapping rules, the set of structural features extracted in step S11 is mapped to an Algorithm Capability Profile (ACP). This ACP is a multi-dimensional capability vector or multi-dimensional capability range, used to describe the algorithm's minimum requirements and acceptable range for multi-dimensional capabilities.

[0098] Multidimensional capabilities include at least one of the following: atomic capacity capability, connectivity or coupling capability, gate depth or evolution capability, rearrangement and routing capability, timing and synchronization capability, control and calibration capability, measurement and readout capability, and cross-regional communication and data backhaul capability.

[0099] The preset feature and capability mapping rules include direct numerical mapping rules, graph structure mapping rules, complexity derivation mapping rules, interval mapping rules, and pattern mapping rules.

[0100] The direct numerical mapping rule maps the number of logical qubits to the minimum required value for atomic capacity and the gate depth to the minimum required value for gate depth evolution capability.

[0101] The graph structure mapping rule maps the topology of a two-bit interaction graph to the required level of connectivity and coupling capability, where linear chain structures correspond to low levels, two-dimensional grid structures correspond to medium levels, and fully connected graphs correspond to high levels.

[0102] The complexity derivation mapping rule calculates the rerouting complexity based on the algorithm's connectivity graph and hardware topology constraints, and derives the timing synchronization capability requirements based on the number of gate operations that can be executed simultaneously.

[0103] The interval mapping rule maps time-series window demand to capacity demand intervals and noise tolerance thresholds to acceptable error intervals.

[0104] The pattern mapping rule maps the measurement readout pattern to pattern constraints on measurement and readout capabilities. These patterns include global parallel readout pattern, partitioned sequential readout pattern, and single-point readout pattern.

[0105] S13. Obtain the capability block resource pool, which includes multiple capability blocks and the block capability profile corresponding to each capability block. The capability block is a resource unit abstracted from schedulable execution capabilities.

[0106] This step obtains the system's capability block resource pool. For example... Figure 4 The diagram shows the capability block resource pool and its structure. The capability block resource pool includes multiple capability blocks and their corresponding capability profiles. A capability block is a resource unit abstracted from schedulable execution capabilities in a quantum processor system. Its boundaries are not required to correspond one-to-one with fixed physical regions; that is, a capability block is a dynamically abstracted resource unit, rather than a fixed physical partition.

[0107] A block capability profile describes the available upper limit, available range, available mode, and constraints of a corresponding capability block across multiple capability dimensions. The capability block resource pool supports updates based on system status, such as dynamic updates based on calibration status, available atomic count, control resource usage, or policy configuration changes.

[0108] S14. Perform capability matching between the algorithm capability profile and the block capability profile to determine the coverage relationship between the block capability profile and the algorithm capability profile.

[0109] This step performs a matching assessment between the algorithm requirements and hardware capabilities. For example... Figure 5 As shown, the algorithm capability profile generated in step S12 is matched with the block capability profile obtained in step S13 to determine the coverage relationship between the block capability profile and the algorithm capability profile.

[0110] Capability matching includes determining the coverage relationship based on a multi-dimensional capability space and jointly judging the constraints.

[0111] When capability dimensions are represented by levels, determine whether the capability level of the block capability profile in the corresponding dimension is higher than or equal to the lowest level of the algorithm capability profile.

[0112] When the capability dimension is represented by a range, determine whether the available range of the block capability profile covers or includes the required range of the algorithm capability profile.

[0113] When there are pattern constraints in the capability dimension, determine whether the block capability profile supports the capability pattern specified by the algorithm capability profile or the set of allowed patterns.

[0114] Furthermore, the coverage determination also includes a joint determination of key dimension constraints and non-key dimension constraints. When any key dimension of the block capability profile does not meet the minimum requirements of the algorithm capability profile, the corresponding candidate capability block is determined not to be covered and is eliminated. When the block capability profile only has a lack of non-key dimensions, the corresponding candidate capability block is marked as conditionally covered and processed in subsequent feasibility determination or cost assessment stages in conjunction with compensation costs or risk penalties.

[0115] S15. Based on the coverage relationship, determine the candidate capability blocks that can be matched through capability matching, and perform a feasibility assessment on the candidate capability blocks to obtain a set of candidate capability blocks. For example... Figure 5 As shown, the block screening and evaluation process in this embodiment of the invention may include a coverage and feasibility determination module, a combined search module, and a cost evaluation and block selection module.

[0116] The coverage and feasibility determination module is used to filter candidate capability blocks that meet the capability requirements based on the coverage relationship between the algorithm capability profile and the block capability profile.

[0117] The coverage and feasibility determination module is also used to determine the execution feasibility of candidate capability blocks based on the physical constraints of the quantum processor. The physical constraints include topological reachability constraints, parallel conflict constraints caused by blocking radius, readout conflict constraints, control resource conflict constraints, and timing window constraints.

[0118] The combined search module is used to construct combinations of candidate blocks that meet the algorithm's capability requirements from the set of candidate capability blocks.

[0119] The cost evaluation and block selection module is used to comprehensively evaluate the cost of different candidate block combinations based on the cost of the number of blocks, the cost of cross-block communication, and the overhead of reordering and routing, and select the block combination that meets the algorithm's capability requirements and has the best cost based on a preset strategy.

[0120] This step filters candidate capability blocks that pass capability matching and performs feasibility assessment. First, candidate capability blocks whose capability dimensions cover the algorithm's capability profile are selected. Then, the feasibility of these candidate capability blocks is assessed using topological reachability constraints, parallel conflict constraints caused by blocking radius constraints, readout conflict constraints, control resource conflict constraints, and timing window constraints, resulting in a candidate capability block set. The purpose of feasibility assessment is to filter out capability blocks that, while meeting the capability requirements, are infeasible in actual execution due to physical constraints or resource conflicts, ensuring that the subsequent candidate block set for combined search is actually executable.

[0121] S16. Perform a cross-regional combination search on the candidate capability block set to construct a candidate block combination that satisfies the capability profile of the algorithm.

[0122] This step addresses the problem that a single capability block cannot meet all the algorithm's capability requirements by constructing a combination of blocks with complementary capabilities through cross-block combination search.

[0123] Cross-regional combined search includes set-coverage combination, phased combination, combination based on capability dimensions, or gradual expansion combination.

[0124] The set-coverage combination takes the capability dimension as the constraint target, combines candidate capability blocks to jointly cover the minimum requirements of the algorithm capability profile, and obtains the set-coverage candidate block combination.

[0125] The phased combination approach addresses the changing capability requirements at different execution stages of the algorithm by selecting different subsets of candidate capability blocks to form phased virtual processors, resulting in a phased candidate block combination.

[0126] For each capability dimension, candidate capability blocks that meet the required capabilities are selected and the combination is validated for consistency, resulting in a capability dimension-based candidate block combination.

[0127] The progressive expansion of the combination is based on a key dimension priority strategy to progressively expand the candidate combination. After each expansion, the candidate combination is subjected to coverage verification and feasibility verification. The candidate combination that passes the verification is used as the progressively expanded candidate block combination.

[0128] Cross-regional combinatorial search also includes combinatorial consistency verification, which involves determining whether candidate blocks meet preset connectivity and reachability conditions, whether there are resource overlaps among candidate blocks leading to conflict occupancy, whether the collaborative execution of candidate blocks meets preset timing windows or synchronization constraints, and whether the number of interactions between candidate blocks or the number of cross-regional connections does not exceed preset thresholds. The candidate block combinations constructed through cross-regional combinatorial search consist of multiple complementary capability blocks, collectively covering the minimum requirements of the algorithm's capability profile.

[0129] S17. Evaluate the cost of each candidate block combination and calculate the combination cost.

[0130] This step quantifies and evaluates each candidate block combination to support subsequent optimization selection. The cost evaluation includes at least one of the following: cross-region communication cost, cross-region routing or reordering cost, mapping and compilation complexity cost, serialization cost due to parallel conflicts, read throughput cost, control resource consumption cost, and reliability penalty cost.

[0131] Cross-regional communication cost assessment evaluates the data transmission overhead between capability blocks in the candidate block combination.

[0132] Cross-region routing or reordering cost assessment evaluates the physical reordering operation cost required to move atoms between different capability blocks.

[0133] The mapping and compilation complexity cost evaluation measures the complexity of mapping an algorithm to a combination of candidate blocks and generating executable instructions.

[0134] Evaluation of serialization cost caused by parallel conflicts: performance loss due to the forced serialization of parallel operations caused by physical constraints such as blocking radius.

[0135] The reading efficiency and bandwidth usage of the read throughput cost assessment measurement results are used to evaluate the reading efficiency.

[0136] The cost of controlling resource consumption is assessed by controlling the consumption of electronic equipment and calibration resources.

[0137] Assess the reliability degradation costs by recognizing the additional errors and noise introduced by cross-regional execution.

[0138] The cost assessment outputs interpretable cost decomposition results, which are used to explain the selection of target block combinations, enhancing the transparency and auditability of scheduling decisions.

[0139] S18. Select a target block combination based on the combined cost, construct a virtual processor description object, and output the virtual processor description object to the execution layer to execute the quantum algorithm task.

[0140] This step completes the final target selection and execution vehicle construction. For example... Figure 6 The diagram shown illustrates the virtual processor construction process. Based on the combined cost calculated in step S17, the target block combination is selected. Typically, candidate block combinations whose combined costs meet the conditions can be selected as the target block combination based on the strategy or optimization objective.

[0141] Then, a virtual processor description object is constructed. This virtual processor description object includes at least the selected capability block identifier set, inter-block connection relationships, a subset of effective resources within a block, the mapping results from algorithm tasks to blocks, execution phase division information, and interface parameters for the execution layer. The virtual processor description object is also used to define the interface relationship between the scheduling layer and the execution layer, enabling the execution layer to complete job distribution, execution control, and result feedback based on the virtual processor description object.

[0142] Interface parameters include job input format, control command entry point, status feedback channel, result data channel, and error feedback specification. The job input format defines the encapsulation structure and transmission protocol of the algorithm task data. The control command entry point specifies the interface address and invocation method for the execution layer to call control commands. The status feedback channel defines the feedback path and format of status information during execution. The result data channel defines the output format and transmission method of measurement and calculation results. The error feedback specification defines error codes, error levels, and exception handling procedures.

[0143] The virtual processor description object (VMI) is a standardized execution carrier that decouples the scheduling layer from the execution layer. After the VMI is output to the execution layer, the execution layer uses the VMI to perform job assignment, status feedback, and result feedback, thereby realizing the actual execution of the quantum algorithm task.

[0144] After outputting the virtual processor description object, the virtual processor description object can be associated with the task execution results, running logs and cost evaluation results for archiving, and a task scheduling file can be established to support task reproduction, scheduling auditing and subsequent optimization. Subsequent optimization includes cost model updates, mapping rule adjustments and policy parameter optimization.

[0145] Through the above steps, this invention realizes the automated screening, cross-regional combination, and cost-driven selection of quantum algorithm tasks under multi-regional heterogeneous capability conditions. It also achieves the virtualized execution of quantum tasks by decoupling the scheduling layer and the execution layer through virtual processor description objects, which significantly improves the feasibility, scalability, and engineering level of complex quantum algorithms on large-scale neutral atom quantum processors.

[0146] Compared with the prior art, the embodiments of the present invention have at least the following beneficial effects:

[0147] (1) By introducing the set of structural features and the algorithm capability profile, the algorithm requirements and hardware capabilities can be uniformly abstracted and expressed, reducing the coupling of scheduling logic to specific hardware parameters and improving portability and evolvability.

[0148] (2) Through the capability block resource pool and block capability profile, a refined characterization of heterogeneous capabilities in multiple regions can be achieved, supporting automated screening and feasibility determination, and reducing reliance on manual experience;

[0149] (3) By using a cross-regional combined search and cost evaluation mechanism, cost-driven selection can be achieved among multiple feasible solutions, thereby improving resource utilization and overall execution efficiency;

[0150] (4) By describing objects through virtual processors, the "selected resource set, connection relationship, task mapping and execution stage information" are output in a standardized manner to achieve decoupling between the scheduling layer and the execution layer, which facilitates engineering integration, task reproduction and scheduling auditing;

[0151] (5) Supports the combination of phased virtual processors and sub-capability dimensions, so that even if a single block cannot meet the full requirements of the task, the task can still be completed through complementary capabilities, thereby improving the system's adaptability to complex tasks.

[0152] The present invention provides a neutral atom quantum processor virtualization scheduling method based on capability blocks. This method receives quantum algorithm tasks, converts them into standardized task description objects, parses these standardized task description objects to extract a set of structural features related to hardware execution, and converts these structural feature sets into algorithm capability profiles based on preset feature-capability mapping rules. It then acquires a capability block resource pool, which includes multiple capability blocks and corresponding block capability profiles for each capability block. Each capability block is a resource unit abstracted from schedulable execution capabilities. The method performs capability matching between the algorithm capability profiles and the block capability profiles to determine the coverage relationship between the block capability profiles and the algorithm capability profiles. Based on the coverage relationship, it determines candidate capability blocks that pass the capability matching and performs a feasibility assessment on these candidate capability blocks to obtain a set of candidate capability blocks. Figure 5 As shown, this invention performs capability matching by matching algorithm capability profiles with block capability profiles. First, candidate capability blocks that meet basic capability coverage conditions are screened. Feasibility is then determined through topological constraints, parallel conflict constraints, and control resource constraints. Based on this, a set of candidate capability blocks is constructed, and cross-block combination search and cost evaluation are performed on these candidate blocks. Cross-block combination search is performed on the candidate capability block set to construct candidate block combinations that satisfy the algorithm capability profile. Cost evaluation is performed on each candidate block combination to calculate the combination cost. Based on the combination cost, a target block combination is selected, and a virtual processor description object is constructed. The virtual processor description object is output to the execution layer to execute the quantum algorithm task. Compared to existing technologies, which suffer from the lack of a unified abstract description between algorithm task requirements and hardware resource capabilities, difficulty in automated screening and combination under heterogeneous capabilities in multiple regions, lack of a unified cost evaluation and selection mechanism, and tight coupling between the scheduling layer and the execution layer due to the lack of a standardized execution carrier for scheduling results, this method achieves a unified abstract expression of algorithm requirements and hardware capabilities, automated screening and cross-regional combination under heterogeneous capabilities in multiple regions, cost-driven optimization selection, and quantum task virtualization execution that decouples the scheduling layer and the execution layer through virtual processor description objects.

[0153] The following describes the capability block-based virtualization scheduling device for neutral atom quantum processors provided by the present invention. The capability block-based virtualization scheduling device described below and the capability block-based virtualization scheduling method described above can be referred to in correspondence.

[0154] Figure 7 This is a schematic diagram of the structure of the neutral atom quantum processor virtualization scheduling device based on capability blocks provided by the present invention, specifically including:

[0155] The task access and feature extraction module 701 is used to receive quantum algorithm tasks, convert the quantum algorithm tasks into standardized task description objects, parse the standardized task description objects, and extract a set of structural features related to hardware execution. For detailed explanations, please refer to the relevant descriptions in the above method embodiments; they will not be repeated here.

[0156] The algorithm capability profile generation module 702 is used to convert the structural feature set into an algorithm capability profile based on preset feature-capability mapping rules. For detailed explanations, please refer to the relevant descriptions in the above method embodiments; they will not be repeated here.

[0157] The capability block resource pool module 703 is used to obtain a capability block resource pool, which includes multiple capability blocks and corresponding block capability profiles for each capability block. Each capability block is a resource unit abstracted from schedulable execution capabilities. For detailed explanations, please refer to the relevant descriptions in the above method embodiments; they will not be repeated here.

[0158] The matching and filtering module 704 is used to perform capability matching between the algorithm capability profile and the block capability profile, and to determine the coverage relationship between the block capability profile and the algorithm capability profile. For detailed explanation, please refer to the relevant descriptions in the above method embodiments, which will not be repeated here.

[0159] The matching and filtering module 704 is further configured to determine candidate capability blocks that pass capability matching based on the coverage relationship, and to perform a feasibility judgment on the candidate capability blocks to obtain a set of candidate capability blocks. For detailed explanations, please refer to the relevant descriptions in the above method embodiments, which will not be repeated here.

[0160] The combined search module 705 is used to perform a cross-regional combined search on the candidate capability block set to construct a combination of candidate blocks that satisfies the algorithm's capability profile. For detailed explanations, please refer to the relevant descriptions in the above method embodiments; they will not be repeated here.

[0161] The cost evaluation module 706 is used to evaluate the cost of each candidate block combination and calculate the combined cost. For detailed explanations, please refer to the relevant descriptions in the above method embodiments; they will not be repeated here.

[0162] The virtual processor construction module 707 is used to select a target block combination based on the combined cost, construct a virtual processor description object, and output the virtual processor description object to the execution layer to execute the quantum algorithm task. For detailed explanation, please refer to the relevant descriptions in the above method embodiments; they will not be repeated here.

[0163] Figure 8 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 8 As shown, the electronic device may include: a processor 810, a communication interface 820, a memory 830, and a communication bus 840, wherein the processor 810, the communication interface 820, and the memory 830 communicate with each other through the communication bus 840. The processor 810 can call logical instructions in the memory 830 to execute a neutral atom quantum processor virtualization scheduling method based on capability blocks. This method includes: receiving a quantum algorithm task and converting the quantum algorithm task into a standardized task description object; parsing the standardized task description object to extract a set of structural features related to hardware execution; converting the set of structural features into an algorithm capability profile based on preset feature-capability mapping rules; acquiring a capability block resource pool, the capability block resource pool including multiple capability blocks and corresponding block capability profiles for each capability block, wherein the capability block is a resource unit abstracted based on schedulable execution capabilities; and... The algorithm capability profile is matched with the block capability profile to determine the coverage relationship between the block capability profile and the algorithm capability profile; based on the coverage relationship, candidate capability blocks that pass the capability matching are determined, and the feasibility of the candidate capability blocks is judged to obtain a set of candidate capability blocks; cross-regional combination search is performed on the set of candidate capability blocks to construct candidate block combinations that satisfy the algorithm capability profile; cost evaluation is performed on each candidate block combination to calculate the combination cost; based on the combination cost, a target block combination is selected, and a virtual processor description object is constructed and output to the execution layer to execute the quantum algorithm task.

[0164] Furthermore, the logical instructions in the aforementioned memory 830 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0165] On the other hand, the present invention also provides a computer program product, which includes a computer program that can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the capability block-based neutral atom quantum processor virtualization scheduling method provided by the above methods. This method includes: receiving a quantum algorithm task and converting the quantum algorithm task into a standardized task description object; parsing the standardized task description object and extracting a set of structural features related to hardware execution; converting the set of structural features into an algorithm capability profile based on a preset feature-capability mapping rule; and acquiring a capability block resource pool, wherein the capability block resource pool includes multiple capability blocks and a corresponding area for each capability block. A block capability profile is generated, where each capability block is a resource unit abstracted from schedulable execution capabilities. The algorithm capability profile is matched with the block capability profile to determine the coverage relationship between the block capability profile and the algorithm capability profile. Based on the coverage relationship, candidate capability blocks that pass the capability matching are determined, and the feasibility of these candidate capability blocks is assessed to obtain a set of candidate capability blocks. A cross-regional combination search is performed on the set of candidate capability blocks to construct candidate block combinations that satisfy the algorithm capability profile. Cost evaluation is performed on each candidate block combination to calculate the combination cost. Based on the combination cost, a target block combination is selected, and a virtual processor description object is constructed. The virtual processor description object is output to the execution layer to execute the quantum algorithm task.

[0166] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements the above-described method for virtualizing and scheduling a neutral atom quantum processor based on capability blocks. This method includes: receiving a quantum algorithm task and converting the quantum algorithm task into a standardized task description object; parsing the standardized task description object to extract a set of structural features related to hardware execution; converting the set of structural features into an algorithm capability profile based on a preset feature-capability mapping rule; and acquiring a capability block resource pool, the capability block resource pool including multiple capability blocks and corresponding block capability profiles for each capability block, wherein the capability block is a root... The algorithm capability profile is abstracted from the resource unit; the algorithm capability profile is matched with the block capability profile to determine the coverage relationship between the block capability profile and the algorithm capability profile; based on the coverage relationship, candidate capability blocks that pass the capability matching are determined, and the feasibility of the candidate capability blocks is judged to obtain a set of candidate capability blocks; cross-regional combination search is performed on the set of candidate capability blocks to construct candidate block combinations that satisfy the algorithm capability profile; cost evaluation is performed on each candidate block combination to calculate the combination cost; target block combination is selected based on the combination cost, and a virtual processor description object is constructed and output to the execution layer to execute the quantum algorithm task.

[0167] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0168] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0169] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A virtualization scheduling method for neutral atom quantum processors based on capability blocks, characterized in that, include: Receive quantum algorithm tasks, convert the quantum algorithm tasks into standardized task description objects, parse the standardized task description objects, and extract a set of structural features related to hardware execution; Based on preset feature and capability mapping rules, the set of structural features is converted into an algorithm capability profile; The process of converting the structural feature set into an algorithmic capability profile based on preset feature and capability mapping rules includes: Based on preset feature and capability mapping rules, the set of structural features is mapped to an algorithm capability profile. The algorithm capability profile is a multi-dimensional capability vector or a multi-dimensional capability range, used to describe the minimum requirements and acceptable range of the algorithm for multi-dimensional capabilities. The multi-dimensional capabilities include at least one of the following: atomic capacity capability, connectivity or coupling capability, gate depth or evolution capability, rearrangement and routing capability, timing and synchronization capability, control and calibration capability, measurement and readout capability, and cross-regional communication and data backhaul capability. Obtain a capability block resource pool, which includes multiple capability blocks and a block capability profile corresponding to each capability block. The capability block is a resource unit abstracted from schedulable execution capabilities. The algorithm capability profile is matched with the block capability profile to determine the coverage relationship between the block capability profile and the algorithm capability profile. Based on the coverage relationship, candidate capability blocks that can be matched are determined, and the feasibility of the candidate capability blocks is determined to obtain a set of candidate capability blocks; Perform a cross-regional combination search on the candidate capability block set to construct a candidate block combination that satisfies the capability profile of the algorithm; Cost evaluation is performed on each of the candidate block combinations, and the combination cost is calculated. Based on the combined cost, a target block combination is selected, a virtual processor description object is constructed, and the virtual processor description object is output to the execution layer to execute the quantum algorithm task.

2. The method according to claim 1, characterized in that, The process involves receiving a quantum algorithm task, converting the quantum algorithm task into a standardized task description object, parsing the standardized task description object, and extracting a set of structural features related to hardware execution, including: The system receives quantum algorithm tasks and converts them into standardized task description objects. The standardized task description objects include algorithm identifiers, input scale information, objective function or constraint information, algorithm representation information, and hardware execution preference information. The algorithm representation information includes at least one of quantum circuit representation, Hamiltonian representation, impulse or analog representation. The standardized task description object is parsed to extract a set of structural features related to hardware execution. The set of structural features includes at least one of the following: the required number of logical qubits or active atoms, two-qubit interaction graph or effective connectivity requirements, gate depth or number of evolution layers, parallelism requirements, measurement readout mode, rearrangement or routing complexity, pulse or analog Hamiltonian type, timing window and control bandwidth requirements, and noise or error tolerance threshold.

3. The method according to claim 1, characterized in that, The block capability profile is used to describe the available upper limit, available range, available mode and constraints of the corresponding capability block in multiple capability dimensions. The step of matching the algorithm capability profile with the block capability profile to determine the coverage relationship between the block capability profile and the algorithm capability profile includes: When the capability dimension is represented by a level, determine whether the capability level of the block capability profile in the corresponding dimension is higher than or equal to the lowest level of the algorithm capability profile; When the capability dimension is represented by an interval, determine whether the available interval of the block capability profile covers or includes the required interval of the algorithm capability profile; When there are pattern constraints in the capability dimension, determine whether the block capability profile supports the capability pattern specified by the algorithm capability profile or the set of allowed patterns.

4. The method according to claim 3, characterized in that, The process involves determining candidate capability blocks for capability matching based on the coverage relationship, and then assessing the feasibility of these candidate capability blocks to obtain a set of candidate capability blocks, including: The capability dimensions of the block capability profile are filtered to cover the candidate capability blocks of the algorithm capability profile; The feasibility of the candidate capability blocks is determined by topological reachability constraints, parallel conflict constraints caused by blocking radius constraints, readout conflict constraints, control resource conflict constraints, and timing window constraints, resulting in a set of candidate capability blocks.

5. The method according to claim 4, characterized in that, The cross-regional combination search includes set-coverage combination, phased combination, capability-dimension combination, or progressive expansion combination; the candidate block combination consists of multiple capability blocks with complementary capabilities, which together cover the minimum requirements of the algorithm capability profile; The step of performing a cross-regional combination search on the candidate capability block set to construct a candidate block combination that satisfies the algorithm's capability profile includes: Using the capability dimension as a constraint target, the candidate capability blocks are combined to jointly cover the minimum requirements of the algorithm capability profile, resulting in a set-coverage candidate block combination. Alternatively, to address the changing capability requirements at different execution stages of the algorithm, different subsets of candidate capability blocks can be selected to form a staged virtual processor, resulting in a staged candidate block combination. Alternatively, for different capability dimensions, candidate capability blocks that meet the requirements are selected separately, and the combinations are checked for consistency to obtain a combination of candidate blocks based on capability dimensions. Alternatively, candidate combinations can be expanded progressively based on a key dimension priority strategy, and coverage and feasibility checks can be performed on the candidate combinations after each expansion. Candidate combinations that pass the checks can be used as progressively expanded candidate block combinations.

6. The method according to claim 5, characterized in that, The step of evaluating the cost of each candidate block combination and calculating the combination cost includes: Cost evaluation is performed on each of the candidate block combinations. The cost evaluation includes at least one of the following: cross-regional communication cost, cross-regional routing or reordering cost, mapping and compilation complexity cost, serialization cost caused by parallel conflicts, read throughput cost, control resource consumption cost, and reliability loss cost. Output interpretable cost decomposition results, which are used to explain the selection of target block combinations.

7. The method according to claim 6, characterized in that, The step of selecting a target block combination based on the combined cost and constructing a virtual processor description object includes: Based on the combined cost, a target block combination is selected from the candidate block combinations, and a virtual processor description object is constructed. The virtual processor description object includes at least the selected capability block identifier set, the connection relationship between blocks, the effective resource subset within the block, the mapping result from the algorithm task to the block, the execution stage division information, and the interface parameters for the execution layer. The interface parameters include the job input format, control instruction entry, status feedback channel, result data channel, and error feedback specification.

8. The method according to claim 3, characterized in that, The method further includes: The algorithm capability profile is matched with the block capability profile by jointly determining the key dimension constraints and non-key dimension constraints. The process of matching the algorithm capability profile with the block capability profile through joint determination of key dimension constraints and non-key dimension constraints includes: When any key dimension of the block capability profile does not meet the minimum requirements of the algorithm capability profile, the corresponding candidate capability block is determined not to be covered and is removed. When the block capability profile is insufficient in only non-critical dimensions, the corresponding candidate capability blocks are marked as conditional coverage, and are processed in conjunction with compensation costs or risk penalties during the feasibility determination or cost assessment stage.

9. The method according to claim 5, characterized in that, The cross-regional combined search also includes a combined consistency check, which includes: determining whether the candidate blocks meet the preset connectivity and reachability conditions. Alternatively, determine whether there is resource overlap between candidate blocks leading to conflicting resource usage; Alternatively, determine whether the collaborative execution of candidate blocks meets the preset timing window or synchronization constraints; Alternatively, determine whether the number of interactions between candidate blocks or the number of cross-block connections does not exceed a preset threshold.

10. The method according to claim 1, characterized in that, The interface parameters in the virtual processor description object include: The job input format defines the encapsulation structure and transmission protocol for algorithm task data. The control instruction entry point specifies the interface address and invocation method for the execution layer to call control instructions; Status feedback channel defines the feedback path and format of status information during execution; The results data channel defines the output format and transmission method of measurement and calculation results; Error feedback specifications define error codes, error levels, and exception handling procedures.

11. The method according to claim 1, characterized in that, After outputting the virtual processor description object to the execution layer to execute the quantum algorithm task, the method further includes: The virtual processor description object is associated with and archived with the task execution results, running logs and cost evaluation results to establish a task scheduling file; Based on the task scheduling archive, task reproduction, scheduling auditing, and subsequent optimization are performed. The subsequent optimization includes cost model updates, mapping rule adjustments, and strategy parameter optimization.

12. A neutral atom quantum processor virtualization scheduling device based on capability blocks, characterized in that, include: The task access and feature extraction module is used to receive quantum algorithm tasks, convert the quantum algorithm tasks into standardized task description objects, parse the standardized task description objects, and extract a set of structural features related to hardware execution. The algorithm capability profile generation module is used to convert the set of structural features into an algorithm capability profile based on preset feature and capability mapping rules. The step of converting the structural feature set into an algorithm capability profile based on preset feature and capability mapping rules includes: mapping the structural feature set into an algorithm capability profile based on preset feature and capability mapping rules. The algorithm capability profile is a multi-dimensional capability vector or a multi-dimensional capability range, used to describe the minimum requirements and acceptable range of the algorithm for multi-dimensional capabilities. The multi-dimensional capabilities include at least one of atomic capacity capability, connectivity or coupling capability, gate depth or evolution capability, rearrangement and routing capability, timing and synchronization capability, control and calibration capability, measurement and readout capability, and cross-regional communication and data backhaul capability. The capability block resource pool module is used to obtain the capability block resource pool, which includes multiple capability blocks and the block capability profile corresponding to each capability block. The capability block is a resource unit abstracted from schedulable execution capabilities. The matching and filtering module is used to perform capability matching between the algorithm capability profile and the block capability profile, and to determine the coverage relationship between the block capability profile and the algorithm capability profile. The matching and filtering module is further configured to determine candidate capability blocks that pass the capability matching based on the coverage relationship, and to make a feasibility judgment on the candidate capability blocks to obtain a set of candidate capability blocks. The combined search module is used to perform cross-regional combined search on the candidate capability block set to construct a combination of candidate blocks that satisfies the algorithm capability profile; The cost evaluation module is used to evaluate the cost of each candidate block combination and calculate the combination cost. The virtual processor construction module is used to select a target block combination based on the combined cost, construct a virtual processor description object, and output the virtual processor description object to the execution layer to execute the quantum algorithm task.

13. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the capability block-based neutral atom quantum processor virtualization scheduling method as described in any one of claims 1 to 11.

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