Working point locking method of modulator, communication test method, equipment and medium

Abstract

The embodiment of the invention provides a working point locking method and device of a modulator, a medium and a program product, and the method comprises the steps: responding to the starting of the modulator, and executing a first working point locking operation, the first working point locking operation is used for controlling an I-path working point and a Q-path working point of the modulator to be locked to a 180-degree phase point, and controlling a Phase-path working point of the modulator to be locked to a 0-degree phase point; in response to the situation that the I-path working point and the Q-path working point are locked to the 180-degree phase point and the Phase-path working point is locked to the 0-degree phase point, a second working point locking operation is executed, the second working point locking operation is used for controlling the Phase-path working point to be locked to the 90-degree phase point and controlling the I-path working point and the Q-path working point to be locked to the 180-degree phase point, under the condition that the working point of the Phase path is locked to the 0-degree phase point and the working point of the I path and the working point of the Q path are locked to the 180-degree phase point, the working point of the working loop is locked.

Description

Technical Field

[0001] This application relates to the field of optical communication technology, and in particular to a modulator operating point locking method, communication testing method, device and medium. Background Technology

[0002] In optical communication systems, IQ modulators such as Mach-Zehnder modulators (MZMs) are key components for achieving high-performance optical modulation. To ensure modulation quality, their bias voltages need to be precisely controlled at specific operating points, such as the extinction point (180° phase point) of the I / Q path and the intersection point (90° phase point) of the phase path.

[0003] Among related technologies, the low-frequency disturbance signal synchronization detection method (Dither method) is a commonly used operating point locking technique. However, during the operating point locking process of the Dither method, when the actual operating point of the modulator deviates too much from the starting operating point of the loop, the phase superposition of the Phase path and the I / Q path may cause abnormal extinction of the I and Q paths, causing the loop to lock to an abnormal point and unable to break out on its own, forming a stable erroneous locking state, which in turn reduces the reliability of the IQ modulator. Summary of the Invention

[0004] This application provides a modulator operating point locking method, communication testing method, device, and medium, which can avoid abnormal extinction caused by phase superposition of the Phase path and I / Q path, thereby improving the reliability of the IQ modulator.

[0005] In a first aspect, embodiments of this application provide a modulator operating point locking method, including: In response to the modulation being turned on, a first operating point locking operation is performed, which controls the I-channel and Q-channel operating points of the modulation to be locked to a 180° phase point, and the Phase-channel operating point of the modulation to be locked to a 0° phase point. In response to the I-path operating point and the Q-path operating point being locked to a 180° phase point, and the Phase-path operating point being locked to a 0° phase point, a second operating point locking operation is performed. This second operating point locking operation controls the Phase-path operating point to be locked to a 90° phase point, while the I-path operating point and the Q-path operating point remain locked to a 180° phase point. Specifically, the working point locking of the working loop is completed when the Phase path working point is locked to 0° and the I path working point and the Q path working point are locked to 180°.

[0006] Secondly, embodiments of this application provide an electronic device, including: One or more processors; A memory that stores one or more programs, which, when executed by one or more processors, enable the processors to perform actions such as: The modulator operating point locking method described in the first aspect.

[0007] Thirdly, embodiments of this application provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the following: The modulator operating point locking method described in the first aspect.

[0008] Fourthly, embodiments of this application provide a computer program product, including a computer program, which, when executed by a processor, implements, as follows: The modulator operating point locking method described in the first aspect.

[0009] In this embodiment, during the modulator's operating point locking process, the first operating point locking operation eliminates the phase superposition effect between the Phase path and the I / Q path by locking the Phase path to the 0° phase point (maximum light output point) instead of the 90° quadrature point (0° phase superposition does not change the phase relationship of the I / Q path). This decouples the independent locking process of the I / Q path, ensuring that even if the modulator's actual operating point deviates significantly from the loop's initial operating point, the I / Q path can converge to the true 180° extinction point without Phase path phase interference, thus avoiding abnormal extinction caused by phase superposition. The second operating point locking operation, based on the I / Q path already being stable at the true extinction point, adjusts the Phase path to the 90° quadrature point. At this point, the I / Q path phase relationship is determined and will not deviate from the actual operating point due to Phase path adjustment, ultimately ensuring that the system is stably locked in the correct quadrature operating state, thereby improving the reliability of the IQ modulator. Attached Figure Description

[0010] Figure 1 A schematic diagram of the system architecture of an embodiment of the optical communication system provided in this application; Figure 2 A schematic flowchart illustrating an embodiment of the modulator operating point locking method provided in this application; Figure 3 A schematic diagram of the modulation curve between output optical power and bias voltage in the implementation of the modulator operating point locking method provided in this application; Figure 4 A schematic diagram of the structure of an embodiment of the electronic device provided in this application. Detailed Implementation

[0011] To enable those skilled in the art to better understand the technical solutions of this application, the technical solutions provided in this application will be described in detail below with reference to the accompanying drawings.

[0012] Exemplary embodiments will be described more fully below with reference to the accompanying drawings; however, the described exemplary embodiments may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this application will be thorough and complete, and will enable those skilled in the art to fully understand the scope of this application.

[0013] As used herein, the term “and / or” includes any and all combinations of one or more related enumerated entries.

[0014] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application. As used herein, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that when the terms “comprising” and / or “made of” are used in this specification, the presence of a feature, integral, step, operation, element, and / or component is specified, but the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof is not excluded.

[0015] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0016] Unless otherwise specified, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this application, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined in the embodiments of this application.

[0017] Among related technologies, the low-frequency disturbance signal synchronous detection method (Dither method) is a commonly used operating point locking technique. This method generates an error signal by superimposing a small low-frequency disturbance signal (Dither signal) onto the bias voltage and simultaneously demodulating the output optical power, thereby adjusting the bias voltage. Although this method has strong noise immunity and fast response speed, it has a significant drawback: when the actual operating point of the modulator deviates too much from the loop's initial operating point, the phase superposition of the Phase path and the I / Q path may cause abnormal extinction of the I and Q paths, causing the loop to lock to an abnormal point and unable to break out on its own, forming a stable error-locked state, which in turn reduces the reliability of the IQ modulator.

[0018] To address the aforementioned technical problems, embodiments of this application provide a system architecture for an optical communication system, such as... Figure 1 As shown, the optical communication system includes an application-specific integrated circuit (ASIC), a laser, an optical modulation and transceiver assembly, and an operating point locking assembly.

[0019] The digital signal processing unit is used to process the data to be transmitted digitally, and then convert it into an analog signal using a high-speed digital-to-analog converter (DAC) to obtain a radio frequency signal and output it to the optical modulation transceiver component; and to receive the electrical signal after photoelectric conversion and amplification by the optical modulation transceiver component, and extract the phase, frequency and data information in the signal through a coherent demodulation algorithm to recover the original transmitted data.

[0020] Lasers serve as the light source for a system, outputting continuous wave (CW) optical signals with stable wavelength and constant power. In optical communication systems, distributed feedback lasers (DFBs) or emitter-coupled logic (ECLs) are commonly used, and their output optical power and wavelength stability directly affect the quality of subsequent modulation.

[0021] Optical modulation transceiver components include modulators, drivers, thermistors, mixers, high-speed photodiodes (PDs), and trans-impedance amplifiers (TIAs), among which: The driver amplifies the input RF signal to the half-wave voltage level required by the modulator, while simultaneously superimposing the high-speed data signal with a low-frequency bias voltage (including the dither signal) to form a complete drive signal for precise control of the modulator electrodes. The modulator includes working loops such as I-path (in-phase), Q-path (quadrature), and Phase-path (phase path). It is used to convert the electrical signal output by the driver into the phase modulation of the optical signal based on the electro-optic effect. The quadrature components are modulated by the I-path and Q-path respectively, and after being combined by the Phase-path to control the 90° phase difference, a coherent modulated optical signal is generated and output to the optical fiber.

[0022] The thermistor is integrated near the modulator waveguide and uses the Joule heating effect to change the waveguide temperature and refractive index, adjusting the optical path difference to control the operating point phase. During the operating point locking process, it receives the DAC voltage and fine-tunes the bias to lock the I / Q path to the 180° extinction point and the Phase path to the 90° quadrature point.

[0023] The mixer is a receiver-side device that is in standby mode during the modulation process at the transmitter. It is used to perform 90° optical mixing between the received optical signal and the local oscillator light to achieve phase diversity reception and output two baseband optical signals (I and Q) for subsequent photoelectric conversion and ASIC demodulation.

[0024] High-speed photodiodes are receiver-side devices and do not operate during the modulation process at the transmitter. They are used to convert the optical signal output from the mixer into a photocurrent, which is then amplified by the receiver TIA and sampled by the high-speed analog-to-digital converter (ADC) in the ASIC to convert the optical signal into an electrical signal. The signal is then input into the ASIC for digital coherent demodulation.

[0025] The operating point locking component includes a monitor photodiode (MPD), a transmitter TIA, and a control module, wherein: MPD is used to detect the output optical power of the modulator in real time, converting changes in light intensity into photocurrent signals, and providing raw feedback data for operating point locking. The transmitting TIA is used to receive the photocurrent of the monitoring photodiode, convert it into a voltage signal and amplify it with low noise, and output a stable signal for subsequent acquisition and processing. The control module can be a processor or a field-programmable gate array (FPGA) for executing the modulator operating point locking method in the embodiments of this application, including: in response to the opening of the modulator's operating loop, performing a first operating point locking operation, the first operating point locking operation being used to control the I-path operating point and Q-path operating point of the modulator to lock to a 180° phase point, and the Phase-path operating point of the modulator to lock to a 0° phase point; in response to the I-path operating point and Q-path operating point being locked to a 180° phase point, and the Phase-path operating point being locked to a 0° phase point, performing a second operating point locking operation, the second operating point locking operation being used to control the Phase-path operating point to lock to a 90° phase point, and the I-path operating point and Q-path operating point to remain locked to a 180° phase point, wherein, when the Phase-path operating point is locked to a 0° phase point and the I-path operating point and Q-path operating point are locked to a 180° phase point, the operating point locking of the operating loop is completed.

[0026] In the system architecture of the optical communication system provided in this application, during the modulator's operating point locking process, the first operating point locking operation eliminates the phase superposition effect between the Phase path and the I / Q path by locking the Phase path to the 0° phase point (maximum output point) instead of the 90° quadrature point (0° phase superposition does not change the phase relationship of the I / Q path). This decouples the independent locking process of the I / Q path, so that even if the actual operating point of the modulator deviates too much from the loop's initial operating point, the I / Q path can converge to the true 180° extinction point without being disturbed by the Phase path phase, avoiding abnormal extinction caused by phase superposition. The second operating point locking operation, based on the I / Q path being stable at the true extinction point, adjusts the Phase path to the 90° quadrature point. At this time, the phase relationship of the I / Q path is determined and will not deviate from the actual operating point due to the Phase path adjustment, ultimately ensuring that the system is stably locked in the correct quadrature operating state, thereby improving the reliability of the IQ modulator.

[0027] Based on the aforementioned optical communication system, this application also provides a method for modulator operating point locking. For example... Figure 2 As shown, the modulator's operating point locking method includes the following steps S201 to S202.

[0028] Step S201: In response to the modulator being turned on, a first operating point locking operation is performed. The first operating point locking operation is used to control the I-channel operating point and Q-channel operating point of the modulator to be locked to the 180° phase point, and the Phase-channel operating point of the modulator to be locked to the 0° phase point.

[0029] The first working point locking operation described above can also be called the first stage locking or pre-locking stage.

[0030] The aforementioned 180° phase point refers to the minimum light output point of the I-path or Q-path transmission curve (i.e., as shown in the image). Figure 3 The null point shown above is the extinction point; the 0° phase point mentioned above refers to the maximum light output point of the Phase path transmission curve (i.e., as shown in the figure). Figure 3 Peak point shown).

[0031] At this stage, by locking the Phase path to the 0° phase point (instead of the final 90° orthogonal point), phase superposition between the Phase path and the I and Q paths can be avoided, thereby decoupling the locking process of the I and Q paths, preventing abnormal extinction caused by phase superposition, and ensuring that the I and Q paths can be locked to the true 180° phase point.

[0032] It should be noted that the first operating point locking operation described above can be implemented based on any method capable of operating point locking. Specifically, the first operating point locking operation can be implemented based on at least one of the following: power locking method, low-frequency disturbance signal synchronous detection method, pilot tone method (PTM), and eye diagram monitoring method (EDM).

[0033] For example, the specific process of the first operating point locking operation can be to scan the phase path bias voltage and lock the optical power to the maximum value (corresponding to the 0° phase point); at the same time, scan the I / Q path bias voltage and lock the optical power to the minimum value (corresponding to the 180° phase point, the extinction point). This is the first operating point locking operation based on the power locking method.

[0034] Step S202: In response to the I-path operating point and Q-path operating point being locked to the 180° phase point and the Phase-path operating point being locked to the 0° phase point, a second operating point locking operation is performed. The second operating point locking operation is used to control the Phase-path operating point to be locked to the 90° phase point, while the I-path operating point and Q-path operating point remain locked to the 180° phase point. When the Phase-path operating point is locked to the 0° phase point and the I-path operating point and Q-path operating point are locked to the 180° phase point, the operating point locking of the working loop is completed.

[0035] The aforementioned second working point locking operation can also be referred to as the second-stage locking or the final locking stage.

[0036] The aforementioned 90° phase point refers to the orthogonal point of the Phase path transmission curve (i.e., as shown in the image). Figure 3 (Quad point shown).

[0037] After completing the first stage of pre-locking, the I and Q paths have stabilized at the true extinction point. At this point, the Phase path is adjusted from the 0° phase point to the 90° phase point, while keeping the I and Q paths locked at the 180° phase point, thus completing the final operating point lock.

[0038] Specifically, when the Phase path operating point is locked to 0° and the I and Q path operating points are locked to 180°, the operating point locking of the operating loop is complete. This state indicates that the first stage of locking is complete, and the system is in a pre-locked stable state, laying the foundation for the final locking in the second stage.

[0039] It should be noted that the above-mentioned second operating point locking operation can be implemented based on any method capable of operating point locking. Specifically, the second operating point locking operation can be implemented based on at least one of the following: power locking method, low-frequency disturbance signal synchronous detection method, pilot tone method, and eye diagram monitoring method.

[0040] For example, the specific process of the second operating point locking operation can be to keep the I / Q path at the minimum power point and adjust the Phase path to the power median point (corresponding to the 90° phase point, orthogonal point). In this case, the second operating point locking operation is implemented based on the power lock method.

[0041] In this embodiment, during the modulator's operating point locking process, the first operating point locking operation eliminates the phase superposition effect between the Phase path and the I / Q path by locking the Phase path to the 0° phase point (maximum light output point) instead of the 90° quadrature point (0° phase superposition does not change the phase relationship of the I / Q path). This decouples the independent locking process of the I / Q path, ensuring that even if the modulator's actual operating point deviates significantly from the loop's initial operating point, the I / Q path can converge to the true 180° extinction point without Phase path phase interference, thus avoiding abnormal extinction caused by phase superposition. The second operating point locking operation, based on the I / Q path already being stable at the true extinction point, adjusts the Phase path to the 90° quadrature point. At this point, the I / Q path phase relationship is determined and will not deviate from the actual operating point due to Phase path adjustment, ultimately ensuring that the system is stably locked in the correct quadrature operating state, thereby improving the reliability of the IQ modulator.

[0042] In some embodiments, the first operating speed is greater than the second operating speed, the first operating speed being the speed at which the working points of each working loop converge to the corresponding reference working point in the first working point locking operation; the second operating speed being the speed at which the working points of each working loop converge to the corresponding reference working point in the second working point locking operation.

[0043] In this embodiment, by setting the first operating speed to be greater than the second operating speed, that is, in the first working point locking operation, using a faster operating speed is beneficial to quickly escape from the possible abnormal locking area, thereby improving the locking efficiency; while in the second working point locking operation, using a slower operating speed is beneficial to improve the locking accuracy, thereby helping to ensure system stability.

[0044] The aforementioned first operating speed refers to the speed at which the working points of each working loop converge to the corresponding reference working point during the first working point locking operation. Specifically, it refers to the speed at which the working points of the I / Q path converge to the null point (i.e., the corresponding reference working point of the I / Q path) and the working points of the Phase path converge to the peak point (i.e., the corresponding reference working point of the Phase path) during the first working point locking operation.

[0045] The aforementioned second operating speed refers to the speed at which the operating points of each working loop converge to the corresponding reference operating point during the second operating point locking operation. Specifically, it refers to the speed at which the operating points of the I / Q paths converge to the null point (i.e., the corresponding reference operating point of the I / Q paths) and the operating points of the Phase path converge to the quad point (i.e., the corresponding reference operating point of the Phase path) during the second operating point locking operation.

[0046] The aforementioned convergence refers to the dynamic process by which the working loop, through feedback adjustment, gradually approaches and stabilizes the current working point from its initial state to the corresponding reference working point.

[0047] In some embodiments, the loop control parameters configured in the working loop during the first working point locking operation are greater than the loop control parameters configured in the working loop during the second working point locking operation. The loop control parameters include at least one of the adjustment step size and the Dither signal amplitude.

[0048] In this embodiment, the different operating speeds between the first operating point locking operation and the second operating point locking operation can be achieved by configuring the loop control parameters in the first operating point locking operation and the second operating point locking operation.

[0049] The aforementioned adjustment step size refers to the amount of voltage change in each adjustment of the bias voltage. A larger adjustment step size is beneficial for rapid convergence, while a smaller adjustment step size is beneficial for fine adjustment and stable maintenance.

[0050] For example, the adjustment step size in the first operating point locking operation could be 50mV / time, while the adjustment step size in the first operating point locking operation could be 10mV / time, etc.

[0051] The Dither signal amplitude mentioned above refers to the amplitude of the low-frequency disturbance signal superimposed on the bias voltage. A larger adjustment step size is beneficial for rapid convergence, while a smaller adjustment step size is beneficial for fine adjustment and stable maintenance.

[0052] For example, the adjustment step size in the first operating point locking operation could be 200mV, while the adjustment step size in the first operating point locking operation could be 40mV, etc.

[0053] In some embodiments, performing the first working point locking operation includes: When a low-frequency disturbance signal is added to the bias voltage corresponding to the target branch, the deviation value of the target branch is determined based on the output optical power of the target branch. The deviation value is used to characterize the deviation between the operating point of the target branch and the reference operating point. The target branch is any one of the I-path, Q-path and Phase-path of the regulator. Based on the deviation value of the target branch, adjust the bias voltage value corresponding to the target branch until the deviation value of the target branch is 0, where: When the target branch is I and the deviation value is 0, the operating point of I is locked to the 180° phase point; when the target branch is Q and the deviation value is 0, the operating point of Q is locked to the 180° phase point; when the target branch is Phase and the deviation value is 0, the operating point of Phase is locked to the 0° phase point.

[0054] In this embodiment, by independently applying low-frequency disturbance signals to each branch (I-path, Q-path, and Phase-path) and synchronously demodulating the output optical power, the deviation between the operating point of each branch and the corresponding reference operating point (180° for I / Q-path and 0° for Phase-path) can be accurately quantified, and the bias voltage can be adjusted until the deviation is zero. This process ensures that in the first operating point locking operation, each branch can converge to its corresponding reference operating point independently and without interference. In particular, the Phase-path is forced to lock at the 0° phase point, thereby physically decoupling its phase from the I / Q-path and eliminating the conditions for the generation of abnormal extinction points from the root, laying a stable and accurate foundation for the second operating point locking operation.

[0055] The aforementioned low-frequency disturbance signal can also be called a Dither signal, which refers to a periodic signal (such as a sine wave) of a specific frequency (such as 1 kHz) superimposed on the bias voltage.

[0056] The aforementioned output optical power can be detected by an MPD and converted into a voltage signal by a transimpedance amplifier, and then acquired by an ADC.

[0057] The aforementioned error value can be obtained by performing digital signal processing such as filtering, mixing, and integration on the acquired signal. It is used to characterize the degree of deviation between the current operating point of the branch and the corresponding reference operating point (0° or 180° phase point). When the error value is 0, it indicates that the operating point has been accurately locked to the target phase point.

[0058] In the case that the first operating point locking operation described above is achieved by independently applying low-frequency disturbance signals to each branch and synchronously demodulating the output optical power, and locking the operating points of the I-path, Q-path and Phase-path to the corresponding reference operating points according to the deviation value, the second operating point locking operation described above can also be implemented by referring to this process, which will not be elaborated here.

[0059] It should be noted that in the above-mentioned first operating point locking operation, a low-frequency disturbance signal may be added to the bias voltage corresponding to the target branch when the modulator is turned on and the modulator is input with an RF signal.

[0060] In some embodiments, when a low-frequency disturbance signal of a preset frequency is added to the bias voltage corresponding to the target branch, before determining the deviation value of the target branch based on the output optical power of the target branch, the method further includes: When the modulator is turned on and no radio frequency signal is input to the modulator, a low-frequency disturbance signal is added to the bias voltage corresponding to the target branch.

[0061] In this embodiment, when the working loop is open and there is no RF signal input, a preset frequency perturbation signal is superimposed on the bias voltage of the target branch to avoid phase jitter interference caused by the RF signal. This makes the correlation between the low-frequency perturbation signal and the output optical power purer, and the deviation value calculation more accurate. This ensures more reliable decoupling and locking of the I / Q path and Phase path in the first operating point locking operation, avoiding abnormal locking from the source and laying a stable foundation for accurate locking in the second operating point locking operation, while retaining the advantages of noise immunity and fast response.

[0062] In some implementations, the above-mentioned second working point locking operation includes: Under the condition that the I-path operating point and the Q-path operating point are kept locked at the 180° phase point, and the demodulation reference signal of the Phase path is the target sum-frequency signal, the deviation value of the Phase path is determined based on the output optical power of the Phase path, wherein the target sum-frequency signal is the sum-frequency signal of the I-path and the Q-path. Based on the deviation value of the Phase path, adjust the corresponding bias voltage value of the Phase path until the deviation value of the Phase path is 0. Specifically, when the deviation value of the Phase path is 0, the operating point of the Phase path is locked at the 0° phase point.

[0063] In this embodiment, by switching the demodulation reference signal of the Phase path to the sum-frequency signal of the I and Q paths, the zero point of the Phase path error signal is precisely moved from the 0° phase point to the required 90° (and 270°) quadrature point. Simultaneously, this sum-frequency signal differs significantly from the perturbation frequencies of the I and Q paths, effectively suppressing crosstalk between the I and Q path signals and the Phase path detection. While ensuring that the I / Q path locking state remains unaffected, independent and precise convergence of the Phase path to the quadrature point is achieved, ultimately completing the optimal operating point locking of the entire modulator.

[0064] The above-mentioned control of keeping the I-path and Q-path operating points locked at the 180° phase point can be achieved by independently applying low-frequency disturbance signals to each branch and synchronously demodulating the output optical power, and by locking the I-path and Q-path operating points to the 180° phase point according to the deviation value.

[0065] The aforementioned sum-frequency signal refers to a new reference signal with a frequency equal to the sum of the two low-frequency disturbance signals applied to the I and Q paths. This signal is used to synchronously demodulate the output optical power of the Phase path, and its error zero point corresponds to the 90° phase point.

[0066] The aforementioned demodulation reference signal refers to the reference standard used for synchronous demodulation error signals. In the second operating point locking operation, the Phase path uses the sum-frequency signals of the I and Q paths as the demodulation reference signal. At this time, the 0 point of the calculated deviation value corresponds to the 90° phase point (orthogonality point). By continuously adjusting the bias voltage of the Phase path, the deviation value is converged to 0, thus precisely locking the Phase path to the 90° phase point. At the same time, the I and Q paths are kept locked at the 180° phase point through their respective feedback controls.

[0067] In some embodiments, after performing the second operating point locking operation in response to the I-path operating point and the Q-path operating point being locked to the 180° phase point and the Phase-path operating point being locked to the 0° phase point, the method further includes: If the second working point locking operation is completed, the second working point locking operation will be re-executed in response to the triggering of preset conditions.

[0068] In this embodiment, after the second operating point is locked, a preset condition is met to re-execute the second operating point locking operation, thereby achieving continuous tracking and fine-tuning of the operating point. In this way, operating point drift caused by factors such as temperature and wavelength can be dynamically addressed, ensuring that the modulator is stably locked in the optimal operating state for a long time, avoiding the degradation of modulation quality caused by drift, and improving the long-term reliability of the system.

[0069] The aforementioned preset conditions can be any pre-configured condition used to trigger the re-execution of the second working point locking operation, such as timer timeout or temperature change.

[0070] To facilitate understanding of the modulator operating point locking method of this application, a description of the modulator operating point locking method of the embodiments of this application in a practical application process is provided below: Step 1: Build an automatic control system for the bias voltage of the IQ modulator based on MPD (i.e., an optical communication system).

[0071] Step 2: Power on all components in the system, turn on the laser light source and inject it into the input port of the IQ modulator, connect the output port of the IQ modulator to the spectrometer, and observe the spectrum of the output light signal.

[0072] Step 3: Start locking the first stage and set parameters such as loop adjustment step size and dither signal amplitude. In this step, these parameters can be set relatively larger to facilitate rapid adjustment of the control loop.

[0073] Step 4: Turn off the RF signal output to prevent phase jitter caused by it from affecting the loop convergence.

[0074] Step 5: Open the IQ modulator operating loop and begin the second stage of locking (i.e., the first operating point locking operation). Apply a 1kHz sinusoidal dither signal to the heater resistors of the I, Q, and Phase paths in a time-division manner. The IPM acquisition module's ADC reads the voltage value converted from the IPM photocurrent by the TIA circuit in real time. After digital filtering and digital mixing filtering, the ADC value is integrated to obtain a digital quantity called "error." The error value is 0 at the 0° and 180° phase points (which can be derived from the IQ modulator's transfer function).

[0075] Step 6: Adjust the DAC values ​​applied to the heater resistors for the I, Q, and Phase paths according to the error value so that the I and Q paths are locked at the 180° phase point and the Phase path is locked at the 0° phase point.

[0076] Step 7: Begin locking the second stage (i.e., the second operating point locking operation), adjusting parameters such as the loop adjustment step size and the Dither signal amplitude. In this step, these parameters can be set relatively small to facilitate loop stability control.

[0077] Step 8: Turn on the radio frequency signal output to put the system into normal working condition.

[0078] Step 9: The processing of the I and Q paths follows the same method as in Step 5, keeping the I and Q paths locked at the 180° phase point. The Phase path uses the sum-frequency signal of the I and Q paths. At this time, the zero point of the error value is at the 90° and 270° phase points (which can be derived from the transfer function of the IQ modulator).

[0079] Step 10: Adjust the DAC values ​​applied to the heater resistors for the I, Q, and Phase paths according to the error value so that the I and Q paths are locked at the 180° phase point and the Phase path is locked at the 90° phase point.

[0080] Step 11: Repeatedly executing steps 9 and 10 over a long period of time can keep the modulator at the operating point for an extended period of time.

[0081] Please see Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, such as... Figure 4 As shown, the electronic device 400 includes: One or more processors 410; The memory 420 stores one or more programs that, when executed by one or more processors 410, cause the one or more processors 410 to implement the modulator operating point locking method described in any of the above embodiments.

[0082] Memory 420, as a non-transitory network system, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory 420 may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory 420 may optionally include remotely located memories 420 relative to processor 410, which can be connected to processor 410 via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0083] The memory 420 can be implemented as a read-only memory (ROM), static storage device, dynamic storage device, or random access memory (RAM). The memory 420 can store the operating system and other applications. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 420 and is invoked by the processor 410 to execute the modulator operating point locking method of the embodiments of this application.

[0084] The processor 410 can be implemented using a general-purpose central processing unit (CPU), microprocessor, application-specific integrated circuit (ASIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of this application.

[0085] In some embodiments, the electronic device further includes: Input / output interfaces are used to implement information input and output; The communication interface is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, Ethernet cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). The bus transmits information between various components of the device (e.g., processor 410, memory 420, input / output interface, and communication interface); The processor 410, memory 420, input / output interface, and communication interface can communicate with each other within the device via a bus.

[0086] An embodiment of this application also provides a computer-readable storage medium storing computer-executable instructions for performing the modulator operating point locking method described in any of the above embodiments.

[0087] An embodiment of this application also provides a computer program product, including a computer program or computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer program or computer instructions from the computer-readable storage medium and executes the computer program or computer instructions, causing the computer device to perform a modulator operating point locking method as described in any of the above embodiments.

[0088] The system architecture and application scenarios described in this application are intended to more clearly illustrate the technical solutions of this application and do not constitute a limitation on the technical solutions provided in this application. Those skilled in the art will understand that as system architectures evolve and new application scenarios emerge, the technical solutions provided in this application are also applicable to similar technical problems.

[0089] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0090] It will be understood by those skilled in the art that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0091] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0092] The above description, with reference to the accompanying drawings, illustrates some embodiments of this application, but does not limit the scope of the invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and spirit of this invention should be considered within the scope of this application.

Claims

1. A method for locking the operating point of a modulator, comprising: In response to the modulation being turned on, a first operating point locking operation is performed, which controls the I-channel and Q-channel operating points of the modulation to be locked to a 180° phase point, and the Phase-channel operating point of the modulation to be locked to a 0° phase point. In response to the I-path operating point and the Q-path operating point being locked to a 180° phase point and the Phase-path operating point being locked to a 0° phase point, a second operating point locking operation is performed. The second operating point locking operation is used to control the Phase-path operating point to be locked to a 90° phase point, while the I-path operating point and the Q-path operating point remain locked to a 180° phase point. Specifically, the working point locking of the working loop is completed when the Phase path working point is locked to 0° and the I path working point and the Q path working point are locked to 180°.

2. The method according to claim 1, characterized in that, The first operating speed is greater than the second operating speed. The first operating speed is the speed at which the working points of each working loop converge to the corresponding reference working point in the first working point locking operation. The second operating speed is the speed at which the working points of each working loop converge to the corresponding reference working point in the second working point locking operation.

3. The method according to claim 2, characterized in that, The loop control parameters configured in the working loop during the first working point locking operation are greater than the loop control parameters configured in the working loop during the second working point locking operation. The loop control parameters include at least one of the adjustment step size and the Dither signal amplitude.

4. The method according to claim 1, characterized in that, The execution of the first working point locking operation includes: When a low-frequency disturbance signal is added to the bias voltage corresponding to the target branch, the deviation value of the target branch is determined based on the output optical power of the target branch. The deviation value is used to characterize the deviation between the operating point of the target branch and the reference operating point. The target branch is any one of the I-path, Q-path and Phase-path of the regulator. Based on the deviation value of the target branch, adjust the bias voltage value corresponding to the target branch until the deviation value of the target branch is 0, wherein: When the target branch is I-path and the deviation value is 0, the operating point of I-path is locked to the 180° phase point; when the target branch is Q-path and the deviation value is 0, the operating point of Q-path is locked to the 180° phase point; when the target branch is Phase-path and the deviation value is 0, the operating point of Phase-path is locked to the 0° phase point.

5. The method according to claim 4, characterized in that, Before determining the deviation value of the target branch based on the output optical power of the target branch when a low-frequency disturbance signal of a preset frequency is added to the bias voltage corresponding to the target branch, the method further includes: When the modulator is turned on and no radio frequency signal is input to the modulator, the low-frequency disturbance signal is added to the bias voltage corresponding to the target branch.

6. The method according to claim 1, characterized in that, The second working point locking operation includes: Under the condition that the I-channel operating point and the Q-channel operating point are kept locked at the 180° phase point, and the demodulation reference signal of the Phase channel is the target sum-frequency signal, the deviation value of the Phase channel is determined based on the output optical power of the Phase channel, wherein the target sum-frequency signal is the sum-frequency signal of the I-channel and the Q-channel; Based on the deviation value of the Phase path, adjust the bias voltage value corresponding to the Phase path until the deviation value of the Phase path is 0. Specifically, when the deviation value of the Phase path is 0, the operating point of the Phase path is locked to the 0° phase point.

7. The method according to claim 1, characterized in that, After the second operating point locking operation is performed in response to the locking of the I-path operating point and the Q-path operating point to the 180° phase point, and the locking of the Phase-path operating point to the 0° phase point, the method further includes: If the second working point locking operation is completed, the second working point locking operation is re-executed in response to the triggering of a preset condition.

8. An electronic device, comprising: One or more processors; A memory that stores one or more programs, which, when executed by one or more processors, cause the one or more processors to perform the following: The modulator operating point locking method according to any one of claims 1-7.

9. A computer-readable storage medium having a computer program stored thereon, the program being executed by a processor to perform the following: The modulator operating point locking method according to any one of claims 1-7.

10. A computer program product comprising a computer program, which, when executed by a processor, implements, as follows: The modulator operating point locking method according to any one of claims 1-7.

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