Selective motion vector prediction candidates in frames with global motion

Abstract

A decoder includes circuitry configured to: receive a bitstream; constructing a motion vector candidate list for the current block, including adding a single global motion vector candidate to the motion vector candidate list, the single global motion vector candidate being selected based on a global motion model utilized by the current block; and reconstructing pixel data of the current block using the motion vector candidate list. Related apparatus, systems, techniques, and articles are also described.

Description

[0001] Divisional Application This application is a divisional application of the application entitled “SELECTIVE MOTION VECTOR PREDICTION CANDIDATES IN FRAMES WITH GLOBAL MOTION” having an application date of April 24, 2020, application number 202080045959.0. Cross Reference to Related Applications

[0002] This application claims the benefit of priority of U.S. Provisional Patent Application No. 62 / 838,594, filed April 25, 2019, entitled “SELECTIVE MOTION VECTOR PREDICTION CANDIDATES IN FRAMES WITH GLOBAL MOTION,” which is hereby incorporated by reference in its entirety. TECHNICAL FIELD

[0003] The present invention relates generally to the field of video compression. In particular, the present invention is directed to selective motion vector prediction candidates in frames with global motion. BACKGROUND

[0004] A video codec can include electronic circuitry or software that compresses or decompresses digital video. A video codec can convert uncompressed video into compressed format or can convert compressed video into uncompressed format. In the case of video compression, a device that compresses video (and / or performs some function thereof) can generally be referred to as an encoder, and a device that decompresses video (and / or performs some function thereof) can be referred to as a decoder.

[0005] The format of the compressed data can conform to a standard video compression specification. Compression can be lossy, in that the compressed video lacks certain information present in the source video. Consequences that can follow include that the decompressed video can have lower quality than the original uncompressed video, due to insufficient information to accurately reconstruct the original video.

[0006] There can be a complex relationship between video quality, the amount of data used to represent a video (e.g., as determined by bit rate), complexity of the encoding and decoding algorithms, susceptibility to data loss and errors, ease of editing, random access, end-to-end delay (e.g., latency), and the like.

[0007] Motion compensation can include a method that predicts a video frame or a portion of a video frame by taking into account the motion of a camera and / or objects in the video based on a given reference frame, such as a previous frame and / or a future frame. The method can be employed in encoding and decoding video data for video compression, such as in encoding and decoding using the Moving Picture Experts Group (MPEG)-2 (also known as Advanced Video Coding (AVC) and H.264) standard. Motion compensation can describe a picture in terms of a transformation from a reference picture to a current picture. The reference picture can be a picture that temporally precedes the current picture, or a picture that is future compared to the current picture. When an image can be accurately synthesized from a previously transmitted and / or stored image, compression efficiency can be improved. SUMMARY

[0008] In one aspect, a decoder includes circuitry configured to receive a bitstream, construct a motion vector candidate list for a current block, wherein constructing the motion vector candidate list further includes adding a single global motion vector candidate to the motion vector candidate list, the single global motion vector candidate being selected based on a global motion model utilized by the current block, and reconstruct pixel data of the current block using the motion vector candidate list.

[0009] In another aspect, a method includes receiving, by a decoder, a bitstream, constructing a motion vector candidate list for a current block, wherein constructing the motion vector candidate list further includes adding a single global motion vector candidate to the motion vector candidate list, the single global motion vector candidate being selected based on a global motion model utilized by the current block, and reconstructing pixel data of the current block using the motion vector candidate list.

[0010] The details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF DRAWINGS

[0011] For purposes of illustrating the present application, there are shown in the drawings one or more aspects of one or more embodiments of the present application. It should be understood, however, that the application is not limited to the precise arrangements and instrumentalities shown in the drawings, in which: Figure 1 is a diagram illustrating motion vectors of example frames with global and local motion; Figure 2 illustrates three example motion models that can be used for global motion, including index values (0, 1, or 2) for the three example motion models; Figure 3 is a process flow diagram in accordance with some example implementations of the current subject matter; Figure 4 This is a system block diagram of an example decoder based on some example implementations of the current topic; Figure 5 This is a flowchart illustrating the process of implementing some examples based on the current topic; Figure 6 This is a system block diagram of an example encoder based on some example implementations of the current topic; and Figure 7 It is a block diagram of a computing system that can be used to implement any or more of the methods disclosed herein and any one or more of them.

[0012] The accompanying drawings are not necessarily drawn to scale and may be illustrated using dashed lines, diagrams, and partial views. In some cases, details that are not essential for understanding the implementation or that make other details difficult to perceive may have been omitted. The same reference numerals in the various figures denote the same elements. Detailed Implementation

[0013] Global motion in video refers to motion that occurs throughout the entire frame. Global motion may be caused by camera movement; for example, camera panning and zooming create motion within a frame that typically affects the entire frame. Motion present in certain parts of a video can be called local motion. Local motion may be caused by moving objects in the scene—such as moving an object from left to right in the scene. Videos may contain a combination of local and global motion. Some implementations of the current topic provide efficient methods for passing global motion to the decoder and using global motion vectors to improve compression efficiency.

[0014] Figure 1 This is a diagram illustrating the motion vectors of an example frame 100 with global and local motion. Frame 100 may include multiple pixel blocks illustrated as squares and motion vectors associated with the multiple pixel blocks illustrated as arrows. Squares with arrows pointing to the upper left (e.g., pixel blocks) indicate that the motion in these blocks is considered global motion, and squares with arrows pointing in other directions (indicated by 104) indicate that the motion in these blocks is considered local motion. Figure 1In the illustrated examples, many blocks share the same global motion. Global motion is signaled in headers such as Picture Parameter Sets (PPS) or Sequence Parameter Sets (SPS), and using signaled global motion reduces the amount of motion vector information required for blocks and allows for improved prediction. Although the examples described below for illustrative purposes relate to determining and / or applying global or local motion vectors at the block level, global motion vectors can be determined and / or applied to any region of a frame and / or image, including: regions consisting of multiple blocks; regions defined by any geometry, such as, but not limited to, regions defined by geometric and / or exponential coding, where one or more lines and / or curves defining the shape may be angled and / or curved; and / or the entire frame and / or image. Although signaling is described herein as being performed at the frame level and / or within the frame's header and / or parameter set, signaling can alternatively or additionally be performed at the sub-picture level, where a sub-picture may include any region of a frame and / or image as described above.

[0015] As an example, still refer to Figure 1 Simple translational motion can be described using a motion vector (MV) with two components, MVx and MVy, which describes the displacement of blocks and / or pixels in the current frame. More complex motions such as rotation, scaling, and / or warping can be described using affine motion vectors. The "affine motion vector" used in this disclosure describes a uniform displacement of a set of pixels or points in a video picture and / or image, such as the set of pixels illustrated to show an object moving in view of the video during motion but without changing its appearance. Some video encoding and / or decoding methods use four-parameter or six-parameter affine models for motion compensation in inter-frame image coding.

[0016] For example, six-parameter affine motion can be described as: x' = ax + by + c y' = dx + ey + f Four-parameter affine motion can be described as: x' = ax + by + c y' = -bx + ay + f Where (x, y) and (x', y') are the pixel positions in the current image and the reference image, respectively; a, b, c, d, e, and f are the parameters of the affine motion model.

[0017] Continue to refer to Figure 1The parameters used to describe affine motion can be signaled to the decoder for application of affine motion compensation. In some methods, motion parameters can be explicitly signaled or derived from translational control point motion vectors (CPMVs). Affine motion parameters for a four-parameter affine motion model can be derived using two CPMVs, and parameters for a six-parameter motion model can be obtained using three CPMVs. Signaling affine motion parameters using control point motion vectors allows for the use of efficient motion vector encoding methods. In some implementations, but not limited to these, the translational motion model can be indexed by index value 0, the four-parameter affine model by index value 1, and the six-parameter affine model by index value 2.

[0018] In the implementation method, still refer to Figure 1 In PPS and / or SPS, the `sps_affine_enabled_flag` specifies whether affine-based motion compensation can be used for inter-frame prediction. If `sps_affine_enabled_flag` equals 0, the syntax can be constrained so that affine-based motion compensation is not used in the post-coded video sequence (CLVS), and `inter_affine_flag` and `cu_affine_type_flag` are not present in the CLVS coding unit syntax. Otherwise (`sps_affine_enabled_flag` equals 1), affine-based motion compensation can be used in CLVS.

[0019] Further reference Figure 1 The `sps_affine_type_flag` in PPS and / or SPS specifies whether motion compensation based on a six-parameter affine model can be used for inter-frame prediction. If `sps_affine_type_flag` equals 0, the syntax can be constrained so that motion compensation based on a six-parameter affine model is not used in CLVS, and `cu_affine_type_flag` will not exist in the coding unit syntax of CLVS. Otherwise (`sps_affine_type_flag` equals 1), motion compensation based on a six-parameter affine model can be used in CLVS. When it does not exist, it can be inferred that the value of `sps_affine_type_flag` is equal to 0.

[0020] Continue to refer to Figure 1Creating a motion vector prediction candidate list can be a step performed at the decoder in some compression methods that utilize motion compensation. Some previous methods have defined the use of spatial motion vector candidates and temporal motion vector candidates. Global motion, signaled in a header such as SPS or PPS, can indicate the presence of global motion in the video. Such global motion is expected to be common to most blocks in a frame. Motion vector coding can be improved and the bit rate reduced by using global motion as prediction candidates. Candidate MVs added to the MV prediction list can be selected based on the motion model used to represent global motion and the motion model used in inter-frame coding.

[0021] Still refer to Figure 1 There are several implementations that describe global motion using one or more control point motion vectors (CPMVs) depending on the motion model used. Therefore, depending on the motion model, one to three control point motion vectors may be available and can be used as candidates for prediction. In some implementations, all available CPMVs can be added to the list as prediction candidates. Adding all available CPMVs generally increases the likelihood of finding good motion vector predictions and improves compression efficiency.

[0022]

[0023] Continue to refer to Figure 1 Creating a list of motion vector (MV) prediction candidates is a step in motion compensation performed at the decoder. Some existing methods (e.g., previous compression standards) define the use of spatial motion vector candidates and temporal motion vector candidates.

[0024] Continue to refer to Figure 1 Global motion can be signaled in a header such as SPS, indicating the presence of global motion in the video. This global motion is likely to exist in many blocks within a frame. Therefore, a given block is likely to have motion similar to the global motion. Motion vector coding can be improved and the bit rate reduced by using global motion as prediction candidates. Candidate MVs can be added to the MV prediction list, and can be selected based on the motion model used to represent the global motion and the motion model used in inter-frame coding.

[0025] Still refer to Figure 1 Depending on the motion model used, one or more control point motion vectors (CPMVs) can be used to describe the global motion. Therefore, depending on the motion model used, one to three control point motion vectors may be available and can be used as candidates for prediction. The MV prediction candidate list can be reduced by selectively adding a CPMV to the prediction candidate list. Reducing the list size can decrease computational complexity and improve compression efficiency.

[0026] In some implementation methods, further reference is made. Figure 1 The CPMVs selected as candidates can be mapped according to predefined mappings, such as those shown in Table 1 below:

[0027] Selective prediction candidates from global motion can be used by signaling within the image parameter set of the sequence parameter set, thereby reducing encoding and decoding complexity.

[0028] Still refer to Figure 1 Since blocks may have motions similar to the global motion, adding the global motion vector as a first candidate to the prediction list can reduce the number of prediction candidates used in signaling and / or reduce the bits required to encode the motion vector difference. As another non-limiting example, Figure 2 The illustration shows three example motion models 200 that can be used for global motion, including the index values ​​(0, 1, or 2) of the three example motion models.

[0029] Still refer to Figure 2 PPS is used to signal parameters that can change between pictures in a sequence. Parameters that remain the same for a sequence of pictures can be signaled using a sequence parameter set to reduce the size of the PPS and lower the video bitrate. Example picture parameter sets (PPS) are shown in Table 2:

[0030] Additional fields can be added to the PPS to signal global motion. In the case of global motion, the presence of global motion parameters in the image sequence can be signaled in the SPS, and the PPS can reference the SPS via the SPS ID. In some decoding methods, the SPS can be modified to add fields to signal the presence of global motion parameters in the SPS. For example, a single-bit field can be added to the SPS. If the global_motion_present bit is 1, global motion-related parameters can be expected in the PPS. If the global_motion_present bit is 0, global motion parameter-related fields are unlikely to exist in the PPS. For example, the PPS in Table 2 can be expanded to include the global_motion_present field, as shown in Table 3.

[0031] Similarly, PPS may include the pps_global_motion_parameters field for frames, as shown in Table 4, for example:

[0032] More specifically, PPS may include fields that characterize global motion parameters using control point motion vectors, as shown in Table 5, for example:

[0033] As a further non-limiting example, Table 6 below can represent exemplary SPS:

[0034] The SPS table above can be expanded as described above to incorporate global motion presence indicators as shown in Table 7:

[0035] Additional fields can be incorporated into the SPS to reflect additional indicators as described in this disclosure.

[0036] In the implementation method, still refer to Figure 2 In PPS and / or SPS, the `sps_affine_enabled_flag` specifies whether affine-based motion compensation can be used for inter-frame prediction. If `sps_affine_enabled_flag` equals 0, the syntax can be constrained so that affine-based motion compensation is not used in the post-coded video sequence (CLVS), and `inter_affine_flag` and `cu_affine_type_flag` are not present in the CLVS coding unit syntax. Otherwise (`sps_affine_enabled_flag` equals 1), affine-based motion compensation can be used in CLVS.

[0037] Continue to refer to Figure 2, the sps_affine_type_flag in PPS and / or SPS can specify whether motion compensation based on a six - parameter affine model can be used for inter - frame prediction. If the sps_affine_type_flag is equal to 0, the syntax can be constrained such that motion compensation based on the six - parameter affine model is not used in CLVS, and there will be no cu_affine_type_flag in the coding unit syntax in CLVS. Otherwise (sps_affine_type_flag is equal to 1), motion compensation based on the six - parameter affine model can be used in CLVS. When it does not exist, it can be inferred that the value of the sps_affine_type_flag is equal to 0.

[0038] Still referring to Figure 2 , the translational CPMV can be signaled in the PPS. Control points can be predefined. For example, control point MV0 can be relative to the upper - left corner of the picture, MV1 can be relative to the upper - right corner, and MV3 can be relative to the lower - left corner of the picture. Table 5 illustrates an example method for signaling CPMV data according to the motion model used.

[0039] In an exemplary embodiment, still referring to Figure 2 , the array amvr_precision_idx that can be signaled in a coding unit, coding tree, etc. can specify the resolution AmvrShift of the motion vector difference, and the resolution AmvrShift can be defined as a non - restrictive example shown in Table 8 below. The array indices x0, y0 can specify the position (x0, y0) of the upper - left luma sample of the coding block under consideration relative to the upper - left luma sample of the picture; when amvr_precision_idx[x0][y0] does not exist, it can be inferred to be equal to 0. When inter_affine_flag[x0][y0] is equal to 0, the variables MvdL0[x0][y0][0], MvdL0[x0][y0][1], MvdL1[x0][y0][0], MvdL1[x0][y0][1] representing the modulated vector differences corresponding to the block under consideration can be modified by shifting the following values by AmvrShift, for example using MvdL0[x0][y0][0] = MvdL0[x0][y0][0]<<AmvrShift; MvdL0[x0][y0][1] = MvdL0[x0][y0][1]<<AmvrShift; MvdL1[x0][y0][0] = MvdL1[x0][y0][0]<<AmvrShift; and MvdL1[x0][y0][1] = MvdL1[x0][y0][1]<<AmvrShift。

[0040] Where inter_affine_flag[x0][y0] is equal to 1, the variables MvdCpL0[x0][y0][0][0], MvdCpL0[x0][y0][0][1], MvdCpL0[x0][y0][1][0], MvdCpL0[x0][y0][1][1], MvdCpL0[x0][y0][2][0], and MvdCpL0[x0][y0][2][1] can be modified by shifting, for example as follows: MvdCpL0[x0][y0][0][0]= MvdCpL0[x0][y0][0][0]<<AmvrShift; MvdCpL1[x0][y0][0][1]= MvdCpL1[x0][y0][0][1]<<AmvrShift; MvdCpL0[x0][y0][1][0]= MvdCpL0[x0][y0][1][0]<<AmvrShift; MvdCpL1[x0][y0][1][1]= MvdCpL1[x0][y0][1][1]<<AmvrShift; MvdCpL0[x0][y0][2][0]= MvdCpL0[x0][y0][2][0]<<AmvrShift; and MvdCpL1[x0][y0][2][1]= MvdCpL1[x0][y0][2][1]<<AmvrShift。

[0041]

[0042] Figure 3 is a process flow diagram illustrating an exemplary embodiment of a process 300 for constructing a motion vector candidate list, which includes adding a single global motion vector candidate to the motion vector candidate list.

[0043] In step 305, the current block is received by the decoder. The current block may be included within a bitstream received by the decoder. The bitstream may include, for example, data found in a bitstream that is an input to the decoder when using data compression. The bitstream may include information required to decode the video. Receiving may include extracting and / or parsing the block and associated signaling information from the bitstream. In some implementations, the current block may include a coding tree unit (CTU), a coding unit (CU), and / or a prediction unit (PU).

[0044] In step 310, a motion vector candidate list is constructed for the current block; construction may include adding a single global motion vector candidate to the motion vector candidate list. The single global motion vector candidate may be selected based on the global motion model utilized by the current block. In step 315, the pixel data of the current block may be reconstructed using the motion vector candidate list.

[0045] Figure 4 This is a system block diagram illustrating an example decoder 400 capable of decoding bitstream 428 by at least constructing a motion vector candidate list (including adding individual global motion vector candidates to the motion vector candidate list). Decoder 400 may include an entropy decoder processor 404, an inverse quantization and inverse transform processor 408, a deblocking filter 412, a frame buffer 416, a motion compensation processor 420, and / or an intra-frame prediction processor 424.

[0046] In operation, still refer to Figure 4 The bitstream 428 can be received by the decoder 400 and input to the entropy decoder processor 404, which can entropy decode a portion of the bitstream into quantization coefficients. The quantization coefficients can be provided to the inverse quantization and inverse transform processor 408, which can perform inverse quantization and inverse transform to create a residual signal. This residual signal can be added to the output of the motion compensation processor 420 or the intra-prediction processor 424, depending on the processing mode. The outputs of the motion compensation processor 420 and the intra-prediction processor 424 can include block predictions based on previously decoded blocks. The sum of the predictions and residuals can be processed by the deblocking filter 412 and stored in the frame buffer 416.

[0047] Figure 5 This is a flowchart illustrating an example process 500 for encoding video, which, based on some aspects of the current topic, can reduce encoding complexity while increasing compression efficiency by at least constructing a motion vector candidate list (including adding individual global motion vector candidates to the motion vector candidate list). In step 505, video frames may undergo initial block segmentation, for example, by using a tree-structured macroblock partitioning scheme that may include partitioning picture frames into CTUs and CUs. In step 510, global motion may be determined. In step 515, blocks may be encoded and included in the bitstream. Encoding may include constructing a motion vector candidate list, including adding individual global motion vector candidates to the motion vector candidate list. Encoding may include utilizing, for example, inter-frame prediction modes and intra-frame prediction modes.

[0048] Figure 6This is a system block diagram illustrating an exemplary implementation of a video encoder 600 capable of constructing a list of motion vector candidates, including adding individual global motion vector candidates to the list. The example video encoder 600 may receive input video 604, which may undergo initial segmentation and / or partitioning according to a processing scheme such as a tree-structured macroblock partitioning scheme (e.g., quadtree plus binary tree). Examples of a tree-structured macroblock partitioning scheme may include partitioning picture frames into large blocks of features called coding tree units (CTUs). In some implementations, each CTU may be further partitioned into multiple sub-blocks called coding units (CUs). The final result of this partitioning may include a set of sub-blocks that may be called prediction units (PUs). Transform units (TUs) may also be used.

[0049] Still refer to Figure 6 The example video encoder 600 may include an intra-frame prediction processor 612, a motion estimation / compensation processor 612 (also referred to as an inter-frame prediction processor), a transform / quantization processor 616, an inverse quantization / inverse transform processor 620, a loop filter 624, a decoded image buffer 628, and / or an entropy coding processor 632. The motion estimation / compensation processor 612 is capable of constructing a motion vector candidate list, including adding individual global motion vector candidates to the motion vector candidate list. Bitstream parameters may be input to the entropy coding processor 632 to be included in the output bitstream 636.

[0050] Continue to refer to Figure 6 In operation, for each block of the input video 604, it can be determined whether the block is processed via intra-frame prediction or using motion estimation / compensation. The block can be provided to either the intra-frame prediction processor 608 or the motion estimation / compensation processor 612. If the block is to be processed via intra-frame prediction, the intra-frame prediction processor 608 can perform processing to output predicted values. If applicable, if the block is to be processed via motion estimation / compensation, the motion estimation / compensation processor 612 can perform processing including constructing a list of motion vector candidates (including adding individual global motion vector candidates to the list of motion vector candidates).

[0051] Still refer to Figure 6The residual can be formed by subtracting the predicted value from the input video. The residual can be received by a transform / quantization processor 616, which can perform transform processing (e.g., Discrete Cosine Transform (DCT)) to produce coefficients that can be quantized. The quantization coefficients and any associated signaling information can be provided to an entropy coding processor 632 for entropy coding and included in the output bitstream 636. The entropy coding processor 632 can support the encoding of signaling information related to the current block. Furthermore, the quantization coefficients can be provided to an inverse quantization / inverse transform processor 620, which can reproduce pixels. Pixels can be combined with the predicted value and processed by a loop filter 624. The output of the loop filter 624 can be stored in a decoded image buffer 628 for use by a motion estimation / compensation processor 612, which is capable of constructing a motion vector candidate list, including adding individual global motion vector candidates to the motion vector candidate list.

[0052] Further reference Figure 6 Although some variations have been described in detail above, other modifications or additions are possible. For example, in some implementations, the current block can include any symmetric block (8x8, 16x16, 32x32, 64x64, 128x128, etc.) as well as any asymmetric block (8x4, 16x8, etc.).

[0053] Still refer to Figure 6 In some implementations, a quadtree plus binary decision tree (QTBT) can be implemented. In QTBT, at the encoding tree unit level, the partitioning parameters of the QTBT can be dynamically derived to adapt to local characteristics without any transmission overhead. Subsequently, at the encoding unit level, the joint classifier decision tree structure can eliminate unnecessary iterations and control the risk of mispredictions. In some implementations, the LTR frame block update mode can be used as an additional option available at each leaf node of the QTBT.

[0054] Still refer to Figure 6 In some implementations, additional syntax elements can be signaled at different levels of the bitstream. For example, an enable flag can be included for the entire sequence by including an enable flag encoded in the Sequence Parameter Set (SPS). Furthermore, CTU flags can be encoded at the Code Tree Unit (CTU) level.

[0055] It should be noted that any one or more aspects and embodiments described herein can be readily implemented using digital electronic circuits, integrated circuits, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), computer hardware, firmware, software, and / or combinations thereof, as will be apparent to those skilled in the art, such implementation and / or implementation in one or more machines programmed according to the teachings of this specification (e.g., one or more computing devices used as user computing devices for electronic documents, one or more server devices, such as document servers, etc.). These different aspects or features may include implementations in one or more computer programs and / or software capable of execution and / or interpretation on a programmable system including at least one programmable processor, which may be dedicated or general-purpose, coupled to receive data and instructions from and to a storage system, at least one input device, and at least one output device. Appropriate software coding can be readily prepared by skilled programmers based on the teachings of this disclosure, as will be apparent to those skilled in the art. The aspects and implementations of using software and / or software modules discussed above may also include appropriate hardware for assisting in the implementation of machine-executable instructions for the software and / or software modules.

[0056] Such software can be a computer program product employing a machine-readable storage medium. A machine-readable storage medium can be any medium capable of storing and / or encoding a sequence of instructions executable by a machine (e.g., a computing device) and causing the machine to perform any of the methods and / or embodiments described herein. Examples of machine-readable storage media include, but are not limited to, magnetic disks, optical disks (e.g., CDs, CD-Rs, DVDs, DVD-Rs, etc.), magneto-optical disks, read-only memory “ROM” devices, random access memory “RAM” devices, magnetic cards, optical cards, solid-state storage devices, EPROMs, EEPROMs, programmable logic devices (PLDs), and / or any combination thereof. As used herein, machine-readable media are intended to include single media as well as collections of physically separate media, such as one or more hard disk drives combined with computer memory and collections of optical disks. As used herein, machine-readable storage media do not include transient forms of signal transmission.

[0057] Such software may also include information (e.g., data) carried as data signals on a data carrier such as a carrier wave. For example, it may include machine-executable information as a data-bearing signal implemented in a data carrier, in which the signal encodes a sequence of instructions or a portion thereof for execution by a machine (e.g., a computing device), and any relevant information (e.g., data structures and data) that causes the machine to perform the methods and / or embodiments described herein and / or any of the methods and / or embodiments described herein.

[0058] Examples of computing devices include, but are not limited to, e-book readers, computer workstations, terminal computers, server computers, handheld devices (e.g., tablets, smartphones, etc.), network devices, network routers, network switches, bridges, any machine capable of executing a sequence of instructions specifying the actions to be taken by the machine, and any combination thereof. In one example, a computing device may include and / or be included in a kiosk.

[0059] Figure 7 A schematic representation of one embodiment of a computing device in an exemplary form of a computer system 700 is shown, within which a set of instructions can be executed to cause a control system to perform any or more aspects and / or methods of this disclosure. It is also contemplated that multiple computing devices can be used to implement a specially configured set of instructions to cause one or more devices to perform any or more aspects and / or methods of this disclosure. The computer system 700 includes a processor 704 and a memory 708 communicating with each other and with other components via a bus 712. The bus 712 may include any of several types of bus architectures—including, but not limited to, memory buses, memory controllers, peripheral buses, local buses, and any combinations thereof using any of a variety of bus architectures.

[0060] Memory 708 may include various components (e.g., machine-readable media), including but not limited to random access memory components, read-only components, and any combination thereof. In one example, a basic input / output system 716 (BIOS) may be stored in memory 708, including basic routines that, for example, facilitate the transfer of information between elements within computer system 700 during startup. Memory 708 may also include instructions (e.g., software) 720 that implement any or more aspects and / or methods of this disclosure (e.g., stored on one or more machine-readable media). In another example, memory 708 may also include any number of program modules, including but not limited to an operating system, one or more application programs, other program modules, program data, and any combination thereof.

[0061] Computer system 700 may also include storage device 724. Examples of storage devices (e.g., storage device 724) include, but are not limited to, hard disk drives, disk drives, combinations of optical disk drives and optical media, solid-state storage devices, and any combination thereof. Storage device 724 may be connected to bus 712 via a suitable interface (not shown). Example interfaces include, but are not limited to, SCSI, Advanced Technology Attachment (ATA), Serial ATA, Universal Serial Bus (USB), IEEE 1394 (FireWire), and any combination thereof. In one example, storage device 724 (or one or more components thereof) may removably interact with computer system 700 (e.g., via an external port connector (not shown)). In particular, storage device 724 and associated machine-readable medium 728 may provide non-volatile and / or volatile memory for machine-readable instructions, data structures, program modules, and / or other data for computer system 700. In one example, software 720 may reside wholly or partially within machine-readable medium 728. In another example, software 720 may reside wholly or partially within processor 704.

[0062] Computer system 700 may also include input device 732. In one example, a user of computer system 700 may input commands and / or other information into computer system 700 via input device 732. Examples of input device 732 include, but are not limited to, alphanumeric input devices (e.g., keyboard), pointing devices, joysticks, game controllers, audio input devices (e.g., microphones, voice response systems, etc.), cursor control devices (e.g., mice), touchpads, optical scanners, video capture devices (e.g., still cameras, camcorders), touchscreens, and any combination thereof. Input device 732 may be connected to bus 712 via any of a variety of interfaces (not shown), including but not limited to serial interfaces, parallel interfaces, game ports, USB interfaces, firewire interfaces, direct interfaces to bus 712, and any combination thereof. Input device 732 may include a touchscreen interface, which may be part of or separate from display 736, as will be discussed further below. Input device 732 may be used as a user selection device for selecting one or more graphical representations in the graphical interface described above.

[0063] Users can also input commands and / or other information to computer system 700 via storage device 724 (e.g., removable disk drive, flash drive, etc.) and / or network interface device 740. Network interface devices, such as network interface device 740, can be used to connect computer system 700 to one or more networks, such as network 744, and one or more remote devices 748 connected to these networks. Examples of network interface devices include, but are not limited to, network interface cards (e.g., mobile network interface cards, LAN cards), modems, and any combination thereof. Examples of networks include, but are not limited to, wide area networks (e.g., the Internet, corporate networks), local area networks (e.g., networks associated with offices, buildings, campuses, or other relatively small geographical areas), telephone networks, data networks associated with telephone / voice providers (e.g., mobile communication provider data and / or voice networks), direct connections between two computing devices, and any combination thereof. Networks, such as network 744, can employ wired and / or wireless communication modes. Typically, any network topology can be used. Information (e.g., data, software 720, etc.) can be transmitted to and / or from computer system 700 via network interface device 740.

[0064] Computer system 700 may also include a video display adapter 752 for transmitting displayable images to a display device such as display device 736. Examples of display devices include, but are not limited to, liquid crystal displays (LCDs), cathode ray tube (CRTs), plasma displays, light-emitting diode (LED) displays, and any combination thereof. Display adapter 752 and display device 736 may be used in conjunction with processor 704 to provide a graphical representation of aspects of this disclosure. In addition to display devices, computer system 700 may include one or more other peripheral output devices, including, but not limited to, audio speakers, printers, and any combination thereof. Such peripheral output devices may be connected to bus 712 via peripheral interface 756. Examples of peripheral interfaces include, but are not limited to, serial ports, USB connections, firewire connections, parallel connections, and any combination thereof.

[0065] The foregoing is a detailed description of illustrative embodiments of the present invention. Various modifications and additions can be made without departing from the spirit and scope of the invention. Features of each embodiment described above can be suitably combined with features of other described embodiments to provide multiple combinations of features in associated new embodiments. Furthermore, although several individual embodiments have been described above, the description herein is merely an illustration of the application of the principles of the invention. Moreover, although specific methods herein may be illustrated and / or described as being performed in a specific order, the order is highly variable within the ordinary technical scope of implementing the embodiments disclosed herein. Therefore, this description is intended only as an example and not to otherwise limit the scope of the invention.

[0066] In the foregoing description and claims, phrases such as “at least one of…” or “one or more of…” may be followed by a list of elements or features. The term “and / or” may also appear in a list of two or more elements or features. Unless contradicted, explicitly or implicitly, by the context in which it is used, a phrase means any single element or feature listed, or any element or feature listed in combination with any of the other elements or features listed. For example, each phrase “at least one of A and B,” “one or more of A and B,” and “A and / or B” means “A only, B only, or both A and B.” A similar interpretation applies to lists containing three or more items. For example, each phrase “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, and / or C” means “A only, B only, C only, A and B together, A and C together, B and C together, or A, B, and C together.” Furthermore, the use of the term "based on" in the foregoing and claims means "at least partially based on," which allows for the inclusion of features or elements not mentioned.

[0067] The subject matter described herein can be embodied in systems, devices, methods, and / or articles according to desired configurations. The implementations described above do not represent all implementations consistent with the subject matter described herein. Rather, these implementations are merely examples of aspects consistent with the described subject matter. Although some variations have been described in detail above, other modifications or additions are possible. In particular, further features and / or variations may be provided in addition to those set forth herein. For example, the implementations described above may involve various combinations and sub-combinations of the disclosed features, and / or combinations and sub-combinations of several further features disclosed above. Furthermore, the logical flows described in the figures and / or herein do not necessarily require a specific order or sequence to achieve the desired result. Other implementations may fall within the scope of the appended claims.

Claims

1. A video encoder configured to encode a bitstream, the bitstream to be decoded by a compatible decoder: The encoder generates an encoded bitstream, which includes a sequence parameter set and an encoded image. The encoded image includes a first continuous region, a second continuous region, and encoded blocks predicted intra-frame. The first continuous region includes a first plurality of encoded blocks, and the second continuous region includes a second plurality of encoded blocks. The decoder is configured to: Receive the encoded bit stream; The first continuous region of the encoded image is decoded in the following manner: A motion model is used for each of the first plurality of coding blocks in the first continuous region. The motion model is the same for all coding blocks in the first plurality of coding blocks in the first continuous region. The motion model is one of four-parameter affine motion or six-parameter affine motion. The sequence parameter set contains information about the motion model. When the motion model is a four-parameter affine motion, for each of the first plurality of coded blocks in the first continuous region, a motion vector candidate list is constructed. The motion vector candidate list includes a four-parameter candidate, which includes two control point motion vectors. Each of the two control point motion vectors is the motion vector of the nearest neighboring block in the coded image. The four-parameter candidate is used to decode each of the first plurality of coded blocks in the first continuous region for four-parameter affine motion compensation. When the motion model is a six-parameter affine motion, for each of the first plurality of coded blocks in the first continuous region, a motion vector candidate list is constructed, the motion vector candidate list includes a six-parameter candidate, the six-parameter candidate includes three control point motion vectors, wherein each of the three control point motion vectors is the motion vector of the nearest neighboring block in the coded image, and the six-parameter candidate is used to decode each of the first plurality of coded blocks in the first continuous region for six-parameter affine motion compensation; The second consecutive region of the encoded image is decoded by using individual motion information contained in the bitstream for each of the second plurality of encoded blocks. The intra-predicted block is decoded using intra-frame prediction from within the image; as well as The decoded image is stored in the decoded image buffer.

2. The encoder according to claim 1, wherein, Each of the blocks is part of a coding tree unit.

3. The encoder according to claim 1, wherein, At least one block is a symmetric block.

4. The encoder according to claim 3, wherein, Each of the blocks is NxN, where N is one of 32, 64 or 128.

5. A video decoder, the video decoder comprising circuitry configured to: Receive an encoded bitstream, the encoded bitstream including a sequence parameter set and an encoded image, the encoded image including a first continuous region, a second continuous region and an intra-frame predicted encoded block, the first continuous region including a first plurality of encoded blocks, the second continuous region including a second plurality of encoded blocks; The first continuous region of the encoded image is decoded in the following manner: A motion model is used for each of the first plurality of coding blocks in the first continuous region. The motion model is the same for all coding blocks in the first plurality of coding blocks in the first continuous region. The motion model is one of four-parameter affine motion or six-parameter affine motion. The sequence parameter set contains information about the motion model. When the motion model is a four-parameter affine motion, for each of the first plurality of coded blocks in the first continuous region, a motion vector candidate list is constructed. The motion vector candidate list includes a four-parameter candidate, which includes two control point motion vectors. Each of the two control point motion vectors is the motion vector of the nearest neighboring block in the coded image. The four-parameter candidate is used to decode each of the first plurality of coded blocks in the first continuous region for four-parameter affine motion compensation. When the motion model is a six-parameter affine motion, for each of the first plurality of coded blocks in the first continuous region, a motion vector candidate list is constructed, the motion vector candidate list includes a six-parameter candidate, the six-parameter candidate includes three control point motion vectors, wherein each of the three control point motion vectors is the motion vector of the nearest neighboring block in the coded image, and the six-parameter candidate is used to decode each of the first plurality of coded blocks in the first continuous region for six-parameter affine motion compensation; The second consecutive region of the encoded image is decoded by using individual motion information contained in the bitstream for each of the second plurality of encoded blocks. The intra-predicted block is decoded using intra-frame prediction from within the image; as well as The decoded image is stored in the decoded image buffer.

6. The decoder according to claim 5, wherein, Each of the blocks is part of a coding tree unit.

7. The decoder according to claim 5, wherein, At least one block is a symmetric block.

8. The decoder according to claim 7, wherein, Each of the blocks is NxN, where N is one of 32, 64 or 128.

9. A method for transmitting coded video signals, the method comprising: Receive video signals; An encoded bitstream is generated, which will be decoded by a compatible decoder. The encoded bitstream includes a sequence parameter set and an encoded image. The encoded image includes a first continuous region, a second continuous region, and blocks predicted by intra-frame. The first continuous region includes a first plurality of encoded blocks, and the second continuous region includes a second plurality of encoded blocks. The encoded bitstream is transmitted to a decoder, which is configured to: Receive the encoded bit stream; The first continuous region of the encoded image is decoded in the following manner: A motion model is used for each of the first plurality of coding blocks in the first continuous region. The motion model is the same for all coding blocks in the first plurality of coding blocks in the first continuous region. The motion model is one of four-parameter affine motion or six-parameter affine motion. The sequence parameter set contains information about the motion model. When the motion model is a four-parameter affine motion, for each of the first plurality of coded blocks in the first continuous region, a motion vector candidate list is constructed. The motion vector candidate list includes a four-parameter candidate, which includes two control point motion vectors. Each of the two control point motion vectors is the motion vector of the nearest neighboring block in the coded image. The four-parameter candidate is used to decode each of the first plurality of coded blocks in the first continuous region for four-parameter affine motion compensation. When the motion model is a six-parameter affine motion, for each of the first plurality of coded blocks in the first continuous region, a motion vector candidate list is constructed, the motion vector candidate list includes a six-parameter candidate, the six-parameter candidate includes three control point motion vectors, wherein each of the three control point motion vectors is the motion vector of the nearest neighboring block in the coded image, and the six-parameter candidate is used to decode each of the first plurality of coded blocks in the first continuous region for six-parameter affine motion compensation; The second consecutive region of the encoded image is decoded by using individual motion information contained in the bitstream for each of the second plurality of encoded blocks. The intra-predicted block is decoded using intra-frame prediction from within the image; as well as The decoded image is stored in the decoded image buffer.

10. The method according to claim 9, wherein, Each of the blocks is part of a coding tree unit.

11. The method according to claim 9, wherein, At least one block is a symmetric block.

12. The method of claim 11, wherein, Each of the blocks is NxN, where N is one of 32, 64 or 128.

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