Architecture code migration method and device, electronic equipment and storage medium

Abstract

The invention provides an architecture code migration method and device, electronic equipment and a storage medium, and relates to the technical field of software engineering. The method comprises the following steps: constructing a global function dependency graph of an original architecture code according to structure information of the original architecture code to be migrated; pruning and merging nodes of the global function dependency graph and edges connecting the nodes to obtain a core function graph; based on the target node of the core function diagram and the edge connected with the target node, a target architecture code of a target hardware architecture is generated, and the target hardware architecture is a hardware architecture to which the original architecture code is migrated. According to the method, the global function dependency graph is pruned and merged, so that the complex global function dependency graph is simplified. According to the method, the target architecture code is generated according to the core function diagram, full-quantity nodes and edges connected with the nodes do not need to be processed, the calculation amount of generating the target architecture code is reduced, and the efficiency of generating the target architecture code is higher than that of generating the target architecture code according to a global function dependency diagram.

Description

Technical Field

[0001] This invention relates to the field of software engineering technology, and in particular to a method, apparatus, electronic device, and storage medium for migrating architectural code. Background Technology

[0002] In the field of high-performance computing, in order to fully leverage the unique advantages of different hardware platforms, it is necessary to efficiently and reliably migrate existing, mature source code (such as computer vision libraries, deep learning inference frameworks, etc.) to new target architectures. Successful cross-architecture code migration not only requires ensuring the functional integrity and correctness of the target architecture codebase (i.e., functional equivalence), but also strives to achieve performance optimization on the target platform.

[0003] To meet the aforementioned technical requirements, the migration of existing architecture code includes the following methods. The first method is a rule-based migration approach. This method uses static analysis tools to parse the original architecture code, extract its dependencies, and map the structure of the original architecture code to the target architecture based on a predefined rule base or template. The second method is a code generation method based on Large Language Models (LLMs). This type of method leverages the powerful code understanding and generation capabilities of large language models to directly generate the target architecture code by providing natural language descriptions or code examples.

[0004] Whether it's rule-based mechanical replacement or generation based on a large language model, both methods generate the target architecture's code from the original structural information of the original architecture's code. When the original structural information of the original architecture's code is large and complex, the computational load for generating the target architecture's code is very high, resulting in low migration efficiency. Summary of the Invention

[0005] This invention provides a method, apparatus, electronic device, and storage medium for migrating architecture code, in order to solve the problem of low migration efficiency of architecture code in the prior art and improve the migration efficiency of architecture code.

[0006] This invention provides a method for migrating architectural code, comprising: Based on the structural information of the original architecture code to be migrated, construct a global functional dependency graph of the original architecture code; Prune and merge the nodes and edges connecting the nodes in the global functional dependency graph to obtain the core functional graph; Based on the target nodes and edges connecting the target nodes in the core functional graph, the target architecture code for the target hardware architecture is generated. The target hardware architecture is the hardware architecture to which the original architecture code is migrated.

[0007] According to the migration method of the architecture code provided by this invention, the nodes and edges connecting the nodes of the global functional dependency graph are pruned and merged to obtain the core functional graph, including: In the global functional dependency graph, the importance score of each node is calculated based on the metric information of each node. When a node's importance score is below the score threshold and the node is a deletable node, delete the node and the edge connecting the node. Among the retained nodes, node pairs that meet the merging conditions are merged, and the associated edges of the merged nodes are updated to obtain the core functional graph. The merging conditions are determined based on the metric information of the nodes in the node pairs.

[0008] According to the migration method of the architecture code provided by this invention, the metric information of a node includes the node's in-degree, out-degree, and type, and the importance score of a node is determined based on the following method: Calculate the in-degree score of a node based on its in-degree. Calculate the out-degree score of a node based on its out-degree. Calculate the node type score based on the node type; The importance score of a node is determined based on at least one of the node's in-degree score, out-degree score, and type score.

[0009] According to the migration method of the architecture code provided by the present invention, after pruning and merging the nodes and edges connecting the nodes of the global functional dependency graph to obtain the core functional graph, the method further includes: Calculate the difference between the core function graph and the global function dependency graph; When the difference value is greater than or equal to the difference threshold, iterative pruning and merging are performed on the target node and the edge connecting the target node in the core function graph until the difference value of the core function graph after two consecutive pruning and merging is less than the difference threshold, and the iterative update ends. Based on the target nodes and edges connecting the target nodes in the final pruned and merged core functional graph, the target architecture code is generated.

[0010] According to the architecture code migration method provided by the present invention, target architecture code for the target hardware architecture is generated based on the target nodes of the core functional graph and the edges connecting the target nodes, including: Based on the dependency topology of the core functional graph, identify the target nodes at each level and the topological sorting order of the target nodes at each level. Generate and verify the code for each target node at each level in the order of topological sorting. Based on the dependencies between the target nodes at each level, the target architecture code is generated recursively.

[0011] According to the architecture code migration method provided by the present invention, after generating the target architecture code of the target hardware architecture based on the target nodes of the core functional graph and the edges connecting the target nodes, the method further includes: The target architecture code is compiled and functionally tested to obtain the test results. When the detection results of the target architecture code match the detection results of the original architecture code, the target architecture code is deemed to have passed the detection. When the detection results of the target architecture code do not match the detection results of the original architecture code, the target architecture code is regenerated iteratively until the detection results of the finally generated target architecture code match the detection results of the original architecture code.

[0012] According to the migration method for architecture code provided by the present invention, the structural information includes the various entities of the original architecture code and the relationships between them. Based on the structural information of the original architecture code to be migrated, a global functional dependency graph of the original architecture code is constructed, including: Perform syntax parsing and symbol analysis on the original architecture code to obtain the various entities and the relationships between them; Treat entities as nodes; Generate edges connecting nodes based on the relationships between entities; Based on each node and the edges connecting the nodes, a global functional dependency graph is obtained.

[0013] The present invention also provides a code repository migration apparatus, comprising: The global functional dependency graph construction module is used to construct the global functional dependency graph of the original architecture code based on the structural information of the original architecture code to be migrated. The core function graph generation module is used to prune and merge the nodes and edges connecting the nodes in the global function dependency graph to obtain the core function graph. The target architecture code generation module is used to generate target architecture code for the target hardware architecture based on the target nodes and edges connecting the target nodes in the core functional graph. The target hardware architecture is the hardware architecture to which the original architecture code is migrated.

[0014] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement a migration method for code of any of the above-described architectures.

[0015] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a migration method for code of any of the above-described architectures.

[0016] This invention provides a method, apparatus, electronic device, and storage medium for migrating architecture code. Based on the structural information of the original architecture code to be migrated, a global functional dependency graph of the original architecture code is constructed. The nodes and edges connecting the nodes in the global functional dependency graph are pruned and merged to obtain a core functional graph. Based on the target nodes and edges connecting the target nodes in the core functional graph, target architecture code for the target hardware architecture is generated. The target hardware architecture is the hardware architecture to which the original architecture code is migrated. This invention simplifies complex global functional dependency graphs by pruning and merging them. Generating target architecture code from the core functional graph eliminates the need to process all nodes and edges connecting them, reducing the computational load and making it more efficient than generating target architecture code from a global functional dependency graph. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is one of the flowcharts illustrating the migration method for the architecture code provided by this invention.

[0019] Figure 2 This is the second flowchart illustrating the migration method for the architecture code provided by this invention.

[0020] Figure 3 This is a flowchart illustrating the process of obtaining the core functional diagram after final pruning and merging, provided by the present invention.

[0021] Figure 4 This is a schematic diagram of the structure of the code library migration device provided by the present invention.

[0022] Figure 5 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0024] The following is combined with Figures 1 to 5This invention describes a method, apparatus, and electronic device for migrating the architecture code of the present invention.

[0025] Figure 1 This is one of the flowcharts illustrating the migration method for the architecture code provided by this invention, such as... Figure 1 As shown, the migration method for the architecture code includes steps S100 to S300, and the specific steps are as follows.

[0026] S100: Based on the structural information of the original architecture code to be migrated, construct a global functional dependency graph of the original architecture code.

[0027] A global functional dependency graph consists of nodes and edges connecting the nodes.

[0028] This invention is applicable to automatically migrating high-performance computing libraries from a native hardware architecture to a target hardware architecture. The native architecture code includes the existing hardware architecture's codebase (or the high-performance computing library). For example, the native architecture code includes open-source computer vision libraries (OpenCV) and neural network computing libraries (NCNN). OpenCV is an open-source computer vision and machine learning software library containing a large number of optimized image processing and computer vision algorithms. NCNN is an open-source neural network inference framework optimized for mobile devices and embedded platforms.

[0029] Optionally, the original hardware architecture includes the Advanced Reduced Instruction Set Computing (RISC) Machines (ARM) architecture. The ARM architecture is an instruction-level architecture based on Reduced Instruction Set Computing (RISC) principles. ARM is widely used in mobile devices, embedded systems, IoT devices, and high-performance computing, and its instruction set and core design have been licensed to numerous companies. The target hardware architecture includes the open-source instruction set architecture (RISC-V). RISC-V is an open-source instruction set architecture (ISA) based on Reduced Instruction Set Computing (RISC) principles. RISC-V is open, free, and scalable, allowing other organizations or individuals to use and modify it freely. RISC-V Vector Extension (RVV) is a standard vector extension in RISC-V, designed to provide RISC-V processors with efficient parallel data processing capabilities. RVV supports variable-length vector operations and is suitable for scientific computing, machine learning, multimedia processing, and other fields requiring high-throughput data processing.

[0030] This invention uses an ARM architecture as the original hardware architecture, OpenCV as the original architecture code, and a RISC-V target hardware architecture as an example for illustration.

[0031] A global functional dependency graph transforms the abstract structural information of the original architecture code into intuitive and analyzable graphical data. The global functional dependency graph includes all nodes of the original architecture code, all edges connecting the nodes, and the dependency topology relationships between nodes (e.g., parent-child, sibling, etc.). Each node represents an entity. The global functional dependency graph is used to describe the functionality and dependencies of all functions in the original architecture code.

[0032] The original architecture code is parsed, and the edges connecting each node and the connected nodes are constructed based on the parsing results. A global functional dependency graph is then drawn based on all the nodes and their edges.

[0033] S200: Prune and merge the nodes and edges connecting the nodes in the global functional dependency graph to obtain the core functional graph.

[0034] The core function graph describes the functionality and dependencies of key functions in the original architecture code. In large-scale projects, such as migrating an original architecture codebase consisting of millions of lines of code, the global function dependency graph contains a massive number of nodes and edges connecting them. Directly migrating the original architecture code based on the global function dependency graph would make it impossible to handle all nodes and their connections within a manageable scope.

[0035] Therefore, this invention employs pruning and merging of the global functional dependency graph, automatically identifying and removing low-value, redundant, or non-critical functional nodes and edges connecting nodes, thereby retaining the critical target nodes that truly affect system functionality and migration correctness, as well as the critical edges connecting target nodes, to obtain the core functional graph.

[0036] It should be noted that this invention analyzes the global functional dependency graph to identify or merge target nodes that are important (or critical) to the entire system of the original architecture code, as well as the edges connecting the target nodes, thereby obtaining the core functional graph. Target nodes are not limited to nodes of important code; they can also be nodes of non-important code (non-important code may also contain important target nodes), or nodes resulting from the merging of multiple nodes.

[0037] S300: Based on the target nodes and edges connecting the target nodes in the core functional graph, generate the target architecture code for the target hardware architecture.

[0038] The target hardware architecture is the hardware architecture to which the original architecture code is migrated.

[0039] The core functional diagram includes multiple target nodes and multiple edges connecting the target nodes. Based on each target node and each edge connecting the target nodes, the target architecture code is generated.

[0040] Optionally, the core functional diagram and prompts are input into the large model to obtain the target architecture code output by the large model. Specifically, the large model searches for each target node and the edges connecting the target nodes in the core functional diagram and generates the target architecture code.

[0041] Optionally, extract each target node and the edges connecting the target nodes from the core functional graph to obtain the input file. Input the input file and prompts into the large model to obtain the target architecture code output by the large model.

[0042] The architecture code migration method provided in this invention constructs a global functional dependency graph of the original architecture code based on its structural information. It then prunes and merges the nodes and edges connecting them to obtain a core functional graph. Based on the target nodes and edges connecting them in the core functional graph, it generates target architecture code for the target hardware architecture, which is the hardware architecture to which the original architecture code is migrated. This invention simplifies complex global functional dependency graphs by pruning and merging them. Generating target architecture code from the core functional graph eliminates the need to process all nodes and edges, reducing computational complexity and making it more efficient than generating target architecture code from a global functional dependency graph.

[0043] Furthermore, code generation methods based on large language models (or large models) have limited ability to handle long-distance dependencies between the original architecture code. Large-scale codebases (such as OpenCV) contain complex function call chains and cross-module dependencies, exceeding the context processing capabilities of LLMs. This makes it impossible to maintain global consistency during the generation of the target architecture code, leading to dependency errors, interface mismatches, and other issues. This invention generates a global functional dependency graph, prunes and merges it to obtain a core functional graph, achieving a comprehensive mining and simplification of long-distance dependencies between the original architecture code. This improves the accuracy and efficiency of generating target architecture code from large models based on the core functional graph.

[0044] Based on the above embodiments, the structural information includes the various entities of the original architecture code and the relationships between them. According to the structural information of the original architecture code to be migrated, a global functional dependency graph of the original architecture code is constructed, including the following steps: Perform syntax parsing and symbol analysis on the original architecture code to obtain the various entities and the relationships between them; Treat entities as nodes; Generate edges connecting nodes based on the relationships between entities; Based on each node and the edges connecting the nodes, a global functional dependency graph is obtained.

[0045] Through syntax parsing and symbol analysis, entities such as functions (or methods), classes, and files, as well as the relationships between these entities, are extracted from the original code structure. A function is a block of code that encapsulates specific functionality and can be executed repeatedly. A class is a blueprint or template used to create objects; it binds data (e.g., member variables) together with the functions that operate on that data. A file is the physical unit for storing code.

[0046] Relationships between entities include calling relationships, inheritance relationships, and import relationships. A calling relationship involves one function (caller) calling another function (callee). Calling relationships describe the execution flow between functions. Inheritance is when a class (subclass) inherits the attributes and methods of another class (superclass). Inheritance describes the structural hierarchy between classes. An import relationship refers to the act of one file "including" or "importing" a class, function, or variable defined in another file in order to use that class. Import relationships describe dependencies between files.

[0047] Treat each entity as a node. Generate edges connecting the nodes based on the relationships between the entities. Obtain the global functional dependency graph based on the nodes and their connecting edges.

[0048] This invention fully captures the semantic relationships and call structures in the original architecture code through syntax parsing and symbol analysis. A global functional dependency graph is generated based on all entities and their relationships, ensuring the comprehensiveness and accuracy of the global functional dependency graph.

[0049] Based on the above embodiments, the nodes and edges connecting the nodes in the global functional dependency graph are pruned and merged to obtain the core functional graph, including the following steps: In the global functional dependency graph, the importance score of each node is calculated based on the metric information of each node. When a node's importance score is below the score threshold and the node is a deletable node, delete the node and the edge connecting the node. Among the retained nodes, node pairs that meet the merging conditions are merged, and the associated edges of the merged nodes are updated to obtain the core functional graph. The merging conditions are determined based on the metric information of the nodes in the node pairs.

[0050] like Figure 2 As shown, the present invention first parses each piece of code in the input original architecture code to generate a global functional dependency graph. Then, based on the pruning and merging algorithm, it automatically identifies the set of key functional functions (determined by the target node and the edge connecting the target node) from the complex structural information of the global functional dependency graph, and then generates the core functional graph.

[0051] like Figure 3As shown, based on the global functional dependency graph, the metric information of each node is extracted. The metric information of a node includes the importance of the node itself, as well as the importance of its relationships with other nodes.

[0052] Based on the metrics of each node, an importance score is calculated for each node. The importance score characterizes the degree of importance (or relative value) of a node in the core functional graph.

[0053] Set a scoring threshold. The scoring threshold can be determined based on the needs of migrating the original architecture code, historical experience in migrating the original architecture code, or the complexity of the global functional dependency graph or core functional graph.

[0054] Nodes are categorized into deletable nodes and non-deletable nodes. Deletable nodes are those whose deletion does not affect the use of the node's software module or its relationship with other external modules. Non-deletable nodes are those whose deletion would severely impact the use of the node's software module or its relationship with other external modules. Optionally, non-deletable nodes may include external interface nodes.

[0055] like Figure 3 As shown, the method determines whether a node's importance score is below a threshold. If a node's importance score is below the threshold and the node is eligible for deletion, then the node is deemed pruned, and the nodes and their connecting edges are deleted. The remaining nodes and the edges connecting them are then retrieved. Retained nodes include those that were not deleted.

[0056] Furthermore, if a node's importance score is higher than the score threshold, or if the node is a non-deletable node, then the node is retained.

[0057] A node pair includes two nodes that have a parent-child relationship or two nodes that have a sibling relationship. Parent-child and sibling relationships can be determined based on the dependency topology of the global functional dependency graph.

[0058] From all the retained nodes, obtain any node pair. Determine if the node pair meets the merge criteria. The merge criteria are determined based on the metric information of the nodes in the pair. The metric information includes the node's in-degree, out-degree, node type, node interface, and the calling relationships between the nodes.

[0059] A node pair can be merged when it meets the following conditions: (1) There is a non-core node in the node pair; (2) The non-core node is compatible with the interface of the other node in the node pair and the calling relationship is safe.

[0060] To determine whether a node in a node pair is a non-core node, you can consider its node type, out-degree, and in-degree. If the node type is a file or directory, it is a core node and cannot be merged. This is to preserve the basic architecture of the original code and avoid excessive merging. If the node's in-degree is below the in-degree threshold, it is a non-core node and can be merged. If the node's out-degree is below the out-degree threshold, it is a non-core node and can be merged. If the node type indicates that it is an inherited node type, it is a core node and cannot be merged. If the node type indicates that it is an import node type of multiple nodes, it is a core node and cannot be merged.

[0061] When a node pair meets the merging condition, the node pair is merged, and the associated edges of the merged node are updated. The two nodes in a node pair that meet the merging condition are merged into one node. The interface definitions, call sets, and semantic descriptions of the two nodes in the merged node pair are merged, and the associated edges of the merged node are updated. For example, the edges connecting the original nodes in the node pair are updated to connect to the merged node.

[0062] This invention quantifies the importance of nodes through importance scores, providing a basis for pruning and merging, and improving the accuracy of pruning and merging. By merging node pairs that meet the merging conditions, nodes with the same function are aggregated into abstract nodes. This invention removes redundant and non-critical information from the global functional dependency graph by first deleting unimportant nodes and then merging node pairs that meet the merging conditions, simplifying the core functional graph and improving the efficiency of subsequent target architecture code generation. This invention simplifies complex global functional dependency graphs through pruning and merging. The resulting core functional graph preserves all key semantic relationships and call structures of the original architecture code while removing redundant semantic relationships and call structures. Generating target architecture code based on the core functional graph can completely reproduce the deep semantics of the original architecture code, ensuring functional equivalence during codebase migration and improving the accuracy of the generated target architecture code.

[0063] Based on the above embodiments, the node's metric information includes the node's in-degree, out-degree, and type. The node's importance score is determined based on the following method: Calculate the in-degree score of a node based on its in-degree. Calculate the out-degree score of a node based on its out-degree. Calculate the node type score based on the node type; The importance score of a node is determined based on at least one of the node's in-degree score, out-degree score, and type score.

[0064] A node's in-degree includes the number of edges pointing to that node. A node's out-degree includes the number of edges pointing out of that node. Node type includes function (or method) type, class type, file type, whether it is an inherited node type, and whether it is an imported node type of multiple nodes, etc.

[0065] Calculate the in-degree score of a node based on its in-degree. The more edges a node has pointing to it, the more important it is relative to its surrounding nodes, and the higher its in-degree score will be.

[0066] Calculate the out-degree score of a node based on its out-degree. The more edges a node has emanating from it, the more important the node is relative to its surrounding nodes, and the higher its out-degree score will be.

[0067] Calculate a type score for each node based on its type. If a node belongs to a specified importance type, its type score is set to a higher score. Specified importance types include file types, directory types, inherited node types, and the types of imported nodes from multiple nodes. The specified importance type can be set based on pruning requirements, historical pruning experience, or the complexity of the actual structure of the global functional dependency graph.

[0068] Optionally, before determining the importance score of a node based on at least one of the node's in-degree score, out-degree score, and type score, the node's in-degree score, out-degree score, and type score are normalized to offset the differences between them.

[0069] The importance score of a node is determined based on at least one of the node's in-degree score, out-degree score, and type score.

[0070] Optionally, the in-degree score of a node can be used as the node's importance score, or the out-degree score of a node can be used as the node's importance score, or the type score of a node can be used as the node's importance score.

[0071] Optionally, the importance score of a node can be calculated based on any two of the node's in-degree score, out-degree score, and type score.

[0072] Optionally, the maximum value among the node's in-degree score, out-degree score, and type score can be used as the node's importance score.

[0073] Optionally, the average of the node's in-degree score, out-degree score, and type score can be used as the node's importance score.

[0074] Optionally, a first weight is set for the node's in-degree score, a second weight for its out-degree score, and a third weight for its type score. These weights can be set based on the critical node determination requirements, pruning needs, or historical experience. Based on these weights, the node's in-degree score, out-degree score, and type score are weighted and summed to obtain the node's importance score. This weighted sum of the node's in-degree score, out-degree score, and type score provides a comprehensive and accurate evaluation of node importance, taking into account both the node's own importance (determined by its type score) and its importance relative to surrounding nodes (determined by its in-degree and out-degree scores).

[0075] Based on the above embodiments, after pruning and merging the nodes and edges connecting the nodes in the global functional dependency graph to obtain the core functional graph, the following steps are also included: Calculate the difference between the core function graph and the global function dependency graph; When the difference value is greater than or equal to the difference threshold, iterative pruning and merging are performed on the target node and the edge connecting the target node in the core function graph until the difference value of the core function graph after two consecutive pruning and merging is less than the difference threshold, and the iterative update ends. Based on the target nodes and edges connecting the target nodes in the final pruned and merged core functional graph, the target architecture code is generated.

[0076] Large-scale codebases (such as OpenCV) contain a vast number of nodes and complex relationships between nodes at different levels. For the global functional dependency graph of a large-scale codebase, a single pruning and merging operation may not accurately identify all critical nodes and key node relationships. Therefore, iterative pruning and merging of the global functional dependency graph is required, and the core functional graph is obtained based on the final pruning and merging results.

[0077] Calculate the difference between the core functional graph and the global functional dependency graph. Optionally, compare the global functional dependency graph and the core functional graph, calculating the difference based on the number of changed target nodes and the number of changed edges connecting target nodes. Optionally, count the number of target nodes and the number of edges connecting target nodes in the core functional graph to obtain its structural complexity. Count the number of nodes and the number of edges connecting nodes in the global functional dependency graph to obtain its structural complexity. Calculate the difference between the structural complexity of the core functional graph and the structural complexity of the global functional dependency graph.

[0078] like Figure 3 As shown, the global functional dependency graph is pruned and merged to obtain the core functional graph. The difference between the core functional graph and the global functional dependency graph is calculated. When the difference is greater than or equal to a difference threshold, the target nodes and edges connecting to the target nodes in the core functional graph are pruned and merged. The difference between the core functional graphs after two consecutive pruning and merging operations (including the current pruning and merging core functional graph and the previous pruning and merging core functional graph) is calculated. If the difference between two consecutive pruning and merging core functional graphs is greater than or equal to the difference threshold, the current pruning and merging core functional graph is then pruned and merged again, thus achieving iterative pruning and merging of the target nodes and edges connecting to the target nodes in the core functional graph.

[0079] When the difference between two consecutive pruned and merged core functional graphs is less than the difference threshold, the pruning and merging of the core functional graph is considered to have reached a stable state, the iteration ends, and the final pruned and merged core functional graph is obtained. Based on the target nodes and edges connecting the target nodes in the final pruned and merged core functional graph, the target architecture code is generated.

[0080] This invention, through iterative pruning and merging, can iteratively filter and compress the structural information of the global functional dependency graph, solving the problem of incomplete pruning and merging in a single operation. It also avoids the errors that can easily occur when obtaining the core functional graph through a single pruning and merging process, ensuring that the final generated core functional graph is more concise, accurate, and structurally comprehensive. By calculating the difference between the core functional graphs after two consecutive pruning and merging operations, this invention can accurately measure the magnitude of change in the core functional graph, providing a basis for terminating the iterative pruning and merging process.

[0081] Research shows that in the challenging migration of OpenCV source code from an ARM-based machine to a RISC-V open-source architecture, the migration method of this invention achieves an automatic migration accuracy of up to 78%, far exceeding the current state-of-the-art mechanical migration strategies (automatic migration accuracy of 22%) and code agents (automatic migration accuracy of 59%). During the migration of OpenCV source code from ARM to RISC-V, the migration method of this invention reduces the number of nodes in the global functional dependency graph by at least 30% while retaining 100% of the critical architectural relationships (or critical structural information). Furthermore, the migration method of this invention effectively filters migration noise such as hardware-specific inline functions and custom data types, significantly reducing the compilation error rate.

[0082] Based on the above embodiments, the target architecture code for the target hardware architecture is generated based on the target nodes of the core functional graph and the edges connecting the target nodes, including the following steps: Based on the dependency topology of the core functional graph, identify the target nodes at each level and the topological sorting order of the target nodes at each level. Generate and verify the code for each target node at each level in the order of topological sorting. Based on the dependencies between the target nodes at each level, the target architecture code is generated recursively.

[0083] Each level of target node includes a target parent node and target child nodes. The topological sorting order includes the order in which the code of the target nodes at each level is generated. For example, the topological sorting order includes generating the code of the target parent node first, and then generating the code of the target child nodes.

[0084] The target parent node and the edges connecting it represent the skeleton structure of the original architecture code. The target child nodes and the edges connecting them represent the detailed structure of the original architecture code within the skeleton structure. The dependency topology of the core function graph represents the hierarchical dependency relationships between target nodes. Based on the dependency topology of the target nodes in the core function graph, target architecture code at different levels is generated.

[0085] Based on the dependency topology of the core functional graph, target parent nodes and target child nodes are identified. Following the topological sorting order, the code for each level of target nodes is generated and verified sequentially. For example, first, the code for the target parent node is generated and verified based on the target parent node and the edges connecting to it. Then, the code for the target child nodes is generated and verified based on the target child nodes and the edges connecting them. Based on the dependencies between the code of each target parent node and the code of each target child node, the target architecture code is generated recursively. In the process of generating the target architecture code, generating the code of target parent nodes and target child nodes hierarchically ensures that the called function (code) is generated before the caller's function (code).

[0086] Optionally, the core functional graph (or the final pruned and merged core functional graph) and prompts are input into the large model to obtain the target architecture code output by the large model. The large model extracts the dependency topology of the core functional graph based on the prompts, and classifies the target nodes and edges connecting them according to these dependencies, identifying the target nodes at each level and their topological sorting order. The large model then generates and verifies the code for each level of target nodes sequentially according to the topological sorting order; based on the dependencies between the target node codes at each level, it recursively generates the target architecture code.

[0087] Optionally, the core functional diagram is preprocessed. Based on the dependency topology of the core functional diagram, the target nodes at each level and their topological sorting order are extracted. The target nodes at each level and their topological sorting order are input into the large model to obtain the target architecture code output by the large model. Specifically, the large model generates and verifies the code for each level of target nodes sequentially according to the topological sorting order; based on the dependencies between the code of each level of target nodes, the target architecture code is recursively generated.

[0088] In the process of generating target architecture code from a large model, when the core functional diagram is complex, failing to generate the target architecture code hierarchically can lead to excessively long generation paths and an exploded search space. This invention identifies target nodes at each level and their topological order, then generates the target architecture code hierarchically, gradually narrowing the search space for the core functional diagram. By first searching the skeleton structure of the original architecture code, and then searching the detailed structures under the skeleton, the complex migration task of the original architecture code can be decomposed into multiple manageable sub-tasks, avoiding the loss of node relationships and interface inconsistencies during the target architecture code generation process.

[0089] like Figure 2As shown, based on the above embodiments, after generating the target architecture code for the target hardware architecture based on the target nodes of the core functional graph and the edges connecting the target nodes, the following steps are also included: The target architecture code is compiled and functionally tested to obtain the test results. When the detection results of the target architecture code match the detection results of the original architecture code, the target architecture code is deemed to have passed the detection. When the detection results of the target architecture code do not match the detection results of the original architecture code, the target architecture code is regenerated iteratively until the detection results of the finally generated target architecture code match the detection results of the original architecture code.

[0090] The target architecture code is compiled and functionally tested to obtain the test results. The test results include compilation results and functional test results.

[0091] The original architecture code is compiled and functionally tested to obtain the test results of the original architecture code.

[0092] The test results of the target architecture code are compared with those of the original architecture code, including the comparison of the compilation results of the target architecture code and the compilation results of the original architecture code, as well as the comparison of the functional test results of the target architecture code and the functional test results of the original architecture code.

[0093] By comparing the compilation results of the target architecture code with those of the original architecture code, it is possible to detect whether the target architecture code and the original architecture code can maintain semantic consistency.

[0094] By comparing the functional test results of the target architecture code with those of the original architecture code, it is possible to detect whether the target architecture code and the original architecture code are consistent and accurate in their functionality during operation.

[0095] When the detection results of the target architecture code match those of the original architecture code, it means that the target architecture code and the original architecture code are semantically consistent. At the same time, their functions are consistent and accurate during operation. Therefore, the target architecture code and the original architecture code are functionally equivalent, and the generated target architecture code is accurate.

[0096] When the detection results of the target architecture code do not match those of the original architecture code, it indicates that the target architecture code and the original architecture code are not functionally equivalent. The generated target architecture code is inaccurate. The target architecture code is then iteratively regenerated, and the regenerated target architecture code is tested until the final generated target architecture code passes the test.

[0097] Optionally, regenerating the target architecture code includes modifying the target architecture code (e.g., modifying the interface) and then obtaining the regenerated target architecture code. Optionally, regenerating the target architecture code includes regenerating the target architecture code based on the target node and the edges connecting to the target node. Optionally, regenerating the target architecture code includes verifying and modifying the target node and the edges connecting to the target node before regenerating the target architecture code.

[0098] The migration apparatus for the code library provided by the present invention will be described below. The migration apparatus for the code library described below can be referred to in correspondence with the migration method for the architecture code described above.

[0099] like Figure 4 As shown, the codebase migration device includes: The global functional dependency graph construction module 401 is used to construct the global functional dependency graph of the original architecture code based on the structural information of the original architecture code to be migrated. The core function graph generation module 402 is used to prune and merge the nodes and edges connecting the nodes of the global function dependency graph to obtain the core function graph. The target architecture code generation module 403 is used to generate target architecture code for the target hardware architecture based on the target nodes and edges connecting the target nodes in the core functional graph. The target hardware architecture is the hardware architecture to which the original architecture code is migrated.

[0100] The codebase migration apparatus provided in this invention constructs a global functional dependency graph of the original architecture code based on the structural information of the original architecture code to be migrated; it prunes and merges the nodes and edges connecting the nodes in the global functional dependency graph to obtain a core functional graph; and based on the target nodes and edges connecting the target nodes in the core functional graph, it generates target architecture code for the target hardware architecture, which is the hardware architecture to which the original architecture code is migrated. This invention simplifies complex global functional dependency graphs by pruning and merging them. Generating target architecture code from the core functional graph eliminates the need to process all nodes and edges connecting them, reducing the computational load and making it more efficient than generating target architecture code from a global functional dependency graph.

[0101] In one embodiment, the core function graph generation module 402 is used to: calculate the importance score of each node in the global function dependency graph based on the metric information of each node; delete the node and the edge connecting the node when the importance score of the node is lower than the score threshold and the node is a deletable node; merge the node pairs that meet the merging conditions among the retained nodes, and update the associated edges of the merged nodes to obtain the core function graph, wherein the merging conditions are determined based on the metric information of the nodes in the node pairs.

[0102] In one embodiment, the node's metric information includes the node's in-degree, out-degree, and type. The core functional graph generation module 402 is used to: calculate the node's in-degree score based on the node's in-degree; calculate the node's out-degree score based on the node's out-degree; calculate the node's type score based on the node's type; and determine the node's importance score based on at least one of the node's in-degree score, out-degree score, and type score.

[0103] In one embodiment, the core function graph generation module 402 is further configured to: calculate the difference between the core function graph and the global function dependency graph; when the difference is greater than or equal to a difference threshold, iteratively prune and merge the target nodes and edges connecting the target nodes in the core function graph until the difference between the core function graphs after two consecutive pruning and merging operations is less than the difference threshold, and then end the iterative update. The target architecture code generation module 403 is further configured to: generate target architecture code based on the target nodes and edges connecting the target nodes in the final pruned and merged core function graph.

[0104] In one embodiment, the target architecture code generation module 403 is used to: identify target nodes at each level and the topological sorting order of target nodes at each level based on the dependency topology of the core functional graph; generate and verify the code of target nodes at each level in sequence according to the topological sorting order; and recursively generate target architecture code based on the dependency relationship of the code of target nodes at each level.

[0105] In one embodiment, the target architecture code generation module 403 is further configured to: compile and functionally test the target architecture code to obtain the detection result of the target architecture code; when the detection result of the target architecture code matches the detection result of the original architecture code, determine that the target architecture code has passed the detection; when the detection result of the target architecture code does not match the detection result of the original architecture code, iteratively regenerate the target architecture code until the detection result of the finally generated target architecture code matches the detection result of the original architecture code.

[0106] In one embodiment, the structural information includes the entities in the original architecture code and the relationships between them. The global functional dependency graph construction module 401 is used to: perform syntax parsing and symbol analysis on the original architecture code to obtain the entities and the relationships between them; treat the entities as nodes; generate edges connecting the nodes based on the relationships between the entities; and obtain the global functional dependency graph based on the nodes and the edges connecting the nodes.

[0107] Figure 5 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 5As shown, the electronic device may include: a processor 510, a communications interface 520, a memory 530, and a communication bus 540, wherein the processor 510, communications interface 520, and memory 530 communicate with each other through the communication bus 540. The processor 510 can call logical instructions in the memory 530 to execute an architecture code migration method, which includes: constructing a global functional dependency graph of the original architecture code based on the structural information of the original architecture code to be migrated; pruning and merging the nodes and edges connecting the nodes in the global functional dependency graph to obtain a core functional graph; and generating target architecture code for the target hardware architecture based on the target nodes and edges connecting the target nodes in the core functional graph, wherein the target hardware architecture is the hardware architecture to which the original architecture code is migrated.

[0108] Furthermore, the logical instructions in the aforementioned memory 530 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0109] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements a migration method for the architecture code provided by the above methods. The method includes: constructing a global functional dependency graph of the original architecture code based on the structural information of the original architecture code to be migrated; pruning and merging the nodes and edges connecting the nodes in the global functional dependency graph to obtain a core functional graph; and generating target architecture code for a target hardware architecture based on the target nodes and edges connecting the target nodes in the core functional graph, wherein the target hardware architecture is the hardware architecture to which the original architecture code is migrated.

[0110] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0111] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0112] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for migrating architectural code, characterized in that, include: Based on the structural information of the original architecture code to be migrated, construct a global functional dependency graph of the original architecture code; The nodes and edges connecting the nodes in the global functional dependency graph are pruned and merged to obtain the core functional graph. Based on the target nodes and edges connecting the target nodes in the core functional graph, target architecture code for the target hardware architecture is generated, where the target hardware architecture is the hardware architecture to which the original architecture code is migrated.

2. The method for migrating architecture code according to claim 1, characterized in that, The process of pruning and merging the nodes and edges connecting the nodes in the global functional dependency graph to obtain the core functional graph includes: In the global functional dependency graph, the importance score of each node is calculated based on the metric information of each node; When the importance score of a node is lower than the score threshold and the node is a deletable node, delete the edge between the node and the connecting node. Among the retained nodes, node pairs that meet the merging conditions are merged, and the associated edges of the merged nodes are updated to obtain the core functional graph. The merging conditions are determined based on the metric information of the nodes in the node pairs.

3. The method for migrating architecture code according to claim 2, characterized in that, The node's metrics include in-degree, out-degree, and type. The node's importance score is determined based on the following method: Calculate the in-degree score of the node based on its in-degree. Calculate the out-degree score of the node based on its out-degree. Calculate the node type score based on the node type; The importance score of a node is determined based on at least one of the node's in-degree score, the node's out-degree score, and the node's type score.

4. The method for migrating architectural code according to any one of claims 1 to 3, characterized in that, After pruning and merging the nodes and edges connecting the nodes in the global functional dependency graph to obtain the core functional graph, the process further includes: Calculate the difference between the core function graph and the global function dependency graph; When the difference value is greater than or equal to the difference threshold, iterative pruning and merging are performed on the target node and the edge connecting the target node in the core functional graph until the difference value of the core functional graph after two consecutive pruning and merging is less than the difference threshold, and the iterative update ends. The target architecture code is generated based on the target nodes and edges connecting the target nodes in the final pruned and merged core functional graph.

5. The method for migrating architectural code according to any one of claims 1 to 3, characterized in that, The generation of target architecture code for the target hardware architecture based on the target nodes and edges connecting the target nodes in the core functional graph includes: Based on the dependency topology of the core functional graph, identify the target nodes at each level and the topological sorting order of the target nodes at each level. According to the topological sorting order, generate and verify the code of the target nodes at each level in sequence; Based on the code dependencies of the target nodes at each level, the target architecture code is generated recursively.

6. The method for migrating architectural code according to any one of claims 1 to 3, characterized in that, After generating the target architecture code for the target hardware architecture based on the target nodes and edges connecting the target nodes in the core functional graph, the process further includes: The target architecture code is compiled and functionally tested to obtain the test results of the target architecture code; When the detection result of the target architecture code matches the detection result of the original architecture code, the target architecture code is determined to have passed the detection. When the detection result of the target architecture code does not match the detection result of the original architecture code, the target architecture code is iteratively regenerated until the detection result of the finally generated target architecture code matches the detection result of the original architecture code.

7. The method for migrating architectural code according to any one of claims 1 to 3, characterized in that, The structural information includes the various entities of the original architecture code and the relationships between them. The step of constructing a global functional dependency graph of the original architecture code based on the structural information of the original architecture code to be migrated includes: The original architecture code is parsed and symbol analyzed to obtain the various entities and the relationships between them. The entity is designated as the node; The edges connecting the nodes are generated based on the relationships between the entities; The global functional dependency graph is obtained based on the edges of each node and the connecting nodes.

8. A code repository migration device, characterized in that, include: The global functional dependency graph construction module is used to construct the global functional dependency graph of the original architecture code based on the structural information of the original architecture code to be migrated. The core function graph generation module is used to prune and merge the nodes and edges connecting the nodes in the global function dependency graph to obtain the core function graph. The target architecture code generation module is used to generate target architecture code for the target hardware architecture based on the target nodes and edges connecting the target nodes in the core functional graph. The target hardware architecture is the hardware architecture to which the original architecture code is migrated.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and running on the processor, characterized in that, When the processor executes the computer program, it implements the migration method of the architecture code as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the migration method of the architecture code as described in any one of claims 1 to 7.

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