Front lighting type image sensor structure and forming method thereof
By placing the logic devices and circuits on the back side of the semiconductor substrate, the limitations of image quality and low-light performance in front-illuminated image sensors are solved, resulting in an increase in the number of pixel units and photosensitive area, leading to a significant improvement in overall performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SEMICON TECH INNOVATION CENT(BEIJING) CORP
- Filing Date
- 2024-10-09
- Publication Date
- 2026-04-14
AI Technical Summary
Existing front-illuminated image sensors suffer from limitations in image quality and low-light performance, and the number of pixel units and photosensitive area are restricted by circuit obstruction and other limitations.
By placing logic devices and logic circuits on the back side of the semiconductor substrate, while placing pixel devices and pixel circuits on the front side and connecting them through a TSV structure, circuit occlusion is reduced and space is freed up to increase the photosensitive area.
It improves image quality and low-light performance, while increasing the number of pixel units and photosensitive area, resulting in an overall performance improvement of approximately 20%.
Smart Images

Figure CN121865718A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of image sensor technology, and in particular to a front-illuminated image sensor structure and its formation method. Background Technology
[0002] A front-illuminated image sensor (FS CIS) is a structure that allows light to enter the pixel unit from the front of the sensor. Its structure, from top to bottom, consists of: microlenses, filters, a circuit layer, and photodiodes. Due to the presence of the circuit layer, some light may be blocked or scattered, which can degrade image quality and low-light (illuminance) performance. Furthermore, the presence of side-mounted signal processing logic circuitry limits the photosensitive area of a front-illuminated CIS.
[0003] To improve the image quality and low-light performance of front-illuminated CIS (CMOS Image Sensor), back-illuminated image sensors (BSI CIS) were proposed. In BSI CIS, light can directly enter the photodiode from the back, eliminating the need for a metal wiring layer, thus reducing light loss and improving image quality and low-light performance. However, the signal processing logic circuitry located on the side of the BSI CIS still occupies a certain chip area, limiting further increases in pixel count and photosensitive area.
[0004] Therefore, it is necessary to provide a more efficient and reliable technical solution that can simultaneously improve the image quality and low-light performance of front-illuminated image sensors, as well as increase the number of pixel units and photosensitive area. Summary of the Invention
[0005] This application provides a front-illuminated image sensor structure and its formation method, which can simultaneously improve the image quality and low-light performance of the front-illuminated image sensor, as well as increase the number of pixel units and photosensitive area.
[0006] One aspect of this application provides a method for forming a front-illuminated image sensor structure, comprising: providing a semiconductor substrate, the semiconductor substrate including a first side and a second side opposite to each other; forming a plurality of transistor structures and a first metal interconnect structure electrically connecting the plurality of transistor structures on the first side of the semiconductor substrate; forming a plurality of pixel units and a second metal interconnect structure electrically connecting the plurality of pixel units and a TSV structure electrically connecting the second metal interconnect structure and the first metal interconnect structure on the second side of the semiconductor substrate.
[0007] In some embodiments of this application, the plurality of transistor structures include: a gate structure located on a first surface of the semiconductor substrate and a source and a drain located on both sides of the gate structure in the semiconductor substrate.
[0008] In some embodiments of this application, the first metal interconnect structure includes: a plurality of first contact structures that are electrically connected to the gate, source, and drain of the plurality of transistor structures respectively; a first inner interconnect layer that is electrically connected to the plurality of first contact structures; and a metal pad structure that is electrically connected to the first inner interconnect layer.
[0009] In some embodiments of this application, the number and position of the plurality of pixel units correspond to the plurality of transistor structures, and each pixel unit includes at least one photodiode.
[0010] In some embodiments of this application, the second metal interconnect structure includes: a plurality of second contact structures that are electrically connected to each photodiode of the plurality of pixel units; and a second inner interconnect layer that is electrically connected to the plurality of second contact structures.
[0011] In some embodiments of this application, the method for forming the front-illuminated image sensor structure further includes: forming a plurality of filters corresponding to the plurality of pixel units above the second metal interconnect structure and a plurality of microlenses located above the plurality of filters.
[0012] Another aspect of this application provides a front-illuminated image sensor structure, comprising: a semiconductor substrate, the semiconductor substrate including a first side and a second side opposite to each other; the first side of the semiconductor substrate having a plurality of transistor structures and a first metal interconnect structure electrically connecting the plurality of transistor structures; the second side of the semiconductor substrate having a plurality of pixel units, a second metal interconnect structure electrically connecting the plurality of pixel units, and a TSV structure electrically connecting the second metal interconnect structure and the first metal interconnect structure.
[0013] In some embodiments of this application, the plurality of transistor structures include: a gate structure located on a first surface of the semiconductor substrate and a source and a drain located on both sides of the gate structure in the semiconductor substrate.
[0014] In some embodiments of this application, the first metal interconnect structure includes: a plurality of first contact structures that are electrically connected to the gate, source, and drain of the plurality of transistor structures respectively; a first inner interconnect layer that is electrically connected to the plurality of first contact structures; and a metal pad structure that is electrically connected to the first inner interconnect layer.
[0015] In some embodiments of this application, the number and position of the plurality of pixel units correspond to the plurality of transistor structures, and each pixel unit includes at least one photodiode.
[0016] In some embodiments of this application, the second metal interconnect structure includes: a plurality of second contact structures that are electrically connected to each photodiode of the plurality of pixel units; and a second inner interconnect layer that is electrically connected to the plurality of second contact structures.
[0017] In some embodiments of this application, the front-illuminated image sensor structure further includes: a plurality of filters located above the second metal interconnect structure and corresponding to the plurality of pixel units, and a plurality of microlenses located above the plurality of filters.
[0018] This application provides a front-illuminated image sensor structure and its formation method, which can simultaneously improve the image quality and low-light performance of the front-illuminated image sensor, as well as increase the number of pixel units and photosensitive area. Attached Figure Description
[0019] The following accompanying drawings describe in detail the exemplary embodiments disclosed in this application. The same reference numerals denote similar structures in several views of the drawings. Those skilled in the art will understand that these embodiments are non-limiting and exemplary, and the drawings are for illustrative purposes only and are not intended to limit the scope of this application. Other embodiments may similarly fulfill the inventive intent of this application. It should be understood that the drawings are not drawn to scale.
[0020] in:
[0021] Figures 1 to 5 This is a schematic diagram of the steps in the method for forming a front-illuminated image sensor structure according to an embodiment of this application. Detailed Implementation
[0022] The following description provides specific application scenarios and requirements for this application, intended to enable those skilled in the art to make and use the content of this application. Various partial modifications to the disclosed embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments and applications without departing from the spirit and scope of this application. Therefore, this application is not limited to the embodiments shown, but rather to the widest scope consistent with the claims.
[0023] The technical solution of the present invention will be described in detail below with reference to the embodiments and accompanying drawings.
[0024] Figures 1 to 5 This is a schematic diagram of each step in the method for forming a front-illuminated image sensor structure according to an embodiment of this application. The method for forming a semiconductor structure according to an embodiment of this application will be described in detail below with reference to the accompanying drawings.
[0025] refer to Figure 1As shown, a semiconductor substrate 100 is provided, the semiconductor substrate 100 including a first surface 101 and a second surface 102 opposite to each other.
[0026] In some embodiments of this application, the material of the semiconductor substrate 100 includes (i) elemental semiconductors, such as silicon or germanium; (ii) compound semiconductors, such as silicon carbide, gallium arsenide, gallium phosphide or indium phosphide; (iii) alloy semiconductors, such as silicon germanium carbide, silicon germanium, gallium arsenide phosphide or gallium indium phosphide; or (iv) combinations thereof.
[0027] refer to Figure 2 As shown, a plurality of transistor structures 110 and a first metal interconnect structure 120 electrically connecting the plurality of transistor structures 110 are formed on the first surface 101 of the semiconductor substrate 100.
[0028] The transistor structure 110 serves as a logic device in the front-illuminated image sensor structure of this application, and the first metal interconnect structure 120 serves as the circuit connection layer of the logic device.
[0029] refer to Figure 2 As shown, in some embodiments of this application, the plurality of transistor structures 110 include: a gate structure 111 located on the first surface 101 of the semiconductor substrate 100, and a source 112 and a drain 113 located on both sides of the gate structure 111 in the semiconductor substrate 100. The number of the plurality of transistor structures 110 can be arbitrary; only two are shown here as an example. Transistor structures are common basic structures in the semiconductor field, therefore, the detailed structure and formation process of the transistor structure 110 are not described in detail here, but those skilled in the art can understand the fabrication steps of the transistor structure 110 based on common knowledge.
[0030] refer to Figure 2 As shown, in some embodiments of this application, the first metal interconnect structure 120 includes: a plurality of first contact structures 121 that are respectively electrically connected to the gate structure 111, source 112, and drain 113 of the plurality of transistor structures 110; a first inner interconnect layer 122 that is electrically connected to the plurality of first contact structures 121; and a metal pad structure 123 that is electrically connected to the first inner interconnect layer 122. The metal interconnect process in the subsequent process is also a conventional basic process in the semiconductor technology field; therefore, the detailed structure and formation steps of the first metal interconnect structure 120 are not described in detail here.
[0031] refer to Figure 2As shown, in some embodiments of this application, a first interlayer dielectric layer 130 is further formed on the first surface of the semiconductor substrate 100, covering the semiconductor substrate 100 and the transistor structure 110 and filling the gaps in the first metal interconnect structure 120. The material of the first interlayer dielectric layer 130 includes insulating dielectric materials such as silicon oxide or silicon nitride.
[0032] refer to Figure 3 As shown, the second surface 102 of the semiconductor substrate 100 is thinned.
[0033] In some embodiments of this application, the method for thinning the second surface 102 of the semiconductor substrate 100 is, for example, to: flip the semiconductor substrate 100 and use a carrier wafer as a carrier to support the first surface 101 of the semiconductor substrate 100; and to grind and thin the second surface 102 of the semiconductor substrate 100 using a chemical mechanical polishing process.
[0034] refer to Figure 4 As shown, a plurality of pixel units 140, a second metal interconnect structure 150 electrically connecting the plurality of pixel units 140, and a TSV (through silicon via) structure 160 electrically connecting the second metal interconnect structure 150 and the first metal interconnect structure 120 are formed on the second surface 102 of the semiconductor substrate 100.
[0035] The pixel unit 140 is the core device of the front-illuminated image sensor structure of this application, and the second metal interconnect structure 150 serves as the circuit connection layer of the pixel unit 140.
[0036] refer to Figure 4 As shown, in some embodiments of this application, the number and position of the plurality of pixel units 140 correspond to the plurality of transistor structures 110, and each pixel unit 140 includes at least one photodiode 141. The correspondence between the plurality of pixel units 140 and the plurality of transistor structures 110 means that, according to the dimensions in the actual design, the positions of the plurality of pixel units 140 and the plurality of transistor structures 110 approximately coincide in the vertical direction. Those skilled in the art should understand that the number and position of the plurality of pixel units 140 and the plurality of transistor structures 110 may also be different. The number of photodiodes 141 can be arbitrary; this application only uses three photodiodes in a conventional RGB pixel unit as an example. Photodiodes are a basic structure of image sensors, and their formation methods are well known to those skilled in the art.
[0037] refer to Figure 4As shown, in some embodiments of this application, the second metal interconnect structure 150 includes: a plurality of second contact structures 151 respectively electrically connected to each photodiode 141 of the plurality of pixel units 140; and a second inner interconnect layer 152 electrically connected to the plurality of second contact structures 151. The metal interconnect process in the back-end process is also a conventional basic process in the semiconductor technology field; therefore, the detailed structure and formation steps of the second metal interconnect structure 150 are not described in detail here.
[0038] refer to Figure 4 As shown, in some embodiments of this application, the second surface 102 of the semiconductor substrate 100 is further formed with a second interlayer dielectric layer 170 covering the semiconductor substrate 100, the pixel unit 140, and the second metal interconnect structure 150. The material of the second interlayer dielectric layer 170 includes insulating dielectric materials such as silicon oxide or silicon nitride.
[0039] In conventional front-illuminated image sensor structures, logic devices and circuits, along with pixel devices and circuits, are formed on the front side of the semiconductor substrate. Light is easily blocked by the logic and pixel circuits, affecting image quality and low-light performance, and also limiting the number of pixel units and photosensitive area. In the technical solution of this application, pixel devices and circuits are formed on the front side of the semiconductor substrate (i.e., the second surface 102), while logic devices and circuits are formed on the back side of the semiconductor substrate (i.e., the first surface 101). This reduces light blocking by the circuit interconnect layer (reducing the blocking area by approximately 80% compared to conventional structures) and frees up space for pixel units (freeing up approximately 40% of the area compared to conventional structures). The technical solution of this application can simultaneously improve the image quality and low-light performance of front-illuminated image sensors, as well as increase the number of pixel units and photosensitive area, resulting in an overall performance improvement of approximately 20%.
[0040] refer to Figure 5 As shown, in some embodiments of this application, the method for forming the front-illuminated image sensor structure further includes: forming a plurality of filters 180 on the surface of the second interlayer dielectric layer 170 (above the second metal interconnect structure 150) corresponding to the plurality of pixel units 140, and a plurality of microlenses 190 located above the plurality of filters 180. Filters and microlenses are also basic structures in image sensors, therefore their detailed structures and fabrication processes will not be described in detail here.
[0041] In some embodiments of this application, the microlens 180 is located directly above the pixel unit 140 and the projected area of the microlens 180 in the vertical direction is larger than the area of the pixel unit 140, so that light can fully enter the pixel unit.
[0042] This application provides a method for forming a front-illuminated image sensor structure, which can simultaneously improve the image quality and low-light performance of the front-illuminated image sensor, as well as increase the number of pixel units and the photosensitive area.
[0043] Embodiments of this application also provide a front-illuminated image sensor structure, see reference. Figure 5 As shown, it includes: a semiconductor substrate 100, the semiconductor substrate 100 including a first surface 101 and a second surface 102 opposite to each other; the first surface 101 of the semiconductor substrate 100 has a plurality of transistor structures 110 and a first metal interconnect structure 120 electrically connecting the plurality of transistor structures 110; the second surface 102 of the semiconductor substrate 100 has a plurality of pixel units 140, a second metal interconnect structure 150 electrically connecting the plurality of pixel units 140, and a TSV structure 160 electrically connecting the second metal interconnect structure 150 and the first metal interconnect structure 120.
[0044] In some embodiments of this application, the material of the semiconductor substrate 100 includes (i) elemental semiconductors, such as silicon or germanium; (ii) compound semiconductors, such as silicon carbide, gallium arsenide, gallium phosphide or indium phosphide; (iii) alloy semiconductors, such as silicon germanium carbide, silicon germanium, gallium arsenide phosphide or gallium indium phosphide; or (iv) combinations thereof.
[0045] refer to Figure 5 As shown, the transistor structure 110 serves as a logic device in the front-illuminated image sensor structure of this application, and the first metal interconnect structure 120 serves as the circuit connection layer of the logic device.
[0046] refer to Figure 5 As shown, in some embodiments of this application, the plurality of transistor structures 110 include: a gate structure 111 located on the first surface 101 of the semiconductor substrate 100, and a source 112 and a drain 113 located on both sides of the gate structure 111 in the semiconductor substrate 100. The number of the plurality of transistor structures 110 can be arbitrary; only two are shown here as an example. Transistor structures are common basic structures in the semiconductor field, therefore, the detailed structure and formation process of the transistor structure 110 are not described in detail here, but those skilled in the art can understand the fabrication steps of the transistor structure 110 based on common knowledge.
[0047] refer to Figure 5As shown, in some embodiments of this application, the first metal interconnect structure 120 includes: a plurality of first contact structures 121 that are respectively electrically connected to the gate structure 111, source 112, and drain 113 of the plurality of transistor structures 110; a first inner interconnect layer 122 that is electrically connected to the plurality of first contact structures 121; and a metal pad structure 123 that is electrically connected to the first inner interconnect layer 122. The metal interconnect process in the subsequent process is also a conventional basic process in the semiconductor technology field; therefore, the detailed structure and formation steps of the first metal interconnect structure 120 are not described in detail here.
[0048] refer to Figure 5 As shown, in some embodiments of this application, a first interlayer dielectric layer 130 is further formed on the first surface of the semiconductor substrate 100, covering the semiconductor substrate 100 and the transistor structure 110 and filling the gaps in the first metal interconnect structure 120. The material of the first interlayer dielectric layer 130 includes insulating dielectric materials such as silicon oxide or silicon nitride.
[0049] refer to Figure 5 As shown, the pixel unit 140 is the core device of the front-illuminated image sensor structure of this application, and the second metal interconnect structure 150 serves as the circuit connection layer of the pixel unit 140.
[0050] refer to Figure 5 As shown, in some embodiments of this application, the number and position of the plurality of pixel units 140 correspond to the plurality of transistor structures 110, and each pixel unit 140 includes at least one photodiode 141. The correspondence between the plurality of pixel units 140 and the plurality of transistor structures 110 means that, according to the dimensions in the actual design, the positions of the plurality of pixel units 140 and the plurality of transistor structures 110 approximately coincide in the vertical direction. Those skilled in the art should understand that the number and position of the plurality of pixel units 140 and the plurality of transistor structures 110 may also be different. The number of photodiodes 141 can be arbitrary; this application only uses three photodiodes in a conventional RGB pixel unit as an example. Photodiodes are a basic structure of image sensors, and their formation methods are well known to those skilled in the art.
[0051] refer to Figure 5As shown, in some embodiments of this application, the second metal interconnect structure 150 includes: a plurality of second contact structures 151 respectively electrically connected to each photodiode 141 of the plurality of pixel units 140; and a second inner interconnect layer 152 electrically connected to the plurality of second contact structures 151. The metal interconnect process in the back-end process is also a conventional basic process in the semiconductor technology field; therefore, the detailed structure and formation steps of the second metal interconnect structure 150 are not described in detail here.
[0052] refer to Figure 5 As shown, in some embodiments of this application, the second surface 102 of the semiconductor substrate 100 is further formed with a second interlayer dielectric layer 170 covering the semiconductor substrate 100, the pixel unit 140, and the second metal interconnect structure 150. The material of the second interlayer dielectric layer 170 includes insulating dielectric materials such as silicon oxide or silicon nitride.
[0053] In conventional front-illuminated image sensor structures, logic devices and circuits, along with pixel devices and circuits, are formed on the front side of the semiconductor substrate. Light is easily blocked by the logic and pixel circuits, affecting image quality and low-light performance, and also limiting the number of pixel units and photosensitive area. In the technical solution of this application, pixel devices and circuits are formed on the front side of the semiconductor substrate (i.e., the second surface 102), while logic devices and circuits are formed on the back side of the semiconductor substrate (i.e., the first surface 101). This reduces light blocking by the circuit interconnect layer (reducing the blocking area by approximately 80% compared to conventional structures) and frees up space for pixel units (freeing up approximately 40% of the area compared to conventional structures). The technical solution of this application can simultaneously improve the image quality and low-light performance of front-illuminated image sensors, as well as increase the number of pixel units and photosensitive area, resulting in an overall performance improvement of approximately 20%.
[0054] refer to Figure 5 As shown, in some embodiments of this application, the front-illuminated image sensor structure further includes: a plurality of filters 180 located on the surface of the second interlayer dielectric layer 170 (above the second metal interconnect structure 150) corresponding to the plurality of pixel units 140, and a plurality of microlenses 190 located above the plurality of filters 180. Filters and microlenses are also basic structures in image sensors; therefore, their detailed structures and fabrication processes will not be described in detail here.
[0055] In some embodiments of this application, the microlens 180 is located directly above the pixel unit 140 and the projected area of the microlens 180 in the vertical direction is larger than the area of the pixel unit 140, so that light can fully enter the pixel unit.
[0056] This application provides a front-illuminated image sensor structure and its formation method, which can simultaneously improve the image quality and low-light performance of the front-illuminated image sensor, as well as increase the number of pixel units and photosensitive area.
[0057] In summary, after reading this application, those skilled in the art will understand that the foregoing application content is presented by way of example only and is not restrictive. Although not explicitly stated herein, those skilled in the art will understand that this application is intended to encompass various reasonable changes, improvements, and modifications to the embodiments. These changes, improvements, and modifications are all within the spirit and scope of the exemplary embodiments of this application.
[0058] It should be understood that the term "and / or" as used in this embodiment includes any or all combinations of one or more of the associated listed items. It should be understood that when an element is referred to as "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or there may be an intermediate element.
[0059] Similarly, it should be understood that when an element such as a layer, region, or substrate is referred to as being "on" another element, it may be directly on that other element, or there may be intermediate elements present. Conversely, the term "directly" means without intermediate elements. It should also be understood that the terms "comprising," "including," "including," or "comprises," as used in this application, indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.
[0060] It should also be understood that although the terms first, second, third, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the teachings of this application, a first element in some embodiments may be referred to as a second element in other embodiments. The same reference numerals or the same reference signs denote the same elements throughout the specification.
[0061] Furthermore, this application specification describes exemplary embodiments by referring to idealized exemplary cross-sectional views and / or plan views and / or perspective views. Therefore, differences from the illustrated shapes are foreseeable due to factors such as manufacturing techniques and / or tolerances. Thus, exemplary embodiments should not be construed as limited to the shapes of the regions shown herein, but should include deviations in shape caused, for example, by manufacturing processes. For instance, etched areas shown as rectangular typically have circular or curved features. Therefore, the regions shown in the figures are substantially schematic, and their shapes are not intended to illustrate the actual shape of the regions of the device, nor are they intended to limit the scope of the exemplary embodiments.
Claims
1. A method for forming a front-illuminated image sensor structure, characterized in that, include: A semiconductor substrate is provided, the semiconductor substrate including opposing first and second surfaces; A plurality of transistor structures and a first metal interconnect structure electrically connecting the plurality of transistor structures are formed on a first surface of the semiconductor substrate; A plurality of pixel units, a second metal interconnect structure electrically connecting the plurality of pixel units, and a TSV structure electrically connecting the second metal interconnect structure and the first metal interconnect structure are formed on the second surface of the semiconductor substrate.
2. The method for forming the front-illuminated image sensor structure as described in claim 1, characterized in that, The plurality of transistor structures include: a gate structure located on a first surface of the semiconductor substrate, and source and drain electrodes located on both sides of the gate structure in the semiconductor substrate.
3. The method for forming the front-illuminated image sensor structure as described in claim 2, characterized in that, The first metal interconnect structure includes: a plurality of first contact structures that are electrically connected to the gate, source and drain of the plurality of transistor structures respectively; a first inner interconnect layer that is electrically connected to the plurality of first contact structures; and a metal pad structure that is electrically connected to the first inner interconnect layer.
4. The method for forming a front-illuminated image sensor structure as described in claim 1, characterized in that, The number and position of the plurality of pixel units correspond to the plurality of transistor structures, and each pixel unit includes at least one photodiode.
5. The method for forming the front-illuminated image sensor structure as described in claim 4, characterized in that, The second metal interconnect structure includes: a plurality of second contact structures that are electrically connected to each photodiode of the plurality of pixel units; and a second inner interconnect layer that is electrically connected to the plurality of second contact structures.
6. The method for forming a front-illuminated image sensor structure as described in claim 1, characterized in that, Also includes: A plurality of filters corresponding to the plurality of pixel units are formed above the second metal interconnect structure, and a plurality of microlenses are formed above the plurality of filters.
7. A front-illuminated image sensor structure, characterized in that, include: A semiconductor substrate, the semiconductor substrate including opposing first and second surfaces; The first surface of the semiconductor substrate has a plurality of transistor structures and a first metal interconnect structure electrically connecting the plurality of transistor structures. The second surface of the semiconductor substrate has a plurality of pixel units, a second metal interconnect structure electrically connecting the plurality of pixel units, and a TSV structure electrically connecting the second metal interconnect structure and the first metal interconnect structure.
8. The front-illuminated image sensor structure as described in claim 7, characterized in that, The plurality of transistor structures include: a gate structure located on a first surface of the semiconductor substrate, and source and drain electrodes located on both sides of the gate structure in the semiconductor substrate.
9. The front-illuminated image sensor structure as described in claim 8, characterized in that, The first metal interconnect structure includes: a plurality of first contact structures that are electrically connected to the gate, source and drain of the plurality of transistor structures respectively; a first inner interconnect layer that is electrically connected to the plurality of first contact structures; and a metal pad structure that is electrically connected to the first inner interconnect layer.
10. The front-illuminated image sensor structure as described in claim 7, characterized in that, The number and position of the plurality of pixel units correspond to the plurality of transistor structures, and each pixel unit includes at least one photodiode.
11. The front-illuminated image sensor structure as described in claim 10, characterized in that, The second metal interconnect structure includes: a plurality of second contact structures that are electrically connected to each photodiode of the plurality of pixel units; and a second inner interconnect layer that is electrically connected to the plurality of second contact structures.
12. The front-illuminated image sensor structure as described in claim 7, characterized in that, Also includes: A plurality of filters located above the second metal interconnect structure and corresponding to the plurality of pixel units, and a plurality of microlenses located above the plurality of filters.